Multi-Stage Pulse Shaping Network

Abstract

In a discrete supply modulation system, a circuit includes a multi-stage pulse-shaping network (PSN) having an input configured to receive a variable bias supply signal from a power management circuit (PMC) and an output coupled to one or more second PSN stages, each of which has an output configured to be coupled to a respective supply (i.e., bias) terminal of one or more radio frequency amplifiers. Such an arrangement is suitable for use with transmission systems in mobile cellular handsets operating according to fifth-generation (5G) communications and other connectivity protocols such as 802.11a / b / g / n / ac / ax / ad / ay, and for use with multiple simultaneous transmission systems including multiple-input / multiple-output (MIMO), uplink carrier aggregation (ULCA), and beamforming.

Description

[Technical field]

[0001] The subject matter disclosed herein relates generally to radio frequency (RF) circuits, and more particularly to devices, systems, and techniques for use in operating a supply modulation transmitter. [Background technology]

[0002] As known in the art, a radio frequency (RF) transmitter is a device that produces an RF signal. An RF transmitter may be included, for example, as part of a wireless communication system that transmits information over a distance using electromagnetic waves (radio waves).

[0003] Also, as is known, in RF communication transmitters (such as those suitable for use in mobile devices such as cellular telephones), a tradeoff must generally be made between energy efficiency and linearity. It would therefore be desirable to provide systems and techniques that enable users to transmit data carrying RF signals with both high efficiency and high linearity. Summary of the Invention [Means for solving the problem]

[0004] In accordance with the concepts, systems, devices, and techniques described herein, in a supply modulation system, a circuit includes a multi-stage first pulse shaping network (PSN) having an input configured to be coupled to a power management circuit (PMC) and having a first PSN stage (e.g., so-called stage A) having an output, and one or more second PSN stages (e.g., one or more so-called stage B), each of the one or more second PSN stages having an input configured to be coupled to an output of the first PSN stage and having an output configured to be coupled to a supply terminal of a radio frequency (RF) amplifier.

[0005] With this particular arrangement, a circuit is provided that is capable of controlling receive band noise and out-of-band emissions for feed modulated transmitters (i.e., both analog and digital feed modulated transmitters) while maintaining linearity and efficiency. Furthermore, as will be apparent from the description herein below, the circuit provided by the concepts and techniques described herein can also accommodate many RF amplifiers (e.g., RF power amplifiers) that are spaced apart (e.g., physically distant from) the PMC in a cost-effective mobile device form factor.

[0006] In an embodiment, the first PSN stage comprises a passive LC filter. In an embodiment, the first PSN stage is implemented using parasitic elements. For example, the first PSN stage may be implemented using parasitic inductance and / or capacitive and / or resistive characteristics of the PMC and / or an electrical signal path circuit that provides an electrical connection between the first PSN stage and the second PSN stage (e.g., a signal path that provides an electrical connection between a so-called A stage and one or more so-called B stages).

[0007] According to further aspects of the concepts, systems, devices, and techniques described herein, in a supply modulation system, a reconfigurable filter circuit having first and second terminals includes two or more signal paths, each of the at least two or more signal paths comprising at least one reactance element, and at least one of the two or more signal paths includes a switch element configured to selectively couple at least one of the at least one reactance element between a reference potential and at least one of the first and second terminals of the reconfigurable filter circuit.

[0008] With this particular arrangement, a reconfigurable filter circuit is provided that is configured to provide multiple filter characteristics to the supply voltage terminal (i.e., bias terminal) of the RF amplifier. By placing a switch in each of two or more signal paths in an open or closed position, one of a number of different filtering characteristics across a given RF frequency band can be provided. The switches can be independently operated to provide the desired filter characteristics. For example, with N reconfigurable configurable signal paths (N is an integer corresponding to a number of switchable signal paths in the reconfigurable filter circuit greater than or equal to 1), the reconfigurable filter circuit can have 2 N It is possible to provide a number of different filter characteristics, thus allowing the selection of one of a number of desired filtering characteristics across a given RF frequency band.

[0009] In an embodiment, the filter characteristic provided by the reconfigurable filter circuit may be selected in response to changing the impedance of a load coupled to an RF output port of the RF amplifier to that to which the reconfigurable filter circuit is coupled. Thus, the reconfigurable filter circuit enables dynamic selection of one of a plurality of desired filtering characteristics across a predetermined RF frequency band. In an embodiment, at least one of the at least two or more signal paths comprises a switch element having a first terminal coupled to one of the reactance elements and a second terminal coupled to a reference potential.

[0010] By providing a switch element coupled between the reactance element and either a reference potential or one of the reconfigurable filter terminals, the impedance characteristic of the reactance element can be switched in and out of the filter circuit (thus making the filter circuit reconfigurable). In one embodiment, by placing the switch in a first switch position (e.g., a closed position such that the switch provides a low impedance signal path between the reactance element and the reference potential), a reconfigurable filter circuit having a first filter characteristic is provided, and by placing the switch in a second, different switch position (e.g., an open position such that the switch provides a high impedance signal path between the reactance element and the reference potential), a reconfigurable filter circuit having a second, different filter characteristic is provided.

[0011] In an embodiment, at least one of the at least two or more signal paths includes a switch element having a first terminal coupled to one of the first and second terminals of the reconfigurable filter circuit and a second terminal coupled to a first terminal of one of the reactance elements.

[0012] By providing a switch element coupled between one of the reconfigurable filter circuit terminals and the reactive element, the impedance characteristic of the reactive element can be switched in and out of the filter circuit (thus making the filter circuit reconfigurable). In one embodiment, by placing the switch in a first switch position (e.g., a closed position such that the switch provides a low impedance signal path between the reactive element and one of the reconfigurable filter circuit terminals), a reconfigurable filter circuit having a first filter characteristic is provided, and by placing the switch in a second, different switch position (e.g., an open position such that the switch provides a high impedance signal path between the reactive element and one of the reconfigurable filter circuit terminals), a reconfigurable filter circuit having a second, different filter characteristic is provided.

[0013] In an embodiment, a second terminal of one of the reactance elements is coupled to a reference potential (e.g., ground). In an embodiment, the reactance element may comprise one or more capacitive and / or inductive and / or resistive elements. In an embodiment, the switch element may comprise one or more of a transistor (e.g., a field effect transistor), a diode, or any other circuit element capable of electrically connecting or electrically disconnecting (or otherwise electrically isolating) one or more reactance elements to or from the effectively reconfigurable filter circuit. In an embodiment, the reactance element may comprise one or more elements having a capacitive impedance characteristic over a predetermined frequency range and / or one or more elements having an inductive impedance characteristic over a predetermined frequency range. In an embodiment, the reactance element may comprise one or more capacitors and / or inductors. In an embodiment, the reconfigurable filter circuit may comprise one or more resistive elements coupled in series or parallel with one or more capacitive and / or inductive elements.

[0014] The supply modulation system is applicable to any type of supply modulation (analog or digital). In an embodiment, the supply modulation system is provided as a discrete supply modulation system. The present specification also provides, for example, the following items: (Item 1) 1. A multi-stage pulse shaping network configured to be coupled to a bias terminal of a radio frequency (RF) amplifier in a discrete supply modulation system, comprising: (a) a first pulse shaping network (PSN) stage having an input configured to be coupled to a power management circuit (PMC) and having an output; (b) one or more second PSN stages, each of the one or more second PSN stages being physically separated and remote from the first PSN stage, each of the second PSN stages having an input configured to be coupled to an output of the first PSN stage and having an output configured to be coupled to a bias terminal of an RF amplifier; (c) a signal path having a first end coupled to the output of the first PSN stage and having a second end coupled to the input of the second PSN stage; A multi-stage pulse shaping network comprising: (Item 2) 2. The circuit of claim 1, wherein the first PSN stage comprises a passive LC filter. (Item 3) The first PSN stage comprises: (a) the PMC; or (b) the signal path coupled between the output of the first PSN stage and the input of the second PSN stage. 2. The circuit of claim 1, implemented utilizing parasitic inductance and / or capacitance and / or resistance characteristics of at least one of: (Item 4) The first PSN stage comprises at least (a) the PMC; (b) the signal path coupled between the output of the first PSN stage and the input of the second PSN stage; (c) an RF amplifier; (d) passive components constituting the PSN; 2. The circuit of claim 1, implemented by utilizing parasitic inductance and / or capacitance and / or resistance characteristics of (Item 5) 2. The circuit of claim 1, wherein at least one of the first PSN stage and the second PSN stage comprises a reconfigurable filter circuit. (Item 6) Item 6. The circuit of item 5, wherein the reconfigurable filter circuit comprises a switch element coupled between the reactive element and a reference potential such that a characteristic impedance of the reactive element can be switched in and out of the filter circuit. (Item 7) The reconfigurable filter circuit includes: the switch provides a low impedance signal path between a reactive element and a reference potential such that in response to the switch being in a first switch state, the reconfigurable filter circuit is provided having a first filter characteristic; The switch provides a high impedance signal path between the reactive element and the reference potential such that in response to the switch being in a second, different switch state, the reconfigurable filter circuit is provided having a second, different filter characteristic within a desired frequency band. 6. The circuit of claim 5, further comprising a switch element coupled between the reactance element and the reference potential. (Item 8) 7. The circuit of claim 6, wherein the reactance element comprises one or more capacitive and / or inductive elements. (Item 9) 7. The circuit of claim 6, wherein the reconfigurable filter circuit comprises one or more resistive elements coupled in series or parallel with one or more capacitive and / or inductive and / or resistive elements. (Item 10) 2. The circuit of claim 1, wherein the PSN comprises a plurality of second PSN stages, each of the second PSN stages spaced apart from and remote from the first PSN stage, each of the second PSN stages having an input configured to be coupled to the output of the first PSN stage and having an output configured to be coupled to a supply terminal of a corresponding one of a plurality of RF amplifiers. (Item 11) 2. The circuit of claim 1, wherein at least one PSN stage is physically located in close proximity to the PMC and at least one PSN stage is physically located in close proximity to the RF amplifier. (Item 12) 2. The circuit of claim 1, wherein at least one PSN stage is provided entirely from parasitics from one of: (1) parasitics from a PMC; (2) parasitics from the signal path electrically coupling the first stage to the second stage; (3) parasitics from a signal path electrically coupling at least one stage to an RF amplifier; and (4) parasitics from an RF amplifier. (Item 13) 2. The circuit of claim 1, wherein at least one PSN stage comprises a series impedance and a shunt impedance formed using two or more of a resistor, an inductor, a capacitor, a magnetic, and / or a ferrite bead. (Item 14) 2. The circuit of claim 1, wherein the first PSN stage is a first of a plurality of first PSN stages, the circuit further comprising a plurality of second PSN stages, each of the second PSN stages coupled to one or more of the first PSN stages. (Item 15) Item 15. The circuit of item 14, wherein at least one of the first and second PSN stages includes at least one switch for adjusting an electrical characteristic of the PSN stage. (Item 16) 2. The circuit of claim 1, wherein the first PSN stage is a first of a plurality of first PSN stages, the circuit further comprising a plurality of second PSN stages, each of the first PSN stages coupled to two or more second PSN stages. (Item 17) Item 17. The circuit of item 16, wherein at least one of the first and second plurality of PSN stages includes at least one switch for adjusting an electrical characteristic of the PSN stage. (Item 18) 1. A discrete supply modulation system for providing a varying supply bias voltage to a supply terminal of a radio frequency (RF) amplifier, comprising: a power management circuit (PMC) having an input and an output; a radio frequency (RF) amplifier having an RF input, an RF output and a supply terminal; a single stage pulse shaping network having an input coupled to the PMC and having an output coupled to the supply terminal of the RF amplifier; a signal path electrically coupling the input of the single stage PSN to the output of the PMC and electrically coupling the output of the PSN to the supply terminal of the RF amplifier, the single stage PSN incorporating at least some parasitic impedance elements from at least one of: (1) the PMC; (2) the signal path electrically coupling the single stage PSN to the RF amplifier; and (3) the RF amplifier; 1. A discrete supply modulation system comprising: (Item 19) The single stage PSN further comprises a reconfigurable filter. (Item 20) 1. A radio frequency (RF) transmission system, comprising: an RF amplifier having an RF input, an RF output, and a supply terminal configured to receive a supply bias voltage signal; a discrete supply modulation system having an input configured to receive an input voltage and an output coupled to the supply terminal of the RF amplifier, the discrete supply modulation system output configured to provide a supply bias voltage signal to the supply terminal of the RF amplifier; Equipped with Discrete supply modulation system A power management circuit (PMC); a single stage pulse shaping network having an input coupled to the PMC and having an output coupled to the supply terminal of the RF amplifier; a first signal path electrically coupling the output of the PMC to an input of the single stage PSN; a second signal path electrically coupling the output of the PSN to the supply terminal of the RF amplifier, the single stage PSN comprising: (1) one or more parasitic elements from the PMC; (2) one or more parasitic elements from the first signal path electrically coupling the output of the PMC to the input of the single stage PSN; (3) one or more parasitic elements from the second signal path electrically coupling the output of the PSN to the supply terminal of the RF amplifier; (4) one or more parasitic elements from the RF amplifier; a second signal path including a parasitic element provided with one or more of: A radio frequency (RF) transmission system comprising: (Item 21) The single stage PSN comprises: (1) one or more parasitic elements from the PMC; (2) one or more parasitic elements from the first signal path; and (3) one or more parasitic elements from the second signal path; and (4) one or more parasitic elements from the RF amplifier; 21. The radio frequency transmission system according to item 20, wherein the radio frequency transmission system is provided entirely from parasitic elements provided from one or more of: (Item 22) 21. The radio frequency transmission system of claim 20, wherein the RF supply terminal is configured to receive one of an AC supply bias voltage and a DC supply bias voltage. [Brief description of the drawings]

[0015] The foregoing features can be more fully understood from the following description of the drawings.

[0016] [Figure 1]FIG. 1 is a block diagram of one illustrative embodiment of a radio frequency (RF) transmitter including a power management circuit (PMC) with a single output and a multi-stage (i.e., split-type) pulse shaping network (PSN).

[0017] [Diagram 2] FIG. 2 is a block diagram of another illustrative embodiment of an RF transmitter including a single-output PMC with a coupled multi-stage (ie, split) PSN.

[0018] [Diagram 3] FIG. 3 is a block diagram of an illustrative RF transmitter having a single output PMC and an alternative embodiment of a multi-stage PSN coupled to multiple RF amplifiers.

[0019] [Figure 4] FIG. 4 is a block diagram of an illustrative RF transmitter having a multi-output PMC and an alternative embodiment of a multi-stage PSN coupled to multiple RF amplifiers.

[0020] [Diagram 5] FIG. 5 is a block diagram of an illustrative embodiment of a multi-stage PSN.

[0021] [Figure 6] FIG. 6 is a block diagram of an alternative embodiment of a multi-stage PSN.

[0022] [Figure 7] FIG. 7 is a block diagram of an alternative embodiment of a multi-stage PSN.

[0023] [Figure 8] FIG. 8 is a schematic diagram of an exemplary filter circuit suitable for use with a multi-stage PSN having legs with shunt capacitors coupled in series with resistive elements between the filter terminals and a reference potential.

[0024] [Figure 8A] FIG. 8A is a schematic diagram of an exemplary filter circuit suitable for use with a multi-stage PSN having legs with shunt capacitors coupled in series with inductive elements between the filter terminals and a reference potential.

[0025] [Figure 8B] FIG. 8B is a schematic diagram of an exemplary filter circuit suitable for use with a multi-stage PSN having parallel inductive and capacitive paths coupled between the filter terminals.

[0026] [Figure 8C] FIG. 8C is a schematic diagram of an exemplary filter circuit suitable for use with a multi-stage PSN having a shunt capacitor coupled in series with a switch between the filter terminal and a reference potential.

[0027] [Figure 8D] FIG. 8D is a schematic diagram of an exemplary filter circuit suitable for use with a multi-stage PSN having a shunt capacitor coupled in series with a switch between the filter terminal and a reference potential.

[0028] [Figure 8E] FIG. 8E is a block diagram of an illustrative PSN.

[0029] [Figure 9] FIG. 9 is a block diagram of an illustrative integrated circuit (IC) having a split PSN.

[0030] [Figure 9A] FIG. 9A is a block diagram of an illustrative IC having a split PSN.

[0031] [Figure 10] FIG. 10 is a block diagram of an illustrative hybrid circuit having a PMC coupled to a multi-stage PSN.

[0032] [Figure 10A]FIG. 10A is a block diagram of an alternative illustrative hybrid circuit having a PMC coupled to a multi-stage PSN.

[0033] [Figure 11] FIG. 11 is a block diagram of an illustrative circuit having a PMC module and an RF amplifier module, at least one of the modules comprising at least a portion of a multi-stage PSN.

[0034] [Figure 11A] FIG. 11A is a schematic diagram of a portion of an RF amplifier module that comprises part of a multi-stage PSN. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0035] Referring now to FIG. 1, an illustrative radio frequency (RF) transmission system 10 capable of simultaneously achieving both high efficiency and high linearity includes a discrete supply modulation system 12 that supplies a bias voltage signal to a bias (i.e., supply) terminal 23 of a radio frequency amplifier 24.

[0036] Discrete feed modulation system 12 includes a controller 14 with control logic circuitry 16 (or, more simply, control logic 16). Control logic 16 may receive or otherwise obtain transmit data to be transmitted into a wireless channel. The transmit data may be in any format (e.g., a binary bit stream, I and Q data, etc.). Control logic 16 may then use this data and other possible factors to provide a signal to a digital-to-RF modulator 18, which may receive the signal provided to it and generate a corresponding RF signal to be transmitted.

[0037] In some embodiments, the goal may be to generate an RF transmission signal that contains an accurate representation of the transmission data. Any of several different modulation and coding schemes (MCS) may be used to represent the transmission data within the RF transmission signal. The MCS may include, for example, binary phase shift keying (BPSK), quadrature phase shift keying (QPSK), quadrature amplitude modulation (e.g., QAM, 16QAM, 64QAM, 128QAM, etc.), orthogonal frequency division multiplexing (OFDM), and / or others. Some of these MCS have a relatively high peak-to-average power ratio.

[0038] MCSs with high peak-to-average power ratios typically require highly linear power amplification (e.g., via an RF power amplifier such as power amplifier 24 of FIG. 1) to provide an accurate representation of the transmitted data. In various embodiments described herein, transmission systems and techniques are described that are capable of providing efficient power amplification with sufficient linearity to support MCSs with high peak-to-average power ratios and / or stringent error vector magnitude (EVM) requirements.

[0039] As shown in FIG. 1, the control logic 16 obtains transmit data (e.g., I, Q data, which may be a stream of data (i.e., transmit data) to be transmitted from the RF transmitter 10) and uses that data to provide input information to the digital / RF modulator 18 and to the power management circuit 20. In one possible approach, the control logic 16 may provide separate I and Q data to the digital / RF modulator. The digital / RF modulator may then use the I, Q information to modulate an RF carrier to generate a corresponding RF signal at its output. As is well known, the I and Q data generally represent amplitude and phase. Thus, the I and Q may have, for example, a corresponding amplitude A and phase θ.

[0040] The RF signal output by the Digital / RF Modulator in response to data (e.g., I and Q data) provided to the Digital / RF Modulator may thus be an RF signal having an amplitude A and a phase θ. In some implementations, the input information provided to the Digital / RF Modulator may be in a format other than I and Q. For example, in one possible approach, amplitude and phase (A, θ) information may be delivered to the Digital / RF Modulator by the controller 14. As explained above, the input information applied to the Digital / RF Modulator may vary on a sample-by-sample basis in some embodiments.

[0041] Regardless of the format in which the digital / RF modulator 18 receives the data provided to it, the digital / RF modulator 18 provides an RF signal to an input 24a of an RF amplifier 24. Those skilled in the art will understand how to select the characteristics of the RF amplifier 24 to suit the needs of a particular application. In some applications (e.g., mobile cell phone applications), the RF amplifier 24 comprises an RF power amplifier. The RF amplifier 24 receives the RF signal provided to it and provides an amplified version of the RF signal at its output. The output of the RF amplifier 24 may be coupled, for example, to another RF circuit or to the input of an antenna.

[0042] As described above, the power management circuit (PMC) receives information (e.g., control signals) provided to it from the control logic 16 and, in response, provides a variable supply bias voltage (i.e., bias voltage signal) to the RF amplifier 24 (e.g., RF power amplifier). In an embodiment, the variable supply bias voltage is provided in the form of pulses, each pulse having one of a discrete number of voltage levels. That is, the PMC provides one of a plurality of discrete bias voltages to the bias terminal of the RF amplifier. Such discrete voltage supply levels provided by the PMC may be predetermined or may be adapted over time based on a required average transmit power level or other factors.

[0043] Transitions between pulses of different voltage levels (i.e., transitions from one voltage level to another) can give rise to undesirable frequency components in the varying supply bias voltage signal V(t) (i.e., the bias voltage signal). Such a variable supply bias voltage is provided to a bias (i.e., supply) terminal 23 of an amplifier 24 through a multi-stage pulse shaping network (PSN) 22. The multi-stage PSN functions to filter out or otherwise remove undesirable frequency components in the bias voltage signal. Thus, a filtered bias voltage signal is provided to a supply terminal 25 of the RF amplifier 24.

[0044] Also, as described above, the PMC provides a variable supply bias voltage V(t) to the RF amplifier based on a control signal from control logic 16. The PMC may be configured to selectively supply one of a plurality of discrete voltages to the RF amplifier, and may supply the discrete voltages to the RF amplifier via the PSN.

[0045] For reasons that will be apparent from the description provided below, a multi-stage PSN may comprise lossless filter elements including, for example, inductors and capacitors, and may further comprise lossy elements such as resistors and magnetic beads, and may comprise spaced stages (i.e., physically spaced stages). The multi-stage PSN may serve to provide shaping and / or bandwidth limitation of voltage transitions between discrete voltage levels, and may provide damping of oscillations that might otherwise occur. In an embodiment, the multi-stage PSN may be selected to provide a desired filter response characteristic.

[0046] Advantageously, and as will be apparent from the description provided below, the multi-stage PSN is physically divided into multiple stages. This approach allows the multi-stage PSN to provide properly filtered bias signals to multiple amplifiers without duplicating the components of every PSN section with each additional amplifier. A multi-stage PSN 22 is provided that has desirable stopband and rejection band frequency characteristics and desirable passband frequency and rise time characteristics.

[0047] Such multi-stage PSN arrangements are suitable for use with transmission systems in mobile cellular handsets operating according to fifth generation (5G) communications and other connectivity protocols such as 802.11a / b / g / n / ac / ax / ad / ay, etc. Such multi-stage PSN arrangements are also suitable for use with 5G multiple-input / multiple-output (MIMO), uplink carrier aggregation (ULCA), and beamforming systems.

[0048] 2, RF transmission circuitry 30 includes a PMC 20' (which may be the same as or similar to PMC 20 described above in conjunction with FIG. 1) having an input configured to receive information (e.g., a control signal) provided to it (e.g., from a controller such as controller 14 described above in conjunction with FIG. 1) and, in response, provides a variable supply bias voltage (e.g., a bias signal having one of a plurality of discrete different voltage levels at a particular time) to an RF amplifier 24' having an RF input 24a', an RF output 24b', and a supply terminal 25'.

[0049] A variable supply bias voltage is provided to amplifier 24' through a multi-stage PSN 22', which may be the same as or similar to PSN 22 described above in conjunction with Figure 1. In this illustrative embodiment, multi-stage PSN 22' includes a first PSN stage 32 (designated as "PSN-stage A" in Figure 2) and a second PSN stage 34 (designated as "PSN-stage B" in Figure 2) that is physically separate from PSN stage A.

[0050] By physically splitting the PSN 22′ into multiple stages, it is not necessary to duplicate the components of the first PSN stage (i.e., stage A in FIG. 2) in the second PSN stage (i.e., stage B in FIG. 2). This approach provides flexibility for placing relatively large PSN components on a substrate (e.g., printed circuit board (PCB)) in areas of the substrate that are more capable of accommodating larger circuit structures. That is, the multi-stage PSN approach allows PSN components that require an amount of area or volume (generally referred to as space or area) greater than that required by most of the other components that make up the PMC to be physically located in areas of the PCB that can accommodate such components. Additionally, the multi-stage PSN approach allows for the use of parasitic elements (e.g., parasitic inductances) that allow for a reduction in size (ideally, the elimination) of circuit components. This results in space savings and also cost reduction for the PSNs provided in accordance with the multi-stage PSN techniques described herein.

[0051] With this multi-stage PSN approach, it is possible to control receive baseband (RxBN) and out-of-band emissions for a discrete feed modulated transmitter while maintaining linearity and efficiency, and while accommodating the amplifier (e.g., RF PA) physically far from the PMC on the IC or PCB or any type of substrate in a cost-effective manner, which is suitable for mobile device form factors.

[0052] In some embodiments, one or more RF amplifiers may be used to generate a transmit signal in an RF transmitter. For example, Figure 3 is a block diagram illustrating an RF transmitter including multiple power amplifiers according to an embodiment.

[0053] 3, the PMC 36 has an input configured to receive information (e.g., control signals) provided to the PMC 36 (e.g., from a controller such as the controller 14 described above in conjunction with FIG. 1) and, in response, provides variable supply bias voltages to a plurality of RF amplifiers 42a-42n based on the control signals from the controller. In an embodiment, one or all of the RF amplifiers 42 may correspond to an RF PA.

[0054] The variable supply bias voltage is provided to amplifiers 42a-42N through a multi-stage PSN 30. In this illustrative embodiment, the multi-stage PSN 30 includes a first PSN stage 38 (designated as "PSN stage A" in FIG. 3) and a plurality of second PSN stages 40a-40N (designated as "PSN stage B" in FIG. 3). i "). In this illustrative embodiment, the number of second PSN stages 40 matches the number of amplifiers 42 (i.e., there is a 1:1 correspondence between the number of second PSN stages and the number of amplifiers that receive a voltage supply signal through PSN 30).

[0055] With this approach, it is possible to control the RxBN and out-of-band emissions for a discrete feed modulated transmitter while maintaining linearity and efficiency, and accommodating multiple RF amplifiers 42 physically far from the PMC in a cost-effective manner, which is suitable for mobile device form factors.

[0056] Additionally, the characteristics of each second PSN stage 40 may be matched to the characteristics of the RF amplifier to which the PSN is coupled. Of course, it should be understood that in other embodiments, a single second PSN stage may be coupled to multiple RF amplifiers 40.

[0057] By physically splitting the multi-stage PSN, it is not necessary to duplicate the components of the first PSN stage (i.e., stage A) for each amplifier. Thus, the multi-stage PSN serves the functions of multiple amplifiers 42a-42N while having only multiple second stages. Because it is not necessary to repeat the entire PSN for each amplifier, this approach saves area on the PCB (or equivalently, the size of the PCB required to accommodate the PMC, PSN, and amplifiers (and associated circuitry) may be reduced).

[0058] Thus, with this multi-stage PSN approach, it is possible to control receive baseband (RxBN) and out-of-band emissions for a discrete feed modulated transmitter while maintaining linearity and efficiency, and accommodating multiple RF amplifiers (e.g., RF Pas) physically far from the PMC in a cost-effective manner, which is suitable for mobile device form factors.

[0059] 4, a portion of the transmission circuit includes a PMC 44 having an input configured to receive a control signal (e.g., from a control logic circuit such as control logic circuit 16 described above in conjunction with FIG. 1). The PMC 44 has multiple outputs (i.e., the PMC 44 is a multi-output PMC). In this illustrative embodiment, to promote clarity of text and drawings, the PMC 44 is illustrated as a dual-output PMC. Those skilled in the art will, of course, understand and appreciate that the PMC 44 may have any number of outputs, and that the particular number of outputs to provide the PMC 44 will be selected according to a variety of factors, including, but not limited to, the number of amplifiers receiving signals from the PMC 44 and the needs of a particular application.

[0060] In this illustrative embodiment, each output 44a, 44b of the PMC 44 is coupled to a respective first PSN stage 46a, 46b. The output of each first PSN stage 46a, 46b is coupled to a corresponding one of the second PSN stages 48a, 48b, 48c, 48d. The outputs of the second PSN stages 48a-48d are coupled to bias terminals of RF amplifiers 50a, 50b, 52a, 52b, respectively.

[0061] 4 thus illustrates a transmission circuit comprising a plurality, here four, of RF amplifiers 50a, 50b, 52a, 52b, and includes a PMC 44 that provides a variable supply bias voltage (e.g., in the case of supply modulation, a selected one of a plurality of supply bias voltages) to the bias terminals of amplifiers 50a, 50b, 52a, 52b via bias supply signal paths that couple each of a pair of multi-stage PSNs 45a, 45b to the bias terminals of amplifiers 50a, 50b, 52a, 52b. In this illustrative embodiment, the first PSN 45a comprises a first PSN stage 46a (designated in FIG. 4 as “PSN stage A1”) and a plurality of second PSN stages 48a, 48b (designated in FIG. 4 as “PSN stage A1B1” and “PSN stage A1B2”). The second PSN 45b includes a first PSN stage 46b (designated as "PSN stage A2" in FIG. 4) and a number of second PSN stages 48c, 48d (designated as "PSN stage A2B1" and "PSN stage A2B2" in FIG. 4).

[0062] It should be appreciated that the electrical characteristics of the second PSN stages 48a, 48b are selected or configured to operate with the electrical characteristics of the first PSN stage 46a and the electrical characteristics of the respective RF amplifiers to which the second stages are coupled, while the electrical characteristics of the second PSN stages 48c, 48d are selected or configured to operate with the electrical attributes of the first PSN stage 46b and the electrical characteristics of the respective RF amplifiers to which the second stages are coupled. Thus, although the characteristics of the first PSN stages A1, A2 may differ and the characteristics of the second first PSN stages A1B1, A1B2, A2B1, A2B2 may differ, the first and second stages cooperate to provide the appropriate and desired filtering for the variable supply bias voltages provided to the amplifiers 50a, 50b, 52a, 52b.

[0063] In general, it is desirable to provide a PSN that has at least one, and ideally all, of the following qualities / characteristics: a desired amount of signal attenuation in the receive band (i.e., obtaining a desired amount of attenuation from input to output at a desired offset frequency), a desired unloaded voltage step response (i.e., obtaining a desired peak output voltage in response to a voltage step at the input, assuming the PSN is unloaded (i.e., the PA is unbiased)), a desired loaded voltage step response (i.e., obtaining a desired peak output voltage in response to a voltage step at the input, assuming the PSN is loaded (i.e., the PA is biased)), a desired AC output impedance (i.e., obtaining a desired output voltage variation in response to various variable AC load currents at desired frequencies for a fixed input voltage), a desired DC output impedance (i.e., obtaining a desired output voltage variation in response to a DC load current for a fixed input voltage), and a desired maximum sink current (i.e., obtaining a desired peak current that the PMIC must source into the PSN during a voltage step). PSNs with other qualities / characteristics may also be desirable.

[0064] In this illustrative embodiment, only two first stages and four second stages are shown, but it should be understood that in other embodiments, a PMC may be coupled to more than two first stages, and each first stage may be coupled to more than two second stages. In general, a PMC having N outputs may be provided (N is an integer greater than or equal to 1), and thus the PMC may be coupled to at least as many as N first PSN stages, and each of the N first PSN stages may be coupled to as many as M second stages (M is an integer greater than or equal to 1). Furthermore, each of the second PSN stages may be coupled to P amplifiers (P is an integer greater than or equal to 1).

[0065] In the illustrative embodiment illustrated in FIG. 4, the number of second PSN stages 48 matches the number of amplifiers 50 in some embodiments (i.e., there is a 1:1 correspondence between the number of second PSN stages and the number of amplifiers that receive a voltage supply signal through PSN 30), although one or more of the second PSN stages may be coupled to more than one RF amplifier.

[0066] 5, a fused multi-stage PSN 60 includes fused stage A and stage B. The stages consist of series impedances and shunt impedances formed using resistors, inductors, capacitors, and / or magnetic and / or ferrite beads. Depending on the system constraints, several different types of stages can be used individually or together in a stepped fashion to meet the requirements.

[0067] 6, a multi-stage PSN 64 includes a first PSN stage 66 (designated as "PSN stage A" in FIG. 6) and multiple similar second PSN stages 68a, 68b (both stages are designated as "PSN stage B" in FIG. 6). In this illustrative embodiment, the second PSN stages 68a, 68b have identical or similar electrical characteristics and are configured to be coupled to RF amplifiers having similar electrical characteristics. Of course, in embodiments where the RF amplifiers are not well matched (e.g., the electrical characteristics of RF amplifiers 50a, 50b are different from one another), the electrical characteristics of the second PSN stages (e.g., PSN stages 68a, 68b) will also differ from one another in a manner that results in the desired performance of the respective RF amplifiers (e.g., RF amplifiers 50a, 50b of FIG. 4) coupled thereto.

[0068] Hence, in an embodiment, the selection of electrical characteristics (and therefore components) for providing a PSN stage depends on the electrical characteristics of the PA to which the second PSN stage is coupled, or on the requirements of the frequency band in which the PA operates.

[0069] It should be understood that the PMC and the first PSN stage (e.g., PSN stage A) may be located a significant distance from the second PSN stage (e.g., PSN stage B) and from the RF amplifier (e.g., PA) that receives the variable supply bias voltage.

[0070] 7, a portion of the transmission circuit 70 includes a first circuit that corresponds to a power management circuit 72 provided as an integrated circuit (PMIC) having at least a portion of a first stage of a multi-stage PSN provided as part thereof (i.e., at least a portion of the first PSN stage is fused to the PMC circuit, e.g., by using parasitic elements associated with the PMC and / or any of the signal paths coupling the second PSN stage to the PMC). Thus, at least a portion of the first stage of the multi-stage PSN (ideally the entire first stage of the multi-stage PSN) is fused (or integrated) with at least a portion of the PMC.

[0071] The circuit portion 70 further includes a pair of second circuits 74a, 74b corresponding to RF amplifiers (which may be, for example, RF power amplifiers) having at least a portion of the second stage of the integrated multi-stage PSN (i.e., at least a portion of the second PSN stage is fused to each RF amplifier). As illustrated in FIG. 7, each of the second stages of the multi-stage PSN is integrated with at least a portion of a respective one of one or more RF amplifiers (e.g., by using parasitic elements associated with either the RF amplifier and / or the signal path coupling the second PSN stage to the RF amplifier).

[0072] Note that while only two RF amplifiers are shown in the illustrative embodiment of Figure 7, any number of RF amplifiers may be used. Also note that the integrated PMC and PSN stage A may be located a significant distance away from the integrated PSN stage B and RF amplifier. Thus, as shown and described, the inductive and capacitive parasitic characteristics (sometimes referred to as parasitics) resulting from the interconnect structure between stage A and stage B (as well as structures within the PMC and RF amplifier) ​​can be designed into the overall impedance and / or response characteristics of the PSN.

[0073] 7, the first and second stages of the PSN are absorbed (e.g., through the use of parasitic inductance and capacitance) into the respective PMC and RF amplifier circuitry (and thus the filtering characteristics / functions performed by the PSN are likewise absorbed into the corresponding PMC and RF amplifier circuitry). Thus, the multi-stage PSN approach described herein leads to a modular solution for both the PMC and PA that incorporates the PSN stages, thereby further reducing the material required to fabricate the RF transmission circuit as an IC.

[0074] 8-8E, a series of filter circuits suitable for use in stages of a multi-stage PSN are shown. As described below in conjunction with Figures 8C, 8D, and 8E, the PSN stages can be made reconfigurable with switches to adjust the electrical characteristics of the filters for different use cases.

[0075] 8, a passive filter circuit 80 having a first terminal 80a and a second terminal 80b includes an inductor L coupled in series (i.e., inductor L is coupled in series between terminals 80a and 80b of filter circuit 80). A first terminal of a capacitor C is coupled to a first one of the first and second terminals of inductor L, and a second terminal of capacitor C is coupled to a first terminal of resistor R. The second terminal of resistor R is coupled to a reference potential (here illustrated as ground). After reading the disclosure provided herein, one of ordinary skill in the art will understand how to couple a reference potential V REF It will also be understood that the reference potential V may correspond to ground or to some uppermost positive or negative potential (e.g., any positive or negative voltage). REF is selected to suit the needs of a particular application.

[0076] 8A, a passive filter circuit 82 having a first terminal 82a and a second terminal 82b includes an inductor L1 coupled in series (i.e., inductor L1 is coupled in series between terminals 82a and 82b of the filter circuit 82). A first terminal of a capacitor C1 is coupled to a first one of the first and second terminals of the inductor L1, and a second terminal of the capacitor C1 is coupled to a first terminal of a second inductor L2. A second terminal of the inductor L2 is coupled to a reference potential V REF is combined with

[0077] 8B, the passive filter circuit 84 includes a pair of signal paths coupled in parallel between a first filter terminal 84a and a second filter terminal 84b. A first of the parallel signal paths includes an inductor L3 having a first terminal coupled to the first filter terminal 84a and a second terminal coupled to the second filter terminal 84b. A second of the parallel signal paths includes a capacitor C2 having a first terminal coupled to the first filter terminal 84a and a second terminal coupled to a first terminal of a resistor R1. The second terminal of the resistor R1 is coupled to the second filter terminal 84b.

[0078] 8C, a reconfigurable filter circuit 89 having a first terminal 89a and a second terminal 89b includes a series-coupled inductor L5 (i.e., inductor L5 is series-coupled between terminals 89a and 89b of the filter circuit 89) and a shunt-coupled capacitor C6. A first terminal of the capacitor C6 may be coupled to either the first terminal or the second terminal of the inductor L5. A second terminal of the capacitor C6 is coupled to a reference potential V through a switch S3. REF The reconfigurable filter circuit 89 thus comprises at least one switchable signal path (i.e., the signal path comprises a switching element S3). In the illustrative embodiment of FIG. 8D, the reconfigurable filter circuit 89 comprises a terminal of the capacitor C6 and a reference potential V REFThose skilled in the art will appreciate that the positions of capacitor C6 and switch S3 may be reversed (i.e., the first terminal of switch S3 may be coupled to either the first or second terminal of inductor L5, and the second terminal of switch S3 may be coupled to the first terminal of capacitor C6 while the second terminal of capacitor C6 is coupled to reference potential V REF After reading the disclosure provided herein, one of ordinary skill in the art will understand that the reference potential V REF It will also be understood that V may correspond to ground or to some positive or negative potential (e.g., any positive or negative voltage). REF is selected to suit the needs of a particular application.

[0079] In practical systems, the switches may be switched between their "on" and "off" states based on a timescale consistent with the time required to make a determination of the load impedance characteristics and / or performance characteristics of the RF amplifier obtained over a period of time (which may therefore be considered a relatively slow timescale compared to the switching speed of the switches). In embodiments, the switches may be switched between their "on" and "off" states in response to average characteristics of any or all of: (1) the load impedance characteristics of the RF amplifier and / or (2) the performance characteristics of the RF amplifier and / or (3) the performance characteristics of the RF transmission system. In some embodiments, the switches may be switched between their "on" and "off" states in response to substantially instantaneous impedance changes (i.e., the switch states may be changed as quickly as an impedance change can be identified, rather than based on a slower timescale (i.e., slower relative to an instantaneous timescale) in response to average characteristics, etc.).

[0080] 8D, a reconfigurable filter circuit 86 having a first terminal 86a and a second terminal 86b includes an inductor L4 coupled in series (i.e., the inductor L4 is coupled in series between the terminals 86a and 86b of the filter circuit 86). A first terminal of a resistor R2 is coupled to a first one of the first and second terminals of the inductor L4. A second terminal of the resistor R2 is coupled to a variable capacitive network 88 capable of providing a variable capacitance. The variable capacitance network 88 comprises at least one switchable signal path (i.e., the switching path comprises a switching element). In the illustrative embodiment of FIG. 8C, the variable capacitance network comprises three signal paths, two of which are switchable signal paths. The switchable signal paths (e.g., the switchable elements S1, S2) may be switched according to any of the techniques described above in conjunction with FIG. 8C.

[0081] In particular, network 88 includes one or more capacitors (with three capacitors shown in this illustrative embodiment) coupled between a resistor and a reference potential (here, a reference potential corresponding to ground). At least one capacitor in network 88 is coupled to a switch. The switch couples a switch between the resistor and the capacitor or between the capacitor and the reference potential V REF The capacitor may be arranged (i.e., disposed on either side of the capacitor) so as to operate to make or break electrical conduction between the

[0082] In this illustrative embodiment, a pair of switches S1, S2 are coupled in series between each of the capacitors C3, C5 and a reference potential. In response to the switches providing a low impedance signal path between the capacitors and the reference potential (i.e., in response to the switches being "closed"), the reconfigurable filter circuit 86 has a first filter characteristic. In response to the switches providing a high impedance signal path between the capacitors and the reference potential (i.e., in response to the switches being "opened"), the reconfigurable filter circuit 86 has a second, different filter characteristic.

[0083] In general, each switchable signal path with two states (i.e., on and off) provides two different filter characteristics. In general, for N switchable signal paths, each with two states, 2 N Different filter characteristics are possible.

[0084] If the impedance of an RF load coupled to the output of an RF amplifier (e.g., RF amplifier 24 described above in conjunction with FIG. 1) changes or is constantly varying, the operating characteristics of the RF amplifier also change (i.e., the varying load impedance affects the operation, and therefore performance, of the RF amplifier). By using a reconfigurable filter circuit, the filter and / or impedance characteristics of the reconfigurable filter circuit can be changed (e.g., in response to the varying RF load characteristics) to achieve or maintain a desired performance by the RF amplifier.

[0085] As described above in conjunction with FIG. 8C, in a practical system, the switches may be switched between their “on” and “off” states based on a timescale consistent with the time required to make a determination of the load impedance characteristics and / or performance characteristics of the RF amplifier obtained over a period of time and / or a determination of the performance characteristics of the RF transmission system (which may thus be considered a relatively slow timescale compared to the switching speed of the switches). In embodiments, the switches may be switched between their “on” and “off” states in response to average characteristics of any or all of: (1) the load impedance characteristics and / or (2) the performance characteristics of the RF amplifier, and / or (3) the performance characteristics of the RF transmission system. In some embodiments, the switches may be switched between their “on” and “off” states in response to a substantially instantaneous impedance change (i.e., the switch state may be changed as quickly as an impedance change can be identified, rather than based on a slower timescale (i.e., slower relative to an instantaneous timescale) in response to an average characteristic, etc.).

[0086] In the illustrative embodiment of FIG. 8D , network 88 includes three parallel coupled capacitors with one capacitor directly coupled to a reference potential (shown here as ground) and two capacitors coupled to a reference potential (shown here as ground) through switches, although those skilled in the art will understand that reconfigurable filter circuit 86 may be provided from a wide range of other circuit implementations.

[0087] For example, referring now to FIG. 8E, a reconfigurable filter circuit 90 having a first terminal 90a and a second terminal 90b includes a plurality of impedance elements 92, 94 having a plurality of switched impedance elements 95a-95n coupled thereto. Each of the switched impedance elements 95a-95n includes at least one impedance element 98, 100, 104, which may comprise lossless-type elements including, for example, inductors and capacitors, and may further include lossy-type elements such as resistors and magnetic beads. The switched impedance elements 95a-95n also include one switch element 98, 102, 106 capable of switching at least each of the impedance elements 96, 100, 104 in a manner that changes the impedance presented by the PSN stage of which the reconfigurable filter circuit 90 is a part.

[0088] In general, it should be understood that at least one switch element is configured to selectively couple at least one reactance element between a reference potential and at least one of the first and second terminals of the reconfigurable filter circuit. For example, in an embodiment, the positions of the reactance element and the switch element (e.g., elements 96, 98 in FIG. 8D) may be reversed such that the switch element (e.g., switch element 98) couples a first terminal to one of the first and second filter terminals and a second terminal to a first terminal of the reactance element (e.g., reactance element 96). The second terminal of the reactance element (e.g., reactance element 96) is coupled to the reference potential. An example of such a configuration is shown in FIG. 10 and FIG. 10A.

[0089] It should further be appreciated that by placing a switch in each of two or more signal paths, one of a number of different filtering characteristics across a given RF frequency band may be provided. The switches may be independently operated to provide the desired filter characteristics. For example, with N switchable signal paths (N is an integer greater than or equal to 1), the reconfigurable filter circuit may have up to 2 N It is possible to provide different filter characteristics.

[0090] In an embodiment, at least one of the at least two or more signal paths includes a switch element having a first terminal coupled to one of the first terminal and the second terminal of the reconfigurable filter circuit and a second terminal coupled to the first terminal of one of the reactance elements.

[0091] By providing a switch element coupled between one of the reconfigurable filter circuit terminals and the reactive element, the impedance characteristic of the reactive element can be switched in and out of the filter circuit (thus making the filter circuit reconfigurable). In one embodiment, by placing the switch in a first switch position (e.g., a closed position such that the switch provides a low impedance signal path between the reactive element and one of the reconfigurable filter circuit terminals), a reconfigurable filter circuit having a first filter characteristic is provided, and by placing the switch in a second, different switch position (e.g., an open position such that the switch provides a high impedance signal path between the reactive element and one of the reconfigurable filter circuit terminals), a reconfigurable filter circuit having a second, different filter characteristic within a desired frequency band is provided.

[0092] In an embodiment, a second terminal of one of the reactance elements is connected to a reference potential V REF (which may be, for example, ground).

[0093] 9, a multiple-input / multiple-output (MIMO) transmission circuit implemented as an integrated circuit (i.e., a monolithic integrated circuit) 110 includes a pair of RF power amplifiers 114a, 114b having an RF input to which an RF signal is provided through signal paths 112a, 112b. The transmission circuit 110 further includes a PMC 116 (which may be functionally identical or similar to any of the PMCs described above) having an input configured to receive information (e.g., control signals) provided to the input (e.g., from a controller such as the controller 14 described above in conjunction with FIG. 1). In response to such control signals, the PMC is configured to provide a variable supply bias voltage signal through a first stage 118 of the PSN. The first PSN stage 118 appropriately processes the signal (e.g., via a filtering or partial filtering operation) and provides the appropriately processed supply bias voltage signal to each of the second PSN stages 122a, 122b along signal paths 120a, 120b. The second PSN stage 122a, 122b further processes the signal provided to the second PSN stage (e.g., via a filtering or partial filtering operation) and provides a suitably processed (e.g., suitably filtered) supply bias voltage signal to the respective supply terminals of the RF amplifiers 114a, 114b.

[0094] As described above, each RF amplifier 114a, 114b receives an RF signal along a respective RF signal path 112a, 112b, amplifies the signal, and provides the amplified RF signal to a respective antenna 115a, 115b from which an RF transmit signal is emitted.

[0095] Note that the PMC 116 and PSN stage A 118 are located a significant distance from PSN stage B 122a, 122b and associated PAs 114a, 114b. In the illustrative embodiment of FIG. 9, the PMC 116 and stage A 118 are located at one end of the IC 110, while stage B 122a, 122b and associated PAs 114a, 114b are located at a substantially opposite end of the IC 110.

[0096] As described above, by physically splitting the PSN into multiple stages (here, two stages consisting of a first stage 118 and a second stage 122a, 122b), it is not necessary to duplicate the components of the first PSN stage (i.e., stage A). This approach reduces the amount of area required to accommodate the PSN on an integrated circuit (IC) and provides the flexibility to place larger PSN components (i.e., PSN components that require a relatively large amount of area on an IC) in areas of the IC that are more capable of accommodating larger circuit structures.

[0097] Furthermore, with this multi-stage PSN approach, it is possible to control receive baseband (RxBN) and out-of-band emissions for a discrete feed modulated transmitter while maintaining linearity and efficiency, and accommodating multiple RF amplifiers (e.g., multiple RF PAs) physically far from the PMC on the IC in a cost-effective manner, which is suitable for mobile device form factors.

[0098] Although the embodiment of Figure 9 is illustrated here as an integrated circuit, it should be understood that circuits using a mixture (i.e., a combination) of discrete circuit elements and integrated circuits may also be implemented. Examples of such embodiments are described below in conjunction with Figures 10-11.

[0099] Referring now to FIG. 9A, where like elements of FIG. 9 are provided with like reference symbols, a transmission circuit implemented as an integrated circuit 110′ includes curved signal paths 120a′, 120b′. In some embodiments, it may be desirable or even necessary to include relatively long signal paths having curved or other non-linear shapes (e.g., due to circuit layout constraints or other factors). Signal paths having lengths that give rise to parasitic inductance and / or capacitance and / or resistance (sometimes simply referred to as “parasitics”) are sometimes referred to as “long” signal paths. Long signal paths having curved or other shapes may, among other things, give rise to parasitic inductance and / or capacitance and / or resistance. The effects of such parasitics may be further increased or enhanced when long signal paths are present, and may be further increased when long, curved signal paths are present.

[0100] As described above, the PMC 116 and stage A 118 are located a significant distance away from stage B 122a′, 122b′ and associated PAs 114a, 114b. In the illustrative embodiment of FIG. 9A, the PMC 116 and stage A 118 are located at one end of the IC 110′, while stage B 122a′, 122b′ and associated PAs 114a′, 114b′ are located at a substantially opposite end of the IC 110. Thus, the length of the signal paths 122a′, 122b′ is significant, and parasitic components may arise due to the shape and / or physical length of the signal paths between the first PSN stage and the second PSN stage. As described above, such parasitic inductance and / or capacitance may be used in the design of the PSN stages, such as the first and / or second PSN stages.

[0101] Thus, in this embodiment, the impedance characteristics of the first PSN stage 118 and / or the second PSN stage 122a', 122b' may incorporate parasitics arising from one or both of the signal paths 122a', 122b'.

[0102] 10, a substrate 130 has disposed thereon a PMC 132, which may be the same as or similar to any of the PMCs previously described. In an embodiment, the substrate may be provided as a printed circuit board (PCB) provided from any suitable single or multi-layer dielectric material (e.g., a fiberglass reinforced epoxy resin based material or a low temperature or low temperature co-fired ceramic (LTCC) material provided with a conductive layer therein or on an exposed surface).

[0103] In the illustrative embodiment of FIG. 10, the PMC is implemented as an integrated circuit disposed within an IC package, which may be, for example, a lead frame package, a substrate package, a wafer level package, or any other type of IC package known to one of skill in the art.

[0104] The PMC includes an input 132a that is coupled to an input signal path 134 provided on a PCB (e.g., the signal path is etched or otherwise provided as part of the PCB using any additive or subtractive process as is generally known). The PMC input 132a is configured to receive a control signal from a controller (such as controller 14 described herein above in conjunction with FIG. 1). The PMC 132 also includes an output 132b that is coupled to a supply bias voltage signal path 136. The signal path 136 may be etched or otherwise provided as part of the PCB using any additive or subtractive process known to those of skill in the art. A supply bias voltage is provided at the PMC output 132b, as discussed above.

[0105] A first stage 138a of the PSN 138 is coupled to the supply voltage signal path. The first PSN stage may be implemented using discrete elements that are electrically coupled to each other and to the supply voltage signal path. A second stage of the PSN is coupled to the supply voltage signal path. The second PSN stage may be implemented using discrete elements that are electrically coupled to each other and to the supply voltage signal path. Thus, the circuit of FIG. 10 represents a hybrid circuit implementation that may include both integrated circuits (e.g., the PMC and RF amplifier) ​​and discrete elements (e.g., the first and second PSN stages).

[0106] In an embodiment, the first PSN stage is physically proximate to the PMC. In an embodiment (and as shown and described in conjunction with FIG. 11), the first PSN stage may be included as part of a PMC module (e.g., a single package including the PMC and the first stage PSN, regardless of how either the PMC or the first PSN stage is implemented). In this illustrative embodiment, the first PSN stage 138a comprises a reconfigurable filter circuit 139 that functions in a manner similar to the reconfigurable filter circuit 88 described above in conjunction with FIG. 8C.

[0107] In an embodiment, the second PSN stage is physically proximate to the amplifier bias terminal. In an embodiment (and as described in FIG. 11), the second PSN stage may be included as part of an amplifier module (e.g., a single package including an RF amplifier and a second stage PSN). While the first PSN stage 138a includes active components (i.e., switches), the second PSN stage includes only passive components and is implemented as circuit 80 described above in conjunction with FIG. 8.

[0108] The supply voltage signal path 136 is coupled to a supply terminal 140a (i.e., a bias terminal) of an RF amplifier 140 disposed on a PCB. Thus, a supply voltage signal is provided from the PMC through the supply voltage signal path 136 to the RF amplifier bias terminal.

[0109] The RF amplifier has an RF input 141 a coupled to an RF input signal path 142 provided on the PCB, and an RF output coupled to an RF output signal path 144 provided on the PCB. The RF amplifier may be the same as or similar to any of the RF amplifiers described herein above.

[0110] Referring now to FIG. 10A, where like elements of FIG. 10 are provided with like reference symbols, in this illustrative embodiment, the first PSN stage 138a' comprises all passive components, while the second PSN stage 138b' comprises active components (i.e., switches).

[0111] It should further be appreciated that in some applications it may be desirable to provide both the first and second PSN stages with all passive components, while in still other applications it may be desirable to provide both the first and second PSN stages with at least one active component (e.g., at least one switchable element, such as a switch comprising a transistor or diode).

[0112] 11, a substrate 150 (which may be any of the types described above in conjunction with FIGS. 9-10A) has disposed thereon a PMC module 152. The PMC module 152 comprises a PMC and a first PSN stage (i.e., the PMC module is a single package that includes a PMC and at least a portion of the first PSN stage, regardless of how either the PMC or the first PSN stage is implemented). In an embodiment, one or both of the PMC and the first PSN stage, or portions of either, may be implemented as an integrated circuit or may be implemented using discrete elements (i.e., discrete circuit components).

[0113] The PMC module 152 includes an input 152a that is coupled to an input signal path 154 provided on a PCB (e.g., the signal path is etched or otherwise provided as part of the PCB using an additive or subtractive process, as is generally known) and is configured to receive a control signal from a controller (such as controller 14 described herein above in conjunction with FIG. 1). The PMC module also includes an output 152b that is coupled to a supply voltage signal path 156 (e.g., the signal path is etched or otherwise provided as part of the PCB using an additive or subtractive process, as is generally known) to provide a supply bias voltage, as discussed above.

[0114] Also disposed on the substrate is an RF amplifier module 158 comprising an RF amplifier and a portion of the second PSN stage (i.e., a single package that includes an RF amplifier and at least a portion of the second PSN stage, regardless of how either the RF amplifier or the second PSN stage is implemented).

[0115] 11, a first portion 159 of the second PSN stage comprises a capacitor 160 and an inductor 161 coupled in series between the supply voltage signal path 156 and a reference potential (here shown as ground), with the second PSN stage portion 159 being coupled proximate to a bias terminal 158a of the RF amplifier module 158. A second portion of the second PSN stage is provided as part of the RF amplifier module and is therefore not visible in FIG.

[0116] It should be appreciated that in embodiments, the entire second PSN stage may be provided as part of the switch module. In embodiments, one or both of the RF amplifier and the second PSN stage (including all or a portion of the second PSN stage) may be implemented as an integrated circuit or may be implemented using discrete elements (i.e., discrete circuit components).

[0117] 11A, in an embodiment, RF amplifier module 158' includes a switch that, together with capacitor 165 and resistor 167, forms a switchable signal path portion of second PSN stage 159'. Thus, in this embodiment, second PSN stage 159' includes capacitor 160' and a switchable signal path portion comprising capacitor 165, resistor 167, and switch 163, with a portion of the second PSN stage being realized as (i.e., implemented as part of) a switch module.

[0118] It should therefore also be appreciated that a similar approach may be used in conjunction with a first PSN stage, i.e., in embodiments in which the first PSN stage comprises switches, all or some of the one or more switches may be realized as (i.e., implemented as part of) a PMC module.

[0119] It should also be understood that the supply voltage signal path (e.g., path 136 of FIGS. 10, 10A or path 156 of FIG. 11) may have the impedance characteristics of an inductor (i.e., the supply voltage signal path may appear electrically as a distributed inductive element). Thus, any inductive characteristics of the supply voltage signal path may be accommodated or at least taken into account in the component selection for the first and second PSN stages.

[0120] In the above description, various concepts, circuits, and techniques are discussed in the context of a discrete feed modulation system for use with an RF transmitter operable to transmit signals over a wireless medium. The concepts, circuits, and techniques described herein are suitable for use in cellular handsets (e.g., mobile cellular handsets) operating according to 5G communication protocols and other connectivity protocols such as 802.11a / b / g / n / ac / ax / ad / ay, and also suitable for use in multi-transmitter applications including, but not limited to, MIMO, uplink carrier aggregation (ULCA), and beamforming applications. It should be understood that these concepts, circuits, and techniques also have applications in other contexts. For example, in some implementations, the features described herein may be implemented in a transmitter or driver for use in wired communications. In some other implementations, the features described herein may also be implemented in other types of systems requiring highly efficient and highly linear power amplification for data-carrying signals.

[0121] Although exemplary embodiments of the concepts described have been described, it will now become apparent to one of ordinary skill in the art that other embodiments incorporating those concepts may also be used. The embodiments contained herein should not be limited to the disclosed embodiments, but rather should be limited only by the spirit and scope of the appended claims. All publications and references cited herein are expressly incorporated herein by reference in their entirety.

Claims

1. 1. A multi-stage pulse shaping network configured to be coupled to a bias terminal of a radio frequency (RF) amplifier to supply a bias voltage to the bias terminal, and configured for use in a discrete supply modulation system comprising the multi-stage pulse shaping network and a power management circuit (PMC), the multi-stage pulse shaping network comprising: (a) a plurality of first pulse shaping network (PSN) stages, each having an input configured to be coupled to the PMC to receive a discrete voltage level from the PMC, the PSN stage having an output; (b) a plurality of second PSN stages, each of the plurality of second PSN stages being physically separated from the plurality of first PSN stages, each of the plurality of second PSN stages having an input configured to be coupled to the output of one of the plurality of first PSN stages and having an output configured to be coupled to a bias terminal of the RF amplifier to provide the bias voltage to the bias terminal; (c) a signal path having a first end coupled to the output of one of the plurality of first PSN stages and having a second end coupled to each input of one of the plurality of second PSN stages; Equipped with the plurality of first PSN stages, together with the plurality of second PSN stages, are configured to filter signals resulting from transitions between discrete voltage levels received from the PMC; the PMC has a plurality of outputs, each of the plurality of outputs of the PMC being coupled to a first PSN stage of a respective one of the plurality of first PSN stages; The PMC is a multi-stage pulse shaping network that provides a bias voltage signal to each of the first plurality of PSN stages.

2. The multi-stage pulse shaping network of claim 1 , wherein the first plurality of PSN stages comprise passive LC filters.

3. The plurality of first PSN stages include: (a) the PMC; or (b) the signal path coupled between the output of one of the plurality of first PSN stages and the input of one of the plurality of second PSN stages.

2. The multi-stage pulse shaping network of claim 1, comprising elements having parasitic inductance and / or capacitive and / or resistive characteristics of at least one of:

4. The plurality of first PSN stages include at least (a) the PMC; (b) the signal path coupled between the output of one of the first plurality of PSN stages and the input of one of the second plurality of PSN stages; (c) the RF amplifier; (d) passive components constituting the first PSN stage and the second PSN stage; 2. A multi-stage pulse shaping network as claimed in claim 1, comprising elements having parasitic inductance and / or capacitive and / or resistive characteristics of

5. 2. The multi-stage pulse shaping network of claim 1, wherein at least one of the first plurality of PSN stages and the second plurality of PSN stages comprises a reconfigurable filter circuit.

6. 6. The multi-stage pulse shaping network of claim 5, wherein the reconfigurable filter circuit comprises a switch element coupled between a reactive element and a reference potential, the switch element operable to make or break electrical conduction between the reactive element and the reference potential such that an impedance characteristic of the reactive element can be switched in and out of the reconfigurable filter circuit.

7. The reconfigurable filter circuit comprises a switch element coupled between a reactance element and a reference potential to enable selection of one of a plurality of different filter characteristics within a predetermined frequency band in which the RF amplifier operates; the switch element provides a low impedance signal path between the reactance element and the reference potential such that, in response to the switch element being in a first switch state, the reconfigurable filter circuit is provided having a first filter characteristic within the predetermined frequency band; The switch element provides a high impedance signal path between the reactance element and the reference potential such that in response to the switch element being in a second, different switch state, the reconfigurable filter circuit is provided having a second, different filter characteristic within the predetermined frequency band.

6. The multi-stage pulse shaping network of claim 5,

8. 7. The multi-stage pulse shaping network of claim 6, wherein the reactance element comprises one or more capacitive and / or inductive elements, and the reconfigurable filter circuit further comprises a capacitor coupled between an inductor element and the switch element.

9. The reconfigurable filter circuit comprises one or more resistive elements coupled in series or parallel with one or more capacitive and / or inductive and / or resistive elements, the reconfigurable filter circuit comprising: a resistive element, a first terminal of the resistive element coupled to the inductive element; and a first capacitive element, the first capacitive element coupled to a second terminal of the resistive element; and a second capacitive element, the second capacitive element coupled to the second terminal of the resistive element; and a third capacitive element coupled between the resistive element and a reference potential; and a first switch coupled between the first capacitive element and the reference potential; a second switch coupled between the second capacitive element and the reference potential; 7. The multi-stage pulse shaping network of claim 6, comprising:

10. the multi-stage pulse shaping network is configured to be coupled to a plurality of RF amplifiers; 2. The multi-stage pulse shaping network of claim 1, wherein each of the plurality of second PSN stages is spaced from the plurality of first PSN stages, and each of the plurality of second PSN stages has an input configured to be coupled to the output of a respective one of the plurality of first PSN stages and has an output configured to be coupled to a supply terminal of a corresponding one of the plurality of RF amplifiers for supplying a bias voltage to the supply terminal.

11. 2. The multi-stage pulse shaping network of claim 1, wherein the PMC and at least a portion of the plurality of first PSN stages form a single package, and the RF amplifier and at least a portion of the plurality of second PSN stages form a single package.

12. 2. The multi-stage pulse shaping network of claim 1, wherein at least one of the first and second plurality of PSN stages comprises parasitic elements provided by one of: (1) parasitic elements from the PMC; (2) parasitic elements from the signal path electrically coupling the first PSN stage to the second PSN stage; (3) parasitic elements from a signal path electrically coupling the second PSN stage to the RF amplifier; and (4) parasitic elements from the RF amplifier.

13. 2. The multi-stage pulse shaping network of claim 1, wherein at least one of the first and second plurality of PSN stages comprises a series impedance and a shunt impedance formed using two or more of resistors, inductors, capacitors, magnetics, and / or ferrite beads.

14. The PMC provides a bias voltage signal to each of the plurality of first PSN stages; At least one of the first plurality of PSN stages and one of the second plurality of PSN stages comprise a reconfigurable filter circuit; 2. The multi-stage pulse shaping network of claim 1, wherein the reconfigurable filter circuit comprises a switch element coupled between a reactive element and a reference potential such that an impedance characteristic of the reactive element can be switched in and out of the filter circuit.

15. at least one of the first and second PSN stages comprises at least one switch for adjusting an electrical characteristic of the at least one of the first and second PSN stages; 2. The multi-stage pulse shaping network of claim 1, wherein at least one of the first plurality of PSN stages is physically located in close proximity to a PMC and at least one of the second plurality of PSN stages is physically located in close proximity to an RF amplifier.

16. The multi-stage pulse shaping network of claim 1, wherein each of the plurality of first PSN stages is coupled to two or more of the plurality of second PSN stages.

17. 17. The multi-stage pulse shaping network of claim 16, wherein at least one PSN stage of the first plurality of PSN stages and the second plurality of PSN stages comprises at least one switch for adjusting an electrical characteristic of the at least one PSN stage.

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