Indication device

Abstract

To solve the problem in which: when light-emitting device in pixels have the same brightness, a high intensity of light can be obtained from one pixel as the area of a light-emitting area in the pixel increases; in other words, when the opening ratio represented by the area of an area transmitting light except for an area not transmitting light in one pixel (also referred to black matrix) and the ratio of the area of one pixel is high, a desired intensity of light can be obtained from one pixel even if the area of one pixel is reduced due to high definition; when the number of transistors and wires constituting the pixels is large, the opening ratio decreases; and therefore, the number of transistors and wires constituting the pixels is reduced to increase the opening ratio.SOLUTION: A potential supply line controlling a potential with a signal is provided in place of a power line to which a certain potential has been set. In other words, supply of a voltage to be applied to light-emitting devices can be controlled with a signal of the potential supply line without providing a switch.SELECTED DRAWING: Figure 75

Description

[Technical field]

[0001] The present invention relates to a semiconductor device having a function of controlling a current supplied to a load by a transistor. In particular, pixels formed of current-driven light-emitting elements whose luminance changes depending on the current, and their signal lines The present invention relates to a display device including a driving circuit, and also to a driving method thereof. The present invention relates to an electronic device having a display unit. [Background technology]

[0002] In recent years, the so-called self-luminous type, in which pixels are formed from light-emitting elements such as light-emitting diodes (LEDs), has become popular. The display devices of the type described above are attracting attention. The organic light emitting diode (OLED) g Diode), organic EL element, electroluminescence (Electro Lum EL displays (also called electroluminescence (EL) elements) have been attracting attention. OLEDs and other light-emitting elements are self-emitting. Compared to LCD displays, it has higher pixel visibility, does not require a backlight, and has a faster response time. The luminance of the light emitting element is controlled by the value of the current flowing therethrough.

[0003] There are two driving methods for expressing the gradation of such display devices: digital and analog. The digital method digitally controls the light-emitting element to turn on and off, and controls the time that the light is emitted. Although it has excellent uniformity of brightness for each pixel, it requires high frequency. On the other hand, the analog method uses an analog There are two types of control: logarithmic control and analog control of the light emission time of the light emitting element. The log control method is to control the variation in the characteristics of the thin film transistor (hereinafter referred to as TFT) of each pixel. This causes variations in the light emission of each pixel. Analog time gray scale display device that controls time in an analog manner and achieves excellent uniformity in light emission for each pixel is described in Non-Patent Document 1 (see Non-Patent Document 1).

[0004] That is, the pixel of the display device described in Non-Patent Document 1 is a light emitting device and a transistor for driving the light emitting device. The gate terminal of the drive transistor is connected to the inverter. The anode of the light-emitting element is the input terminal of the inverter, and the anode of the light-emitting element is the output terminal of the inverter. When writing, the inverter is set halfway between on and off. The output of the inverter is controlled by inputting a triangular wave voltage to the anode of the light-emitting element. By controlling the output of the inverter that will become the set potential, the light emitting element can be controlled to emit or not emit light. To control. [Prior art documents] [Non-patent literature]

[0005] [Non-Patent Document 1] SID 04 DIGEST P1394~P1397 Summary of the Invention [Problem to be solved by the invention]

[0006] As the resolution of a display device increases, the luminous intensity obtained from each pixel decreases. The quantity that expresses the degree of brightness of a light source obtained from a certain direction. The degree refers to the luminous intensity per unit area of ​​the light source.

[0007] Here, when the luminance of the light emitting element in the pixel is the same between different pixels, the luminance of the light emitting element in the pixel is If the area of ​​the region is large, a high luminous intensity can be obtained from one pixel. The area of ​​the light-transmitting area excluding the light-blocking area (also called the black matrix) and the area of ​​one pixel If the aperture ratio, which is the ratio of the area of ​​the element to the aperture, is high, the area of ​​each pixel will become smaller due to higher resolution. Even if the voltage is too high, a desired luminous intensity can be obtained from one pixel without increasing the driving voltage.

[0008] Here, if a pixel has a large number of transistors and wiring, the aperture ratio of the pixel will be low. Therefore, the challenge was to reduce the number of transistors and wiring that make up the pixels and increase the aperture ratio. The subject is. [Means for solving the problem]

[0009] Instead of a power supply line with a set potential, a potential supply line is set up that controls the potential by a signal. In other words, the voltage applied to the light emitting element is controlled by the signal of the potential supply line without providing a switch. More control.

[0010] The semiconductor device of the present invention is configured as follows: An electrode; a transistor having a gate terminal, a first terminal and a second terminal; A first wire; A second wiring; a holding means for holding a potential difference between a gate terminal of the transistor and the first wiring; and a switching means for connecting or disconnecting the gate terminal and the second terminal of the transistor. The pixel includes: The transistor has a first terminal electrically connected to the second wiring, and a second terminal electrically connected to the electrode. Connected.

[0011] A semiconductor device according to another aspect of the present invention includes: An electrode; a transistor having a gate terminal, a first terminal and a second terminal; A first wire; A second wiring; a capacitance element that holds a potential difference between a gate terminal of the transistor and the first wiring; A switch that connects the gate terminal of the transistor and the second terminal to each other. Having the element, The transistor has a first terminal electrically connected to the second wiring, and a second terminal electrically connected to the electrode. are electrically connected.

[0012] Another configuration of the semiconductor device of the present invention is An electrode; A transistor having a gate terminal, a first terminal, and a second terminal, a first wiring, and a second wiring a pixel including a capacitance element and a switch, The transistor has a first terminal electrically connected to the second wiring and a second terminal electrically connected to the electrode. are electrically connected, the transistor has a gate terminal and the second terminal electrically connected via the switch; The transistor has a gate terminal electrically connected to the first wiring via the capacitance element. is.

[0013] The display device of the present invention comprises: A light-emitting element; a driving transistor having a gate terminal, a first terminal, and a second terminal, and configured to drive the light-emitting element; A first wire; A second wiring; a holding means for holding a potential difference between the gate terminal of the driving transistor and the first wiring; A switching means for connecting or disconnecting the gate terminal and the second terminal of the driving transistor. a pixel including: The driving transistor has a first terminal electrically connected to the second wiring and a second terminal electrically connected to the light emitting element. It is electrically connected to the pixel electrode of the optical element.

[0014] A display device according to another aspect of the present invention includes: A light-emitting element; a driving transistor having a gate terminal, a first terminal, and a second terminal, and configured to drive the light-emitting element; A first wire; A second wiring; a capacitance element that holds a potential difference between a gate terminal of the driving transistor and the first wiring; a switch that connects or disconnects the gate terminal of the driving transistor and the second terminal. The pixel includes: The driving transistor has a first terminal electrically connected to the second wiring and a second terminal electrically connected to the light emitting element. It is electrically connected to the pixel electrode of the optical element.

[0015] A display device according to another aspect of the present invention includes: A light emitting element and a driving transistor for driving the light emitting element, the driving transistor including a gate terminal, a first terminal and a second terminal. The pixel includes a first wiring, a second wiring, a capacitance element, and a switch. death, The driving transistor has a first terminal electrically connected to the second wiring and a second terminal electrically connected to the light emitting electrically connected to the pixel electrode of the element, The driving transistor has a gate terminal and the second terminal electrically connected via the switch. , The driving transistor has a gate terminal electrically connected to the first wiring via the capacitance element. It is being done.

[0016] In addition, the display device according to the present invention has the above-mentioned configuration, and the second wiring is provided with a binary The potential of the state is input.

[0017] An electronic device of the present invention has a display device having the above-described structure in a display portion.

[0018] A method for driving a display device according to the present invention includes the steps of: A light-emitting element; a driving transistor having a gate terminal, a first terminal, and a second terminal, and configured to drive the light-emitting element; A first wire; A second wiring; a holding means for holding a potential difference between the gate terminal of the driving transistor and the first wiring; A switching means for connecting or disconnecting the gate terminal and the second terminal of the driving transistor; and a pixel comprising: The driving transistor has a first terminal electrically connected to the second wiring and a second terminal electrically connected to the light emitting element. electrically connected to the pixel electrode of the optical element; During a period when a signal is written to the pixel, the switching means a stage for electrically connecting the gate terminal and the second terminal of the drive transistor; A video signal is input to the first wiring, The second wiring has a potential difference with the counter electrode of the light emitting element that is equal to the forward threshold voltage of the light emitting element. A first potential equal to or greater than the When the writing of the signal to the pixel is completed, the switching means switches the gate of the driving transistor The first terminal and the second terminal are made non-conductive, The second wiring has a potential difference with the counter electrode of the light emitting element that is equal to the forward threshold voltage of the light emitting element. Enter the potential that is less than During the light emission period, a potential that changes analogically is input to the first wiring, and The first potential is input.

[0019] The switches shown in the specification can be of various types. For example, There are also electrical switches and mechanical switches. In other words, they can control the flow of electric current. As long as the material is the same, it is not limited to a specific material, and various materials can be used. For example, It may be a transistor, a diode, or a logic circuit that combines them. Therefore, when a transistor is used as a switch, the transistor is not a simple switch. Since the transistors operate as switches, the polarity (conductivity type) of the transistors is not particularly limited. If a smaller off-state current is desired, a transistor with a polarity that reduces the off-state current is used. It is desirable to have a transistor with a low off-current that has an LDD region. In addition, the potential of the source terminal of the transistor that operates as a switch is low. If the device is operated close to the power supply (Vss, GND, 0V, etc.), use an N-channel type, and if the device is operated close to the power supply (Vss, GND, 0V, etc.), use an N-channel type. In addition, if the source terminal voltage is close to the high-potential power supply (such as Vdd), the P-channel It is desirable to use a channel type because the absolute value of the gate-source voltage can be increased. Therefore, it is easy to operate as a switch. A CMOS type switch may be formed by using both of these.

[0020] In the present invention, being connected is synonymous with being electrically connected. Therefore, in the configuration disclosed in the present invention, in addition to the predetermined connection relationship, electrical Other elements that allow connections (such as switches, transistors, capacitors, inductors, etc.) A resistor element, a diode, etc. may be disposed.

[0021] The light emitting element can have various shapes. For example, an EL element (organic EL element) electron emitting devices, liquid crystal devices, electron Dye ink, grating light valve (GLV), plasma display (PDP), Digital micromirror device (DMD), piezoelectric ceramic display, carbon nanotube By applying display media in which the contrast changes due to electromagnetic effects, such as the use of a slit tube, Display devices using EL elements include EL displays, electron emission devices, etc. Display devices using this method include field emission displays (FED) and SED methods. Flat panel display (SED: Surface-conduction Electro Display devices using liquid crystal elements include liquid crystal displays (LCDs), such as n-emitter displays (N-emitter displays), An example of a display device using sprays and electronic ink is electronic paper.

[0022] In the present invention, the transistor may be of various types. Therefore, there is no limitation on the type of transistor that can be applied. Thin-film transistors (TFs) using non-single-crystal semiconductor films, typically silicon or polycrystalline silicon. T), MOS transistors formed using semiconductor substrates or SOI substrates, junction transistors, Using compound semiconductors such as ZnO, a-InGaZnO, etc. transistors using organic semiconductors and carbon nanotubes, and others The type of substrate on which the transistor is disposed may also be used. can be various and is not limited to a specific one. Therefore, for example, , single crystal substrate, SOI substrate, glass substrate, plastic substrate, paper substrate, cellophane substrate, It can be placed on a stone substrate. It is also possible to form a transistor on a substrate and then Alternatively, the transistors may be moved and placed on a separate substrate.

[0023] Note that the structure of the transistor can take various forms. For example, a multi-gate structure with two or more gates may be used. By adopting a 2-gate structure, it is possible to reduce the off-current and improve the breakdown voltage of the transistor. This improves reliability and reduces the drain-source voltage fluctuations when operating in the saturation region. In this case, the drain-source current does not change much and the characteristics are flat. Alternatively, the gate electrodes may be disposed above and below the channel. By using a structure in which electrodes are arranged, the channel area increases, so the current value can be increased. It is possible to improve the S value by making the depletion layer easier to form. The gate electrode may be disposed above the channel, or the gate electrode may be disposed below the channel. The structure may be a staggered structure, a normal staggered structure, or an inverted staggered structure. The channel region may be divided into a plurality of regions, may be connected in parallel, or may be connected in series. Also, the channel (or a part of it) may have a source electrode or a drain electrode. The channel (or a part of it) may be overlapped by a source electrode or a drain electrode. By using an overlapping pole structure, charges accumulate in parts of the channel, making operation unstable. It is possible to prevent this from happening. Also, an LDD region may be provided. This reduces the off-current and improves the breakdown voltage of the transistor, improving reliability. When operating in the saturation region, the drain-source voltage remains constant even if the drain-source voltage changes. The current between the input and output terminals does not change much, resulting in a flat characteristic.

[0024] In this specification, one pixel refers to one color element. In the case of a full-color display device consisting of the color components R (green) and B (blue), the smallest unit of an image is R. It is assumed that the pixel is composed of three pixels: a pixel of G, a pixel of B, and a pixel of B. It is not limited to this, but may be more than this, for example, RGBW (W is white).

[0025] The transistors each include a gate electrode, a drain region, and a source region. A device having at least three terminals, and a channel forming region between the drain region and the source region. Here, the source region and the drain region are determined by the structure and operating conditions of the transistor. It is difficult to determine which is the source region and which is the drain region because Therefore, in this specification, The regions are denoted as the first terminal and the second terminal, respectively.

[0026] In this specification, when pixels are arranged in a matrix, it means that vertical and horizontal stripes are combined. In addition to the case where the three-color elements are arranged in a grid pattern, When displaying in full color (e.g. RGB), the three colors that represent the smallest element of an image This also includes the case where the pixels of the elements are arranged in a so-called delta arrangement. The number of color elements is not limited to 1, but may be more than 1, for example, RGBW (W is white). The size of the light emitting area may differ for each pixel.

[0027] In this specification, a semiconductor device refers to a semiconductor element (such as a transistor or a diode). Also, any device that can function by utilizing the characteristics of semiconductors. The display device may be a device having a display element (such as a liquid crystal element or a light emitting element). In addition, a plurality of pixels including display elements such as liquid crystal elements and EL elements and their It may also refer to a display panel body in which a peripheral driving circuit for driving the pixels is formed. Flexible printed circuits (FPCs) and printed wiring boards (PWBs) are attached. The light-emitting device may also include those used in EL devices and FEDs. A liquid crystal display device is a display device having a self-luminous display element. This refers to a display device that is

[0028] In this specification, "digital" refers to the two states, and "analog" refers to a continuous Of course, the state includes three or more discrete (discrete) states. So, for example, Changing the potential in an analog manner means changing the potential continuously with time. Of course, sampling the continuously changing potential (also called sampling or time discretization) (This is called "potential change"), and the potential is changed so that it becomes the potential sampled at a predetermined time interval. Sampling refers to the process of sampling a signal whose data values ​​change continuously. , the value at a given time interval is taken.

[0029] A digital signal is a signal that has a data value that directly conveys two states. An analog signal is a data that directly transmits three or more states. Analog signals are signals that have a data value (potential or Not only signals whose values ​​(e.g. voltage or current) change continuously, but also signals whose data values ​​change continuously The signal is sampled (also called sampling or time discretization) at a predetermined time interval. This includes signals whose data values ​​are sampled by is the process of determining the value of a signal at a given time interval in a signal whose data values ​​change continuously. Note that digital signals may indirectly convey three or more states. For example, For example, an analog signal whose data values ​​change over time is sampled, and the sampling This is because the data values ​​that are further discretized are also digital signals. This is because a quantized signal is also a digital signal.

[0030] In this specification, the anode and cathode of the light-emitting element are the electrodes when a forward voltage is applied to the light-emitting element. This refers to the electrode when Effect of the Invention

[0031] The supply of voltage to the light-emitting element is controlled by a signal from a potential supply line without providing a switch. Therefore, when a transistor is used as a switch, In addition, the number of transistors can be reduced by inputting a signal to control the on / off of the transistor. This allows the elimination of wiring, thereby improving the aperture ratio of pixels and providing a high-definition display device. It can be provided.

[0032] In addition, the aperture ratio is improved, so the required luminous intensity can be obtained even if the brightness is reduced. This can improve the child's credibility. [Brief description of the drawings]

[0033] [Figure 1]FIG. 2 is a diagram showing a pixel configuration of the present invention. [Diagram 2] 1A and 1B are diagrams illustrating a display device having a pixel configuration of the present invention. [Diagram 3] FIG. 13 is a timing chart of a display device having a pixel configuration of the present invention. [Figure 4] FIG. 2 is a diagram showing a pixel configuration of the present invention. [Diagram 5] FIG. 13 is a timing chart of a display device having a pixel configuration of the present invention. [Figure 6] FIG. 2 is a diagram showing a pixel configuration of the present invention. [Figure 7] FIG. 2 is a diagram showing a pixel configuration of the present invention. [Figure 8] FIG. 2 is a diagram showing a pixel configuration of the present invention. [Figure 9] FIG. 13 is a timing chart of a display device having a pixel configuration of the present invention. [Figure 10] FIG. 2 is a diagram showing a pixel configuration of the present invention. [Figure 11] FIG. 13 is a timing chart of a display device having a pixel configuration of the present invention. [Figure 12] 1A and 1B are diagrams illustrating a display device having a pixel configuration of the present invention. [Figure 13] 1A and 1B are diagrams illustrating a display device having a pixel configuration of the present invention. [Figure 14] 1A and 1B are diagrams for explaining occurrence of delays in rising and falling edges of a signal. [Figure 15] FIG. 13 is a diagram showing a buffer circuit applicable to a display device having a pixel configuration of the present invention. [Figure 16] FIG. 13 is a diagram showing a buffer circuit applicable to a display device having a pixel configuration of the present invention. [Figure 17] FIG. 1 is a diagram showing an example of a DA conversion circuit that can be applied to a display device having a pixel configuration of the present invention. [Figure 18] FIG. 1 is a diagram showing an example of a DA conversion circuit that can be applied to a display device having a pixel configuration of the present [Figure 19] 1A and 1B are diagrams illustrating a display panel having a pixel configuration of the present invention. [Figure 20] 1A to 1C are diagrams showing examples of light-emitting elements that can be applied to a display device having a pixel configuration of the [Figure 21] 1A and 1B are diagrams illustrating an emission structure of a light-emitting element. [Figure 22] FIG. 1 is a cross-sectional view of a display panel that performs full color display using color filters. [Figure 23] FIG. [Figure 24] FIG. [Diagram 25] 1 is a schematic diagram of a display device of the present invention. [Figure 26] 1A and 1B are diagrams illustrating a display panel having a pixel configuration of the present invention. [Figure 27] FIG. [Figure 28] FIG. [Figure 29] FIG. [Diagram 30] FIG. [Diagram 31] 1 shows an example of a signal line driver circuit that can be applied to a display device of the present invention. [Diagram 32] 1 shows an example of a signal line driver circuit that can be applied to a display device of the present invention. [Diagram 33] 1 shows an example of a signal line driver circuit that can be applied to a display device of the present invention. [Diagram 34] 1 shows an example of a signal line driver circuit that can be applied to a display device of the present invention. [Diagram 35] 1 shows an example of a signal line driver circuit that can be applied to a display device of the present invention. [Diagram 36] 1 shows an example of a signal line driver circuit that can be applied to a display device of the present invention. [Figure 37] 1 shows an example of a signal line driver circuit that can be applied to a display device of the present invention. [Figure 38] 1 shows an example of a signal line driver circuit that can be applied to a display device of the present invention. [Figure 39] 1 shows an example of a signal line driver circuit that can be applied to a display device of the present invention. [Diagram 40] 1 shows an example of a signal line driver circuit that can be applied to a display device of the present invention. [Diagram 41] 1 shows an example of a signal line driver circuit that can be applied to a display device of the present invention. [Diagram 42]1A and 1B are diagrams illustrating a display panel having a pixel configuration of the present invention. [Diagram 43] FIG. 4 is a diagram for explaining a waveform that changes periodically. [Diagram 44] 1A to 1C are diagrams showing examples of electronic devices in which a display device having a pixel configuration of the present invention can be used as a pixel portion. [Diagram 45] An example of an EL module. [Diagram 46] FIG. 1 is a block diagram showing the main configuration of an EL television receiver. [Figure 47] 2 shows an example of a mobile phone to which the present invention can be applied. [Figure 48] FIG. 2 is a diagram showing a pixel configuration of the present invention. [Figure 49] FIG. 2 is a diagram showing a pixel configuration of the present invention. [Figure 50] 3A to 3C are diagrams illustrating the operation of a pixel configuration of the present invention. [Figure 51] FIG. 13 is a timing chart of a display device having a pixel configuration of the present invention. [Figure 52] FIG. 13 is a timing chart of a display device having a pixel configuration of the present invention. [Diagram 53] FIG. 2 is a diagram showing a pixel configuration of the present invention. [Figure 54] FIG. 2 is a diagram for explaining a pixel layout. [Figure 55] FIG. [Figure 56] FIG. 2 is a diagram showing a pixel configuration of the present invention. [Figure 57] FIG. 13 is a timing chart of a display device having a pixel configuration of the present invention. [Figure 58] 1 is a schematic diagram of a display device of the present invention. [Figure 59] 13A and 13B are diagrams for explaining the relationship between a video signal input to a signal line and a triangular wave potential. [Figure 60] 13A and 13B are diagrams for explaining the relationship between a video signal input to a signal line and a triangular wave potential. [Figure 61] FIG. 2 is a diagram showing a pixel configuration of the present invention. [Figure 62] FIG. [Figure 63]1A is a schematic diagram showing the configuration of a display panel of the present invention, and FIG. [Figure 64] FIG. 2 is a schematic diagram of a pixel portion of a display panel of the present invention. [Figure 65] FIG. 2 is a schematic diagram of a pixel portion of a display panel of the present invention. [Figure 66] FIG. 2 is a diagram showing a pixel configuration of the present invention. [Figure 67] FIG. 2 is a diagram showing a pixel configuration of the present invention. [Figure 68] FIG. 2 is a diagram showing a pixel configuration of the present invention. [Figure 69] FIG. 2 is a diagram showing a pixel configuration of the present invention. [Figure 70] FIG. 2 is a diagram showing a pixel configuration of the present invention. [Figure 71] FIG. 2 is a diagram showing a pixel configuration of the present invention. [Figure 72] FIG. 2 is a diagram showing a pixel configuration of the present invention. [Figure 73] FIG. 2 is a diagram showing a pixel configuration of the present invention. [Figure 74] FIG. 2 is a diagram showing a pixel configuration of the present invention. [Figure 75] FIG. 2 is a diagram showing a pixel configuration of the present invention. [Figure 76] FIG. 2 is a diagram showing a pixel configuration of the present invention. [Figure 77] FIG. 2 is a diagram showing a pixel configuration of the present invention. [Figure 78] FIG. 2 is a diagram showing a pixel configuration of the present invention. [Figure 79] FIG. 2 is a diagram showing a pixel configuration of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0034] Hereinafter, the embodiment of the present invention will be described with reference to the drawings. It is to be understood that the invention can be practiced in various different ways without departing from the spirit and scope of the invention. It will be readily understood by those skilled in the art that various modifications may be made to the form and details of the present invention. However, it should not be construed as being limited to the description of this embodiment mode.

[0035] (Embodiment 1) In this embodiment mode, a pixel configuration of a display device of the present invention and its operating principle will be described.

[0036] First, the pixel configuration of the display device of the present invention will be described in detail with reference to FIG. Although only pixels are shown, the pixel portion of the display device is actually arranged in a matrix in the row and column directions. A plurality of pixels are arranged.

[0037] The pixel includes a driving transistor 101, a capacitance element 102, a switch 103, and a light-emitting element 10 4, a potential supply line (Illumination line) 105, and a signal line (Data line) 106 and a scanning line (Reset line) 107. The driving transistor 101 is a P-channel transistor.

[0038] The first terminal (source terminal or drain terminal) of the driving transistor 101 is connected to a potential supply line 105 The gate terminal is connected to the signal line 106 via the capacitance element 102, and the second terminal ( The source terminal or drain terminal is connected to the anode (pixel electrode) of the light emitting element 104 . In addition, the gate terminal and the second terminal (source terminal or drain terminal) of the driving transistor 101 is connected via switch 103. Therefore, when switch 103 is on, The gate terminal and the second terminal (source terminal or drain terminal) of the driving transistor 101 are When the switch 103 is turned off, the gate terminal of the driving transistor 101 The second terminal (source terminal or drain terminal) becomes non-conductive, and at that moment the driving transistor The potential difference (voltage) between the gate terminal (or the second terminal) of the capacitor 101 and the signal line 106 is The child 102 can be held. Note that the cathode 10 8 has the potential of Vss set. Note that Vss is a potential that satisfies Vss < Vdd with reference to the power supply potential Vdd set to the potential supply line 1 05. For example, it may be set as Vss = GND (ground potential).

[0039] Next, the operating principle of the pixel configuration in FIG. 1 will be described in detail.

[0040] During the signal writing period to the pixel, an analog signal potential is set on the signal line 106. This analog signal potential corresponds to the video signal. Note that this video signal is a signal represented by three or more values, and the analog signal potential is a potential that changes with time and has a state of three or more values. When writing the video signal to the pixel, a signal is input to the scanning line 107 to turn on the switch 103, and the potential of the potential supply line 105 is set to the power supply potential Vdd, and the power supply potential Vdd is set to the first terminal of the driving transistor 101. Then, current flows through the driving transistor 101 and the light-emitting element 104, and charge accumulation or discharge is performed on the capacitive element 102. At this time, the first terminal of the driving transistor 101 serves as the source terminal, and the second terminal serves as the drain

[0041] terminal. When the current flowing through the driving transistor 101 increases with the switch 103 turned on, the current flowing through the light-emitting element 104 also increases, so the voltage drop across the light-emitting element 104 increases, and the potential difference between the electrodes of the light-emitting element 104 increases. That is, the potential of the anode of the light-emitting element 104 approaches the potential of the potential supply line 105. Then, since the potential of the gate terminal of the driving transistor 101 also approaches the potential of the potential supply line 105, the driving transistor 101's gate terminal potential also approaches the potential of the potential supply line 105, so the driving transistor 101... The potential difference between the gate terminal and the source terminal of the driving transistor 101 becomes small, and On the other hand, when the current flowing through the light emitting element 104 becomes smaller, the light The voltage drop across the element 104 becomes smaller, and the potential difference between the electrodes of the light emitting element 104 becomes smaller. In other words, the potential of the anode of the light emitting element 104 approaches the potential of the cathode 108. The gate terminal of the driving transistor 101 also approaches the potential of the cathode 108. The potential difference between the gate terminal and the source terminal increases, and the current flowing through the driving transistor 101 Thus, the gate terminal of the driving transistor 101 The potential settles at a level at which a constant current flows. The charge corresponding to the potential difference between the potential of the gate terminal of the transistor and the potential of the signal line 106 is stored in the capacitance element 102. can be.

[0042] This completes the writing of the video signal to this pixel.

[0043] In this way, the current flowing through the driving transistor 101 and the light emitting element 104 becomes constant, and When the switch 103 is turned off, the capacitance element 102 The potential of the signal line 106 and the gate terminal of the driving transistor 101 at the moment when the switch 103 is turned off (or drain terminal) maintains a potential difference Vp (voltage).

[0044] During the signal writing period to the pixel, after the writing of the video signal to the pixel is completed, Even if the driving transistor 101 is turned on, the potential that is set on the potential supply line 105 is The voltage applied to the element 104 is the threshold voltage V EL So that it becomes as follows For example, the potential of the potential supply line 105 is the same as the potential Vss of the cathode 108 of the light emitting element 104. The potential may be the same as or lower than the potential of the potential supply line 105. The timing is set to the same time as or after the switch 103 is turned off.

[0045] A video signal is written to the pixel, and a first terminal of the driving transistor 101 is connected to the When the power supply potential Vdd is set to the potential supply line 105, a video signal is applied to the pixel. The analog signal potential set on the signal line 106 when the data was written is used as a reference. The on / off of the driving transistor 101 is controlled according to the fluctuation of the potential of the terminal 6. That is, the potential of the signal line 106 is set to a value corresponding to the time when a video signal is written to the pixel during the signal writing period to the pixel. When the potential of the analog signal is equal to or higher than the potential of the analog signal received by the pixel, the driving transistor 101 is turned off, and the video signal is not displayed on the pixel. When the analog signal potential becomes lower than the potential at which the analog signal was written, the driving transistor 101 turns on. Do this.

[0046] This is because when a video signal is written to a pixel, the capacitive element 102 holds a potential difference (Vp). Therefore, the potential of the signal line 106 is the analog signal potential when a video signal is written to the pixel. When the pixel voltage is equal to or higher than the threshold voltage, the potential of the gate terminal of the driving transistor 101 also becomes equal to the potential of the pixel when a video signal is input. This voltage is equal to or higher than the potential of the gate terminal when the data is written, and the driving transistor 101 is turned off. On the other hand, the potential of the signal line 106 is changed when a video signal is written to the pixel during a signal writing period to the pixel. When the analog signal potential becomes lower than the potential at the time of inputting the analog signal, the potential at the gate terminal of the driving transistor 101 also becomes When a video signal is written to the pixel, the potential of the gate terminal is lower than that of the driving transistor. Star 101 turns on.

[0047] Therefore, during the light emission period of the pixel, the potential to which the first terminal of the driving transistor 101 is connected A power supply potential Vdd is set on the supply line 105, and the switch 103 is turned off. By changing the potential set in the resistor 06 in an analog manner, the driving transistor 101 is turned on and off. In other words, the time during which a current flows through the light emitting element 104 is controlled in an analog manner. It is possible to express gradation.

[0048] The potential set on the signal line 106 during the light emission period of the pixel will be described. The potential to be set can be an analog potential with a periodically changing waveform. The analog potential is a potential that changes continuously with time. The analog signal potential corresponding to the analog signal changes continuously from the lowest to the highest potential in the range of its possible potentials. or a potential that changes continuously from the highest potential to the lowest potential, or a potential that changes continuously from the lowest potential to the highest potential. The potential is made to repeatedly and continuously change between the high potential and the low potential.

[0049] For example, during the light emission period, a potential that changes in an analog manner from a low potential to a high potential is applied to the signal line 106. As an example, the potential is set so that it rises linearly as shown in waveform 4301 in FIG. 43(a). This type of waveform is also called a sawtooth wave.

[0050] Alternatively, a potential that changes analogically from a high potential to a low potential may be set. For example, waveform 4 The potential may be decreased linearly as in 302.

[0051] Also, a waveform that combines these is acceptable. For example, the waveform 4303 Set the potential so that it rises linearly from low to high and then falls linearly from high to low. In the following, such a waveform 4303 is called a triangular wave potential. The potential drops linearly from high potential to low potential and rises linearly from low potential to high potential. Alternatively, a triangular wave potential may be set.

[0052] In addition, the potential set on the signal line 106 does not have to change linearly. Alternatively, the potential of the waveform corresponding to one period of the output waveform of the full-wave rectifier circuit may be set to 43. A potential such as 06 may be set.

[0053] By using this waveform, the light emission time for the video signal can be freely set. This makes it possible to perform gamma correction and the like.

[0054] In addition, during the light emission period of the pixel, the above waveforms 4301, 4302, 4303, A plurality of pulses of waveform 4304, waveform 4305 or waveform 4306 may be set in succession. As an example, as shown in waveform 4307, the pulse of waveform 4301 is It is also possible to set it twice in succession.

[0055] By doing this, the light emission time can be dispersed within one frame. As a result, the frame rate appears to be improved, and flickering on the screen can be prevented. can.

[0056] Next, a display device having the pixel configuration of FIG. 1 in a pixel portion will be described with reference to FIG. The display device includes a potential supply line driver circuit 201, a scanning line driver circuit 202, and a signal line driver circuit 203. The pixel portion 204 includes a plurality of pixels 205 arranged in the row direction. The reset lines R1 to Rm and the potential supply lines (Illumination n lines) I1 to Im and signal lines (Data lines) D1 to D Pixels 205 are arranged in a matrix corresponding to n.

[0057] The pixel 205 includes a driving transistor 206, a capacitance element 207, a switch 208, and a light-emitting element. A scanning line Ri (one of R1 to Rm) and a potential supply line Ii (I1 to Im) and a signal line Dj (any one of D1 to Dn). The driving transistor 206 is a P-channel transistor. A pixel 205 indicates one of a plurality of pixels arranged in the pixel section 204 .

[0058] The first terminal (source terminal or drain terminal) of the driving transistor 206 is connected to the potential supply line Ii. The gate terminal is connected to the signal line Dj via the capacitance element 207, and the second terminal (source The source terminal or drain terminal of the light emitting element 209 is connected to the anode (pixel electrode) of the light emitting element 209. In order to supply a desired current to the light emitting element 209 during the light emission period, the potential supply lines I1 to Im are The power supply potential Vdd for this purpose is set.

[0059] In addition, the gate terminal and the second terminal (source terminal or drain terminal) of the driving transistor 206 is connected via switch 208. Therefore, when switch 208 is on, The gate terminal and the second terminal (source terminal or drain terminal) of the driving transistor 206 are conductive. When the switch 208 is turned off, the gate terminal of the driving transistor 206 The second terminal (source terminal or drain terminal) becomes non-conductive, and at that moment the driving transistor The potential difference (voltage) between the gate terminal (or the second terminal) of the capacitor 206 and the signal line Dj is 7 can be held. Also, the cathode 210 of the light emitting element 209 can be held low. The power supply potential Vss is set. Note that the low power supply potential is a potential lower than the power supply potential Vdd. be.

[0060] The potential supply line driving circuit 201 and the scanning line driving circuit 202 are arranged on the left and right. The arrangement is not limited to the above. They may be arranged together on one side.

[0061] In addition, the power supply potential set for the potential supply lines I1 to Im is not limited to Vdd. For example, In the case of a full-color display consisting of color elements, the settings are made for each pixel of each RGB color element. The value of the power supply potential may be changed.

[0062] In other words, a potential supply line for each R, G, and B color element is provided for each row of pixels. The pixels in the column have the first terminals (source terminals or drain terminals) of their driving transistors connected to the The potential supply lines for each color element in each row are connected to the light emitting element for each pixel of the color element. The case where the voltage to be applied is changed will be described with reference to FIG.

[0063] FIG. 48 is a diagram showing a part of the pixel section 204 in FIG. 2. A pixel 4801 shown in FIG. 2 except for the voltage supply lines. The reference symbols for the transistors, the capacitors, the switches, and the light-emitting elements are omitted. For the symbols of these elements constituting 01, please refer to FIG. 2 and its explanation. The pixel 4801 in the i-th row (any one of the 1st to mth rows) is connected to the potential supply lines Iri, Igi, and Ibi. The pixel 4801 in the column of the R color element has the first 1 terminal is connected to Iri, and the pixel 4801 in the column of the G color element is driven by the driving transistor 206 The first terminal of the pixel 4801 in the column of the B color element is connected to Igi, and the second terminal of the pixel 4801 in the column of the B color element is connected to Igi. The first terminal of 06 is connected to Ibi. The potential supply line Iri is connected to the R color element during the light emission period. A potential Vdd1 is set so as to pass a desired current through the light emitting element 209 of the pixel in the column. The supply line Igi supplies a desired current to the light emitting element 209 of the pixel in the column of the G color element during the light emission period. A potential Vdd2 is set to the potential supply line Ibi for the pixel of the B color element column during the light emission period. The potential Vdd3 is set so that a desired current flows through the light emitting element 209. The voltage to be applied to the light emitting element 209 of the pixel 4801 can be set for each element.

[0064] Next, the operation principle of the display device of the present invention will be described with reference to Figs. 2 and 3. FIG. 13 is a timing chart of a certain pixel column (j-th column) of a pixel section 204 of a display device in Each of the pixels arranged in the pixel section 204 has the same structure as the pixel 205. Since the pixel structure is a single pixel, the driving transistor, the capacitance element, the switch, and the light-emitting element are all pixel elements. The same reference numerals as those used for element 205 will be used in the explanation.

[0065] As shown in FIG. 3, during the writing period, the signal line Dj (data line of the jth column) An analog signal potential is input to the pixel in the i-th row. Scan line Ri (Reset line of the i-th row) and potential supply line Ii (Illumination line of the i-th row) When a pulse signal is input to the pixel line, the switch 208 of the pixel in the i-th row turns on. The first terminal (source terminal or drain terminal) of the driving transistor 206 is turned on, and a potential is applied to the first terminal (source terminal or drain terminal) of the driving transistor 206. The power supply potential Vdd from the supply line Ii is set, and the capacitance element 207, the driving transistor 206, and A current flows through the light emitting element 209 .

[0066] Then, the capacitance element 207 accumulates or discharges electric charges. The charge originally stored in 7 and the potential set on the signal line Dj (Data line) Depending on (Va), either charge accumulation or discharge occurs.

[0067] Soon, the current stops flowing through the capacitor 207, and the driving transistor 206 and the light-emitting element 2 The current flowing through the drive transistor 09 becomes constant. At this time, it is not necessary to reach a completely steady state. It is sufficient to obtain the gate potential required to control the on / off of the transistor 206. Preferably, the driving transistor 206 operates in the saturation region. .

[0068] Then, the switch 208 is turned off. Then, the capacitance element 207 is The potential of the gate terminal required to control the on / off of switch 6 and the instantaneous time when switch 208 is turned off are The potential difference between the analog signal potential set on the signal line Dj (Data line) between Hold.

[0069] At the same time or after the switch 208 is turned off, the potential supply line Ii (Illum The signal on the input line falls from H level (power supply potential Vdd) to L level. Then, in the subsequent writing period, the driving transistor 206 is turned on. Even when the light emitting element 209 is turned on, the voltage applied to the light emitting element 209 is equal to or higher than the threshold voltage of the light emitting element 209. In other words, the light emitting element of the pixel in the i-th row is written during the signal writing period of the pixels in the other rows. The child 209 is prevented from emitting light.

[0070] That is, during the writing time of the pixels in the i-th row, the on / off of the driving transistor 206 is controlled. The scan line Ri (Reset l The signal of the potential supply line Ii (Illumination line) is H level. After obtaining the potential of the gate terminal required to control the on / off of the driving transistor 206, The scanning line Ri (Reset line) and the potential supply line Ii (Illumination line) signal falls to L level at the same time, or After the Reset line signal falls to the L level, the potential supply line Ii (Illu The signal on the terminating line is set to fall to the L level. During the signal writing period to the pixel before the signal writing time Ti to the pixel in the i-th row However, the scanning line Ri (Reset line) and the potential supply line Ii (Illumination The signal on the nth line is set to L level.

[0071] In this way, at the writing time Ti of the pixel in the i-th row, the pixel in the i-th row and j-th column is connected to the signal line Dj (D The video signal is written from the i-th row pixel. Ti has a signal line D1 to Dn (Data line) for each pixel column. This analog signal potential is input, and a video signal is written to the pixel in the i-th row of each column.

[0072] Next, at the time Ti+1 when a signal is written to the pixel in the i+1th row, the scanning line Ri+1 (Rese t line) and potential supply line Ii+1 (Illumination line) When a signal is input, the signal line Dj (Data line) of the pixel in the (i+1)th row and jth column has a potential ( Vb) is input, and the video signal is written to the pixel in the (i+1)th row and jth column. Each pixel column is connected to each of the signal lines D1 to Dn (Data lines). A log signal potential is input, and a video signal is also written to the pixel in the (i+1)th row of each column.

[0073] In this way, the scanning lines R1 to Rm (Reset lines) and the potential supply line I1 A pulse signal is input to the Im (Illumination line), and each When a video signal is written to a pixel, a signal writing period to the pixel section 204 for one frame period will end.

[0074] Subsequently, during the light emission period, the first terminals (sources) of the driving transistors 206 of the pixels 205 in all rows are In order to set the power supply potential Vdd to the drain terminal (terminal or drain terminal), the potential supply line Input a H level (Vdd) signal to I1~Im (Illumination line) Moreover, a triangular wave potential is set on the signal lines D1 to Dn (Data lines). The pixel in the i-th row and j-th column has a signal line Dj (Data line) with a higher potential than Va. When the signal line Dj (Data line) is V The light emitting element 209 emits light while the potential is lower than a (Ta). Similarly, the light emitting element 209 emits light during the period (Tb).

[0075] After the signal writing period to the pixels is completed, the analog signal to which the video signal is written is While a potential higher than the potential is set to the signal lines D1 to Dn (Data lines), The light emitting element 209 of the pixel does not emit light, and the analog signal potential becomes lower than when the signal was written. The principle by which the light emitting element 209 of the pixel emits light will be explained using the pixel configuration of FIG. As described above, the description will be omitted here.

[0076] In this way, during the light emission period, a triangular wave potential is set to the signal lines D1 to Dn of all pixels, Each signal is generated according to the analog signal potential when the video signal is written during the writing period. This sets the light emission time of the light element 209. In this way, analog time gray scale display is possible.

[0077] The driving transistor 206 that controls whether the light emitting element 209 emits light is turned on and off as follows: As described above, during the write period, the signal lines D1 to Dn (Data lines) are set Analog signal potentials are input to the signal lines D1 to Dn (Data lines) during the light emission period. It is determined whether the voltage is higher or lower than the triangular wave potential, and can be digitally controlled. The effect of the variation in the characteristics of the driving transistor 206 is small. In other words, it is possible to improve the variation in light emission for each pixel. This can be done.

[0078] During the light emission period, the potentials set for the signal lines D1 to Dn (Data lines) are as follows: As shown in Figure 43(a), (b), (c), (d), (e), (f), and (g), waveform 4 301, waveform 4302, waveform 4303, waveform 4304, waveform 4305, waveform 4306, or Alternatively, a waveform 4307 or a plurality of these waveforms may be set in succession.

[0079] By setting these waveforms consecutively, the light emission time can be dispersed within one frame. As a result, the frame rate appears to be improved, and the screen flicker is reduced. can be prevented.

[0080] The low power supply potential set to the cathode 210 is used for writing signals to the pixels. The potential may be different between the light-emission period and the light-emission period. The potential of the cathode 210 during the write period is It is advisable to set the potential higher than that of the cathode. The potential of the cathode 210 during the light emission period is Vss2. The potential of 10 (cathode) is Vss. In this case, Vdd>Vss2>V For example, Vss may be set to GND (ground potential).

[0081] In this way, the potential of the cathode 210 is changed during the signal writing period to the pixel. By keeping the voltage higher than the period during which a signal is written to the pixel, the power consumption during the period can be reduced. This can be done.

[0082] In addition, the potential of the cathode 210 is appropriately set to write signals to the pixels. During the write period, the gate solenoid of the driving transistor 206 is turned on when a signal is written to the capacitor element 207. In other words, the inter-base voltage Vgs can be set to the threshold voltage Vth. and the first terminal of the driving transistor 206 is connected to the power supply potential Vdd. When the gate-source voltage Vgs of the driving transistor 206 is set to the threshold The capacitance element 207 of each pixel 205 holds the potential difference with the gate potential, which is the voltage Vth. By setting the potential of the cathode 210 in this way, the pixel During the signal writing period, the signal is written without causing a current to flow through the light emitting element 209. This makes it possible to further reduce power consumption.

[0083] The pixel configuration of the present invention is not limited to the configuration shown in FIG. The configuration shown in Figure 4 uses a light-emitting element in which the applied voltage becomes a forward voltage when current flows. Although only one pixel is shown here, the pixel portion of the display device can be In reality, a plurality of pixels are arranged in a matrix in the row and column directions.

[0084] The pixel includes a driving transistor 401, a capacitor element 402, a switch 403, and a light-emitting element 40 4, a potential supply line (Illumination line) 405, and a signal line (Data line) 406 and a scanning line (Reset line) 407. The driving transistor 401 is an N-channel transistor.

[0085] A first terminal (source terminal or drain terminal) of the driving transistor 401 is connected to a potential supply line 405 The gate terminal is connected to a signal line 406 via a capacitance element 402, and the second terminal ( The source terminal or drain terminal is connected to the cathode of the light emitting element 404. The gate terminal and the second terminal (source terminal or drain terminal) of the transistor 401 are connected to the switch 4 03. Therefore, when the switch 403 is on, the driving transistor The gate terminal and the second terminal (the source terminal or the drain terminal) of the transistor 401 are electrically connected. When the switch 403 is turned off, the gate terminal and the second terminal ( At that moment, the gate of the driving transistor 401 The capacitance element 402 maintains the potential difference (voltage) between the port terminal (or the second terminal) and the signal line 406. The anode 408 of the light emitting element 404 can be held at a potential of Vdd. Vdd is the power supply potential on the high potential side, and is set during the light emission period of the pixel. If the potential set on the potential supply line 405 is the low power supply potential Vss, then It is ranked th.

[0086] Next, if the pixel shown in FIG. 4 is the pixel in the i-th row and j-th column arranged in a matrix on the pixel section, The operation principle will now be explained with reference to the timing chart shown in FIG.

[0087] During the period when signals are written to the pixels, the jth column pixels are connected to the signal line (Data An analog signal potential is set on line 406. This analog signal potential is used as the video signal. When writing a video signal to the pixels in the i-th row (writing time Ti), A high-level signal is input to the scanning line (Reset line) 407 to turn on the switch 403. is turned on, and the potential of the potential supply line (Illumination) 405 is set to the low power supply potential V ss, and the low power supply potential Vss is set to the first terminal of the driving transistor 401. A current flows through the driving transistor 401 and the light emitting element 404, and a charge is accumulated in the capacitor element 402. Accumulation or discharge takes place.

[0088] At this time, the first terminal of the driving transistor 401 becomes the source terminal, and the second terminal becomes the drain terminal. When the switch 403 is turned on, the driving transistor When the current flowing through 401 increases, the current flowing through the light emitting element 404 also increases, so that the light emission The voltage drop across the element 404 increases, and the potential difference between the electrodes of the light-emitting element 404 increases. In other words, the potential of the cathode of the light emitting element 404 approaches the potential of the potential supply line 405. The potential of the gate terminal of the transistor 401 also approaches the potential of the potential supply line 405. The potential difference between the gate terminal and the source terminal of the transistor 401 becomes small, and the driving transistor 4 On the other hand, when the current flowing through the light emitting element 404 becomes smaller, the light The voltage drop across the element 404 becomes smaller, and the potential difference between the electrodes of the light emitting element 404 becomes smaller. In other words, the potential of the cathode of the light emitting element 404 approaches the potential of the anode 408. The gate terminal of the driving transistor 401 also approaches the potential of the anode 408. The potential difference between the gate terminal and the source terminal increases, and the current flowing through the driving transistor 401 Thus, the gate terminal of the driving transistor 401 The potential settles at a level at which a constant current flows. The charge corresponding to the potential difference between the potential of the gate terminal of the transistor and the potential of the signal line 406 is stored in the capacitor element 402. can be.

[0089] In this way, writing of the video signal to the pixels in the i-th row is completed.

[0090] In this way, the current flowing through the driving transistor 401 and the light emitting element 404 becomes constant, and When this state is reached, the signal on the scan line (Reset line) 407 is set to the L level, The switch 403 is turned off. Then, the capacitance element 402 is The potential of the signal line (Data line) 406 between the gate terminal of the driving transistor 401 (or drain terminal) maintains a potential difference Vp (voltage).

[0091] During the signal writing period to the pixels, after the video signal is written to the pixels in the i-th row, A potential to be set in the potential supply line (illumination line) 405 of the pixel in the row Even if the driving transistor 401 is turned on, the voltage applied to the light emitting element 404 is not generated. The threshold voltage V of the optical element 404 EL For example, the potential supply line 405 is The potential may be the same as the potential Vdd of the anode 408 of the light emitting element 404 or higher. The timing for setting this potential to the potential supply line 405 is to turn off the switch 403. This should be done at the same time as or later than that.

[0092] Next, the write time T i+1 Similarly, the pixel in the i+1th row is Then, the write time for all the rows of pixels is completed, and the image signal for one frame is written. When the video signal is written to each pixel, the period for writing signals to the pixels ends.

[0093] A video signal is written to the pixel, and a first terminal of the driving transistor 401 is connected to the When the power supply potential Vss is set to the potential supply line 405, a video signal is applied to the pixel. The analog signal potential set on the signal line 406 when the data was written is used as a reference. The on / off of the driving transistor 401 is controlled according to the fluctuation of the potential of the terminal 6. That is, the potential of the signal line 406 is set to a value corresponding to the time when a video signal is written to the pixel during the signal writing period to the pixel. When the potential of the analog signal is equal to or less than the potential of the analog signal received by the pixel, the driving transistor 401 is turned off, and no video is displayed on the pixel. When the analog signal potential becomes higher than that when the ON signal is written, the driving transistor 401 turns ON. Do this.

[0094] This is because when a video signal is written to a pixel, the capacitance element 402 holds a potential difference (Vp). Therefore, the potential of the signal line 406 is the analog signal potential when a video signal is written to the pixel. When the pixel voltage Vp is equal to or lower than the threshold voltage Vp, the potential of the gate terminal of the driving transistor 401 is also The potential of the gate terminal becomes lower than the potential at which writing was performed, and the driving transistor 401 turns off. On the other hand, the potential of the signal line 406 is changed when a video signal is written to the pixel during a signal writing period to the pixel. When the analog signal potential becomes higher than the potential at the time of inputting the analog signal, the potential at the gate terminal of the driving transistor 401 also becomes When a video signal is written to the pixel, the potential of the gate terminal is higher than that of the driving transistor. Start 401 turns on.

[0095] Therefore, as shown in FIG. 5, during the light emission period of the pixel, the first terminal of the driving transistor 401 Set Vss to the potential supply line (Illumination line) 405 to which the terminal is connected. The scan line (Reset line) 407 is set to the L level to turn off the switch 403. In this state, a triangular wave potential is set on the data line 406 to drive the transistor. That is, the driving circuit 404 controls whether the light emitting element 404 emits light or not. The on / off of the driving transistor 401 is controlled by the Data line (signal line 406) during the writing period. ) is applied to the Data line (signal line 406) during the light emission period. It is determined whether the potential is higher or lower than the input triangular wave potential, and can be digitally controlled. Therefore, the driving transistor 401 is less affected by the variation in the characteristics. The transistor 401 can be turned on and off. It can improve your ki.

[0096] During the light emission period of the pixel, the potential set on the signal line (Data line) 406 is An analog potential with a periodically changing waveform can be used. For example, As shown in (b), (c), (d), (e), (f), and (g), waveform 4301, waveform 43 02, waveform 4303, waveform 4304, waveform 4305, waveform 4306 or waveform 4307 , or a plurality of these may be set consecutively.

[0097] By setting these waveforms consecutively, the light emission time can be dispersed within one frame. As a result, the frame rate appears to be improved, and the screen flicker is reduced. can be prevented.

[0098] As shown in FIG. 5, during a signal writing period to a pixel, the potential of the anode (anode 408) By setting the value lower than that set during the light emission period, the power dissipation during the signal writing period to the pixel is Power consumption can be reduced.

[0099] In addition, the pixel configuration shown in this embodiment (FIGS. 1, 2, 4, etc.) requires a transistor. Since the number of sensors and wiring is reduced, the pixel aperture ratio is improved, enabling high-definition display. .

[0100] In addition, when a pixel with a high aperture ratio and a pixel with a low aperture ratio have the same luminous intensity, the pixel with the high aperture ratio In contrast to pixels with a lower aperture ratio, the luminance of the light-emitting element can be lowered, improving the reliability of the light-emitting element. In particular, when an EL element is used as the light-emitting element, the reliability of the EL element is improved. do.

[0101] In general, N-channel transistors have a higher mobility μ Therefore, the P-channel transistor and the N-channel transistor have the same capacitance. In order to pass a current of this magnitude, the ratio of the channel width to the channel length of a P-channel transistor must be The value of W / L must be greater than the W / L of the N-channel transistor. By using N-channel transistors, the transistor size can be reduced. Therefore, by using the pixel configuration as shown in Figure 4, the aperture ratio of the pixel can be further improved.

[0102] (Embodiment 2) This embodiment shows a different structure from that of the first embodiment. The pixel structure shown in this embodiment is , an analog signal potential set when writing a video signal to a pixel, and a pixel lighting / non-lighting state The analog potential for controlling the pixel is set in the pixel through a separate wiring.

[0103] First, the pixel configuration of the display device of the present invention will be described in detail with reference to FIG. A transistor 5601, a capacitor 5602, a first switch 5603, and a light-emitting element 5 604, a power line 5605, a second switch 5606, and a third switch 5607, A scanning line (Reset line) 5608 and a first signal line (Data1 line) 5 The driver has a second signal line (Data2 line) 5610. The transistor 5601 is a P-channel transistor.

[0104] The first terminal (source terminal or drain terminal) of the driving transistor 5601 is connected to the power supply line 5605 and the gate terminal is connected to one electrode of the capacitive element 5602. The other electrode of the capacitive element 5602 is connected to the first signal line 5609 via the second switch 5606 and to the second signal line 5610 via the third switch 5607. Also, the gate terminal and the second terminal (source terminal or drain terminal) of the driving transistor 5601 are connected via the first switch 56 03. Note that the cathode 561 1 of the light-emitting element 5604 has the potential of Vss set. Note that Vss is a potential that satisfies Vss < Vdd with respect to the power supply potential Vdd set on the power supply line 5605 For example, Vss = GN D (ground potential) may be used.

[0105] Next, the operating principle of the pixel configuration in FIG. 56 will be briefly described with reference to FIG. 57. Note that the timing chart shown in FIG. 5 7 shows the timing chart of the pixel column in the j-th column of the display device in which a plurality of pixels shown in FIG. 56 are arranged in a matrix Also, in the timing chart shown in FIG. 57, it is assumed that the first switch 5603 is turned on when the signal of the scanning line 5608 (Reset line) is at the H level and turned off when it is at the L level In the pixel of FIG. 56, an analog signal potential corresponding to the video signal is set on the first signal line 5609, and an analog potential for controlling the light emission time is set on the second signal line 5610 Note that the potential set on the second signal line 5310 is as shown in FIGS. 43(a) and (b) of Embodiment 1

[0106]

[0107] ​​​As shown in (c), (d), (e), (f), and (g), waveform 4301 and waveform 4302 , waveform 4303, waveform 4304, waveform 4305, waveform 4306 or waveform 4307, or These may be set consecutively in multiples.

[0108] By setting these waveforms consecutively, the light emission time can be dispersed within one frame. As a result, the frame rate appears to be improved, and the screen flicker is reduced. can be prevented.

[0109] Note that in a display device having the pixel configuration of this embodiment mode, a signal writing period is set for each row of a pixel portion. In other words, the writing period and the light emission period proceed simultaneously for the entire pixel section. The period during which signals are written to the pixels in each row is called the write time.

[0110] Here, the signal write time for the pixels in the i-th row will be described. The signal writing time of the pixel in the i-th row is shown in Fig. 1. The pixel in the i-th row is written in the period other than the Ti period. The light emission period begins.

[0111] First, in a period Ti, the second switch 5606 is turned on and the third switch 5607 is turned off. The scanning line 5608 (Reset line) is set to H level during the period Ti. A signal is input to turn on the first switch 5603. Also, the driving transistor of the pixel in the i-th row A first terminal (source terminal or drain terminal) of the resistor 5601 receives a current from a power line 5605. The source potential Vdd is set, and the capacitor element 5602, the driving transistor 5601, and the light-emitting element 5 A current flows through 604. Then, charge is stored or discharged in the capacitor element 5602. In other words, the charge originally stored in the capacitor 5602 and the charge in the first signal line 5609 ( Either charge accumulation or discharge occurs depending on the potential set on the Data1 line. Then, the signal of the scanning line 5608 (Reset line) changes from H level to L level. When the voltage falls, the first switch 5603 turns off. The first switch 5603 turns off. At that moment, the potential of the gate terminal of the driving transistor 5601 and the potential of the first signal line 5609 are The capacitor 5602 holds the potential difference between the potential.

[0112] In this way, the pixel in the i-th row and j-th column receives video data from the first signal line 5609 (Data 1 line). At this time, the first signal line 5609 of each pixel column is written. Each analog signal potential is input from (Data1 line), and the i-th row of each column A video signal is written to the pixels.

[0113] In this way, when the Ti period, which is the signal writing time for the pixels in the i-th row, ends, The pixel signal writing time, T i+1 The period begins, and the pixels in the i-th row enter the light emitting period.

[0114] During the light emission period of the pixels in the i-th row, the first switch 5603 of the pixels in the i-th row is kept off, and the second switch 5604 is turned on. The second switch 5606 is turned off and the third switch 5607 is turned on.

[0115] As shown in FIG. 57, a triangular wave current is applied to the second signal line 5610 (Data 2 line). The pixel in the i-th row and j-th column is connected to the second signal line 5610 (Data2 line ) is connected to the first signal line 5609 (Dat When the potential is higher than the analog signal potential set in the a1 line, the light-emitting element 5 604 maintains a non-emitting state, and the second signal line 5610 (Data2 line) During the period Ti, which is the signal writing time for the pixels in the row, the first signal line 5609 (Data1 During the time (Ta) when the potential is lower than the analog signal potential set at (ine), the light emitting element 5604 Therefore, the analog signal when a video signal is written to each pixel is The light emission time of the light emitting element 5604 is set according to the log signal potential. This makes it possible to display time gradations.

[0116] In this manner, in the display device having the pixel configuration of this embodiment, signals are written sequentially for each pixel row. When the signal writing period ends, the light emission period starts for each pixel row. When a video signal is written to the pixels in a line-sequential manner, such as in the above embodiment, the writing period is one pixel. Since the writing time of the element is sufficient, the light emission period can be extended. Since the ratio (the ratio of the light-emitting period to the frame period) is high, the instantaneous brightness of the light-emitting element is low. Therefore, the reliability of the light-emitting element can be improved.

[0117] In addition, the write period for each row of pixels can be extended, so that the first signal line 56 The frequency of the signal line driver circuit that inputs the analog signal potential to 09 (Data1 line) is Therefore, the power consumption can be reduced.

[0118] The light emitting element 5604 is turned on and off by a driving transistor 5601 which controls whether the light emitting element 5604 emits light or not. As described above, during the writing period, the first signal line 5609 (Data1 line) The set analog signal potential is applied to the second signal line 5610 (Data2 It is determined whether the triangular wave potential input to the line is higher or lower, and is digitally controlled. Therefore, the influence of the variation in the characteristics of the driving transistor 5601 can be eliminated. Therefore, the on / off of the driving transistor 5601 can be controlled with little distortion. This can improve the variation in light emission.

[0119] In addition, in FIG. 56, a P-channel transistor is used for the driving transistor 5601. However, an N-channel transistor can also be used. In that case, the cathode 5611 The direction of the current flowing from the light emitting element 560 to the power supply line 5605 is reversed. The forward voltage is reversed for the transistor 4. The transistor can be used as a driving transistor that controls whether a light-emitting element emits light or not. In general, N-channel transistors have a higher mobility μ than P-channel transistors. Therefore, if the same current is to be passed, the transistor size can be made smaller. This improves the pixel aperture ratio, providing a display device with high-resolution display and reduced power consumption. It is possible.

[0120] In this embodiment, the source terminal and drain terminal of the driving transistor that drives the light emitting element are The drain terminal and the anode and cathode of the light-emitting element are connected to each other when a forward voltage is applied to the light-emitting element. This refers to the terminals and electrodes when in contact with the

[0121] (Embodiment 3) In this embodiment, when a transistor is applied to a switch of the pixel described in Embodiment 1, This article explains:

[0122] The pixel shown in FIG. 6 uses an N-channel transistor for the switch 103 of the pixel shown in FIG. The pixel has a driving transistor 601, a capacitor element 602, and a switching A transistor 603, a light-emitting element 604, and a potential supply line (Illumination line line) 605, a signal line (Data line) 606, and a scanning line (Reset line The driving transistor 601 has a P-channel transistor. An N-channel transistor is used as the switching transistor 603.

[0123] A first terminal (source terminal or drain terminal) of the driving transistor 601 is connected to a potential supply line 605 The gate terminal is connected to a signal line 606 via a capacitance element 602, and the second terminal ( The source terminal or drain terminal is connected to the anode (pixel electrode) of the light-emitting element 604 . The gate terminal of the driving transistor 601 is connected to the first terminal of the switching transistor 603. the terminal (source terminal or drain terminal) of the driving transistor 601 and the second terminal (source terminal or drain terminal) is the second terminal (source terminal) of the switching transistor 603 Therefore, when a signal of H level is input to the scanning line 607, When the switching transistor 603 is on, the driving transistor 601 The gate terminal and the second terminal (the source terminal or the drain terminal) are electrically connected to each other. When an L level signal is input to the output of the driving transistor 7, the switching transistor 603 is turned off. The gate terminal and the second terminal (the source terminal or the drain terminal) of the transistor 601 are not conductive. At that moment, the gate terminal (or the second terminal) of the driving transistor 601 and the signal line 60 The capacitor element 602 can hold a potential difference (voltage) between the light emitting element 604 and the light emitting element 604. The cathode 608 is set to a potential of Vss. With the power supply potential Vdd set in the potential supply line 605 during the light emission period of the pixel as a reference, Vss< It is a potential that satisfies Vdd. For example, Vss may be equal to GND (ground potential).

[0124] Therefore, the switching transistor 603 has the same function as the switch 103 of the pixel in FIG. In addition, the driving transistor 601, the capacitance element 602, the switching transistor 603, a light emitting element 604, and an illumination line 605 , a signal line (Data line) 606 and a scanning line (Reset line) 607 are 1, the driving transistor 101, the capacitance element 102, the switch 103, and the light emitting element 104 of the pixel in FIG. 104, a potential supply line (Illumination line) 105, a signal line (Dat a line) 106 and the scan line (Reset line) 107. The operation of pixel 6 is similar to that of the pixel in FIG. 1, so a description thereof will be omitted here.

[0125] The capacitor 602 continues to hold the potential difference held during the writing period during the light emission period. Therefore, the leakage current (leakage current) of the switching transistor 603 The off-state current is the off-state current that flows between the source and drain of a transistor when it is off. current that flows between the gate and the source or drain) and drive The gate leakage current of transistor 601 must be reduced.

[0126] Therefore, as the switching transistor 603, an N-channel type transistor is used as shown in FIG. It is recommended to use a low-concentration impurity region (Lig) for the N-channel transistor. It is easy to form a highly doped drain (LDD region). This is because the off-current can be reduced.

[0127] In addition, the gate insulating film of the driving transistor 601 and the switching transistor 603 It is desirable to reduce the gate leakage current by appropriately selecting the material and film thickness. The gate leakage current can also be reduced by using a multi-gate structure for the gate electrode. Cut.

[0128] In addition, a P-channel transistor is used as a switching transistor in the switch 103 of the pixel shown in FIG. In this case, the switching transistor may be a 10-type transistor. When an N-channel transistor is used, the H and L levels of the signal that controls on / off are In other words, when the L level, the switching transistor is on. When the input is at a high level, it turns off.

[0129] In addition, a P-channel transistor is used as a switching transistor in the switch 103 of the pixel shown in FIG. By applying a P-channel transistor to the entire pixel section or the peripheral driving circuit, It is possible to provide a circuit that is composed only of monolithic transistors, thereby reducing the number of processes. Therefore, it is possible to provide a monopolar display panel with a low cost.

[0130] In addition, a P-channel transistor is used as a switching transistor in the switch 103 of the pixel in FIG. By using a transistor, it is possible to omit the wiring corresponding to the potential supply line 105 shown in FIG. Such a configuration will be described with reference to FIG.

[0131] The pixel includes a driving transistor 801, a capacitance element 802, and a switching transistor 80 3, a light emitting element 804, a signal line (Data line) 806, and a scanning line (Reset In addition, the driving transistor 801 and the switching The transistor 803 is a P-channel transistor.

[0132] The first terminal (source terminal or drain terminal) of the driving transistor 801 of the pixel in the (i+1)th row is connected to the scanning line 807 of the pixel in the i-th row, and the gate terminal is connected to the signal line 803 via the capacitor element 802. 806, and the second terminal (source terminal or drain terminal) is connected to the anode ( The gate terminal of the driving transistor 801 is connected to a switching A first terminal (source terminal or drain terminal) of the driving transistor 803 and The second terminal (source terminal or drain terminal) of the transistor 801 is connected to the switching transistor 8 03 is connected to the second terminal (source terminal or drain terminal) of the scanning line 80. When an L level signal is input to the input terminal 7 and the switching transistor 803 is turned on The gate terminal and the second terminal (source terminal or drain terminal) of the driving transistor 801 are Then, a signal of H level is input to the scanning line 807, and the switching transistor When the gate terminal and the second terminal (source terminal) of the driving transistor 801 are turned off, or drain terminal) becomes non-conductive, and at that moment the gate terminal ( The capacitance element 802 holds the potential difference (voltage) between the drain terminal and the signal line 806. The cathode 805 of the light emitting element 804 has a potential of Vss. Vss is set to the first terminal of the driving transistor 801 during the light emission period of the pixel. The power supply potential Vdd set at the terminal (source terminal or drain terminal) is used as a reference, and Vss <V For example, Vss may be set to GND (ground potential).

[0133] FIG. 9 shows a timing chart of a display device having the pixel configuration of FIG. The scanning line 807 of the row falls from H level to L level at the write time. When the period ends, the pixel in the i-th row goes from L level to H level. The period Ti+1 is the writing time for each element, and the signal on the scanning line 807 during this period is L It is a level.

[0134] Therefore, since the signal of the scanning line 807 is at H level during the light emission period, If the current supply capacity of the circuit that outputs the signal is increased, the voltage applied to the light emitting element 804 can be set. The scanning line 807 can be used as the potential supply line. In the present embodiment, the scanning line 807 of the adjacent row is used as the scanning line 807 of the other row. I can't.

[0135] In the configuration of FIG. 8, during the write period, light is emitted even during the write time of pixels in other rows. Since the element 804 may emit light, the potential of the cathode (cathode 805) is generated. It is preferable to set the period higher than the light period. More preferably, as explained in the first embodiment, When a signal is written to the driving transistor 801, the gate-source voltage Vgs of the driving transistor 801 becomes equal to or exceeds the threshold voltage Vgs. In other words, the voltage applied to the light emitting element 804 at this time is The forward threshold voltage V of the EL Cathode (805) as follows: It is advisable to set the potential.

[0136] With the configuration shown in Figure 8, the number of wirings can be reduced, and the aperture ratio can be further improved. It is possible.

[0137] FIG. 1 shows a configuration in which an N-channel transistor is applied to the switch 403 of the pixel configuration in FIG. Shown in Figure 7.

[0138] The pixel shown in FIG. 7 includes a driving transistor 701, a capacitor element 702, and a switching transistor. A resistor 703, a light emitting element 704, and a potential supply line (Illumination line ) 705, a signal line (Data line) 706, and a scanning line (Reset line) The driving transistor 701 and the switching transistor 707 are An N-channel transistor is used for 703.

[0139] A first terminal (source terminal or drain terminal) of the driving transistor 701 is connected to a potential supply line 705 The gate terminal is connected to a signal line 706 via a capacitance element 702, and the second terminal ( The source terminal or drain terminal is connected to the cathode of the light-emitting element 704. The gate terminal of the transistor 701 is connected to the first terminal (source) of the switching transistor 703. a second terminal (source terminal or drain terminal) of the driving transistor 701; The second terminal (source terminal or drain terminal) of the switching transistor 703 Therefore, when a signal of H level is input to the scanning line 707, When the switching transistor 703 is on, the gate terminal of the driving transistor 701 and The second terminal (source terminal or drain terminal) is conductive. Then, the scan line 707 is applied with an L level When the switching transistor 703 is turned off, the driving transistor 7 The gate terminal and the second terminal (source terminal or drain terminal) of 01 become non-conductive, and at that moment The potential difference between the gate terminal (or the second terminal) of the driving transistor 701 and the signal line 706 The capacitance element 702 can hold the voltage. The potential of the pixel 708 is set to Vdd. With the low power supply potential Vss set in the potential supply line 705 as a reference, Vdd>Vss is satisfied. It is the electric potential.

[0140] Therefore, the switching transistor 703 has the same function as the switch 403 of the pixel in FIG. In addition, the driving transistor 701, the capacitance element 702, the switching transistor a light-emitting element 703, a light-emitting element 704, and a potential supply line (Illumination line) 705 , the signal line (Data line) 706 and the scanning line (Reset line) 707 are 4, a driving transistor 401, a capacitance element 402, a switch 403, and a light-emitting element 404 of the pixel in FIG. 404, a potential supply line (Illumination line) 405, a signal line (Dat a line) 406 and the scan line (Reset line) 407. The operation of pixel 7 is similar to that of the pixel in FIG. 4, so a description thereof will be omitted here.

[0141] Note that the capacitor 702 continues to hold the potential difference held during the writing period during the light emission period. Therefore, the leakage current (leakage current) of the switching transistor 703 The off-state current is the off-state current that flows between the source and drain of a transistor when it is off. current that flows between the gate and the source or drain) and drive The gate leakage current of transistor 701 must be reduced.

[0142] Therefore, the switching transistor 703 is an N-channel type as shown in FIG. It is recommended to use a low-concentration impurity region (Lig) for the N-channel transistor. It is easy to form a highly doped drain (LDD region). This is because the off-current can be reduced.

[0143] In addition, the gate insulating film of the driving transistor 701 and the switching transistor 703 It is desirable to reduce the gate leakage current by appropriately selecting the material and film thickness. The gate leakage current can also be reduced by using a multi-gate structure for the gate electrode. Cut.

[0144] In general, N-channel transistors have a higher mobility μ Therefore, if the same current is to be passed, the transistor size can be made smaller. Therefore, the pixel aperture ratio can be improved by using the pixel configuration shown in FIG.

[0145] In addition, if the configuration shown in FIG. 7 is used, the entire pixel section or the peripheral driving circuitry can be integrated into an N-channel Since it is possible to provide a circuit that is composed only of gate-type transistors, the number of processes is reduced. Therefore, it is possible to provide a low-cost unipolar display panel having a high resolution.

[0146] In addition, the thin film transistors used in the circuits of the display panel are N-channel transistors. Since the transistor can be constructed using only amorphous semiconductor, Amorphous semiconductors such as amorphous semiconductors and semi-amorphous semiconductors (also called microcrystalline semiconductors) are used. For example, amorphous silicon (aS i:H). This makes it possible to further reduce the number of steps.

[0147] In addition, an N-channel transistor is used as a switching transistor in the switch 403 of the pixel in FIG. By using a transistor, it is possible to omit the wiring corresponding to the potential supply line 405 shown in FIG. Such a configuration will be described with reference to FIG.

[0148] The pixel includes a driving transistor 1001, a capacitance element 1002, and a switching transistor 1003, a light emitting element 1004, a signal line (Data line) 1006, and a scanning line ( Reset line) 1007. The switching transistor 1003 is an N-channel transistor.

[0149] The first terminal (source terminal or drain terminal) of the driving transistor 1001 of the pixel in the (i+1)th row ) is connected to the scanning line 1007 of the pixel in the i-th row, and the gate terminal is connected to the The second terminal (source terminal or drain terminal) of the light emitting element 100 is connected to the signal line 1006. The gate terminal of the driving transistor 1001 is connected to the cathode of the switching transistor 1002. A first terminal (source terminal or drain terminal) of the driving transistor 1003 and The second terminal (source terminal or drain terminal) of the transistor 1001 is a switching transistor. The second terminal (source terminal or drain terminal) of the scanning When a high-level signal is input to line 1003, switching transistor 1003 turns on. When the driving transistor 1001 is in the ON state, the gate terminal and the second terminal (the source terminal or drain terminal) of the driving transistor 1001 are Then, a low level signal is input to the scanning line 1003, and the switch When the switching transistor 1003 is turned off, the gate terminal of the driving transistor 1001 and the 2 terminal (source terminal or drain terminal) becomes non-conductive, and at that moment, the drive transistor 1 The potential difference (voltage) between the gate terminal (or drain terminal) of 001 and the signal line 1006 is The anode of the light emitting element 1004 can be held. The potential of 1005 is set to Vdd. Vdd is the driving voltage during the light emission period of the pixel. The low power supply potential V With ss as the reference, this potential satisfies Vdd>Vss.

[0150] A timing chart for the display device having the pixel configuration of FIG. The scanning line 1007 of the original row rises from L level to H level during the write time. When the time is over, the pixel goes from H level to L level. The pixel in row i is in period Ti, and the pixel in row i+1 is in period Ti. The first pixel has a writing time of period Ti+1, and the second pixel has a writing time of period Ti+1. The signal is at H level.

[0151] Therefore, during the light emission period, the signal of the scanning line 1007 is at the L level. If the current supply capacity of the circuit that outputs the signal to the light emitting element 1004 is increased, the voltage to be applied to the light emitting element 1004 can be set. The scanning line 1007 can be used as a potential supply line for determining the potential. The scanning line 1007 of the adjacent row is used as a potential supply line, but the scanning line 1007 of the other row is However, the present invention is not limited to this.

[0152] In the configuration of FIG. 10, during the write period, the light is emitted even during the write time of the pixels of other rows. In order to prevent the optical element 1004 from emitting light, the potential of the anode 1005 is It is preferable to set it lower than the light emission period. More preferably, as explained in the first embodiment, When a signal is written to the element, the gate-source voltage Vgs of the driving transistor 1001 is equal to or lower than the threshold. In other words, the voltage applied to the light emitting element 1004 at this time should be The forward threshold voltage V of the light emitting element 1004 EL The anode 1005 is It is advisable to set the potential as shown in e).

[0153] With the configuration shown in Figure 10, the number of wirings can be reduced, leading to a further increase in the aperture ratio. It is possible.

[0154] Of course, a P-channel transistor can be used as the switch 403 in FIG. It is also possible.

[0155] (Embodiment 4) In this embodiment mode, in the pixel configuration shown in Embodiment Mode 1, the reliability of the light-emitting element is further improved. and a driving method for improving the reliability of a light-emitting element more than that of the pixel configuration shown in the first embodiment. An improved pixel configuration and a driving method thereof will now be described.

[0156] First, a driving method according to the present embodiment will be described using the pixel configuration shown in FIG. 1 of the first embodiment. Reveal.

[0157] In this embodiment, one frame period includes a forward bias period (a writing period and a light emission period). The forward bias period has a write period and a light emission period. The operations during this period are the same as those shown in the first embodiment, so the explanation will be omitted.

[0158] During the reverse bias period, as shown in FIG. The potential Vdd set on the ion line 105 and the potential Vdd set on the cathode 108 In other words, the potential supply line (Illum A low power supply potential Vss is set on the cathode (cathode A power supply potential Vdd is set in the switch 108. Then, the switch 103 is turned off. Then, The first and second terminals of the driving transistor 101 are a source terminal and a drain terminal, respectively, in the forward direction. In other words, during the forward bias period, the driving transistor The first terminal of 101 functions as a source terminal and the second terminal functions as a drain terminal. During the ass period, the first terminal of the driving transistor 101 is the drain terminal, and the second terminal is the source terminal. Also, the electrode that functions as the anode or cathode of the light emitting element 105 At this time, the signal line 106 is supplied with a signal that is strong enough to turn on the driving transistor 101. The potential is set so that

[0159] At the beginning of the reverse bias period, the potential of the gate terminal of the driving transistor 101 is set. That is, as shown in FIG. 52, at the beginning of the reverse bias period, the gate potential is set A period Tr is provided. At this time, a signal of H level is applied to the scanning line 107 (Reset line). Then, the switch 103 is turned on. Then, the potential supply line 105 (Illumina The potential of the signal line is set to H level (Vdd), and the potential of the signal line 106 is set to H level (Vdd). (Here, the H level refers to a potential higher than the minimum potential of the triangular wave potential, and more preferably, The potential of the driving transistor is set to 100 V, which is higher than the intermediate potential of the wave potential. The potential of the gate terminal required to control the on / off of the transistor 101 and the H level of the signal line 106 are The potential difference is held in the capacitor 102 .

[0160] In the reverse bias period, when the gate potential setting period Tr ends, the potential of the scanning line 107 The potential of the signal line 106 becomes the H level, and the switch 103 is turned off. The L level here is lower than the H level potential set on the signal line 106. (a potential equal to or lower than the midpoint of the triangular wave potential, more preferably a potential lower than the midpoint of the triangular wave potential). Then, the potential of the signal line 106 is lowered while the capacitor 102 holds the potential difference. The potentials of the H-level and L-level signals set on the signal line 106 during the reverse bias period are By setting it appropriately, the driving transistor 101 can be turned on sufficiently.

[0161] Therefore, the driving transistor 101 is turned on, and the light emitting element 104 is forward biased. A voltage opposite to that between the electrodes can be applied.

[0162] In this way, during the reverse bias period, the voltage in the opposite direction to the forward bias period is applied to emit light. Even if a current is applied to the element 104, no current flows through the normal light emitting element 104 (or if it appears to flow, On the other hand, if there is a short circuit in the light emitting element 104, the short circuit Current flows through the shorted area. Then, the shorted area is insulated. Therefore, during the reverse bias period, A reverse voltage is applied to the light emitting element 104 so as to pass a current sufficient to isolate the shorted portion. Apply.

[0163] Therefore, as described above, during the reverse bias period, the voltage set in the potential supply line 105 is The potential to be set to the cathode 108 is not limited to Vss. Also, the potential to be set to the cathode 108 is not limited to Vdd. Therefore, if a current sufficient to isolate the shorted portion of the light emitting element 104 during the reverse bias period can flow, That's good.

[0164] In this way, by insulating the short-circuited portion of the light emitting element 104, the display defect of the pixel is improved. In addition, the life of the light emitting element 104 can be extended.

[0165] In addition, a pixel structure different from that shown in FIG. 1 of the first embodiment is used to improve the reliability of the light-emitting element. This will be described with reference to FIG. 53. In this configuration, the forward bias period (write The diode has a reverse bias period (a write period and a light emission period) and a reverse bias period.

[0166] The pixel includes a driving transistor 5301, a capacitor element 5302, a switch 5303, and a light emitting element. 5304, a potential supply line (Illumination line) 5305, and a signal line (Data line) 5306, scan line (Reset line) 5307, and inverse The driving transistor 5309 has a bias switch 5309 and a wiring 5310. A P-channel transistor is used for 301.

[0167] The first terminal (source terminal or drain terminal) of the driving transistor 5301 is connected to the potential supply line 53 05, the gate terminal is connected to the signal line 5306 via the capacitor element 5302, and the second terminal (source terminal or drain terminal) is connected to the anode (pixel electrode) of the light-emitting element 5304. Also, the gate terminal and the second terminal (source terminal or drain terminal) of the driving transistor 5301 are connected via the switch 5303. Therefore, when the switch 5303 is on, the gate terminal and the second terminal (source terminal or drain terminal) of the driving transistor 5301 are conductive. When the switch 5303 is off, the gate terminal and the second terminal (source terminal or drain terminal) of the driving transistor 5301 become non-conductive, and at that moment, the capacitor element 5302 can hold the potential difference (voltage) between the gate terminal (or the second terminal) of the driving transistor 5301 and the signal line 5306. Note that the cathode 5308 of the light-emitting element 530 4 has the potential of Vss set. Note that Vss and are at a potential that satisfies Vss < Vdd with respect to the power supply potential Vdd set on the potential supply line 5305 during the light emission period of the pixel. For example, it is also possible to set Vss = GND (ground potential). Also, the anode of the light-emitting element 5304 is connected to the wiring 5310 to which the potential of Vss3 is set via the reverse bias switch 5309. Note that Vss3 is at a potential that satisfies Vss3 < Vss , and when the reverse bias switch 5309 is on during the reverse bias period, a voltage is applied to the light-emitting element 5304 in a direction opposite to the forward bias period. Therefore, at this time, the potential levels of the anode and cathode of the light-emitting element 5304 are reversed.

[0168] Next, the operating principle of the pixel configuration of FIG. 53 will be described in detail.

[0169] During the period when a signal is written to the pixel, the reverse bias switch 5309 is turned off and the signal line 53 An analog signal potential is set in 06. This analog signal potential corresponds to a video signal. When writing a video signal to a pixel, a signal is input to the scanning line 5307 and the switch The switch 5303 is turned on, and the potential of the potential supply line 5305 is set to the power supply potential Vdd, and the driving transistor A power supply potential Vdd is set to the first terminal of the driving transistor 5301. A current flows through the capacitor 5301 and the light emitting element 5304, and a charge is accumulated or discharged in the capacitor 5302. It will be held.

[0170] At this time, the reverse bias switch 5309 may be turned on. At that time, it is possible to prevent current from flowing to the light emitting element 5304 .

[0171] At this time, the first terminal of the driving transistor 5301 becomes the source terminal, and the second terminal becomes the drain terminal. When the switch 5303 is on, the driving transistor When the current flowing through the photodiode 5301 increases, the current flowing through the light-emitting element 5304 also increases. Therefore, the voltage drop in the light-emitting element 5304 becomes large, and the potential difference between the electrodes of the light-emitting element 5304 becomes In other words, the potential of the anode of the light emitting element 5304 approaches the potential of the potential supply line 5305. Then, the potential of the gate terminal of the driving transistor 5301 also becomes the potential of the potential supply line 5305. Therefore, the potential difference between the gate terminal and the source terminal of the driving transistor 5301 becomes small. Therefore, the current flowing through the driving transistor 5301 decreases. When the current flowing through the light emitting element 5304 becomes smaller, the voltage drop in the light emitting element 5304 becomes smaller. In other words, the potential difference between the anode and cathode 5308 of the light emitting element 5304 becomes smaller than that of the cathode 5308. Then, the gate terminal of the driving transistor 5301 also approaches the potential of the cathode 5308. , the potential difference between the gate terminal and the source terminal of the driving transistor 5301 becomes large. This increases the current flowing through the driving transistor 5301. The gate terminal of 301 falls to a potential that causes a constant current to flow through the driving transistor 5301. At that time, the potential of the gate terminal of the driving transistor 5301 and the potential of the signal line 530 A charge corresponding to a potential difference between the potential at node 6 and the potential at node 6 is stored in the capacitor 5302 .

[0172] This completes the writing of the video signal to this pixel.

[0173] In this way, the current flowing through the driving transistor 5301 and the light emitting element 5304 becomes constant. When the steady state is reached, the switch 5303 is turned off. Then, the capacitance element 5302 is the potential of the signal line 5306 and the driving transistor 530 at the moment when the switch 5303 is turned off. The potential difference Vp (voltage) between the gate terminal (or drain terminal) of 1 is maintained.

[0174] After the writing of the video signal to the pixel is completed, the potential to be set on the potential supply line 5305 is Even if the transistor 5301 is turned on, the voltage applied to the light emitting element 5304 is Threshold voltage of 304 V EL For example, the potential of the potential supply line 5305 is set as follows. may be set to the same potential as the potential Vss of the cathode 5308 of the light emitting element 5304 or lower. The timing for setting this potential to the potential supply line 5305 is determined by the switch 5303. This should be done at the same time as turning it off or after.

[0175] A video signal is written to the pixel, and the first terminal of the driving transistor 5301 is connected to the first terminal of the driving transistor 5301. When the power supply potential Vdd is set to the potential supply line 5305, a video signal is sent to the pixel. The signal is written based on the analog signal potential set on the signal line 5306. The on / off of the driving transistor 5301 is controlled according to the change in the potential of the line 5306. In other words, the potential of the signal line 5306 is set to a value that is the same as that of the video signal in the pixel during the signal writing period. When the potential is equal to or higher than the analog signal potential when the signal is written, the driving transistor 5301 is turned off. When the potential of the analog signal becomes lower than that of the video signal written to the pixel, the driving transistor Star 5301 turns on.

[0176] This is because when a video signal is written to a pixel, the capacitor element 5302 holds a potential difference (Vp). In order to maintain the potential of the signal line 5306, the potential of the analog signal when a video signal is written to the pixel is When the potential of the gate terminal of the driving transistor 5301 is equal to or higher than the signal potential, the potential of the gate terminal of the driving transistor 5301 is also applied to the pixel. The potential becomes higher than the potential of the gate terminal when the signal is written, and the driving transistor 5301 is turned off. On the other hand, the potential of the signal line 5306 is changed so that a video signal is input to the pixel during a signal writing period to the pixel. When the potential of the analog signal becomes lower than that of the written analog signal, the gate of the driving transistor 5301 The potential of the terminal is also lower than the potential of the gate terminal when a video signal is written to the pixel. The driving transistor 5301 is turned on.

[0177] Therefore, during the light emission period of the pixel, the reverse bias switch 5309 is kept off and the drive Vdd is set to the potential supply line 5305 to which the first terminal of the driving transistor 5301 is connected, With the switch 5303 turned off, the potential set on the signal line 5306 is changed in an analog manner. By changing the polarity of the light emitting element 5301, the driving transistor 5301 is controlled to be turned on and off. Gray scale can be expressed by analogically controlling the time during which a current flows through 304.

[0178] The potential set to the signal line 5306 during the light emission period of the pixel will be described. The potential set at 06 can be an analog potential with a periodically changing waveform.

[0179] For example, in the light emission period, the potential set to the signal line 5306 is , waveform 4301, waveform 4302, waveform 4303, waveform 4304, waveform 4305, waveform 43 06 or waveform 4307, or a plurality of these may be set consecutively.

[0180] By setting these waveforms consecutively, the light emission time can be dispersed within one frame. As a result, the frame rate appears to be improved, and the screen flicker is reduced. can be prevented.

[0181] During the reverse bias period, the switch 5303 is turned off and the potential supply line 5305 is The reverse bias switch 5301 is then turned off by setting it to the L level. Turn on 309.

[0182] Then, during the forward bias period (which refers to the writing period and the light emission period), The electrode that has been functioning as the anode of the element 5304 is connected to the wiring 5310. During the forward bias period, the electrodes that functioned as the anode and cathode of the light emitting element 5304 were The high and low potentials set for the poles are reversed during the reverse bias period. During the forward bias period, a voltage in the opposite direction to that during the forward bias period is applied to the light emitting element 5304. .

[0183] In this way, during the reverse bias period, a voltage in the opposite direction to that during the forward bias period is applied to the light emitting element. Even if a current is applied to the transistor 5304, no current flows through the normal light-emitting element 5304. If there is a short circuit in the 5304, current will flow through the short circuit. Therefore, during the reverse bias period, a current sufficient to insulate the short circuit is A reverse voltage is applied to the light emitting element 5304 so as to cause current to flow.

[0184] In this way, by insulating the short-circuited portion of the light-emitting element 5304, the display defect of the pixel is improved. In addition, the life of the light emitting element 5304 can be extended.

[0185] As shown in FIG. 52, the potential of the cathode 5308 is set to a forward bias voltage during the It is preferable to set the reverse bias period longer than the short circuit period of the light emitting element 5304. This makes it easier to set the voltage to obtain sufficient current to insulate the area.

[0186] (Embodiment 5) In this embodiment, a display device having a pixel configuration capable of lengthening the writing time for each pixel is used. The apparatus will now be described.

[0187] The display device shown in FIG. 12 includes a potential supply line driver circuit 1201, a signal line driver circuit 1202, a scanning line The device includes a driver circuit 1203 and a pixel portion 1204. The pixel portion 1204 includes a plurality of pixels 1205. The potential supply lines (Illumination lines) I1~ Im and the signal lines (Data lines) Da1 to Dan and Db1 to D bn, pixels 1205 are arranged in a matrix. (Reset line) R1~R m / 2 controls the on / off switching of two rows of pixels. The wiring is shared between the 100V and 150V power supplies.

[0188] For example, each of the pixels 1205 in the (m-1)th row has a driving transistor 1206 and a capacitance element a switch 1208, a light-emitting element 1209, and a potential supply line I m-1 And that Each signal line (Da1~Dan) and scanning line R m / 2 In addition, the drive The transistor 1206 is a P-channel transistor. One of a plurality of pixels arranged in a pixel portion 1204 is shown.

[0189] The first terminal (source terminal or drain terminal) of the driving transistor 1206 is connected to the potential supply line I m -1 The gate terminals are connected to the respective signal lines (Da1 to D an), and the second terminal is connected to the anode (pixel electrode) of the light-emitting element 1209. In addition, the gate terminal and the second terminal (source terminal or drain terminal) of the driving transistor 1206 ) is connected via the switch 1208. Therefore, the scanning line R m / 2 A signal is input to When the switch 1208 is on, the gate terminal of the driving transistor 1206 and The second terminal (source terminal or drain terminal) is conductive, and when the switch 1208 is turned off, the drive The gate terminal and the second terminal (source terminal or drain terminal) of the driving transistor 1206 are non-conductive. At that moment, the capacitance element 1207 can hold the potential difference (voltage) between the gate terminal (or drain terminal) of the driving transistor 1206 and the signal lines (Da1~Dan). Also, the cathode 1210 of the light-emitting element 1209 has the potential of Vss set. Note that Vss is a potential that satisfies Vss < Vdd with respect to the power supply potential Vdd set on the potential supply lines I1~Im during the light-emitting period of the pixel. For example, Vss = GND (ground potential) may be used. That is, the switches 1208 of the respective pixels 1205 in the (m - 1)-th row are controlled to be turned on and off by the signals set on the scanning line R. Similarly, the switches 1208 of the respective pixels 1205 in the m-th row are also controlled to be turned on and off by the signals set on the scanning line R.

[0190] And the gate terminals of the respective driving transistors 1206 of the pixels 1205 in the m-th row are connected to the respective signal lines (Db1~Dbn) via the capacitance elements 1207. m / 2 set Therefore, by the signals set on the scanning line R, the pixels in the (m - 1)-th row and the pixels in the m-th row become the write time simultaneously. And each pixel in the (m - 1)-th row has an analog signal potential set from the respective signal lines m / 2 (Da1~Dan), and the video signal is written. And each pixel in the m-th row has an analog signal potential set from the respective signal lines (Db1~Dbn), and the video signal is written.

[0191] m / 2

[0192] ​​​​​​​The m-1th row pixel and the mth row pixel are used as examples, but the other rows are similarly arranged in one scanning line Ri( R1~R m / 2 Two rows of pixels are selected by either one of the following two. Therefore, if a display device has the same resolution as the display device shown in FIG. You can double the time.

[0193] In addition, FIG. 12 shows a configuration in which two rows of pixels can be written simultaneously. However, the scanning line is not limited to two rows, but may be shared among pixels in multiple rows, and the number of rows may be the same. By providing a scanning line, the writing time can be appropriately increased.

[0194] Therefore, in the conventional configuration, the writing time decreases as the resolution increases. By using a display device having such a configuration, it is possible to ensure a sufficient writing time. .

[0195] In addition, the display device shown in this embodiment mode can extend the writing time. The operating frequency can be lowered, and power consumption can be reduced.

[0196] Note that the configuration of the display device shown in FIG. 12 is not limited to this. For example, The pixels in FIG. 4, FIG. 6, FIG.

[0197] (Embodiment 6) In this embodiment, a preferred display device for full-color display having the pixel configuration of the present invention is configured. We will explain about this.

[0198] As shown in the first embodiment, in the case of a full-color display, the potential supply line (Illumin A potential supply line is provided for each pixel color, and the potential of the signal level of each potential supply line is By setting for each color, the brightness of the light-emitting element can be adjusted for each color. Even if the light emitting elements have different luminance characteristics for each color, the color tone can be adjusted. For example, In the case where a pixel as shown in FIG. 48 is provided, a potential is set to the anode of the light-emitting element of the R pixel. Igi sets a potential on the anode of the light-emitting element of the pixel B. Iri sets a potential on the anode of the light-emitting element of the pixel G. Igi sets a potential on the anode of the light-emitting element of the pixel B. The H level potential input to Ibi, which sets the potential at the electrode, is adjusted according to the brightness characteristics of each color. It can be determined as follows.

[0199] However, in the case of a full-color display consisting of RGB color components, three lines are Wiring is required, and four wires are required for a full-color display consisting of RGBW. .

[0200] In the present embodiment, the pixel has a higher aperture ratio, is made up of two or more color elements, and has a clear full-color image. A display device capable of displaying color will be described below.

[0201] As a first configuration, for example, a white (W) light emitting element is applied to the light emitting element of a pixel to form a color By using filters to display in full color, the brightness obtained from each pixel color can be roughly calculated. It can be made equal.

[0202] As the second configuration, a schematic diagram of a display device of this embodiment is shown in FIG. As an example, a full-color image is created using pixels of each color, each of which uses light-emitting elements of RGB. The display device includes a triangular wave potential generating circuit 5801R, a The pixel portion 5803 includes a pixel circuit 5801G, a pixel circuit 5801B, a switching circuit 5802, and a pixel portion 5803. A plurality of pixels 5804 are arranged in a matrix. The R pixel column is connected to a signal line Dr. A signal is input to the G pixel column from a signal line Dg, and a signal is input to the B pixel column from a signal line Db.

[0203] Also, the triangular wave potential generating circuit 5801R generates a triangular wave potential for the R pixel column. The angular wave potential generating circuit 5801G is connected to a G pixel column, and the triangular wave potential generating circuit 5801B is connected to a B pixel column. A triangular wave potential of a series of elements is generated.

[0204] During the signal writing period of the pixel, the switching circuit 5802 switches the video signal (Analog Connect the terminal where the video data is input to the respective signal lines Dr, Dg, and Db. Then, when the light emission period begins, the switching circuit 5802 switches the triangular wave potential generating circuit 580 The terminal where the triangular wave is input by 1R, the signal line Dr, and the triangular wave potential generating circuit 5801G The triangular wave is input via the terminal to which the triangular wave is input, the signal line Dg, and the triangular wave potential generating circuit 5801B. The terminal to which the signal is input is connected to the signal line Db.

[0205] In this way, a separate triangular wave can be set for each pixel of each color. The light emission time can be controlled according to the brightness characteristics of each light emitting element, resulting in a clear display. A full-color display can be achieved. In addition, wiring is provided for each pixel color within the pixel 5804. Since this is not necessary, the aperture ratio can be increased.

[0206] The pixel 5804 has the pixel configuration shown in FIG. 1, but is not limited to this. Is the triangular wave potential input during the light emission period higher than the potential of the video signal input during the signal writing period? Any pixel configuration that can control the lighting time of a pixel based on the low or high level of the pixel voltage is sufficient. The pixels shown in the first to fifth embodiments can be appropriately applied. For example, the pixels shown in FIG. The pixel configuration of FIG. 78 can also be applied.

[0207] The pixel in FIG. 66 includes a transistor 6601, a capacitor element 6602, and a transistor 6603. a transistor 6604, a transistor 6605, a capacitor 6606, and a light-emitting element 6607, a signal line 6608, a scanning line 6609, and a power supply line 6610.

[0208] The first terminal (source terminal or drain terminal) of the transistor 6601 is a light emitting element 6607. The second terminal (source terminal or drain terminal) is connected to the power supply line 6610. The gate terminal of the transistor 6601 is connected to a capacitor 6602. The transistor 6603 is connected to a first terminal (a source terminal or is the drain terminal) is connected to the gate terminal of the transistor 6601, and the second terminal (the source terminal The transistor has a gate terminal connected to a wiring 6612. The first terminal (source terminal or drain terminal) of the transistor 6604 is connected to the gate of the transistor 6601. The first terminal (source terminal or drain terminal) is connected to the wiring 6612. The gate terminal is connected to a signal line 6608 via a capacitor 6606. The transistor 6605 has a gate terminal connected to a scanning line 6609 and a first terminal (a source terminal or The first terminal is connected to the gate terminal of the transistor 6601, and the second terminal is connected to the The wiring 6613 and the counter electrode 6611 are connected to the gate terminal of the counter electrode 6611. A predetermined potential is supplied to the

[0209] The operation of the pixel will be briefly described. First, the wiring 6612 is changed from an L level to an H level potential. Then, a current flows from the wiring 6612 to the transistor 6603. The potential of 6609 is changed from L level to H level to turn on the transistor 6605. The gate terminal of the transistor 6604 is at a potential at which the transistor 6604 is sufficiently turned on. This potential is also applied to one electrode of the capacitor 6606. When the potential of 12 is changed from H level to L level, the charge stored in the capacitance element 6606 is turned on. A current flows through the transistor 6604 to the wiring 6612, and the transistor 6604 becomes equal to the threshold voltage. The potential of one electrode of the capacitor 6606 is the potential of the transistor 6604 At this time, an analog potential corresponding to a video signal is applied to the signal line 6608. Then, the transistor 6604 supplies a threshold voltage to the capacitor 6606. The charge held is the difference between the gate potential, which is the potential of the analog signal corresponding to the video signal, and the potential of the analog signal corresponding to the video signal. Then, by changing the potential of the scanning line 6609 from H level to L level, The potential difference is held by a capacitance element 6606 .

[0210] After that, during the light emission period, the potential of the wiring 6612 is changed from L level to H level. A current flows through the transistor 6603, and the potential at which the transistor 6601 is sufficiently turned on is reached. The potential is input to the gate terminal of the capacitor 6601. Then, the potential is input to one electrode of the capacitor 6602. Thus, a current flows through the transistor 6601 and the light emitting element 6607. Then, the potential of the wiring 6612 is changed from H level to L level, and the video signal is input to the signal line 6608. The analog signal potential corresponding to the analog signal changes continuously from the lowest to the highest potential in the range of its possible potentials. or a potential that changes continuously from the highest potential to the lowest potential, or a potential that changes continuously from the lowest potential to the highest potential. A potential that changes repeatedly between high and low potentials is input. Then, during the light emission period, The potential continuously supplied to 608 corresponds to the video signal written to the pixel during the writing period. When the potential of the analog signal input to the transistor 6604 becomes higher than the potential of the analog signal input to the transistor 6604, the transistor 6604 turns on. The charge stored in the capacitor 6602 is discharged to the wiring 6612 through the transistor 6604. Thus, the transistor 6601 is turned off. Therefore, at any time during the light emission period, Since the light emitting element 6607 can be made to emit light, gradation display can be performed.

[0211] The pixel in FIG. 67 includes a driving transistor (first transistor) 6701 and a complementary transistor A transistor (second transistor) 6702, a capacitor element 6703, a switch 6704, and a It has a light element 6705, a scanning line 6706, a signal line 6707, and a power line 6708. The driving transistor 6701 is a P-channel transistor, a complementary transistor, The transistor 6702 uses an N-channel transistor.

[0212] The driving transistor 6701 has a first terminal (a source terminal or a drain terminal) connected to a power supply line 670 8, and the second terminal (source terminal or drain terminal) of the complementary transistor 6702 The gate terminal is connected to the second terminal (source terminal or drain terminal) of the complementary transistor. The gate terminal of the driving transistor 6701 and the complementary The gate terminal of the input transistor 6702 is connected to a signal line 6707 via a capacitor 6703. The driving transistor 6701 and the complementary transistor 6702 are connected to the It is connected to the second terminal (source terminal or drain terminal) of the transistor 6702. That is, By turning the switch 6704 on and off, the gate terminal and the second terminal (source terminal or drain terminal) of the driving transistor 6701 and the complementary transistor 6702 can be made conductive or non-conductive. Then, by inputting a signal to the scanning line 6706, the on / off state of the switch 6 704 is controlled. Also, the second terminal (source terminal or drain terminal) of the driving transistor 6701 and the complementary transistor 6702 is connected to the pixel electrode of the light-emitting element 6705. And a low power supply potential Vss is supplied to the counter electrode 6709 of the light-emitting element 6705. Note that Vss is a potential that satisfies Vss < Vdd with respect to the power supply potential Vdd supplied to the power supply line 6708. For example, Vss = GND (ground potential ) may be used. Also, the first terminal of the complementary transistor 6702 is connected to the wiring 6712. The potential supplied to this wiring 6712 is applied to the pixel electrode of the light-emitting element 6705 when the complementary transistor 6702 is on. And at this time, any potential can be used as long as the light-emitting element 6705 becomes non-light-emitting. Therefore, Vss may be used.

[0213]

[0214] Next, the operating principle of the pixel configuration in FIG. 67 will be described in detail.

[0214] During the signal writing period to the pixel, an analog signal potential is supplied to the signal line 6707. This analog signal potential corresponds to the video signal. And when writing the video signal to the pixel, an H-level signal is input to the scanning line 6706 to turn on the switch 6704. Note that the driving transistor 6701 and the complementary transistor 6702 operate as an inverter. Also, when operating as an inverter, the driving transistor 6701 and the complementary The connection point of the gate terminals of the transistors 6702 becomes the input terminal 6710 of the inverter. The connection point of the second terminals of the driving transistor 6701 and the complementary transistor 6702 is an inverter. When it is operating as an inverter, the driving transistor The first terminal of the transistor 6701 and the complementary transistor 6702 are both a source terminal and a second terminal The other terminal is the drain terminal.

[0215] When the switch 6704 is turned on in this manner, the input terminal 6710 of the inverter is connected to the output terminal 6 711, the driving transistor 6701, the complementary transistor 6702, and the light-emitting element 6 A current flows through 705 , and charge is discharged or accumulated in the capacitor element 6703 .

[0216] In this way, the inverter cancels the offset. The input terminal 6710 and the output terminal 6711 are connected to each other, the input potential and the output potential are made equal, and the input terminal This means that the voltage Vinv of the inverter is set to the logic threshold voltage Vinv of the inverter. The threshold voltage Vinv is ideally the intermediate potential between the L level and H level of the inverter output. It is.

[0217] The potential of the H level of the inverter output is the power supply potential Vdd of the power supply line 6708. The L level potential of the inverter is a potential supplied to the wiring 6712. The power supply potential Vdd which is the H level output and the wiring 671 which is the L level output of the inverter The potential supplied to the inverter 2 is set based on the potential of the counter electrode 6709. When the output of is at the H level, the light-emitting element 6705 emits light, and when the output of the inverter is at the L level

[0218] That is, if the voltage when the light-emitting element 6705 starts to emit light is V EL , then the potential of the L level of the inverter (the potential supplied to the wiring 6712) needs to be lower than Vss + V EL . Also, the potential of the H level of the inverter needs to be higher than Vss + V EL EL . .

[0219] In addition, if the potential of the L level of the inverter is lower than the potential supplied to the counter electrode 6709 , a reverse-biased voltage is applied to the light-emitting element 6705. Therefore, the deterioration of the light-emitting element 670 5 is suppressed, which is desirable.

[0220] In addition, the discharge or accumulation of charge in the capacitor element 6703 is determined by the relationship between the charge originally stored in the capacitor element 6703 and the potential supplied to the signal line 6707. And when the discharge or accumulation of charge in the capacitor element 6703 is completed, the capacitor element 6703 stores the charge corresponding to the potential difference (voltage Vp) between the signal line 6707 and the logic threshold Vinv. And by setting the signal of the scanning line 6706 to the L level, the switch 6704 is turned off , and the capacitor element 6703 holds this voltage Vp.

[0221] In addition, during the writing period, the potential of the counter electrode (Cathode) 6709 may be set to Vss2 . This Vss2 is a potential that satisfies Vss < Vss2, and when canceling the offset of the inverter, the voltage applied to the light-emitting element 6705 is the forward direction threshold voltage V of the light-emitting element 6705 ​​EL Set it to be smaller than Vinv-Vss2< V EL In this way, during the writing period, the light emitting element 6705 This can prevent display defects caused by light emission. Since almost no current flows through the light emitting element during the write period, Power consumption can be reduced.

[0222] Also, increase Vss2 so that a reverse bias voltage is applied to the light emitting element 6705. By applying a reverse bias voltage, the reliability of the light emitting element 6705 can be improved. In this case, defective parts of the light-emitting element 6705 can be burned out.

[0223] In addition, it is sufficient to prevent current from flowing through the counter electrode 6709, so a different method can be used. For example, the counter electrode 6709 may be in a floating state. No current flows through the photoelement 6705. Alternatively, the power supply line 6708 may be connected to the transistor 670 A switch may be provided between the pixel electrode of the light emitting element 6705 and the light emitting element 6706 via the light emitting element 6706. By controlling the switch, it is possible to prevent current from flowing to the light emitting element 6705. That is, as shown in FIG. 68(a), a first terminal of a transistor 6701 and a power supply line 6708 A switch 6801 may be connected between the nodes 67 and 6802 as shown in FIG. A switch 6802 may be connected between the pixel electrode of the light emitting element 6705 and the pixel electrode of the light emitting element 6705. A switch 6803 is connected between the second terminal of the transistor 6701 and a node 6711. In this way, during the period when a signal is written to the pixel, after the signal is written to the pixel, It is possible to prevent the light emitting element 6705 from emitting light when signals are written to pixels in other rows.

[0224] This completes the writing of the video signal to this pixel.

[0225] After a video signal is written to a pixel, The potential of the signal line 6707 is changed based on the analog signal potential supplied to the signal line 6707. The output level of the inverter is controlled according to the operation of the signal line 6707. The potential of the pixel is the analog potential when a video signal is written to the pixel during the signal writing period to the pixel. When the potential is higher than the signal potential, the inverter output is at L level, and the video signal is written to the pixel. When the analog signal potential drops below the level at which it was input, the output of the inverter goes to H level.

[0226] This is because when a video signal is written to a pixel, the capacitance element 6703 holds a potential difference (Vp). In order to maintain the potential of the signal line 6707, the potential of the analog signal when the video signal is written to the pixel is When the potential of the input terminal 6710 of the inverter is higher than the potential of the video signal, the potential of the input terminal 6710 of the inverter is also higher than the potential of the video signal The potential of the input terminal 6710 becomes higher than that when the data is written, and the driving transistor 6701 is turned on. The complementary transistor 6702 is turned on, and the output of the inverter becomes L level. The potential of the signal line 6707 is changed when a video signal is written to the pixel during a signal writing period to the pixel. When the potential of the analog signal at the time of inputting the pixel voltage Vp becomes lower than the potential at the input terminal 6710 of the inverter, This is lower than the potential at the input terminal 6710 when an analog signal is written to the The transistor 6701 is turned on, the complementary transistor 6702 is turned off, and the output of the driving inverter The power is at H level.

[0227] Therefore, during the light emission period of the pixel, the potential supplied to the signal line 6707 is changed in an analog manner. By controlling the output level of the inverter in the pixel, the light emitting element 670 The time that current flows through 5 can be controlled in an analog manner to express gradation.

[0228] The pixel in FIG. 69 includes a driving transistor (first transistor) 6901 and a complementary transistor A transistor (second transistor) 6902, a capacitor element 6903, a switch 6904, and a A light element 6905, a scanning line 6906, a first switch 6907, and a second switch 69 6908, a first signal line 6909, a second signal line 6910, and a power supply line 6911. The driving transistor 6901 is a P-channel transistor, a complementary transistor The resistor 6902 and the switch 6904 are made of N-channel transistors.

[0229] The driving transistor 6901 has a first terminal (source terminal or drain terminal) connected to a power supply line 691 1, and the second terminal (source terminal or drain terminal) of the complementary transistor 6902 The gate terminal is connected to the second terminal (source terminal or drain terminal) of the complementary transistor. The gate terminal of the driving transistor 6901 and the complementary The gate terminal of the transistor 6902 is connected to one electrode of the capacitor 6903. Both of them are connected to the driving transistor 6901 and the complementary transistor 69 02. In other words, it is connected to the second terminal (source terminal or drain terminal) of switch 6 By turning on and off the transistor 904, the driving transistor 6901 and the complementary transistor 690 The gate terminal of the second transistor and the second terminal (the source terminal or the drain terminal) are electrically connected or disconnected. It is possible. Then, by inputting a signal to the scanning line 6906, the on / off of the switch 6904 is controlled. Note that the other electrode of the capacitive element 6903 is connected to the first signal line 6909 via the first switch 6907 and to the second signal line 6910 via the second switch 6908. In addition, the second terminals (source terminals or drain terminals) of the driving transistor 6901 and the complementary transistor 6902 are connected to the pixel electrode of the light-emitting element 6905. And a low power supply potential Vss is supplied to the counter electrode 6912 of the light-emitting element 6905. Note that Vss is a potential that satisfies Vs < Vdd with respect to the power supply potential Vdd supplied to the power supply line 6911. For example, Vss = GND (ground potential) may be used. Note that the potential of the power supply line 6911 is not limited to this. The value of the power supply potential may be changed for each color of the pixel. That is, in the case of full-color display composed of pixels of RGB color elements, for each RGB pixel, and in the case of a full-color display device composed of pixels of RGBW color elements, for each RGBW pixel, the potential of the power supply line may be supplied. Next, the operating principle of the pixel configuration in FIG. 69 will be described in detail. First, during the signal writing operation to the pixel, the first switch 6907 is turned on and the second switch 6908 is turned off. The driving transistor 6901 and the complementary transistor 6902 function as an inverter. Therefore, the connection point of the gate terminals of the driving transistor 6901 and the complementary transistor 6902 becomes the input terminal 6913 of the inverter, and the connection point of the second terminals of the driving transistor 6901 and the complementary transistor 6902 becomes the output terminal 6914 of the inverter.

[0230]

[0231] ​

[0232] Also, a signal of H level is input to the scanning line 6906, and the switch 6904 is turned on. Then, the input terminal 6913 and the output terminal 6914 of the inverter are electrically connected to each other, and the offset canceller In other words, the input terminal 6913 of the inverter is at the logic threshold potential V Therefore, at this time, the inverter input terminal 6913 is the inverter output This is the potential required to control the level of force.

[0233] The capacitance element 6903 is connected to the logic threshold potential Vinv of the inverter and the write voltage Vinv. During operation, a charge corresponding to the potential difference (voltage Vp) between the potential Va supplied to the first signal line 6909 and the potential Va is accumulated. It is piled up.

[0234] Next, the first switch 6907 is turned off and the second switch 6908 is turned on. Then, the scanning line 6906 is set to the L level. Then, the switch 6904 is turned off, and the capacitance element The voltage Vp is held at 6903. In this way, an analog signal is supplied to the pixel from the first signal line 6909. The signal is written.

[0235] A triangular wave potential is supplied to the second signal line 6910. 10 is an analog signal voltage supplied to the first signal line 6909 during a signal writing operation of the pixel. When the potential is higher than the first potential, the light emitting element 6905 maintains a non-emitting state, and the second signal line 6910 is an analog signal supplied to the first signal line 6909 during a signal writing operation of the pixel. The light emitting element 6905 emits light while the potential is lower than the signal potential. A light emitting element is formed according to an analog signal potential when an analog signal is written during a writing period. This controls the light emission time of 6905. In this way, analog time gradation display is possible.

[0236] The pixel in FIG. 70 includes a driving transistor (second transistor) 7001 and a complementary transistor A third transistor 7002, a capacitor element 7003, and a switching transistor A first transistor 7004, a light emitting element 7005, a scanning line 7006, and a signal The driving transistor 7001 has a line 7007 and a power supply line 7008. A channel type transistor, a complementary transistor 7002, and a switching transistor The 7004 uses N-channel transistors.

[0237] The driving transistor 7001 has a first terminal (a source terminal or a drain terminal) connected to a power line 700 8, and the second terminal (source terminal or drain terminal) of the complementary transistor 7002 The gate terminal is connected to the second terminal (source terminal or drain terminal) of the complementary transistor. The gate terminal of the driving transistor 7001 and the complementary The gate terminal of the input transistor 7002 is connected to a signal line 7007 via a capacitor 7003. 700 is connected to the driving transistor 700 via the switching transistor 7004. 1 and the second terminal (source terminal or drain terminal) of the complementary transistor 7002. That is, the switching transistor 7004 has a first terminal (a source terminal or The drain terminal) is the second terminal of the driving transistor 7001 and the complementary transistor 7002. (source terminal or drain terminal) and the second terminal (source terminal or drain terminal) is connected to the gate terminals of the driving transistor 7001 and the complementary transistor 7002. Therefore, by turning on and off the switching transistor 7004, the gate terminals and the second terminals (source terminals or drain terminals) of the driving transistor 7001 and the complementary transistor 7002 can be made conductive or non-conductive. Then, by inputting a signal to the scanning line 7006 to which the gate terminal of the switching transistor 7004 is connected, the on / off state of the switching transistor 7004 is controlled. Also, the second terminals (source terminals or drain terminals) of the driving transistor 7001 and the complementary transistor 7002 are connected to the pixel electrodes of the light-emitting element 7005. And a low power supply potential Vss is supplied to the counter electrode 7009 of the light-emitting element 7005. Note that Vss is a potential that satisfies Vss < Vdd with respect to the power supply potential Vdd supplied to the power supply line 7008. For example, Vss = GND (ground potential) may be used. The gate terminals and the second terminals (source terminals or drain terminals) of the driving transistor 7001 and the complementary transistor 7002 can be made conductive or non-conductive. And by inputting a signal to the scanning line 7006 to which the gate terminal of the switching transistor 7004 is connected, the on / off state of the switching transistor 7004 is controlled. The gate terminals and the second terminals (source terminals or drain terminals) of the driving transistor 7001 and the complementary transistor 7002 can be made conductive or non-conductive. And by inputting a signal to the scanning line 7006 to which the gate terminal of the switching transistor 7004 is connected, the on / off state of the switching transistor 7004 is controlled. The second terminals (source terminals or drain terminals) of the driving transistor 7001 and the complementary transistor 7002 are connected to the pixel electrodes of the light-emitting element 7005. The second terminals (source terminals or drain terminals) of the driving transistor 7001 and the complementary transistor 7002 are connected to the pixel electrodes of the light-emitting element 7005. And a low power supply potential Vss is supplied to the counter electrode 7009 of the light-emitting element 7005. Note that Vss is a potential that satisfies Vss < Vdd with respect to the power supply potential Vdd supplied to the power supply line 7008. For example, Vss = GND (ground potential) may be used.

[0238] Furthermore, the first terminal of the complementary transistor 7002 is connected to the scanning line 7006A of the pixels in another row. Here, the driving transistor 7001 is a transistor that drives the light-emitting element 7005, and the complementary transistor 7002 is a transistor whose polarity is inverted with respect to the driving transistor 7001. That is, when the signal on this scanning line 7006A is at the L level, the driving transistor 7001 and the complementary transistor 7002 are complementarily turned on and off to form an inverter. Furthermore, the first terminal of the complementary transistor 7002 is connected to the scanning line 7006A of the pixels in another row. Here, the driving transistor 7001 is a transistor that drives the light-emitting element 7005, and the complementary transistor 7002 is a transistor whose polarity is inverted with respect to the driving transistor 7001. That is, when the signal on this scanning line 7006A is at the L level, the driving transistor 7001 and the complementary transistor 7002 are complementarily turned on and off to form an inverter. That is, when the signal on this scanning line 7006A is at the L level, the driving transistor 7001 and the complementary transistor 7002 are complementarily turned on and off to form an inverter. That is, when the signal on this scanning line 7006A is at the L level, the driving transistor 7001 and the complementary transistor 7002 are complementarily turned on and off to form an inverter.

[0239] Next, the operating principle of the pixel configuration in FIG. 70 will be described in detail.

[0240] During the signal writing period to the pixel, an analog signal potential is supplied to the signal line 7007. The analog signal potential corresponds to a video signal. When writing a video signal to a pixel, A signal of H level is input to the scanning line 7006 to turn on the switching transistor 7004. At this time, the scanning line 7006A for selecting pixels in another row is turned on at the L level. Therefore, when a signal is written to the pixel, the driving transistor 7001 The complementary transistor 7002 operates as an inverter. When the transistor 7001 and the complementary transistor 7002 are operating as a The connection point of the gate terminals of the drive transistors 002 becomes the input terminal 7010 of the inverter. The connection point between the second terminal of the complementary transistor 7001 and the output terminal 7002 of the inverter. When the driving transistor 700 operates as an inverter, the The first terminal of each of the first and complementary transistors 7001 and 7002 is a source terminal, and the second terminal is a drain terminal. Become a child.

[0241] When the switching transistor 7004 is turned on in this manner, the input terminal 7 010 is electrically connected to the output terminal 7011, and the driving transistor 7001 and the complementary transistor 7 002, a current flows through the light emitting element 7005, and a charge is discharged or accumulated in the capacitor element 7003. It can be done.

[0242] In this way, the inverter cancels the offset. The input terminal 7010 and the output terminal 7011 are connected to each other, the input potential and the output potential are made equal, and This means that the potential of the inverter 7010 is set to the logic threshold potential Vinv of the inverter. The threshold voltage Vinv is ideally the intermediate potential between the L level and H level of the inverter output. It is.

[0243] The potential of the H level of the inverter output is the power supply potential Vdd of the power supply line 7008. The L level potential of the inverter is the L level potential supplied to the scanning line 7006A. , the power supply potential Vdd which is the H-level output of the inverter, and the L-level output of the inverter The L level potential of the signal supplied to the scanning line 7006 and the scanning line 7006A is the counter electrode The potential of 7009 is set as the reference. When the inverter output is at the H level, the light is emitted. The element 7005 emits light and does not emit light when the output of the inverter is at the L level. .

[0244] In other words, the voltage at which the light-emitting element 7005 starts to emit light is V EL Then, the inverter's L Level potential (L level potential of the signal supplied to the scanning line 7006 or the scanning line 7006A) is Vss+V EL The potential of the inverter's H level must be lower than V ss+V EL It needs to be higher than that.

[0245] If the L level potential of the inverter is lower than the potential of the counter electrode 7009, then A reverse bias voltage is applied to the light emitting element 7005. As a result, the light emitting element 7005 is deteriorated. Restrained and desirable.

[0246] Note that the discharge or accumulation of the charge in the capacitor 7003 is performed by discharging the charge from the capacitor The charge is determined by the relationship between the charge stored in the capacitor and the potential supplied to the signal line 7007. When the discharge or accumulation of the charge in the capacitor 7003 is completed, the capacitor element 7003 is connected to the signal line 7007. , a charge corresponding to the potential difference (voltage Vp) with respect to the logical threshold value Vinv is stored. Then, by setting the signal of the scanning line 7006 to the L level, the switching transistor 7004 is turned off, and the voltage Vp is held by the capacitive element 7003. During the writing period, the potential of the counter electrode (Cathode) 7009 may be set to Vss2. This Vss2 is a potential that satisfies Vss < Vss2, and when the inverter is offset canceled, the voltage applied to the light-emitting element 7005 is lower than the forward threshold voltage V of the light-emitting element 7005. That is, it is set so that Vinv - Vss2 < V. In this way, it is possible to prevent display defects from occurring due to the light-emitting element 7005 emitting light during the writing period. Also, since almost no current flows through the light-emitting element during the writing period, the power consumption can be reduced.

[0247] During the writing period, the potential of the counter electrode (Cathode) 7009 may be set to Vss2. This Vss2 is a potential that satisfies Vss < Vss2, and when the inverter is offset canceled, the voltage applied to the light-emitting element 7005 is lower than the forward threshold voltage V of the light-emitting element 7005. That is, it is set so that Vinv - Vss2 < V. In this way, it is possible to prevent display defects from occurring due to the light-emitting element 7005 emitting light during the writing period. Also, since almost no current flows through the light-emitting element during the writing period, the power consumption can be reduced. EL That is, it is set so that Vinv - Vss2 < V. V EL In this way, it is possible to prevent display defects from occurring due to the light-emitting element 7005 emitting light during the writing period. Also, since almost no current flows through the light-emitting element during the writing period, the power consumption can be reduced. In this way, it is possible to prevent display defects from occurring due to the light-emitting element 7005 emitting light during the writing period. Also, since almost no current flows through the light-emitting element during the writing period, the power consumption can be reduced. In this way, it is possible to prevent display defects from occurring due to the light-emitting element 7005 emitting light during the writing period. Also, since almost no current flows through the light-emitting element during the writing period, the power consumption can be reduced. In this way, it is possible to prevent display defects from occurring due to the light-emitting element 7005 emitting light during the writing period. Also, since almost no current flows through the light-emitting element during the writing period, the power consumption can be reduced.

[0248] Alternatively, Vss2 may be increased so that a reverse bias voltage is applied to the light-emitting element 7005. By applying a reverse bias voltage, the reliability of the light-emitting element 7005 can be improved, or a defective part in the light-emitting element 7005 can be burned out. Alternatively, Vss2 may be increased so that a reverse bias voltage is applied to the light-emitting element 7005. By applying a reverse bias voltage, the reliability of the light-emitting element 7005 can be improved, or a defective part in the light-emitting element 7005 can be burned out.

[0249] Since no current needs to flow through the counter electrode 7009, another method can be used. For example, the counter electrode 7009 may be in a floating state. As a result, no current flows through the light-emitting element 7005. Alternatively, a switch may be provided between the power supply line 7008 and the pixel electrode of the light-emitting element 7005 via the transistor 7001. Since no current needs to flow through the counter electrode 7009, another method can be used. For example, the counter electrode 7009 may be in a floating state. As a result, no current flows through the light-emitting element 7005. Alternatively, a switch may be provided between the power supply line 7008 and the pixel electrode of the light-emitting element 7005 via the transistor 7001. By controlling the switch, it is possible to prevent current from flowing through the light emitting element 7005 . That is, as shown in FIG. 71, between the first terminal of the transistor 7001 and the power supply line 7008 The switch 7101 may be connected. A switch may be connected between the second terminal of the transistor 7001 and the node A switch may be connected between the pixel 7011 and the pixel 7021. In the embodiment, after a signal is written to a pixel, a light emitting element when a signal is written to a pixel in another row It can prevent 7005 from emitting light.

[0250] This completes the writing of the video signal to this pixel.

[0251] After a video signal is written to a pixel, The potential of the signal line 7007 is changed based on the analog signal potential supplied to the signal line 7007. In other words, the output level of the inverter is controlled according to the operation of the signal line 7007. The potential of the pixel is the analog potential when a video signal is written to the pixel during the signal writing period to the pixel. When the potential is higher than the signal potential, the inverter output is at L level, and the video signal is written to the pixel. When the analog signal potential drops below the level at which it was input, the output of the inverter goes to H level.

[0252] This is because when a video signal is written to a pixel, the capacitance element 7003 holds a potential difference (Vp). In order to maintain the potential of the signal line 7007, the potential of the analog signal when a video signal is written to the pixel is When the potential of the input terminal 7010 of the inverter is higher than the potential of the video signal, the potential of the input terminal 7010 of the inverter is also higher than the potential of the video signal The potential of the input terminal 7010 becomes higher than that when the data is written, and the driving transistor 7001 is turned on. The complementary transistor 7002 is turned on, and the output of the inverter becomes L level. The potential of the signal line 7007 is changed when a video signal is written to the pixel during a signal writing period to the pixel. When the potential of the input terminal 7010 of the inverter becomes lower than the analog signal potential when the pixel This is lower than the potential of the input terminal 7010 when an analog signal is written to the drive transistor. The transistor 7001 is turned on, the complementary transistor 7002 is turned off, and the output of the driving inverter The power is at H level.

[0253] Therefore, during the light emission period of the pixel, the scan lines (scan line 7006, scan line 7006A, etc.) When the signal line 7007 is at the L level, the potential supplied to the signal line 7007 is changed in an analog manner. This controls the output level of the inverter in the pixel. It is possible to express gradation by controlling the flow of time in an analog manner.

[0254] In addition, the first terminal (source terminal or drain terminal) of the complementary transistor is connected to the scanning line 7006. By connecting to A, the number of wirings can be reduced and the aperture ratio can be improved. It is possible to improve the reliability of the display panel. It is also possible to improve the yield and reduce the cost of the display panel. It is possible to suppress this.

[0255] The pixel shown in FIG. 72 includes a driving transistor (second transistor) 7201 and a complementary transistor A transistor (third transistor) 7202, a capacitor element 7203, and a switching transistor a first transistor 7204, a light-emitting element 7205, and a scanning line 7206, A first switch 7207, a second switch 7208, a first signal line 7209, and a second The driving transistor 720 has a signal line 7210 and a power supply line 7211. 1 includes a P-channel transistor, a complementary transistor 7202, and a switching transistor The transistor 7204 is an N-channel transistor.

[0256] The driving transistor 7201 has a first terminal (a source terminal or a drain terminal) connected to the power supply line 611. and the second terminal (source terminal or drain terminal) of the complementary transistor 7202 is connected to The second terminal (source terminal or drain terminal) is connected to the gate terminal of the complementary transistor. The gate terminal of the driving transistor 7201 and the complementary A gate terminal of the transistor 7202 is connected to one electrode of a capacitor 7203. 7203, the driving transistor 7201 and the complementary It is connected to the second terminal (source terminal or drain terminal) of the transistor 7202. That is, the switching transistor 7204 has a first terminal (a source terminal or a drain terminal ) are the second terminals (source terminals) of the driving transistor 7201 and the complementary transistor 7202. The second terminal (source terminal or drain terminal) is connected to the driving transistor. Since the gate terminals of the transistor 7201 and the complementary transistor 7202 are connected to each other, By turning on and off the switching transistor 7204, the driving transistor 7201 and and the gate terminal and the second terminal (source terminal or drain terminal) of the complementary transistor 7202. The switching transistor 7204 can be turned on or off. By inputting a signal to the scanning line 7206 to which the gate terminal of Control the on / off of the transistor 7204. Note that the other electrode of the capacitive element 7203 is connected to the first signal line 7209 via the first switch 7207 and to the second signal line 7210 via the second switch 7208. Also, the second terminals (source terminals or drain terminals) of the driving transistor 7201 and the complementary transistor 7202 are connected to the anode (pixel electrode) of the light-emitting element 720 5. And the cathode of the light-emitting element 7205 is connected to the wiring (Cathode) 7212 to which the low power supply potential Vss is supplied. Note that Vss and are at a potential that satisfies Vss < Vdd with reference to the power supply potential Vdd supplied to the power supply line 7211 For example, Vss = GND (ground potential) may be used. Note that the potential of the power supply line 7 211 is not limited to this. The value of the power supply potential may be changed for each pixel color. That is, in the case of full-color display consisting of pixels of RGB color elements, for each RGB pixel, in the case of a full-color display device consisting of pixels of RGBW color elements, the potential of the power supply line may be supplied for each RGBW pixel.

[0257] Furthermore, the first terminal of the complementary transistor 7202 is connected to the scanning line 7206A of pixels in another row. Here, the driving transistor 7201 is a transistor that drives the light-emitting element 7205, and the complementary transistor 7202 is a transistor whose polarity is inverted from that of the driving transistor 7201. That is, when the signal on this scanning line 7206A is at the L level, the driving transistor 7201 and the complementary transistor 7202 complementarily turn on and off to form an inverter.

[0258] The principle of the operation of the pixel in FIG. 72 is the same as the operation in FIG. 70. During the writing operation, the image ​​​The wiring that inputs the video signal to the pixel and the wiring that supplies the pixel with a continuously changing potential during the light emission period. For the operation when the line is separated, refer to the explanation of the operation in the second embodiment or FIG. I want to be.

[0259] The pixel in FIG. 73 includes a driving transistor 7301, a capacitor element 7302, and a switch 7303. , a light emitting element 7304, a power supply line 7305, a signal line 7306, a scanning line 7307, a switch The driving transistor 7301 has a P-channel transistor. I use Sta.

[0260] The first terminal (source terminal or drain terminal) of the driving transistor 7301 is connected to a power supply line 7305. The gate terminal is connected to a signal line 7306 via a capacitor 7302, and the second terminal The terminal (source terminal or drain terminal) is connected to the anode of the light-emitting element 7304 via a switch 7309. (pixel electrode). Also, the gate terminal and the second terminal of the driving transistor 7301 are connected The terminals (source terminals or drain terminals) are connected via the switch 7303. When the switch 7303 is on, the gate terminal of the driving transistor 7301 and the Two terminals (source terminal or drain terminal) are conductive. Then, the switch 7303 is turned off. Then, the gate terminal and the second terminal (source terminal or drain terminal) of the driving transistor 7301 ) becomes non-conductive, and at that moment, the gate terminal (or the second terminal The capacitor 7302 can hold a potential difference (voltage) between the capacitor and the signal line 7306 . The counter electrode 7308 of the light emitting element 7304 is set to a potential of Vss. ss is the power supply potential Vdd set on the power supply line 7305 during the light emission period of the pixel, It is a potential that satisfies Vss < Vdd. For example, it may be set as Vss = GND (ground potential). is also acceptable.

[0261] Next, the operating principle of the pixel configuration in FIG. 73 will be described.

[0262] During the signal writing period to the pixel, an analog signal potential is supplied to the signal line 7306. This analog signal potential corresponds to the video signal. Note that this video signal is a signal represented by three or more values, and the analog signal potential is a potential that changes with time and has a state of three or more values. And when writing the video signal to the pixel, a signal is input to the scanning line 7307 to turn on the switch 7303. Also, turn on the switch 7309. Then, current flows through the driving transistor 7301 and the light-emitting element 7304, and charge accumulation or discharge occurs in the capacitive element 7302. is a potential that changes with time and has a state of three or more values. And when writing the video signal to the pixel, a signal is input to the scanning line 7307 to turn on the switch 7303. Also, turn on the switch 7309. Then, current flows through the driving transistor 7301 and the light-emitting element 7304, and charge accumulation or discharge occurs in the capacitive element 7302. And when writing the video signal to the pixel, a signal is input to the scanning line 7307 to turn on the switch 7303. Also, turn on the switch 7309. Then, current flows through the driving transistor 7301 and the light-emitting element 7304, and charge accumulation or discharge occurs in the capacitive element 7302. switch 7309. Then, current flows through the driving transistor 7301 and the light-emitting element 7304, and charge accumulation or discharge occurs in the capacitive element 7302. At this time, the first terminal of the driving transistor 7301 is the source terminal, and the second terminal is the drain terminal. And when the current flowing through the driving transistor 7301 increases while the switch 7303 is on, the current flowing through the light-emitting element 7304 also increases, so the voltage drop across the light-emitting element 7304 increases, and the potential difference between the electrodes of the light-emitting element 7304 increases. That is, the potential of the anode of the light-emitting element 7304 approaches the potential of the power supply line 7305. At this time, the first terminal of the driving transistor 7301 is the source terminal, and the second terminal is the drain terminal. And when the current flowing through the driving transistor 7301 increases while the switch 7303 is on, the current flowing through the light-emitting element 7304 also increases, so the voltage drop across the light-emitting element 7304 increases, and the potential difference between the electrodes of the light-emitting element 7304 increases. That is, the potential of the anode of the light-emitting element 7304 approaches the potential of the power supply line 7305.

[0263] At this time, the first terminal of the driving transistor 7301 is the source terminal, and the second terminal is the drain terminal. And when the current flowing through the driving transistor 7301 increases while the switch 7303 is on, the current flowing through the light-emitting element 7304 also increases, so the voltage drop across the light-emitting element 7304 increases, and the potential difference between the electrodes of the light-emitting element 7304 increases. That is, the potential of the anode of the light-emitting element 7304 approaches the potential of the power supply line 7305. At this time, the first terminal of the driving transistor 7301 is the source terminal, and the second terminal is the drain terminal. And when the current flowing through the driving transistor 7301 increases while the switch 7303 is on, the current flowing through the light-emitting element 7304 also increases, so the voltage drop across the light-emitting element 7304 increases, and the potential difference between the electrodes of the light-emitting element 7304 increases. That is, the potential of the anode of the light-emitting element 7304 approaches the potential of the power supply line 7305. At this time, the first terminal of the driving transistor 7301 is the source terminal, and the second terminal is the drain terminal. And when the current flowing through the driving transistor 7301 increases while the switch 7303 is on, the current flowing through the light-emitting element 7304 also increases, so the voltage drop across the light-emitting element 7304 increases, and the potential difference between the electrodes of the light-emitting element 7304 increases. That is, the potential of the anode of the light-emitting element 7304 approaches the potential of the power supply line 7305. At this time, the first terminal of the driving transistor 7301 is the source terminal, and the second terminal is the drain terminal. And when the current flowing through the driving transistor 7301 increases while the switch 7303 is on, the current flowing through the light-emitting element 7304 also increases, so the voltage drop across the light-emitting element 7304 increases, and the potential difference between the electrodes of the light-emitting element 7304 increases. That is, the potential of the anode of the light-emitting element 7304 approaches the potential of the power supply line 7305. At this time, the first terminal of the driving transistor 7301 is the source terminal, and the second terminal is the drain terminal. And when the current flowing through the driving transistor 7301 increases while the switch 7303 is on, the current flowing through the light-emitting element 7304 also increases, so the voltage drop across the light-emitting element 7304 increases, and the potential difference between the electrodes of the light-emitting element 7304 increases. That is, the potential of the anode of the light-emitting element 7304 approaches the potential of the power supply line 7305. At this time, the first terminal of the driving transistor 7301 is the source terminal, and the second terminal is the drain terminal. And when the current flowing through the driving transistor 7301 increases while the switch 7303 is on, the current flowing through the light-emitting element 7304 also increases, so the voltage drop across the light-emitting element 7304 increases, and the potential difference between the electrodes of the light-emitting element 7304 increases. That is, the potential of the anode of the light-emitting element 7304 approaches the potential of the power supply line 7305. At this time, the first terminal of the driving transistor 7301 is the source terminal, and the second terminal is the drain terminal. And when the current flowing through the driving transistor 7301 increases while the switch 7303 is on, the current flowing through the light-emitting element 7304 also increases, so the voltage drop across the light-emitting element 7304 increases, and the potential difference between the electrodes of the light-emitting element 7304 increases. That is, the potential of the anode of the light-emitting element 7304 approaches the potential of the power supply line 7305. At this time, the first terminal of the driving transistor 7301 is the source terminal, and the second terminal is the drain terminal. And when the current flowing through the driving transistor 7301 increases while the switch 7303 is on, the current flowing through the light-emitting element 7304 also increases, so the voltage drop across the light-emitting element 7304 increases, and the potential difference between the electrodes of the light-emitting element 7304 increases. That is, the potential of the anode of the light-emitting element 7304 approaches the potential of the power supply line 7305. At this time, the first terminal of the driving transistor 7301 is the source terminal, and the second terminal is the drain terminal. And when the current flowing through the driving transistor 7301 increases while the switch 7303 is on, the current flowing through the light-emitting element 7304 also increases, so the voltage drop across the light-emitting element 7304 increases, and the potential difference between the electrodes of the light-emitting element 7304 increases. That is, the potential of the anode of the light-emitting element 7304 approaches the potential of the power supply line 7305. In other words, the potential difference between the anode and cathode of the light emitting element 7304 becomes smaller. Then, the gate terminal of the driving transistor 7301 also approaches the potential of the cathode 7308. Therefore, the potential difference between the gate terminal and the source terminal of the driving transistor 7301 becomes large, and the driving transistor The current flowing through the transistor 7301 increases. The output terminal settles at a potential that allows a constant current to flow through the driving transistor 7301. At that time, the potential of the gate terminal of the driving transistor 7301 and the potential of the signal line 7306 are The charge corresponding to the potential difference is stored in the capacitor 7302 .

[0264] This completes the writing of the video signal to this pixel.

[0265] In this way, the current flowing through the driving transistor 7301 and the light emitting element 7304 becomes constant. When the steady state is reached, the switch 7303 is turned off. Then, the capacitance element 7302 is the potential of the signal line 7306 and the driving transistor 730 at the moment when the switch 7303 is turned off. The potential difference Vp (voltage) between the gate terminal (or drain terminal) of 1 is maintained.

[0266] During the signal writing period to the pixels, after the video signal is written to the pixels, the image of another row is While writing signals to the element, the switch 7309 is turned off. The timing for turning off switch 7309 is the same as the timing for turning off switch 7303. Or later.

[0267] When a video signal is written to a pixel, the signal The fluctuation of the potential of the signal line 7306 based on the analog signal potential set on the signal line 7306 In other words, the on / off of the driving transistor 7301 is controlled according to the signal line The potential of 7306 is the amplified potential when a video signal is written to the pixel during the signal writing period to the pixel. When the potential is equal to or higher than the analog signal potential, the driving transistor 7301 is turned off and the video signal is not input to the pixel. When the potential becomes lower than the analog signal potential when written, the driving transistor 7301 turns on. .

[0268] This is because when a video signal is written to a pixel, the capacitor element 7302 holds a potential difference (Vp). In order to maintain the potential of the signal line 7306, the potential of the analog signal when a video signal is written to the pixel is When the potential of the gate terminal of the driving transistor 7301 is equal to or higher than the video potential, the potential of the gate terminal of the driving transistor 7301 is also equal to or higher than the video potential of the pixel. The potential becomes higher than the potential of the gate terminal when the signal is written, and the driving transistor 7301 is turned off. On the other hand, the potential of the signal line 7306 is changed so that a video signal is input to the pixel during a signal writing period to the pixel. When the potential of the analog signal becomes lower than that of the written analog signal, the gate of the driving transistor 7301 The potential of the terminal is also lower than the potential of the gate terminal when a video signal is written to the pixel. The driving transistor 7301 turns on.

[0269] Therefore, during the light emission period of the pixel, the switch 7303 is turned off and the switch 7309 is turned on. By changing the potential set on the signal line 7306 in an analog manner, the drive It controls the on / off of the transistor 7301. In other words, a current flows to the light-emitting element 7304. The time that the light is turned on can be controlled in an analog manner to express gradation.

[0270] In the pixel configuration of FIG. 73, the second terminal of the driving transistor 7301 is connected to a 79. In other words, the potential of the counter electrode 7308 may be supplied to the wiring. As shown in FIG. 7, the second terminal of the driving transistor 7301 is connected to the wiring 790 via the switch 7901. When writing a signal to a pixel, switch 7901 is turned on, and when writing is completed, Then, the switch is turned on during the signal writing and light emission period for the pixels in other rows. Then, the pixel does not emit light when a signal is written to the pixel. For other details, see the operation in Figure 73.

[0271] The pixel in FIG. 74 includes a driving transistor 7401, a capacitor element 7402, and a first switch 74 03, a light emitting element 7404, a power line 7405, a second switch 7406, and a third switch A switch 7407, a scanning line 7408, a first signal line 7409, and a second signal line 7410. In addition, a P-channel transistor is used for the driving transistor 7401. It is.

[0272] The first terminal (source terminal or drain terminal) of the driving transistor 7401 is connected to a power supply line 7405 The gate terminal is connected to one electrode of the capacitor 7402. The other electrode of the second switch 7406 is connected to a first signal line 7409 via a second switch 7406 and a third switch 7409 via a third switch 7409. The second signal line 7410 is connected to the driving transistor 7407. The gate terminal and the second terminal (source terminal or drain terminal) of 7401 are connected to the switch 7403. The cathode 7411 of the light emitting element 7404 is set to a potential of Vss. Note that Vss is set based on the power supply potential Vdd set on the power supply line 7405. , which is a potential satisfying Vss < Vdd. For example, Vss = GND (ground potential) may be used. is acceptable.

[0273] Next, the operation of the pixel in FIG. 74 will be described. During the writing operation, the second switch 740 6 is turned on and the third switch 7407 is turned off. Then, an H-level signal is input to the scanning line 7408 and the first switch 7403 is turned on. Then, current flows through the capacitive element 7402 , the driving transistor 7401, and the light-emitting element 7404. And in the capacitive element 7 402, charge accumulation or discharge is performed. That is, either charge accumulation or discharge occurs depending on the relationship between the charge originally stored in the capacitive element 7402 and the potential set on the first signal line 7409 . And when the signal on the scanning line 7408 falls from the H level to the L level , the first switch 7403 turns off. When the first switch 7403 turns off, the capacitive element 7402 holds the potential difference between the potential of the gate terminal of the driving transistor 7401 at that instant and the potential of the first signal line 7409 . In this way, the video signal is written into the pixel from the first signal line 7409.

[0274]

[0275] Note that during the light-emitting period, a potential that changes analogously is supplied to the second signal line 7410 . The pixel causes the light-emitting element 7404 to maintain a non-light-emitting state when the second signal line 7410 is at a potential higher than the analog signal potential set on the first signal line 7 409 during the signal writing time of the pixel in the i-th row, and the light-emitting element 7404 emits light when the second signal line 7410 is at a potential lower than the analog signal potential set on the first signal line 7409 during the signal writing time of the pixel (Ta). ​​​It emits light. Therefore, when a video signal is written into the writing time of each pixel, the emission time of the light-emitting element 7404 is set according to the analog log signal potential. Thus, analog time gradation display becomes possible.

[0276] The pixel in FIG. 75 includes a driving transistor 7501, a capacitive element 7502, a first switch 7 503, a second switch 7504, a light-emitting element 7505, a first scanning line 7506, a second scanning line 7507, a signal line 7508, a power supply line 7509, and a wiring 7510. Note that an N-channel type transistor is used for the driving transistor 7501.

[0277] The source terminal of the driving transistor 7501 is connected to the anode (pixel electrode) of the light-emitting element 7505, the gate terminal is connected to the signal line 7508 via the capacitive element 7502, and the drain terminal is connected to the power supply line 7509 via the first switch 7503. Note that a power supply potential Vdd is set for the power supply line 750 9. Also, the gate terminal and the drain terminal of the driving transistor 7501 are connected via the second switch 7504. Therefore, when the second switch 7504 is on, the gate terminal and the drain terminal of the driving transistor 7501 are conductive. When the second switch 7504 is off, the gate terminal and the drain terminal of the driving transistor 750 1 become non-conductive, and the capacitive element 7502 can hold the potential difference (voltage) between the gate terminal (drain terminal) of the driving transistor 7501 and the signal line 7508 at that moment. Also, the cathode of the light-emitting element 7505 is connected to the wiring 7510 with the potential of Vss set. Note that Vss is a potential that satisfies Vss < Vdd. For example when the second switch 7504 turns off, the gate terminal and the drain terminal of the driving transistor 750 1 become non-conductive, and the capacitive element 7502 can hold the potential difference (voltage) between the gate terminal (drain terminal) of the driving transistor 7501 and the signal line 7508 at that instant. Also, the cathode of the light-emitting element 7505 is connected to the wiring 7510 with the potential of Vss set. Note that Vss is a potential that satisfies Vss < Vdd. For example when the second switch 7504 turns off, the gate terminal and the drain terminal of the driving transistor 7501 become non-conductive, and the capacitive element 7502 can hold the potential difference (voltage) between the gate terminal (drain terminal) of the driving transistor 7501 and the signal line 7508 at that moment. Also, the cathode of the light-emitting element 7505 is connected to the wiring 7510 with the potential of Vss set. Note that Vss is a potential that satisfies Vss < Vdd. For example For example, Vss may be set to GND (ground potential).

[0278] Next, the operating principle of the pixel in FIG. 75 will be described.

[0279] During the signal writing period of the pixel, signals are input to the first scanning line 7506 and the second scanning line 7507. This input turns on the first switch 7503 and the second switch 7504. The drain terminal and gate terminal of the transistor 7501 are connected to the power supply potential (Vdd ) is set. The capacitor 7502, the driving transistor 7501, and the light-emitting element 7 A current flows through the pixel 505, and the charge is accumulated or discharged in the capacitor element 7502. During the period when a signal is written to the signal line 7508, an analog signal potential is set to the signal line 7508. The analog signal potential corresponds to a video signal.

[0280] Soon, no current flows through the capacitor 7502. Then, the driving transistor 7501 A current flows through the light emitting element 7505. This is because, at this time, The gate terminal is connected to the drain terminal by the second switch 7504. The potential of the output terminal becomes the power supply potential (Vdd) and the driving transistor 7501 is turned on. That is why.

[0281] In this state, when the first switch 7503 is turned off, the driving transistor 7501 and the capacitor A current flows through the element 7502, and then the driving transistor 7501 and the capacitor element 7502 No current flows. Thus, the driving transistor 7501 is turned off. The gate-source voltage Vgs of the transistor 7501 is approximately equal to the threshold voltage Vth. It is.

[0282] When this state is reached, the second switch 7504 is turned off. 02 is a potential of the gate terminal at which the driving transistor 7501 is turned off and a potential of the second switch 7 The potential difference between the analog signal potential set on the signal line 7508 at the moment 504 is turned off (Vp) is maintained. Thus, an analog signal is written to the pixel.

[0283] The signal for controlling the on / off of the first switch 7503 is transmitted through the first scanning line 750 6, a signal for controlling the on / off of the second switch 7504 is pulsed to the second scanning line 7507. This can be done by inputting a signal.

[0284] When an analog signal is written to a pixel, the analog The driving transistor 750 changes in response to the fluctuation of the potential of the signal line 7508 based on the potential of the signal line 7508. In other words, the potential of the signal line 7508 is When the potential is equal to or less than the analog signal potential written to the pixel during the period, the driving transistor 750 1 is turned off, and the drive is turned on when the analog signal potential becomes higher than the analog signal potential when the analog signal is written to the pixel. The driving transistor 7501 is turned on.

[0285] When an analog signal is written to a pixel, the capacitor element 7502 holds a potential difference (Vp). Therefore, the potential of the signal line 7508 is the analog signal potential when an analog signal is written to the pixel. In the following cases, the potential of the gate terminal of the driving transistor 7501 is also an analog signal to the pixel. The potential of the gate terminal becomes lower than the potential when the voltage is written, and the driving transistor 7501 is turned off. On the other hand, when an analog signal is written to the pixel during the writing period, the potential of the signal line 7508 is When the analog signal potential becomes higher than the potential of the gate terminal of the driving transistor 7501, When an analog signal is written to the pixel, the potential of the gate terminal becomes higher, so the driving transistor Star 7501 turns on.

[0286] Therefore, during the light emission period of the pixel, the second switch 7504 is turned off and the first switch With 7503 turned on, the potential set on the signal line 7508 is changed in an analog manner. This controls the on / off of the driving transistor 7501, causing a current to flow through the light-emitting element 7505. This makes it possible to express gradations by controlling the time the light is turned on in an analog manner.

[0287] The pixel shown in FIG. 76 includes a driving transistor 7601, a capacitor element 7602, and a first switch A switch 7603, a second switch 7604, a light-emitting element 7605, and a third switch 760 6, a fourth switch 7607, a first scanning line 7608, a second scanning line 7609, It has a first signal line 7610, a second signal line 7611, and a power supply line 7612. It is to be noted that an N-channel transistor is used for the driving transistor 7601 .

[0288] The source terminal of the driving transistor 7601 is connected to the anode (pixel electrode) of the light emitting element 7605. The gate terminal is connected to one electrode of the capacitor 7602. The electrode is connected to a first signal line 7610 via a third switch 7606 and a fourth switch 76 7601 is connected to the second signal line 7611 via the drain of the driving transistor 7601. The IN terminal is connected to a power line 7612 via a first switch 7603. A power supply potential Vdd is set to the power supply line 7612. The potential set to the power supply line is Vdd Not limited to d, for example, in the case of full-color display consisting of RGB color elements, the potential value of the power line may be changed for each pixel of each color of RGB. Alternatively, the potential value of the power line may be changed for each pixel of each color.

[0289] Also, the gate terminal and the drain terminal of the driving transistor 7601 are connected via the second switch 7604. Therefore, when the second switch 7604 is on, the gate terminal and the drain terminal of the driving transistor 7601 are conductive. And when the second switch 7604 is off, the gate terminal and the drain terminal of the driving transistor 7601 become non-conductive, and the capacitance element 7602 can hold the potential difference (voltage) between the gate terminal (drain terminal) of the driving transistor 7601 at that moment and the analog signal potential set by the first signal line 7610. Also, the gate terminal and the drain terminal of the driving transistor 7601 are connected via the second switch 7604. Thus, when the second switch 7604 is on, the gate terminal and the drain terminal of the driving transistor 7601 are conductive. And when the second switch 7604 is off, the gate terminal and the drain terminal of the driving transistor 7601 become non-conductive, and the capacitance element 7602 can hold the potential difference (voltage) between the gate terminal (drain terminal) of the driving transistor 7601 at that moment and the analog signal potential set by the first signal line 7610. Also, the gate terminal and the drain terminal of the driving transistor 7601 are connected via the second switch 7604. Therefore, when the second switch 7604 is on, the gate terminal and the drain terminal of the driving transistor 7601 are conductive. And when the second switch 7604 is off, the gate terminal and the drain terminal of the driving transistor 7601 become non-conductive, and the capacitance element 7602 can hold the potential difference (voltage) between the gate terminal (drain terminal) of the driving transistor 7601 at that moment and the analog signal potential set by the first signal line 7610. Also, the gate terminal and the drain terminal of the driving transistor 7601 are connected via the second switch 7604. Thus, when the second switch 7604 is on, the gate terminal and the drain terminal of the driving transistor 7601 are conductive. And when the second switch 7604 is off, the gate terminal and the drain terminal of the driving transistor 7601 become non-conductive, and the capacitance element 7602 can hold the potential difference (voltage) between the gate terminal (drain terminal) of the driving transistor 7601 at that moment and the analog signal potential set by the first signal line 7610. Also, the gate terminal and the drain terminal of the driving transistor 7601 are connected via the second switch 7604. Therefore, when the second switch 7604 is on, the gate terminal and the drain terminal of the driving transistor 7601 are conductive. And when the second switch 7604 is off, the gate terminal and the drain terminal of the driving transistor 7601 become non-conductive, and the capacitance element 7602 can hold the potential difference (voltage) between the gate terminal (drain terminal) of the driving transistor 7601 at that moment and the analog signal potential set by the first signal line 7610. Also, the gate terminal and the drain terminal of the driving transistor 7601 are connected via the second switch 7604. Thus, when the second switch 7604 is on, the gate terminal and the drain terminal of the driving transistor 7601 are conductive. And when the second switch 7604 is off, the gate terminal and the drain terminal of the driving transistor 7601 become non-conductive, and the capacitance element 7602 can hold the potential difference (voltage) between the gate terminal (drain terminal) of the driving transistor 7601 at that moment and the analog signal potential set by the first signal line 7610. Also, the cathode of the light-emitting element 7605 is connected to the wiring 7613 with the potential of Vss set. Note that Vss is a potential satisfying Vss < Vdd. For example, Vss = GND (ground potential) may be used. Also, the cathode of the light-emitting element 7605 is connected to the wiring 7613 with the potential of Vss set. Note that Vss is a potential satisfying Vss < Vdd. For example, Vss = GND (ground potential) may be used. Also, the cathode of the light-emitting element 7605 is connected to the wiring 7613 with the potential of Vss set. Note that Vss is a potential satisfying Vss < Vdd. For example, Vss = GND (ground potential) may be used.

[0290] The principle of the operation of the pixel in FIG. 76 is the same as the operation in FIG. 75. For the operation when the wiring for inputting the video signal to the pixel and the wiring for supplying the continuously changing potential to the pixel during the light-emitting period are separated, refer to the description of the operation in Embodiment 2 or FIG. 69. The principle of the operation of the pixel in FIG. 76 is the same as the operation in FIG. 75. For the operation when the wiring for inputting the video signal to the pixel and the wiring for supplying the continuously changing potential to the pixel during the light-emitting period are separated, refer to the description of the operation in Embodiment 2 or FIG. 69. The principle of the operation of the pixel in FIG. 76 is the same as the operation in FIG. 75. For the operation when the wiring for inputting the video signal to the pixel and the wiring for supplying the continuously changing potential to the pixel during the light-emitting period are separated, refer to the description of the operation in Embodiment 2 or FIG. 69. Please refer to the description of the operation in Embodiment 2 or FIG. 69 for the operation when the wiring for inputting the video signal to the pixel and the wiring for supplying the continuously changing potential to the pixel during the light-emitting period are separated.

[0291] The pixel shown in FIG. 77 includes a transistor 7701, a capacitance element 7702, a switch 7703, an amplifier 7704, a light-emitting element 7705, a signal line 7706, a scanning line 7707, a power line 7708, a wiring 7709, and a wiring 7710. The pixel shown in FIG. 77 includes a transistor 7701, a capacitance element 7702, a switch 7703, an amplifier 7704, a light-emitting element 7705, a signal line 7706, a scanning line 7707, a power line 7708, a wiring 7709, and a wiring 7710. The pixel shown in FIG. 77 includes a transistor 7701, a capacitance element 7702, a switch 7703, an amplifier 7704, a light-emitting element 7705, a signal line 7706, a scanning line 7707, a power line 7708, a wiring 7709, and a wiring 7710.

[0292] The first terminal (source terminal or drain terminal) of the transistor 7701 is a light emitting element 7705. The second terminal (source terminal or drain terminal) is connected to the power supply line 7708. The gate terminal is connected to the output terminal of the comparator circuit 7704. The first input terminal of the data circuit 7704 is connected to a signal line 7706 via a switch 7703. The second input terminal of the comparator circuit 7704 is connected to the wiring 7710. The input terminal 7701 is connected to a wiring 7709 via a capacitor 7702. A signal is input to 707 to control the on / off of a switch 7703 .

[0293] The operation of the pixel will be described below. First, when a signal is written to the pixel, Then, a potential corresponding to a video signal is output from a signal line 7706. The voltage is applied to one electrode of the capacitor 7702. Then, the switch 7703 is turned off. An analog potential corresponding to the video signal is held in the capacitor 7702. The potential of terminal 09 should be set to a predetermined potential. This completes the writing of signals to the pixels. do.

[0294] Next, when the pixel emits light, the potential of the wiring 7710 is changed to an analog voltage corresponding to a video signal. A potential that changes continuously from the lowest to the highest potential in the range of possible potentials, or the highest potential A potential that changes continuously from the lowest potential to the highest potential, or a potential that changes continuously between the lowest potential and the highest potential A potential that changes is input to the first input terminal of the comparator circuit 7704. The analog potential held in the input terminal 7702 is input, and the second input terminal is A potential that changes continuously within a possible range is input. The voltages input to the first and second input terminals are compared, and the output is determined based on the result. The output potential of the comparator circuit 7704 determines the potential of the transistor 77 01 is turned on and off.

[0295] Therefore, the time during which the transistor 7701 is on is the light emitting time of the light emitting element 7705. The light emitting element 7705 can be made to emit light for any time during the light emission period, so gradation can be achieved. It is possible to display.

[0296] The pixel shown in FIG. 78 includes an inverter 7801, a capacitor element 7802, and a switch 7803. , a switch 7804, a light-emitting element 7805, a signal line 7806, and a first scanning line 7807. and a second scan line 7808.

[0297] The input terminal of the inverter 7801 is connected to one electrode of the capacitor element 7802, and the output terminal is The pixel electrode of the light-emitting element 7805 is connected to the other electrode of the capacitor element 7802. The inverter 7801 is connected to a signal line 7806 via a switch 7804. The input terminal and the output terminal are connected via a switch 7803. The signal input to 807 controls the on / off of a switch 7804, and the second scanning line 780 The on / off of a switch 7803 is controlled by a signal input to 8 .

[0298] During a write operation to the pixel, the switches 7804 and 7803 are turned on. An analog potential corresponding to a video signal is supplied to the signal line 7806. A potential that is the logical threshold of the inverter 7801 is input to one electrode of the capacitor 802. An analog potential corresponding to a video signal is input to the other electrode of the element 7802. When the switch 7803 and the switch 7804 are turned off, the capacitance element 7802 is connected to the inverter 7 The potential difference between the logical threshold potential of 801 and the analog potential corresponding to the video signal is held. In this way, writing of signals to the pixels is completed.

[0299] Next, when the pixel emits light, an analog potential corresponding to a video signal is applied to the signal line 7806. A potential that changes continuously from the lowest to the highest potential in the possible range, or from the highest to the lowest A potential that changes continuously from a minimum potential to a maximum potential, or that changes continuously and repeatedly between a minimum potential and a maximum potential. Then, the potential that is continuously supplied to the signal line 7806 during the light emission period is written. The analog potential is higher or lower than the analog potential corresponding to the video signal written to the pixel during the write period. Since the potential applied to the pixel electrode of the light-emitting element 7805 changes, Since the light emitting element 7805 can emit light only for a certain period, gradation can be displayed.

[0300] Next, the relationship between the luminance characteristics of the light-emitting element and the analog potential input to the signal line will be described. The luminance characteristics of the light-emitting element when the analog potential input during the light-emitting period is a triangular wave. The relationship with the triangular wave is shown in Figure 59 (a1), (a2), and (a3). As an example, Based on the luminance characteristics of the light-emitting element of the G pixel, the luminance obtained from the light-emitting element of the B pixel is high. A case where the luminance obtained from the light emitting element is low will be described.

[0301] In this case, the triangular wave voltage input to the signal line Dr (Data line R pixel) Based on the pixel position, the triangle input to the signal line Dg (Data line G pixel) The slope of the triangular wave potential is made steeper. In other words, the amplitude of the triangular wave potential is made larger. On the other hand, the signal line Db (D The triangular potential input to the ata line B pixel is made to have a gentle slope. The amplitude of the angular wave potential is reduced.

[0302] By doing this, it is possible to change the light emission time for each pixel color even if the gradation is the same. For example, the maximum grayscale display period for an R pixel during one frame is Tmax( The maximum grayscale display period for the G pixel is Tmax(G), and the maximum grayscale display period for the B pixel is Tmax(G). The pixel displays the maximum gray scale for a period of one frame Tmax(B).

[0303] As a third configuration, the width of the potential of the video signal may be changed for each pixel color. As shown in FIG. 60(a1), (a2), and (a3), the R pixel is used as a reference, and the G pixel is When the luminance obtained from the light emitting element is high, the corresponding gradation of the G video signal is The potential is shifted to a lower side. Also, when the luminance obtained from the light emitting element of the pixel B is low, shifts the potential corresponding to each gradation of the B video signal to a higher level. Even if the gradation is the same, the light emission time can be changed depending on the color of the pixel. For example, The maximum grayscale display period for the R pixel is Tmax(R), and the maximum grayscale display period for the G pixel is Tmax(G). The maximum grayscale display period during a frame is Tmax(G), and the B pixels are The display period of the greatest gray scale among them is Tmax(B).

[0304] As a fourth configuration, the potential corresponding to each gradation of the video signal is shifted for each color. It is also possible to combine a configuration in which the amplitude of the triangular wave potential is changed for each color with a configuration in which the amplitude of the triangular wave potential is changed for each color. Therefore, the amplitude can be reduced, and power consumption can be reduced.

[0305] In addition, as a fifth configuration, the potential of the power supply line connected to the first terminal of the drive transistor is A different potential is set depending on the color of each pixel. For example, the power supply line 6610 in FIG. The power supply line 6708 in FIG. 67, the power supply line 6708 in FIGS. 68(a), (b), and (c), and the power supply line 6708 in FIG. 70, the power line 7008 in FIG. 71, and the power line 6911 in FIG. The power line 7211, the power line 7305 in FIG. 73, the power line 7405 in FIG. 74, and the power line in FIG. The power line 7509, the power line 7612 in FIG. 76, the power line 7708 in FIG. 77, and the power line 7709 in FIG. The potential of the line 7305 etc. may be changed for each pixel of different color.

[0306] As a sixth configuration, a potential corresponding to each gradation of the video signal is synchronized for each color of the pixel. A configuration in which the amplitude of the triangular wave potential is changed for each color, and a configuration in which the driving transistor is changed for each color It may be combined with a configuration for changing the potential of the power supply line connected to the first terminal.

[0307] (Embodiment 7) In this embodiment, a CM is used as an inverter in a pixel that controls whether a light emitting element emits light or not. A configuration in which an OS inverter is applied will be described.

[0308] In the pixel configuration of FIG. 1, a CMOS inverter is applied to the pixel. I will use this to explain.

[0309] The pixel includes a driving transistor 6101, a complementary transistor 6108, and a capacitor element 6102. A switch 6103, a light-emitting element 6104, and a potential supply line (Illumination a line 6105, a data line 6106, a scan line 6107, and a wiring 6110. The driving transistor 6101 is a P-channel type transistor, and the complementary transistor 6108 is an N-channel type transistor. t line) 6107 and has a wiring 6110. The driving transistor 6101 is a P-channel type transistor, and the complementary transistor 6108 is an N-channel type transistor. The driving transistor 6101 has its first terminal (source terminal or drain terminal) connected to the potential supply line 6 105, its second terminal (source terminal or drain terminal) connected to the second terminal (source terminal or drain terminal) of the complementary transistor 6108, and its gate terminal connected to the gate terminal of the complementary transistor 6108. Further, the gate terminals of the driving transistor 6101 and the complementary transistor 6108 are connected to the signal line 6106 via the capacitive element 6102 and are also connected to the second terminals (source terminals or drain terminals) of the driving transistor 6101 and the complementary transistor 6108 via the switch 6103. That is, by turning the switch 6103 on and off, the gate terminal and the second terminal (source terminal or drain terminal) of the driving transistor 6101 and the complementary transistor 6108 can be made conductive or non-conductive. The on and off of the switch 6103 is controlled by inputting a signal to the scan line 6107. Also, the second terminals (source terminals or drain terminals) of the driving transistor 6101 and the complementary transistor 6108 are connected to the anode (pixel electrode) of the light-emitting element 6104. And the cathode 6109 of the light-emitting element 6104 has a low power supply potential Vss input thereto. Note that Vss is such that Vss < Vdd with respect to the H-level signal (power supply potential Vdd) input to the potential supply line 6105 during the light-emitting period.

[0310] 105, and its second terminal (source terminal or drain terminal) is connected to the second terminal (source terminal or drain terminal) of the complementary transistor 6108, and its gate terminal is connected to the gate terminal of the complementary transistor 6108. 105, its second terminal (source terminal or drain terminal) is connected to the second terminal (source terminal or drain terminal) of the complementary transistor 6108, and its gate terminal is connected to the gate terminal of the complementary transistor 6108. 08, and its gate terminal is connected to the gate terminal of the complementary transistor 6108. 08. Further, the gate terminals of the driving transistor 6101 and the complementary transistor 6108 are connected to the signal line 6106 via the capacitive element 6102 and are also connected to the second terminals (source terminals or drain terminals) of the driving transistor 6101 and the complementary transistor 6108 via the switch 6103. 08 are connected to the signal line 6106 via the capacitive element 6102 and are also connected to the second terminals (source terminals or drain terminals) of the driving transistor 6101 and the complementary transistor 6108 via the switch 6103. That is, by turning the switch 6103 on and off, the gate terminal and the second terminal (source terminal or drain terminal) of the driving transistor 6101 and the complementary transistor 6108 can be made conductive or non-conductive. That is, by turning the switch 6103 on and off, the gate terminal and the second terminal (source terminal or drain terminal) of the driving transistor 6101 and the complementary transistor 6108 can be made conductive or non-conductive. That is, by turning the switch 6103 on and off, the gate terminal and the second terminal (source terminal or drain terminal) of the driving transistor 6101 and the complementary transistor 6108 can be made conductive or non-conductive. The on and off of the switch 6103 is controlled by inputting a signal to the scan line 6107. Also, the second terminals (source terminals or drain terminals) of the driving transistor 6101 and the complementary transistor 6108 are connected to the anode (pixel electrode) of the light-emitting element 6104. The on and off of the switch 6103 is controlled by inputting a signal to the scan line 6107. Also, the second terminals (source terminals or drain terminals) of the driving transistor 6101 and the complementary transistor 6108 are connected to the anode (pixel electrode) of the light-emitting element 6104. The on and off of the switch 6103 is controlled by inputting a signal to the scan line 6107. Also, the second terminals (source terminals or drain terminals) of the driving transistor 6101 and the complementary transistor 6108 are connected to the anode (pixel electrode) of the light-emitting element 6104. The second terminals (source terminals or drain terminals) of the driving transistor 6101 and the complementary transistor 6108 are connected to the anode (pixel electrode) of the light-emitting element 6104. And the cathode 6109 of the light-emitting element 6104 has a low power supply potential Vss input thereto. And the cathode 6109 of the light-emitting element 6104 has a low power supply potential Vss input thereto. Note that Vss is such that Vss < Vdd with respect to the H-level signal (power supply potential Vdd) input to the potential supply line 6105 during the light-emitting period. For example, Vss may be equal to GND (ground potential).

[0311] Furthermore, the first terminal of the complementary transistor 6108 is connected to a wiring 6110. The driving transistor 6101 is a transistor that drives the light emitting element 6104, and is complementary The driving transistor 6101 and the driving transistor 6108 are opposite in polarity. That is, when the signal of the potential supply line 6105 is at H level (power supply potential Vdd), An inverter in which a driving transistor 6101 and a complementary transistor 6108 are turned on and off complementarily. The potential of the wiring 6110 is changed when the complementary transistor 6108 is turned on. When the voltage applied to the light emitting element 6104 reaches the forward threshold voltage of the light emitting element 6104, Pressure V EL Make it as follows.

[0312] A brief explanation of how it works is as follows. When writing a signal to a pixel, the signal is input to the scanning line 6107. The switch 6103 is turned on by inputting the voltage Vcc to the potential supply line 6105. The first terminal of the transistor 6101 is set to the power supply potential Vdd. Then, the driving transistor 6 101 and complementary transistor 6108 are used as a CMOS inverter that turns on and off in a complementary manner. The driving transistor 6101 and the complementary transistor 6102 function as the output terminal of the CMOS inverter. The second terminal of the driving transistor 6108 corresponds to the input terminal of the CMOS inverter. The gate terminals of the transistor 6101 and the complementary transistor 6108 are conductive, and the offset In other words, the input terminal of the CMOS inverter is canceled by the logic of the CMOS inverter. The potential of the input terminal and the analog signal input to the signal line 6106 are A charge corresponding to the potential difference (Vp) between the pixel potential and the capacitance element 6102 is stored in the capacitance element 6102. When the writing of the signal is completed, the switch 6103 turns off the signal of the scanning line 6107. The voltage Vp is held by the capacitor 6102. When the driving transistor 6101 is turned on, the voltage Vcc is applied to the light emitting element 6104. The voltage applied to the transistor is set to be equal to or lower than the forward threshold voltage.

[0313] Next, in the light emission period, the switch 6103 is kept off and the potential supply line 6105 is Then, the potential set on the signal line 6106 is changed in an analog manner. Then, the output level of the CMOS inverter is controlled. Then, the current flows to the light emitting element 6104. The time that passes can be controlled in an analog manner to express gradation. When you want to make 104 emit light, turn on the driving transistor 6101 and turn on the complementary transistor Turn off 6108 and set the output of the CMOS inverter to the H level. The potential is the H level power supply potential Vdd of the potential supply line 6105. When it is desired to make the pixel non-emitting, the driving transistor 6101 is turned off and the complementary transistor 610 8 is turned on, and the output of the CMOS inverter is set to the L level. This L level is connected to the wiring 61 The potential is set to 10.

[0314] The potential set to the signal line 6106 during the light emission period of the pixel will be described. The potential set at 06 can be an analog potential with a periodically changing waveform.

[0315] For example, in the light emission period, the potential set to the signal line 6106 is , waveform 4301, waveform 4302, waveform 4303, waveform 4304, waveform 4305, waveform 43 06 or waveform 4307, or a plurality of these may be set consecutively.

[0316] By setting these waveforms consecutively, the light emission time can be dispersed within one frame. As a result, the frame rate appears to be improved, and the screen flicker is reduced. can be prevented.

[0317] For details of the operation, please refer to FIG. 1 of the first embodiment, as it is similar to that of the first embodiment. stomach.

[0318] As shown in this embodiment, the on / off of a light emitting element is controlled by the output of a CMOS inverter. By doing so, even if the transistor characteristics within a pixel vary, the pixel brightness is not affected by this. This reduces the variation because N-channel transistors and P-channel transistors Since the inverter is made up of transistors, there is some variation in the transistor characteristics. However, the output level changes suddenly at the inverter's logic threshold voltage. It is.

[0319] In this pixel configuration, the wiring 6110 and the cathode 6109 of the light emitting element 6104 are connected. It is good.

[0320] In addition, an example of the cross-sectional structure of a display panel having the pixel of FIG. 61 will be described with reference to a cross-sectional view 62. do.

[0321] A base film 6202 is formed on a substrate 6201. The substrate 6201 may be a glass substrate or a quartz substrate. Insulating substrates such as substrates, plastic substrates, ceramic substrates, metal substrates, semiconductor substrates, etc. The base film 6202 can be formed by a CVD method or a sputtering method. For example, a silicon oxide film formed by the CVD method using SiH4, N2O, and NH3 as raw materials. A silicon nitride film, a silicon oxynitride film, or the like can be used. The base film 6202 prevents impurities from diffusing from the substrate 6201 into the semiconductor layer. When a glass substrate or a quartz substrate is used for the substrate 6201, The base film 6202 is not necessarily provided.

[0322] An island-shaped semiconductor layer is formed on a base film 6202. A P-type channel is formed in the semiconductor layer. A channel forming region 6203, an impurity region 6204 which becomes a source region or a drain region, A channel forming region 6205 in which a type channel is formed, a non-type A pure region 6220 and a low concentration impurity region (LDD region) 6221 are formed. A gate insulating film 6206 is formed on the channel forming region 6203 and the channel forming region 6205. The gate electrode 6207 is formed through the gate insulating film 6206 by a CVD method or a spa A silicon oxide film, a silicon nitride film, a silicon oxynitride film, or the like formed by a deposition method can be used. The gate electrode 6207 is made of an aluminum (Al) film, a copper (Cu) film, an aluminum Thin films mainly composed of tungsten or copper, chromium (Cr) films, tantalum (Ta) films, tantalum nitride films TaN film, titanium (Ti) film, tungsten (W) film, molybdenum (Mo) film, etc. It can be used.

[0323] A sidewall 6222 is formed on the side of the gate electrode 6207. A silicon compound, for example, a silicon oxide film, a silicon nitride film or an oxide film is formed so as to cover the 07. After forming the silicon nitride film, the silicon nitride film is etched back to form side walls 6222. This can be done.

[0324] The LDD region 6221 is located below the sidewall 6222. The LDD region 6221 is formed in a self-aligned manner. This is provided in order to form the DD region 6221 in a self-aligned manner, but is not necessarily provided. It would be good.

[0325] A first layer is formed on the gate electrode 6207, the sidewall 6222 and the gate insulating film 6206. The first interlayer insulating film has an inorganic insulating film 6218 on the bottom and a resin film on the top. The inorganic insulating film 6218 is a silicon nitride film, a silicon oxide film, a silicon oxynitride film, or a silicon oxide film. The resin film 6208 may be a polysilicon film or a laminate of these films. Imide, polyamide, acrylic, polyimide amide, epoxy, etc. can be used .

[0326] A first electrode 6209 and a second electrode 6224 are provided on the first interlayer insulating film. The electrode 6209 is electrically connected to the impurity region 6204 and the impurity region 6220 through a contact hole. The second electrode 6224 is electrically connected to the impurity region 6222 through a contact hole. The first electrode 6209 and the second electrode 6224 are electrically connected to the region 6220. For example, titanium (Ti) film, aluminum (Al) film, copper (Cu) film, and aluminum containing Ti are used. A silicide film or the like can be used. When wiring such as signal lines is provided in the same layer, it is advisable to use copper, which has low resistance.

[0327] A second interlayer insulating film is formed on the first electrode 6209, the second electrode 6224, and the first interlayer insulating film. The second interlayer insulating film may be an inorganic insulating film, a resin film, or a laminate of these. Examples of the inorganic insulating film include a silicon nitride film, a silicon oxide film, and a silicon oxynitride film. The resin film may be a polyimide film, a polyamide film, or a laminate of these films. Examples of the resin that can be used include amide, acrylic, polyimide amide, and epoxy.

[0328] A pixel electrode 6211 and a wiring 6219 are provided on the second interlayer insulating film 6210. The electrodes 6211 and the wiring 6219 are made of the same material. The pixel electrodes 6211 and the wiring 6219 are formed at the same time. It is desirable to use a material with a large number of ions. For example, titanium nitride (TiN) film, chromium (C In addition to single-layer films such as tungsten (W) film, zinc (Zn) film, and platinum (Pt) film, , a laminate of a film mainly composed of titanium nitride and aluminum, a titanium nitride film and an aluminum film A three-layer structure of a film containing the main component and a titanium nitride film can be used. This results in low wiring resistance, good ohmic contact, and anode performance. By using a light-reflecting metal film, the anode can be made opaque to light. It can be formed.

[0329] An insulator 6212 is provided so as to cover the pixel electrode 6211 and the ends of the wiring 6219 . For example, a positive photosensitive acrylic resin film can be used as the insulator 6212. .

[0330] A layer 6213 containing an organic compound is formed on the pixel electrode 6211, and a layer 6214 containing an organic compound is formed on the pixel electrode 6211. A part of the layer 6213 overlaps with the insulator 6212. Note that the layer 6213 containing an organic compound is It is not formed on the wiring 6219 .

[0331] A counter electrode 6214 is formed on the layer 6213 containing an organic compound, the insulator 6212, and the wiring 6219. The counter electrode 6214 is made of a material having a small work function. For example, aluminum (Al), silver (Ag), lithium (Li), calcium Sium (Ca) or their alloys, or MgAg, MgIn, AlLi, CaF2 A thin metal film such as CaN can be used. In this way, a cathode capable of transmitting light can be formed.

[0332] A region in which a layer 6213 containing an organic compound is sandwiched between a counter electrode 6214 and a pixel electrode 6211. A light emitting element 6216 is formed in the region.

[0333] In addition, in a region where the layer 6213 containing an organic compound is isolated by the insulator 6212, A junction 6217 is formed, and the counter electrode 6214 and the wiring 6219 are in contact with each other. The wire 6219 functions as an auxiliary electrode for the counter electrode 6214, lowering the resistance of the counter electrode 6214. Therefore, the film thickness of the counter electrode 6214 can be made thin, and the transmittance can be increased. Therefore, it is possible to extract the light obtained from the light emitting element 6216 from the upper surface. In a surface emission configuration, higher brightness can be obtained.

[0334] In order to reduce the resistance of the counter electrode 6214, a thin metal film and a transparent conductive film (ITO (In Indium tin oxide (IZO), zinc oxide (ZnO, etc.) In this way, a thin metal film and a transparent conductive film having transparency can be used. This also makes it possible to form a cathode that can transmit light.

[0335] The impurity region 6204 is doped with a P-type impurity. 6220 is doped with N-type impurities. Therefore, the transistor 6215 is P The transistor 6223 is an N-channel transistor. It is.

[0336] That is, the transistor 6215 is the driving transistor 6101 of the pixel in FIG. The transistor 6223 is the complementary transistor 6108 of the pixel in FIG. 61. Reference numeral 19 denotes the wiring 6110 in the pixel of FIG. 61, and the counter electrode 6214 in the pixel of FIG. 61. That is, the wiring 611 in the pixel of FIG. 0 is connected to the cathode 6109 of the light emitting element 6104 .

[0337] In addition, the display panel described in FIG. 62 can make the film of the counter electrode 6214 thin, and the upper surface The light emitted from the upper surface has good translucency, so the brightness from the upper surface can be increased. By connecting the counter electrode 6214 and the wiring 6219, 219 can be made to have a low resistance. This allows for a reduction in power consumption. For example, in the pixel of FIG. 79, the wiring 7902 and the counter electrode 7308 of the light emitting element 7304 may be connected.

[0338] Next, the structure of the display panel will be described with reference to schematic diagrams 63(a) and (b). A signal line driver circuit 6301, a scanning line driver circuit 6302, and a pixel portion 6303 are formed on the substrate 630. The substrate 6300 is connected to an FPC (flexible printed circuit) 6304. A video signal, a clock signal, and a clock signal are input to a signal line driver circuit 6301 and a scanning line driver circuit 6302. The external input terminal FPC 6304 receives signals such as the lock signal and the start signal. On the joint between FPC 6304 and board 6300, there is an IC chip (memory circuit, buffer 6305 is a COG (Chip On Glass) It is implemented with FPC6304, etc. The C6304 may be equipped with a printed wiring board (PWB). The display device used in this system is not just the display panel itself, but also the FPC or PWB attached to it. This also includes the state in which an IC chip or the like is mounted. do.

[0339] In the display section 6303 of the display panel shown in FIG. 63(a), pixels are arranged in a matrix. Then, there is a pixel row for each color. And the layer 6307 containing the organic compound The organic compound is then applied to the pixel portion. In the region 6306 where the layer 6307 is not provided, A joint between the wiring and the counter electrode is formed. That is, the joint 6217 in the cross-sectional view of FIG. In addition, a schematic diagram of the upper surface of the pixel portion is shown in FIG. As shown in FIG. 64, the wiring 6402 is formed of the same material as the pixel electrode 6401. The pixel electrode 6401 corresponds to the pixel electrode 6211 in FIG. The wiring 6219 of FIG. 62 corresponds to the wiring 6219 of FIG. 62. A light emitting element is formed in each region between the pixel electrode 6401 and the counter electrode. In addition, since the opposing electrode and the wiring 6402 are in contact at the joint, the resistance of the opposing electrode is reduced. In other words, the wiring 6402 functions as an auxiliary electrode for the counter electrode. By configuring the pixel section as shown in Figure 64, the aperture ratio is high and the resistance of the opposing electrode is reduced. It is therefore possible to provide a display panel having such a structure.

[0340] In the display section 6303 of the display panel shown in FIG. 63(b), pixels are arranged in a matrix. Then, there is a pixel row for each color. And the layer containing organic compounds 6317 The organic compound In a region 6316 where the layer 6317 including That is, a joint between the wiring and the counter electrode is formed. 7 is formed in the region 6316 in FIG. This is shown in FIG. 65. In FIG. 65, the wiring 6502 is formed of the same material as the pixel electrode 6501. The pixel electrode 6501 corresponds to the pixel electrode 6211 in FIG. It corresponds to the wiring 6219 in FIG. 62. Each pixel electrode 6401 has a layer containing an organic compound. A light emitting element is formed in each region sandwiched between the pixel electrode 6501 and the counter electrode. In addition, since the opposing electrode and the wiring 6502 are in contact at the joint, the resistance of the opposing electrode is reduced. In other words, the wiring 6502 functions as an auxiliary electrode for the counter electrode. By configuring the pixel section as shown in FIG. 65, we have proposed a display panel with lower resistance of the opposing electrode. It will be possible to provide

[0341] The display panel shown in this embodiment has a high light-transmitting property of the counter electrode and a high aperture ratio of the pixel. Therefore, the necessary luminous intensity can be obtained even if the luminance is reduced. In addition, the resistance of the opposing electrode can be reduced, which reduces power consumption. Cut.

[0342] (Embodiment 8) In this embodiment, the first embodiment, the second embodiment, the third embodiment, the fourth embodiment, In the display device having the pixel configuration shown in the embodiment 5 and the embodiment 6, The configuration of the device will be described.

[0343] The display device of this embodiment is characterized in that a buffer circuit is provided for the scanning line, the signal line, and the potential supply line. That is, a signal from the scanning line driving circuit is input to a buffer circuit, and the buffer circuit outputs The signal from the signal line driver circuit is output to the buffer circuit. and a signal is output from the buffer circuit to the signal line. A signal from the driver circuit is input to the buffer circuit, and the signal is output from the buffer circuit to the potential supply line. In this way, the output signals of the scanning line driving circuit, the signal line driving circuit, and the potential supply line are This converts the impedance of the signal and increases the current supply capacity.

[0344] In addition, even if a buffer circuit is not provided for the scanning line, the signal line, or the potential supply line, the scanning line driver circuit and the signal A buffer circuit is provided in the signal line driver circuit and the potential supply line driver circuit to The current supply capability may be increased.

[0345] A basic structure of a display device according to this embodiment will be described with reference to FIG. In the first embodiment, the same reference numerals are used for the parts common to the display device described with reference to FIG. do.

[0346] Each of the scanning lines R1 to Rm controls the switches of one row of pixels. When transistors are used, each of the scanning lines R1 to Rm is connected to one row of pixels. The gate terminals of the switching transistors are connected to each other. The higher the resolution, the more transistors that can be used at the same time. The number of transistors that must be turned on simultaneously also increases. It is preferable that the buffer circuit has a high current supply capability.

[0347] In addition, the signal set to the first terminal of the driving transistor 206 from the potential supply lines I1 to Im is During the writing period and the light emission period, the driving transistors 206 of the pixels in one row It is necessary to supply a current to the light emitting element 209. The input signal requires a high current supply capability.

[0348] The scanning lines R1 to Rm and the potential supply lines I1 to Im of the display device shown in FIG. Furthermore, at the intersections of the signal lines D1 to Dn, there is a parasitic capacitance (intersection capacitance). Therefore, the scanning lines R1 to Rm are formed with a resistive element 1401 and a capacitive element 1402. 02, it can be expressed by the equivalent circuit as shown in FIG.

[0349] When a square wave input pulse 1403 is input to this equivalent circuit, the response wave is an output pulse 140 The waveform becomes rounded as shown in 4. In other words, the rising and falling edges of the pulse are As a result, the switch 208 will not be turned on at the correct timing, and the As a result, the video signal cannot be accurately written to the pixel. In a display device, the signal output from the scanning line is passed through a buffer circuit to increase the current supply capacity. By shortening the time, it is possible to reduce the occurrence of distortion. In particular, the potential supply lines I1 to Im are connected to the pixel 205 for one row. Since a current supply capability is required to make the optical element 210 emit light, a buffer circuit is used. It is desirable to convert the signal impedance and increase the current supply capacity.

[0350] In addition, when parasitic capacitance is formed in the signal lines D1 to Dn, the analog signal corresponding to the video signal is Since there is a delay in setting the log signal potential, it is difficult to write the signal to the pixel accurately. Therefore, in the display device of this embodiment, the signal output from the signal line is not possible. It is also advisable to increase the current supply capability of the input signal through a buffer circuit.

[0351] In the display device shown in FIG. 13, a signal output from a potential supply line driving circuit 201 is supplied to a potential supply line I1 13. The potentials are input to the potential supply lines I1 to Im via the respective buffer circuits 1301 provided in the potential supply lines I1 to Im. That is, the potential supply line driver circuit 201 outputs the potential The current supply capacity of the output signal is increased. Similarly, a buffer is provided for each of the scanning lines R1 to Rm. A buffer circuit 1302 is provided for each of the signal lines D1 to Dn. The buffer circuit 1303 is an analog buffer circuit. .

[0352] Therefore, since the signal output from each drive circuit has a high current supply capacity, the above-mentioned pulse signal Therefore, the switching transistors for one row of pixels can be quickly switched This allows the pixel to be written quickly by turning on the transistor. The period can be shortened.

[0353] Here, an example of a buffer circuit that can be used in this embodiment will be shown. In this circuit, the terminal to which the input potential Vin is input is called the input terminal, and the terminal to which the output potential Vout is output is called the output terminal. The terminal through which the input signal is output is called the output terminal.

[0354] For example, the input terminal of a voltage follower circuit 1501 shown in FIG. Connect the output terminal of the driver circuit to the output terminal of the voltage follower circuit 1501. When using a voltage follower circuit as a buffer circuit, it is important to minimize the variation in characteristics. It is preferable to form the transistor on an IC chip on which a large transistor can be formed. In the , an IC chip is an integrated circuit formed on a substrate separated onto a chip. In particular, IC chips are made of single crystal silicon wafers, which are used for element isolation. A single crystal silicon wafer that has been cut into any desired shape after forming a circuit is suitable.

[0355] Therefore, when the voltage follower circuit 1501 is used as the buffer circuit, the scanning line driver An IC chip that forms a buffer circuit together with a drive circuit, a signal line drive circuit, and a potential supply line drive circuit. It is recommended to mount the display panel using COG (Chip On Glass) or similar. The delay follower circuit is a buffer circuit 1301 in the display device of FIG. The analog buffer circuit 1303 may be applied to the circuit 1302 and the buffer circuit 1303. Therefore, it is particularly suitable for the buffer circuit 1302.

[0356] As shown in FIG. 15(b), an N-channel transistor 1502 and a P-channel transistor An inverter made of a transistor 1503 may be used as a buffer circuit. The gate terminal of the transistor 1502 and the gate terminal of the P-channel transistor 1503 are common. The input terminal is connected to the N-channel transistor 1, and an input potential Vin is input to the N-channel transistor 1. The source terminal of 502 is connected to the power supply potential Vss, and the drain terminal is a P-channel transistor. The drain terminal of the stator 1503 is connected to the output terminal, and the output potential Vout The buffer circuit can be made by connecting multiple inverters in series. At this time, the output potential Vout from the inverter is input to the input terminal of the next stage. If the inverter has a current supply capacity that is approximately three times that of the conventional inverter, the current supply capacity can be increased efficiently. In other words, the potential output from the first inverter is input to the next inverter. When the input is made, an inverter with a current supply capacity of about three times the input is connected in series. If an even number of inverters are connected, it can be used as a buffer circuit. In designing the P-channel transistor 1502 and the P-channel transistor 1503, The current supply capacity can be adjusted by adjusting the ratio of channel width W to channel length L: W / L. In addition, a buffer circuit using an inverter as shown in FIG. 15(b) can be implemented as shown in FIG. In the display device, the present invention can be applied to the buffer circuits 1301 and 1303. The buffer circuit using such an inverter has a simple structure, and the scanning lines are mounted on the substrate together with the pixels. A display panel having thin-film transistors with integrated drive circuits and signal line drive circuits was fabricated. In this case, the buffer circuit can also be formed integrally. This allows for cost reduction. A CMOS inverter consisting of a transistor 1502 and a P-channel transistor 1503. When a potential close to the logic threshold voltage Vinv of the inverter is input to the input terminal, A current flows through the N-channel transistor 1502 and the P-channel transistor 1503. However, when a high or low level potential is input to the input terminal, either one of the transistors Therefore, as shown in Figure 15(b), the power consumption is not unnecessary. Using such a CMOS inverter makes it possible to reduce power consumption.

[0357] Furthermore, a buffer circuit is formed using a source follower circuit as shown in FIG. 15(c). It is also possible to use a source follower transistor 1504 and a current source 1505. The gate terminal of the follower transistor 1504 is connected to the input terminal, and the drain terminal is connected to the power supply. The potential Vdd is connected to a set wiring, and the source terminal is connected to one terminal of the current source 1505 and the output The other terminal of the current source 1505 is connected to the low power supply potential Vss. Here, the gate-source of the source follower transistor 1504 is connected to the wiring. Using the voltage Vgs, the output potential Vout is expressed by the following equation (1).

[0358] Vout = Vin - Vgs (1)

[0359] Here, Vgs is the voltage required for the source follower transistor 1504 to pass the current I0. It is.

[0360] Therefore, the output potential Vout is lower than the input potential Vin by Vgs. If the signal input to the potential Vin is a digital signal, the source follower transistor 15 Even if there is some variation in the gate-source voltage Vgs of 04, the source follower circuit can be backed up. Therefore, in the display device of FIG. The circuit 1301 and the buffer circuit 1303 can be used.

[0361] In addition, the source follower circuit shown in Fig. 15(c) has a simple configuration and uses thin-film transistors. Therefore, the pixel and the scanning line driver circuit can be easily formed on the substrate. When manufacturing a display panel having a thin film transistor with a signal line driver circuit integrally formed thereon, By forming the buffer circuit integrally, This will help bring down the stock price.

[0362] As the source follower transistor 1504, an N-channel By using a 1-type transistor, the pixel and the scanning line driver circuit, the signal line driver circuit, and the potential supply line In a display panel in which a driver circuit and a buffer circuit are integrally formed, It is possible to fabricate a unipolar display panel consisting of only the MOS transistors.

[0363] In addition, when a source follower circuit is used as a buffer circuit, as shown in FIG. By making the follower transistor 1506 a dual gate, a transistor with a low threshold voltage can be obtained. It should be noted that the configuration other than the source follower transistor 1506 may be used. Since the elements are the same as those in FIG. 15(c), the same reference numerals are used and the explanation is omitted.

[0364] The source follower transistor circuit shown in FIG. 15(d) reduces the threshold voltage Vth. This reduces the variation between the transistors that make up the source follower transistor. For example, it can be used as an analog buffer circuit. Needless to say, the buffer circuit 1301 and the buffer circuit 1303 are A source follower circuit as shown in FIG.

[0365] Also, the configuration shown in FIG. 16(b) can be used for a buffer circuit. The circuit includes a source follower transistor 1604, a capacitor element 1605, and a first switch 1606. 606, a second switch 1607, a third switch 1608, and a current source 1609, A voltage source 1610 is connected to the drain terminal of the source follower transistor 1604. The terminal is connected to the wiring with the power supply potential Vdd set, and the source terminal is connected to the output terminal and the current source 16 A wiring to which the low power supply potential Vss is set via the first switch 1609 and one end of the first switch 1606 The other terminal of the first switch 1606 is connected to one of the terminals of the capacitance element. The terminal is connected to the input terminal via a third switch 1608. The other terminal of 605 is connected to the gate terminal of the source follower transistor 1604 and the second switch The low power supply potential Vss is connected to a wiring via a switch 1607 and a voltage source 1610. is.

[0366] The operation of the source follower circuit in FIG. 16(b) will now be briefly explained. The first switch 1606 and the second switch 1607 are turned on. Then, the capacitance element 160 5 shows the gate-source voltage of the source follower transistor 1604 that causes a current I1 to flow. Then, the first switch 1606 and the second switch 1607 are turned on. Then, the switch 1607 is turned off. Then, the capacitance element 1605 becomes a source follower transistor. The gate-source voltage Vgs of the third switch 1608 is maintained. When it is turned on, the capacitance element 1605 holds the gate-source voltage Vgs and The input potential Vin is input to the capacitor 1605. The gate terminal of the follower transistor 1604 is connected to the input potential Vin. The potential is set by adding the voltage Vgs. On the other hand, the output potential Vout is the gate-source voltage V from the potential of the gate terminal of the source follower transistor 1604. gs is subtracted from the potential. Therefore, the potential output from the output terminal is the potential input to the input terminal. The potential becomes the same, so Vin=Vout.

[0367] Therefore, the source follower circuit shown in FIG. 16(b) functions as a buffer in the display device of FIG. Needless to say, the circuit 1301 and the buffer circuit 1303 have a current supply capacity for the video signal. The same can be applied to the buffer circuit 1302 for increasing the output voltage.

[0368] In addition, since the circuit is simpler than the voltage follower circuit, the scanning line drive circuit is connected to the pixel. A thin film transistor is integrally formed with a line, a signal line driver circuit, and a potential supply line driver circuit. When manufacturing a display panel, a source follower as shown in FIG. 16(b) is used as a buffer circuit. The source follower circuit in FIG. 16(b) is a unipolar Since the display panel can be made of transistors, a unipolar display panel can be manufactured.

[0369] In addition, the current source 1505 shown in FIG. 15(c) and (d) and the current source 16 shown in FIG. 16(b) 09 can be used with transistors that operate in the saturation region, resistor elements, and rectifier elements. Furthermore, rectifying elements include PN-connected diodes and diode-connected transistors. It can also be used.

[0370] Here, when a diode-connected transistor is applied to the current source 1505 in FIG. The case where the source follower transistor 1506 and the die The transistor 1507 is connected in series with the source follower transistor 1506. The drain terminal is connected to the wiring with the power supply potential Vdd set, and the source terminal is diode-connected. The drain terminal of the transistor 1507 connected to the diode is connected to the output terminal. The pole-connected transistor 1507 has its drain terminal and gate terminal connected together, and its source terminal The terminal is connected to a wiring to which the low power supply potential Vss is set.

[0371] Note that the pixel configuration applicable to the display device of this embodiment is not limited to the configuration shown in FIG. , the various pixel configurations shown in the second embodiment, the third embodiment, the fourth embodiment, and the fifth embodiment It is possible to apply the same to all the scanning line driving circuits and signal line driving circuits as the buffer circuits. It is necessary to provide the scanning lines, signal lines, and potential supply lines to which the output of the circuit and potential supply line driver circuit is input. In particular, the signal output from the potential supply line driver circuit is Since a current is required to pass through the light emitting element of the pixel, for example, in the configuration of FIG. In this case, only the buffer circuit 1303 on the potential supply line driver circuit side may be provided.

[0372] (Embodiment 9) In this embodiment mode, a scanning line driver circuit and a signal line driver circuit of a display device having a pixel configuration of the present invention are That is, the scanning line driver circuit shown in this embodiment will be described. The signal line driver circuit and the potential supply line driver circuit are described in the first, second and third embodiments. The display device having the pixel configuration shown in Embodiment 4 or 5, the display device having the pixel configuration shown in Embodiment 6 or The display device shown in the seventh embodiment can be used appropriately.

[0373] The display device shown in FIG. 25(a) includes a pixel section 2501 on which a plurality of pixels are arranged. 02, and a potential supply line driver circuit 2503 and a scanning line driver circuit 2504 are provided around the pixel portion 2502. The potential supply line driver circuit 2503 is the same as that shown in FIG. 2. The scanning line driver circuit 2504 corresponds to the scanning line driver circuit 201 in FIG. 2. The signal line driver circuit 2505 corresponds to the signal line driver circuit 203 in FIG.

[0374] A potential supply line driver circuit 2503, a scanning line driver circuit 2504, and a signal line driver circuit 2505 are connected to the The input signal is printed on a flexible printed circuit. The power supply is supplied externally via an FPC (circuit: FPC) 2506.

[0375] Although not shown in the figure, COG (Chip On Glass) and IC chips are mounted using TAB (Tape Automated Bonding) etc. In other words, the potential supply line driver circuit 2502 may be formed integrally with the pixel portion 2502. 03, a part of the memory circuit and buffer of the scanning line driver circuit 2504 and the signal line driver circuit 2505 The optical circuit and the like may be formed on an IC chip and mounted on the display device.

[0376] As shown in FIG. 25(b), the potential supply line driver circuit 2503 and the scanning line driver circuit 25 04 may be disposed on one side of the pixel portion 2502. The only difference from the display device shown in FIG. 25(a) is the arrangement of the potential supply line driver circuit 2503. In addition, the potential supply line driver circuit 2503 and the scanning line driver circuit 2504 are the same. The same function as that of the driver circuit 504 may be achieved by a single driver circuit.

[0377] Next, a configuration example of the signal line driver circuit 2505 of the display device shown in FIGS. 25(a) and 25(b) will be described. This is a driver circuit for setting signals on the signal lines (D1 to Dn) of the display device in Figure 2. The signal line driver circuit shown in FIG. 31(a) includes a pulse output circuit 3101, a first latch circuit, 3102, a second latch circuit 3103, a D / A conversion circuit (digital-to-analog conversion circuit) 3104, a write period / light emission period selection circuit 3105 and an analog buffer circuit 3106 It has.

[0378] The operation of the signal line driver circuit shown in FIG. 31(a) will be described using the detailed configuration shown in FIG. explain.

[0379] The pulse output circuit 3301 is configured using multiple stages of flip-flop circuits (FF) 3309, etc. The clock signal (S-CLK), clock inversion signal (S-CLKB), and start pulse The sampled signal (S-SP) is input. A pulse is output.

[0380] The sampling pulse output by the pulse output circuit 3301 is input to the first latch circuit 33 A digital video signal is input to the first latch circuit 3302. The digital video signal is stored at each stage according to the timing of the sampling pulse input. Here, 3 bits of digital video signal are input to each stage, and the video of each bit is The signals are respectively held in the first latch circuit 3302. By this operation, the three latch circuits in each stage of the first latch circuit 3302 operate in parallel.

[0381] When the first latch circuit 3302 completes holding the digital video signal up to the final stage, During the horizontal retrace period, a latch pulse is applied to the second latch circuit 3303. ) is input, and the digital video signals held in the first latch circuit 3302 are simultaneously The signal is transferred to the second latch circuit 3303. The signal is then held in the second latch circuit 3303. The digital video signals are input to a DAC (D / A conversion circuit) 3304 for one row at a time.

[0382] The DAC3304 converts the input digital video signal from digital to analog, As a video signal having an analog potential, the write period / light emission period selection circuit 3305 has The signal is input to a switching circuit 3307.

[0383] The digital video signal held in the second latch circuit 3303 is input to the DAC 3304. During this time, the pulse output circuit 3301 again outputs a sampling pulse. During the writing period, the above-mentioned operation is repeated to process one frame of video signal. conduct.

[0384] In addition, the write period / light emission period selection circuit 3305 has a triangular wave potential generation circuit 3308. During the light emission period, the switching circuit 3307 is The triangular wave potential generated by the above is input.

[0385] In this way, the switching circuit 3307 receives the video signal from the DAC 3304 during the writing period. During the light emission period, a triangular wave potential is input from a triangular wave potential generating circuit 3308. The switching circuit 3307 outputs a video signal during the writing period and a triangular wave potential during the light emission period. Input to analog buffer circuit 3306.

[0386] The analog buffer circuit 3306 performs impedance conversion and outputs a potential equivalent to the input potential. That is, the video signal is set to the signal lines D1 to Dn by the analog buffer circuit 3306. The supply capacity is increased, and the analog signal potential is set to the signal lines D1 to Dn. The signal lines D1 to Dn correspond to the signal lines D1 to Dn of the display devices in FIG. 2 and FIG.

[0387] In FIG. 31(a), an input digital video signal (Digital Video Before being converted to analog video data Therefore, as shown in FIG. 31(b), the first latch Before being input to the circuit 3102, a digital video signal (Digital Video Data a) is corrected by the correction circuit 3107 and then input to the first latch circuit 3102. It is preferable to set the correction circuit 3107 to, for example, perform gamma correction. .

[0388] In addition, the impedance conversion is performed by connecting the output of the D / A conversion circuit to the write period / light emission period selection circuit. That is, in the configuration of FIG. 31(a), the D / A conversion circuit 31 The output of 3104 is impedance converted and input to the write period / light emission period selection circuit 3105. As a configuration for this purpose, the configuration shown in FIG. 35(a) can be used. The detailed configuration of (a) is shown in FIG. 37. Pulse output circuit 3701 , a first latch circuit 3702, a second latch circuit 3703, a D / A conversion circuit 3704, A write period / light emission period selection circuit 3705, an analog buffer circuit 3706, and a switching circuit 3707, a triangular wave potential generating circuit 3708, a flip-flop circuit 3709, etc. The functions of the pulse output circuit 3301, the first latch circuit 3302, the second latch circuit 3303, and the circuit 3303, D / A conversion circuit 3304, write period / light emission period selection circuit 3305, Analog buffer circuit 3306, switching circuit 3307, triangular wave potential generating circuit 3308, The flip-flop circuit 3309 is the same as the flip-flop circuit 3309. The output of the conversion circuit 3104 is impedance-converted to the write period / light emission period selection circuit 31 The configuration to be input to 05 can be as shown in FIG. 35(b).

[0389] 31 and 33 show a configuration in which the video signal input to the signal line driver circuit is digital. 32 and 34, the case where the video signal is analog will be described. In this case, it is not necessary to provide a D / A conversion circuit as shown in FIG. A first analog latch circuit and a second analog latch circuit capable of holding a video signal of the As shown in FIG. 32(a), the pulse output circuit is A first analog latch circuit 3201, a first analog latch circuit 3202, a second analog latch circuit 3203, It has a write period / light emission period selection circuit 3204 and an analog buffer circuit 3205. do.

[0390] The operation of the signal line driver circuit shown in FIG. 32(a) will be described using the detailed configuration shown in FIG. explain.

[0391] The pulse output circuit 3401 is configured using multiple stages of flip-flop circuits (FF) 3408, etc. The clock signal (S-CLK), clock inversion signal (S-CLKB), and start pulse The sampled signal (S-SP) is input. A pulse is output.

[0392] The sampling pulse output by the pulse output circuit 3401 is input to the first analog latch The first analog latch circuit 3402 receives an analog video signal According to the timing of the sampling pulse input, an analog Here, the analog video signal is input at one bit per stage. , a 1-bit video signal is latched by the first analog latch circuit 3402 of each stage. Hold.

[0393] In the first analog latch circuit 3402, the analog video signal is held until the final stage. Then, during the horizontal retrace period, a latch pulse (Lat ch Pulse) is input, and the analog latch circuit 3402 holds The analog video signals are transferred to the second analog latch circuit 3403 all at once. The analog video signals held in the analog latch circuit 3403 of 2 are written one row at a time. The signal is input to a switching circuit 3406 in the write period / light emission period selection circuit 3404 .

[0394] During the write period, the switching circuit 3406 switches the second analog latch circuit 3403 The video signal input from the analog buffer circuit 3405 is input to the analog buffer circuit 3406. The circuit 3405 converts the impedance and outputs analog signal potentials to the signal lines D1 to Dn. The signal lines D1 to Dn are set to the same values ​​as the signal lines D1 to Dn in the display devices shown in FIG. Equivalent to ~Dn.

[0395] In this way, while the analog signal potentials for one row of pixels are set to the signal lines D1 to Dn, a pulse The output circuit 3401 outputs a sampling pulse again. During this period, the above-mentioned operations are repeated to process one frame of video signal.

[0396] In addition, the write period / light emission period selection circuit 3404 has a triangular wave potential generation circuit 3407. During the light emission period, the switching circuit 3406 is During the light emission period, the analog buffer circuit 33 06 converts impedance and outputs a potential equivalent to the input triangular wave potential to signal lines D1 to Dn. In other words, the output current capability is increased by using an analog buffer circuit.

[0397] In this way, the switching circuit 3406 is configured to switch the second analog latch circuit 340 During the light emission period, a triangular wave potential is generated from a triangular wave potential generating circuit 3407. The switching circuit 3406 switches the video signal during the writing period and the light emission period. A triangular wave potential is input to an analog buffer circuit 3405 in between.

[0398] When the external video signal is a digital video signal, as shown in FIG. The digital video signal is converted to an analog video signal by a D / A conversion circuit 3206 and then It may also be input to an analog latch circuit 3202 .

[0399] In addition, the impedance conversion is performed by connecting the output of the second latch circuit to the write period / light emission period selection circuit. That is, in the configuration of FIG. 32(a), the second analog line The output of the switch circuit 3203 is impedance-converted to the write period / light emission period selection circuit 32 The input to the input device 04 can be configured as shown in FIG. 36(a). When the pulse output is 1, the configuration shown in FIG. 36(a) is shown in detail in FIG. 38. A circuit 3801, a first analog latch circuit 3802, and a second analog latch circuit 3803. , a write period / light emission period selection circuit 3804, an analog buffer circuit 3805, a switching circuit 3806, a triangular wave potential generating circuit 3807, a flip-flop circuit 3808, etc. The functions of these circuits are the same as those of the pulse output circuit 3401, the first analog latch circuit 3402, A second analog latch circuit 3403, a write period / light emission period selection circuit 3404, an analog A flip-buffer circuit 3405, a switching circuit 3406, a triangular wave potential generating circuit 3407, The second analog flop-flop circuit 3408 is the same as the second analog flop-flop circuit 3408 in the configuration of FIG. The output of the log latch circuit 3203 is impedance converted to a write period / light emission period selection circuit. The input to the path 3204 can be configured as shown in FIG.

[0400] In addition, an analog signal potential equivalent to a video signal and a drive transistor are controlled to be turned on and off. A pixel configuration in which the analog-changing potential of the pixel is input to the pixel through a separate signal line (for example, as shown in Figure 56). A signal line driver circuit applicable to a display device having such a pixel configuration is shown in FIG. 39 and FIG. 40. This will be explained using:

[0401] First, the configuration of FIG. 39 will be described.

[0402] The pulse output circuit 3901 is configured using multiple stages of flip-flop circuits (FF) 3907, etc. The clock signal (S-CLK), clock inversion signal (S-CLKB), and start pulse The sampled signal (S-SP) is input. A pulse is output.

[0403] The sampling pulse output by the pulse output circuit 3901 is input to the first latch circuit 39 A digital video signal is input to the first latch circuit 3902. The digital video signal is stored at each stage according to the timing of the sampling pulse input. Here, 3 bits of digital video signal are input to each stage, and the video of each bit is The signals are respectively held in the first latch circuit 3902. By this operation, the three latch circuits in each stage of the first latch circuit 3902 operate in parallel.

[0404] When the first latch circuit 3902 completes holding the digital video signal up to the final stage, During the horizontal retrace period, a latch pulse is applied to the second latch circuit 3903. ) is input, and the digital video signals held in the first latch circuit 3902 are simultaneously The signal is transferred to the second latch circuit 3903. The signal is then held in the second latch circuit 3903. The digital video signals are input to a DAC (D / A conversion circuit) 3904 for one row at a time.

[0405] The DAC3904 converts the input digital video signal from digital to analog, The image signal having an analog potential is input to an analog buffer circuit 3905 .

[0406] An analog signal potential is set to each of the signal lines D1a1 to D1an from the analog buffer circuit 3905. At the same time, a triangular wave potential is also generated from a triangular wave potential generating circuit 3906 to each signal line and each signal line. The signal lines D1a1 to D1an are set as lines D2a1 to D2an. This corresponds to the first signal line 410 or the first signal line 390 of a display device having pixels. The signal lines D2a1 to D2an correspond to the second signal lines 411 of the display device having the pixels shown in FIG. 4 and FIG. It corresponds to the second signal line 391 .

[0407] The configuration of FIG. 40 will now be described.

[0408] The pulse output circuit 4001 is composed of multiple stages of flip-flop circuits (FF) 4006, etc. The clock signal (S-CLK), clock inversion signal (S-CLKB), and start pulse The sampled signal (S-SP) is input. A pulse is output.

[0409] The sampling pulse output by the pulse output circuit 4001 is input to the first analog latch The first analog latch circuit 4002 receives an analog video signal (Analog Data) is input, and the timing at which the sampling pulse is input In this case, the analog video signal is stored in each stage according to the One bit of video signal is input for each stage, and the first analog The signal is held in a latch circuit 4002 .

[0410] In the first analog latch circuit 4002, the analog video signal is held until the final stage. Then, during the horizontal retrace period, a latch pulse (Lat ch Pulse) is input, and the analog latch circuit 4002 holds The analog video signals are transferred all at once to the second analog latch circuit 4003. The digital video signal held in the latch circuit 4003 of the second row is simultaneously buffered in an analog The signal is input to the AF circuit 4004.

[0411] An analog signal potential is set to each of the signal lines D1a1 to D1an from the analog buffer circuit 4004. At the same time, a triangular wave potential is also generated from a triangular wave potential generating circuit 4005 to each signal line and each signal line. The lines D2a1 to D2an are set.

[0412] In addition, when signals are simultaneously written to pixels selected in the row direction (also called the line sequential method), The signal line driver circuit has been described. The signal is written directly to the pixels according to the signal output from the input circuit (also called the dot sequential method). You can do that too.

[0413] Regarding a dot sequential signal line driver circuit applicable to the pixel configuration shown in the embodiment 1, FIG. 1(a) will be used. A pulse output circuit 4101, a first switch group 4102, a second The first switch group 4102 and the second switch group 410 Each of the switches 3 has multiple stages. Each stage corresponds to a signal line. do.

[0414] One terminal of the switch in each stage of the first switch group 4102 corresponds to a video signal. Connect to the wiring that receives the analog video signal (Analog Video Data). The other terminals are connected to corresponding signal lines. One terminal of the switch in each stage of 4103 is connected to the wiring where the triangular wave potential is set. The other terminals are connected to corresponding signal lines.

[0415] During the signal writing period of the pixel, the clock signal (S-CLK) is supplied to the pulse output circuit 4101. , a clock inversion signal (S-CLKB), and a start pulse signal (S-SP) are input. Sampling pulses are output in sequence according to the timing of these signals. The control signal for controlling the on / off of the second switch group 4103 is set so that the switches of all stages are on. Set it to

[0416] Then, in response to the output of the sampling pulse, the switches of the first switch group 4102 are Turn on one step at a time.

[0417] Therefore, during the write period, the first switch group 4102 corresponding to the stage of the switch that is turned on Analog video data is input to the signal line. The switches in each row of the switch group 4102 are turned on, and the analog input is sequentially applied to the pixels in the selected row. Write og Video Data.

[0418] Then, the pixels in the next row are selected and signals are written in the same way. Once written, the signal writing period ends.

[0419] When the signal writing period to the pixel ends, the light emission period begins. During the light emission period of the pixel, a pulse is output. In other words, the pulse output is set to 0. The output of the circuit 4101 may be prevented from being input to the first switch group 4102. It is also possible to prevent the start pulse signal (S-SP) from being input to the pulse output circuit 4101. In other words, it is sufficient that the switches in the first switch group 4102 are turned off.

[0420] Also, a control signal is input so that all the switches in the second switch group 4103 are turned on. Then, a triangular wave potential is set to all the signal lines. Since the pixels in the row are selected, a triangular wave potential can be set to all the pixels. A triangular wave potential is input.

[0421] In this way, when the light emission period ends, one frame period ends.

[0422] Next, a dot sequential signal line driver circuit applicable to the pixel configuration shown in the embodiment 2 will be described. The following description will be given with reference to FIG. 41(b). A pulse output circuit 4111, a switch group 4112, Each of the switch groups 4112 has a plurality of stages of switches. Each of them corresponds to the first signal line.

[0423] One terminal of each switch in the switch group 4112 is an analog input corresponding to a video signal. It is connected to the wiring that inputs the analog video signal (Analog Video Data). The other terminals are connected to the first signal lines corresponding to the respective columns of pixels. The wiring to which the potential is set is connected to a second signal line corresponding to each column of pixels.

[0424] During the signal writing period of the pixel, the clock signal (S-CLK) is supplied to the pulse output circuit 4111. , a clock inversion signal (S-CLKB), and a start pulse signal (S-SP) are input. Sampling pulses are output in sequence in accordance with the timing of these signals.

[0425] Then, according to the output of the sampling pulse, the switches in the switch group 4112 are switched one stage at a time. Turn it on.

[0426] Therefore, during the period when signals are written to the pixels, the switches in the switch group 4112 are turned on. An analog video signal (Analog Video Data) is input to the corresponding signal line. In this way, the switches in each stage of the switch group 4112 are turned on in sequence, and the selected Write analog video data to the pixels in each row in sequence .

[0427] The pixels in the non-selected rows are connected to the second signal line and enter a light emission period.

[0428] In this way, in the configuration of FIG. 41(b), a write period is set for each row of pixels, and the write period for other rows This is applicable to the pixel shown in the second embodiment in which the light emitting period can be set as the writing period. It is possible.

[0429] Next, the configurations of the scanning line driver circuit and the potential supply line driver circuit will be described.

[0430] The scanning line driver circuit and the potential supply line driver circuit each have a pulse output circuit. During this period, the sampling pulse from the pulse output circuit is output to the scanning line and the potential supply line. During the light emission period, the sampling pulse is not output. A signal is input to the scanning line so that all pixel rows are not selected. A potential is set to apply a forward voltage to the light emitting element.

[0431] In addition, the scanning line driving circuit and the potential supply line driving circuit are formed into one driving circuit. This reduces the area occupied by the path, allowing for a narrower frame.

[0432] Next, a configuration that can be used in the D / A conversion circuit of this embodiment will be described.

[0433] Figure 17 shows a resistor strip that can convert a 3-bit digital signal to an analog signal. It is a ring-type D / A conversion circuit.

[0434] A number of resistor elements are connected in series, and one terminal of the resistor element group is connected to a reference power supply potential V ref is set, and the other terminal is set to a low power supply potential (for example, GND). A current flows through the resistor elements, and the potential at both ends of each resistor element differs due to the voltage drop. The switches are operated according to the signals input to input terminals 1, 2, and 3. By selecting the on / off state of the input, eight different voltages can be obtained from the output terminal. Depending on the signal input to input terminal 3, the four highest or four lowest of the eight potentials can be selected. The potential of the input terminal 3 is selected by the signal input to the input terminal 2. Of the four potentials to be selected, either the higher two potentials or the lower two potentials are selected. Then, the signal input to input terminal 1 selects one of the two potentials at input terminal 2. Either the higher or the lower potential is selected. Thus, one potential is selected from eight potentials. Therefore, the digital inputs to input terminals 1, 2, and 3 are The digital signal can be converted to an analog signal potential.

[0435] Also, Figure 18 shows a 6-bit digital signal that can be converted to an analog signal. A capacitance array type D / A conversion circuit can also be used.

[0436] A number of capacitance elements with different capacitances are connected in parallel, and among these capacitance elements, a digital signal is The on / off of the switches 1 to 6 is controlled according to the reference power supply potential V After accumulating the charge of the potential difference between ref and the low power supply potential (e.g. GND), the accumulated charge is distributed among multiple capacitance elements. Then, the voltages of the multiple capacitance elements settle at a certain value. By detecting one of the potentials from the voltage with an amplifier, the digital signal is converted to an analog signal potential. can be converted to

[0437] Moreover, a D / A conversion circuit that combines a resistor string type and a capacitor array type may be used. These D / A conversion circuits are merely examples, and various D / A conversion circuits can be used as appropriate. do.

[0438] (Embodiment 10) In this embodiment, the first embodiment, the second embodiment, the third embodiment, the fourth embodiment and the third embodiment are included. Regarding the configuration of a display panel having the pixel configuration shown in the fifth embodiment, FIG. 19(a) and (b) are used. I will explain this in more detail.

[0439] In this embodiment, a display panel having a pixel configuration of the present invention in a pixel portion is shown in FIG. 19(a) is a top view showing a display panel, and FIG. 19(b) is a bottom view showing a display panel. A cross-sectional view taken along the line A-A' in FIG. ine Driver) 1901, pixel section 1902, potential supply line driver circuit (Illumi nation line Driver) 1903, Scanning line driver circuit (Reset line A sealing substrate 1904 and a sealing material 1905 are provided. The inside surrounded by the sealing material 1905 forms a space 1907 .

[0440] The wiring 1908 is connected to the potential supply line driver circuit 1903, the scanning line driver circuit 1906, and the signal This is a wiring for transmitting a signal input to the line driver circuit 1901, and serves as an external input terminal. FPC (Flexible Print Circuit) 1909 transmits video signals, clock signals, and The FPC1909 and the display panel are connected with an IC chip (mechanical 1919 is a COG (Chip On Gauge) On Glass) is used. Note that only the FPC is shown here. However, the FPC may have a printed wiring board (PWB) attached. The display device in this case refers not only to the display panel itself, but also to the FPC or PWB attached to it. This also includes devices with IC chips etc. Let us assume that.

[0441] Next, the cross-sectional structure will be described with reference to FIG. 902 and its peripheral driving circuits (potential supply line driving circuit 1903, scanning line driving circuit 1906 and A signal line driver circuit 1902) is formed. Here, the signal line driver circuit 1901 and A pixel portion 1902 is shown.

[0442] The signal line driver circuit 1901 includes an N-channel TFT 1920 and an N-channel TFT 1930. The potential supply line driver circuit 19 is composed of transistors of the same conductivity type, such as transistor 921. Similarly, it is preferable that the gate driver circuit 1903 and the scanning line driver circuit 1906 are also composed of N-channel transistors. In addition, by applying the pixel configuration shown in Fig. 7 or Fig. 10, a unipolar transistor can be used. Since the display panel can be formed of a single polarity material, a unipolar display panel can be produced. CMOS circuits are formed using not only unipolar transistors but also P-channel transistors. In this embodiment, a display panel in which a peripheral driving circuit is integrally formed on a substrate may be used. However, this is not necessarily required, and all or part of the peripheral driving circuitry may be implemented using IC chips, etc. It is possible to form the LEDs in any shape and mount them using COG or similar. In that case, the drive circuit must be unipolar. In addition, a P-channel transistor can be used in combination with the P-channel transistor. In the display panel shown in FIG. Although the circuit 1302 and the buffer circuit 1303 are not shown, the respective peripheral driving circuits The amplifier is equipped with a buffer circuit.

[0443] The pixel section 1902 includes a switching TFT 1911 and a driving TFT 1912. The source electrode of the driving TFT 1912 is It is connected to the first electrode 1913. Also, an insulator is provided to cover the end of the first electrode 1913. Here, a positive photosensitive acrylic resin film is used to form the 1914. It is formed.

[0444] In order to improve the coverage, the upper and lower ends of the insulator 1914 are bent. For example, the material of the insulator 1914 is a positive type. When photosensitive acrylic is used, the radius of curvature (0.2 μm to 3 mm) is applied only to the upper end of the insulator 1914. It is preferable that the insulating material 1914 has a curved surface having a thickness of 1 μm. Negative type that becomes insoluble in etchant when exposed to light, or soluble in etchant when exposed to light Any positive type photoresist having a good photoresistivity can be used.

[0445] On the first electrode 1913, a layer 1916 containing an organic compound and a second electrode 1917 are formed. Here, the material used for the first electrode 1913 functioning as an anode is It is desirable to use a material with a large work function. For example, ITO (indium tin oxide) Tin oxide (tin oxide) film, indium zinc oxide (IZO) film, titanium nitride film, chromium film, titanium In addition to single-layer films such as tin, zinc, and platinum, titanium nitride and aluminum are used as the main components. and a three-layer structure consisting of a titanium nitride film, an aluminum-based film, and a titanium nitride film. In addition, when a laminated structure is used, the resistance of the wiring is low, and a good An ohmic contact can be made, and furthermore, it can function as an anode.

[0446] The layer 1916 containing an organic compound is formed by a deposition method using a deposition mask or an ink jet method. The organic compound-containing layer 1916 contains a metal complex of Group 4 of the periodic table. The body is used as a part of the material, and other materials that can be used in combination with it include The material may be a low molecular weight material or a high molecular weight material. As the material used, an organic compound is often used in a single layer or a laminated layer. In the above, the structure in which an inorganic compound is used as a part of a film made of an organic compound is also included. Furthermore, known triplet materials can also be used.

[0447] Further, a second electrode (cathode) 1917 formed on the layer 1916 containing an organic compound is formed. The materials used are those with low work functions (Al, Ag, Li, Ca, or their alloys). The metals used may be Mg, Ag, MgIn, AlLi, CaF2, or CaN. When the light generated in the layer 1916 containing an organic compound is transmitted through the second electrode 1917, The electrode (cathode) 1917 is made of a thin metal film and a transparent conductive film (ITO (oxide Indium tin oxide alloy), indium oxide zinc oxide alloy (In2O3-ZnO), oxide It is advisable to use a laminate with zinc (ZnO, etc.).

[0448] Furthermore, the sealing substrate 1904 is bonded to the substrate 1910 with a sealing material 1905. , into a space 1907 surrounded by the substrate 1910, the sealing substrate 1904, and the sealant 1905. The structure is provided with a light emitting element 1918. The space 1907 is filled with an inert gas. In addition to cases where the material is filled with gas (such as nitrogen or argon), this also includes configurations where the material is filled with sealing material 1905. It shall be so.

[0449] It is preferable to use an epoxy resin for the sealing material 1905. It is preferable that the material used is one that is as impermeable to moisture and oxygen as possible. Materials used for 04 include glass and quartz substrates, as well as FRP (Fiberglass-R reinforced plastics), PVF (polyvinyl fluoride), Mylar For example, a plastic substrate made of polyester, acrylic or the like can be used.

[0450] In this manner, a display panel having the pixel configuration of the present invention can be obtained.

[0451] As shown in FIG. 19, a signal line driver circuit 1901, a pixel portion 1902, a potential supply line driver circuit 19 By forming the pixel electrode 1903 and the scanning line driver circuit 1906 integrally, the cost of the display device can be reduced. In this case, the signal line driver circuit 1901, the pixel portion 1902, the potential supply line driver The transistors used in the circuit 1903 and the scanning line driver circuit 1906 are of the same conductivity type. This simplifies the manufacturing process, leading to further cost reduction.

[0452] The display panel is configured as follows: A pixel portion 1902, a potential supply line driver circuit 1903, and a scanning line driver circuit 1906 are integrally formed. 42 corresponding to the signal line driver circuit 1901. The display panel 201 may be configured by forming the display element 201 on an IC chip and mounting the IC chip on the display panel using COG or the like. In addition, the substrate 4200, the pixel section 4202, the potential supply line driver circuit 4204, Scan line driver circuit 4203, FPC 4205, IC chip 4206, IC chip 4207, sealing The sealing substrate 4208 and the sealing material 4209 are the same as those in the substrate 1910, the pixel section 1902, and the electrode 1910 in FIG. A position supply line driver circuit 1903, a scanning line driver circuit 1906, an FPC 1909, and an IC chip 19 18, IC chip 1919, sealing substrate 1904, and sealing material 1905.

[0453] In other words, only the signal line driver circuits, which require high-speed operation, are implemented using CMOS or other I The IC chip is formed on a silicon wafer or other semiconductor By making it into a chip, it is possible to achieve faster operation and lower power consumption.

[0454] A scanning line driver circuit 4203 and a potential supply line driver circuit 4204 are integrated with the pixel portion 4202. By forming the scanning line driver circuit 4203, the potential supply The line driver circuit 4204 and the pixel portion 4202 are further configured with transistors of the same conductivity type. The pixel configuration of the pixel portion 4202 is the same as that of the first and second embodiments. The pixels shown in 3, 4 and 5 can be applied. Therefore, it is possible to provide a pixel with a high aperture ratio. It becomes possible to do so.

[0455] In this way, the cost of a high-definition display device can be reduced. An IC chip with functional circuits (memory circuits and buffer circuits) formed at the connection point with 0 By implementing this, the board area can be utilized effectively.

[0456] In addition, the signal line driver circuit 1901, the potential supply line driver circuit 1903 and the scanning line The signal line driver circuit 4211 and the potential supply line driver circuit 4212 in FIG. 42(b) correspond to the driver circuit 1906. The wiring 4214 and the scanning line driver circuit 4213 are formed on an IC chip, and the display panel is formed by COG or the like. In this case, the power consumption of the high-resolution display device can be reduced. Therefore, in order to realize a display device with lower power consumption, It is desirable to use polysilicon for the semiconductor layer of the transistor to be used. b) Substrate 4210, pixel section 4212, FPC 4215, IC chip 4216, IC chip The substrate 4217, the sealing substrate 4218, and the sealant 4219 are the same as the substrate 1910 and the pixel part 1902, FPC 1909, IC chip 1918, IC chip 1919, sealing substrate 19 04, equivalent to sealing material 1905.

[0457] In addition, amorphous silicon is used for the semiconductor layer of the transistor in the pixel portion 4212. This allows for lower costs. Furthermore, it also makes it possible to manufacture large display panels. become.

[0458] In addition, a scanning line driving circuit, a potential supply line driving circuit, and a signal line driving circuit are arranged in the row and column directions of the pixels. For example, as shown in FIG. 26(a), a periphery formed on an IC chip may be provided. The side driver circuit 2601 includes a potential supply line driver circuit 4214 and a scanning line driver circuit 4215 as shown in FIG. The signal line driver circuit 4213 and the signal line driver circuit 4211 may be provided. (a) A substrate 2600, a pixel section 2602, an FPC 2604, an IC chip 2605, and an IC chip The cap 2606, the sealing substrate 2607, and the sealant 2608 are the same as those in the substrate 1910 and the screen shown in FIG. Base part 1902, FPC 1909, IC chip 1918, IC chip 1919, sealing substrate 1 904 and sealing material 1905.

[0459] FIG. 26(b) is a schematic diagram for explaining the connection of signal lines in the display device of FIG. 26(a). A substrate 2610, a peripheral driving circuit 2611, a pixel section 2612, an FPC 2613, and an FPC 261 The peripheral driver circuit 2611 receives external signals and power supply potential from the FPC 2613. The output from the peripheral driver circuit 2611 is input to the pixels of the pixel portion 2612. The signals are input to connected signal lines in the row and column directions.

[0460] Further, examples of light emitting elements applicable to the light emitting element 1918 are shown in FIGS. That is, the first, second, third, fourth and fifth embodiments are shown in FIG. The structure of a light-emitting element that can be applied to the pixel will be described with reference to FIGS.

[0461] The light-emitting device of FIG. 20(a) has an anode 2002 and a cathode made of a hole-injecting material on a substrate 2001. A hole injection layer 2003, a hole transport layer 2004 made of a hole transport material on top of that, and a light emitting layer 2005 2006, an electron transport layer made of an electron transport material; 2007, an electron injection layer made of an electron injection material; The light-emitting layer 2005 is made of one type of material. Although the light-emitting element may be formed from only the light-emitting material, it may also be formed from two or more types of materials. Furthermore, the structure of the element of the present invention is not limited to this structure.

[0462] In addition to the laminated structure in which each functional layer is laminated as shown in FIG. 20(a), High-efficiency elements that use triplet light-emitting materials that emit light from triplet excited states in the light-emitting layer, etc. There are many variations. The hole blocking layer controls the carrier recombination area. It can also be used for white light emitting devices obtained by dividing the light emitting area into two areas. It is.

[0463] The method for producing an element according to the present invention shown in FIG. 20(a) first includes forming a substrate having an anode 2002 (ITO). A hole injection material, a hole transport material, and a light emitting material are deposited in this order on the substrate 2001. Then, a material for forming the cathode 2008 is vapor-deposited.

[0464] Next, the materials for the hole injection material, hole transport material, electron transport material, electron injection material, and light emitting material are Suitable materials are listed below.

[0465] As hole injection materials, organic compounds such as porphyrin compounds and phthalocyanine ( (hereinafter referred to as "H2Pc") and copper phthalocyanine (hereinafter referred to as "CuPc") are effective. In addition, the ionization potential of the hole transport material is smaller than that of the hole transport material to be used. If the material has a hole transport function, it can also be used as a hole injection material. There are also materials in which the compound is chemically doped, such as polystyrene sulfonate (PSS). Polyethylenedioxythiophene (hereinafter referred to as "PEDOT") doped with PEDOT, Polyaniline, etc. Insulating polymer compounds are also effective in flattening the anode. Polyimide (hereinafter referred to as "PI") is often used. Inorganic compounds are also used. In addition to thin metal films such as gold and platinum, aluminum oxide (hereinafter referred to as "alumina") Ultra-thin films, etc.

[0466] The most widely used hole transport materials are aromatic amines (i.e., benzene The most widely used materials are 4, 4'-Bis(diphenylamino)-biphenyl (hereinafter referred to as "TAD") and its derivatives The compound 4,4'-bis[N-(3-methylphenyl)-N-phenyl-amino]-biphenyl phenyl (hereinafter referred to as "TPD"), 4,4'-bis[N-(1-naphthyl)-N-phenyl 4,4',4”-nyl-amino]-biphenyl (hereinafter referred to as “α-NPD”). Tris(N,N-diphenyl-amino)-triphenylamine (hereinafter referred to as "TDATA") ), 4,4',4”-tris[N-(3-methylphenyl)-N-phenyl- Starburst type such as [amino]-triphenylamine (hereinafter referred to as "MTDATA") Examples of the aromatic amine compounds include aromatic amine compounds.

[0467] Metal complexes are often used as electron transport materials, such as the previously mentioned Alq3, BAlq, and Tris(4-methyl-8-quinolinolato)aluminum (hereinafter referred to as "Almq"), (10-hydroxybenzo[h]quinolinato)beryllium (hereinafter referred to as "Bebq") Metal complexes having a quinoline skeleton or a benzoquinoline skeleton, such as Bis[2-(2-hydroxyphenyl)-benzoxazolato]zinc (hereinafter referred to as "Zn(B OX)2), bis[2-(2-hydroxyphenyl)-benzothiazolato]zinc (hereinafter referred to as "Zn(BTZ)2") and other oxazole and thiazole ligands. In addition to metal complexes, there are also 2-(4-biphenylyl)-5-(4 -tert-butylphenyl)-1,3,4-oxadiazole (hereinafter referred to as "PBD" OXD-7 and other oxadiazole derivatives, TAZ, 3-(4-tert-butyl Phenyl)-4-(4-ethylphenyl)-5-(4-biphenylyl)-20,4-tri Triazole derivatives such as azole (hereinafter referred to as "p-EtTAZ"), bathophenan Phenanthroline derivatives such as phenanthroline (hereinafter referred to as "BPhen") and BCP are It has transportability.

[0468] As the electron injection material, the above-mentioned electron transport material can be used. Metal halides such as calcium fluoride, lithium fluoride, and cesium fluoride, and lithium oxide Ultra-thin films of insulating materials such as alkali metal oxides, such as lithium, are often used. Li(acac) and 8-quinolinol Complexes of alkali metals such as lithium (hereinafter referred to as "Liq") are also effective.

[0469] The luminescent materials are the aforementioned Alq3, Almq, BeBq, BAlq, and Zn(BOX In addition to metal complexes such as Zn(BTZ)2 and Zn(BTZ)2, various fluorescent dyes are effective. Examples include the blue 4,4'-bis(2,2-diphenyl-vinyl)-biphenyl and the red-orange Color 4-(dicyanomethylene)-2-methyl-6-(p-dimethylaminostyryl)-4 H-pyran. Triplet luminescent materials are also possible, using platinum or iridium. The main focus is on complexes with central metals. iridium, bis(2-(4'-tolyl)pyridinato-N,C 2’ ) Acetylacetone Sodium iridium (hereinafter referred to as "acacIr(tpy)2"), 2,3,7,8,20 , 13,17,18-octaethyl-21H,23H porphyrin-platinum are known. There are.

[0470] By combining materials having each of the above functions, highly reliable light-emitting elements are manufactured. It is possible.

[0471] In the case of the pixels shown in FIG. 4, FIG. 7, or FIG. 10 in the first embodiment, as shown in FIG. 20(b), It is possible to use a light emitting device in which layers are formed in the reverse order to that of FIG. A cathode 2018 is disposed on the substrate 2011, an electron injection layer 2017 made of an electron injection material is disposed on the cathode 2018, and An electron transport layer 2016 made of an electron transport material, a light emitting layer 2015, and a hole transport layer made of a hole transport material. A transport layer 2014, a hole injection layer 2013 made of a hole injection material, and an anode 2012 are laminated. This is the element structure.

[0472] In addition, in order to extract light emitted from the light-emitting element, at least one of the anode and cathode must be transparent. Then, the TFT and the light emitting element are formed on the substrate, and the light is extracted from the surface opposite the substrate. The top emission is from the top surface, the bottom emission is from the surface on the substrate side, and the bottom emission is from the surface on the substrate side and the opposite side to the substrate. There are light-emitting elements with a double-sided emission structure that emits light from both sides. The present invention can also be applied to the above light-emitting element.

[0473] A light emitting element having a top emission structure will be described with reference to FIG.

[0474] A driving TFT 2101 is formed on a substrate 2100. A first electrode 2102 is formed in contact with the first electrode 2102, and a layer 2103 containing an organic compound and a second An elec...

Claims

1. A pixel includes a light emitting element, a driving transistor, a switching transistor, a capacitor, a first wiring, and a second wiring, the first wiring extends in a first direction in a plan view and has a function of transmitting a current flowing to the light-emitting element via the driving transistor; a gate of the driving transistor is electrically connected to one of a source and a drain of the switching transistor and one electrode of the capacitance element; the other electrode of the capacitance element is electrically connected to the second wiring; the second wiring extends in a second direction intersecting the first direction in a plan view and has a region that functions as the other electrode of the capacitance element; the second wiring has a first region having a first wiring width and a second region having a second wiring width larger than the first wiring width; the second region overlaps with a first conductive layer having a region that functions as a gate electrode of the driving transistor; a wiring width of the first wiring is larger than the first wiring width and smaller than the second wiring width; A display device, wherein, in a plan view, a channel formation region of the driving transistor has a region where a channel length direction intersects with a channel length direction of the switching transistor.

2. A pixel includes a light emitting element, a driving transistor, a switching transistor, a capacitor, a first wiring, and a second wiring, the first wiring extends in a first direction in a plan view and has a function of transmitting a current flowing to the light-emitting element via the driving transistor; a gate of the driving transistor is electrically connected to one of a source and a drain of the switching transistor and one electrode of the capacitance element; the other electrode of the capacitance element is electrically connected to the second wiring; the second wiring extends in a second direction intersecting the first direction in a plan view and has a region that functions as the other electrode of the capacitance element; the second wiring has a first region having a first wiring width and a second region having a second wiring width larger than the first wiring width; the second region overlaps with a first conductive layer having a region that functions as a gate electrode of the driving transistor; a wiring width of the first wiring is larger than the first wiring width and smaller than the second wiring width; a channel formation region of the driving transistor has a region where a channel length direction intersects with a channel length direction of the switching transistor in a plan view; The display device, wherein the switching transistor is a double-gate transistor.

3. A pixel includes a light emitting element, a driving transistor, a switching transistor, a capacitor, a first wiring, and a second wiring, the first wiring extends in a first direction in a plan view and has a function of transmitting a current flowing to the light-emitting element via the driving transistor; a gate of the driving transistor is electrically connected to one of a source and a drain of the switching transistor and one electrode of the capacitance element; the other electrode of the capacitance element is electrically connected to the second wiring; the second wiring extends in a second direction intersecting the first direction in a plan view and has a region that functions as the other electrode of the capacitance element; the second wiring has a first region having a first wiring width and a second region having a second wiring width larger than the first wiring width; the second region overlaps with a first conductive layer having a region that functions as a gate electrode of the driving transistor; a wiring width of the first wiring is larger than the first wiring width and smaller than the second wiring width; a channel formation region of the driving transistor has a region where a channel length direction intersects with a channel length direction of the switching transistor in a plan view; A display device, wherein a semiconductor layer having a channel formation region of the switching transistor has a region extending in the first direction in a plan view.

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