Loop device

Abstract

To provide a circuit device or the like capable of protecting a transistor provided between a power supply and a load from an over-voltage.SOLUTION: A circuit device 100 includes a regulator 110, a charge pump circuit 120, an over-voltage detection circuit 130 and a control circuit 150. The regulator 110 regulates a power supply voltage VCC. The charge pump circuit 120 outputs a gate control voltage DRV to a gate node of an N-type transistor 11 provided between a power supply node NVCC and a load 300 based on a regulated voltage VRG. The over-voltage detection circuit 130 detects an over-voltage of the regulated voltage VRG. The control circuit 150 controls the charge pump circuit 120 to stop when the over-voltage detection circuit 130 detects the over-voltage.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a circuit device and the like. [Background technology]

[0002] Patent Document 1 discloses a power supply circuit having a function of protecting a load from overvoltage. In Patent Document 1, a power transistor is provided between the power supply and the load, and a control circuit controls the gate voltage of the power transistor to control the supply of power supply voltage to the load. The control circuit monitors the input voltage, and when it detects that the input voltage is an overvoltage, it controls the gate voltage of the power transistor so that the voltage input to the load is constant, thereby protecting the load from overvoltage and allowing the operation of the load to continue without interruption. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] U.S. Pat. No. 9,564,796 Summary of the Invention [Problem to be solved by the invention]

[0004] In a configuration in which the gate voltage of a transistor provided between a power supply and a load is controlled, if an overvoltage is applied to the transistor, the transistor may break down. The above-mentioned Patent Document 1 discloses a function for protecting the load from an overvoltage, but does not disclose protection of the power transistor. [Means for solving the problem]

[0005] One aspect of the present disclosure relates to a circuit device that controls an N-type transistor provided between a power supply node and a load, the circuit device including: a regulator that regulates a power supply voltage from the power supply node to output a regulated voltage; a charge pump circuit that performs a charge pump operation based on the regulated voltage to output a gate control voltage to a gate node of the N-type transistor; an overvoltage detection circuit that detects an overvoltage of the regulated voltage and outputs an overvoltage detection signal that is the detection result; and a control circuit that controls the charge pump circuit to stop based on the overvoltage detection signal when the overvoltage is detected by the overvoltage detection circuit. [Brief description of the drawings]

[0006] [Figure 1] 1 shows configuration examples of a circuit device and an electronic device. [Diagram 2] 1 shows a first detailed configuration example of a drive circuit and a gate control circuit. [Diagram 3] FIG. 4 is a waveform diagram showing the operation of a charge pump circuit. [Figure 4] FIG. 4 is a waveform diagram illustrating the operation of the circuit device. [Diagram 5] 4 shows a second detailed configuration example of the drive circuit and the gate control circuit. [Figure 6] A detailed example of an overvoltage detection circuit. [Figure 7] A detailed example of regulator configuration. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0007] A preferred embodiment of the present disclosure will be described in detail below. Note that the embodiment described below does not unduly limit the contents described in the claims, and all of the configurations described in the embodiment are not necessarily essential configurations.

[0008] 1. Circuit devices and electronic devices 1 shows an example of the configuration of a circuit device 100 and an electronic device 10 in this embodiment. The electronic device 10 includes an N-type transistor 11, a load 300, and the circuit device 100. The electronic device 10 may be, for example, a printing device, a video projection device, a wearable device, an information processing device, a display device, a television receiver, or a portable information terminal, but is not limited to these, and may be various devices that use a DC power supply voltage VCC.

[0009] N-type transistor 11 is provided between power supply node NVCC and load 300. Specifically, the drain of N-type transistor 11 is connected to power supply node NVCC, and the source is connected to node NLOAD of load 300. N-type transistor 11 is a so-called power transistor, which supplies power supply voltage VCC to load 300 when it is on, and cuts off the supply of power supply voltage VCC to load 300 when it is off.

[0010] A power supply voltage VCC is supplied to the power supply node NVCC from a DC power supply. The DC power supply is, for example, an ACDC converter, a DCDC converter, or a battery. Although not shown in FIG. 1, these DC power supplies may be included in the electronic device 10.

[0011] The load 300 is a circuit that operates on a power supply voltage VCC supplied to a node NLOAD via an N-type transistor 11. The node NLOAD is a power supply node of the load 300. The load 300 is, for example, a power supply stabilizing capacitor provided between the node NLOAD and a ground voltage GND, a processing device that executes processing in the electronic device 10, or a motor driver that drives a motor. Note that the load 300 is not limited to these, and may be a circuit for realizing various functions in the electronic device 10.

[0012] The circuit device 100 controls the supply of a power supply voltage VCC to a load 300 by outputting a gate control voltage DRV to the gate of an N-type transistor 11. The circuit device 100 includes a regulator 110, a charge pump circuit 120, an overvoltage detection circuit 130, a control circuit 150, terminals TVCC, TDRV, TCHP1, TCHP2, and a source voltage input terminal TVCO. The circuit device 100 is, for example, an integrated circuit device in which a plurality of circuit elements are integrated on a semiconductor substrate. Each terminal is, for example, a pad of the integrated circuit device, or a terminal of a package that accommodates the integrated circuit device.

[0013] The regulator 110 outputs a regulated voltage VRG by regulating a power supply voltage VCC from a power supply node NVCC. A terminal TVCC is connected to the power supply node NVCC, and the power supply voltage VCC is supplied to the regulator 110 via the terminal TVCC. The regulator 110 is a step-down regulator that outputs a regulated voltage VRG that is lower than the power supply voltage VCC. The regulator 110 is, for example, a linear regulator, but is not limited to this and may be various types of DC-DC converters.

[0014] The charge pump circuit 120 performs a charge pump operation based on the regulated voltage VRG, thereby outputting a gate control voltage DRV to the gate of the N-type transistor 11. One end of the boost capacitor 12 is connected to the terminal TCHP1, and the other end of the boost capacitor 12 is connected to the terminal TCHP2. The boost capacitor 12 is a so-called flying capacitor, and the charge pump circuit 120 performs a charge pump operation using the boost capacitor 12. The terminal TDRV is connected to the gate of the N-type transistor 11, and the charge pump circuit 120 outputs the gate control voltage DRV to the gate of the N-type transistor via the terminal TDRV. The charge pump circuit 120 generates a gate control voltage DRV higher than the source voltage VCO of the N-type transistor 11 using the regulated voltage VRG. As a result, the N-type transistor 11 is turned on when the charge pump circuit 120 is operating, and the power supply voltage VCC is supplied to the load 300 via the N-type transistor 11.

[0015] The overvoltage detection circuit 130 detects an overvoltage of the regulated voltage VRG and outputs an overvoltage detection signal DET that is the detection result. The overvoltage detection circuit 130 determines whether the regulated voltage VRG is higher than a predetermined detection voltage, and outputs an active overvoltage detection signal DET when it is determined that the regulated voltage VRG is higher than the detection voltage. Here, "active" is a logical level that indicates an overvoltage.

[0016] The control circuit 150 performs control to stop the charge pump circuit 120 based on the overvoltage detection signal DET when an overvoltage is detected by the overvoltage detection circuit 130. When the overvoltage detection signal DET is active, the control circuit 150 outputs an enable signal CPEN indicating disable to the charge pump circuit 120, thereby stopping the charge pump operation.

[0017] In the above embodiment, the gate control voltage DRV is output based on the regulated voltage VRG, so that when the regulated voltage VRG becomes an overvoltage, an overvoltage may be applied to the gate of the N-type transistor 11.

[0018] In this regard, according to this embodiment, when the overvoltage detection circuit 130 detects an overvoltage of the regulated voltage VRG, the control circuit 150 stops the charge pump circuit 120, so that the N-type transistor 11 is protected from the overvoltage. If the N-type transistor 11 breaks down due to an overvoltage, there is a risk that the power supply to the load 300 cannot be appropriately controlled, but according to this embodiment, it is possible to prevent the N-type transistor 11 from breaking down due to an overvoltage.

[0019] More specifically, the charge pump circuit 120 outputs the gate control voltage DRV by boosting based on the regulated voltage VRG with reference to the source voltage VCO of the N-type transistor 11. The circuit device 100 includes a source voltage input terminal TVCO to which the source voltage VCO is input. The charge pump circuit 120 boosts based on the source voltage VCO input to the source voltage input terminal TVCO.

[0020] Since the boosted voltage based on the regulated voltage VRG becomes the gate-source voltage of the N-type transistor 11, when the regulated voltage VRG becomes an overvoltage, there is a risk that an overvoltage will be applied between the gate and source of the N-type transistor 11. According to this embodiment, when the overvoltage detection circuit 130 detects an overvoltage of the regulated voltage VRG, the control circuit 150 stops the charge pump circuit 120, so that the N-type transistor 11 is protected from the overvoltage.

[0021] In this embodiment, the source voltage of the N-type transistor 11 is defined as VCO, the regulated voltage as VRG, the maximum rating of the gate-source voltage of the N-type transistor 11 as VgsMax, and the detection voltage for overvoltage as Vdet. At this time, the gate control voltage is DRV = VCO + VRG. The overvoltage detection circuit 130 detects an overvoltage by comparing the detection voltage Vdet that satisfies VRG < Vdet < VgsMax with the regulated voltage VRG. Note that VRG in "VRG < Vdet < VgsMax" means the regulated voltage VRG when the regulator 110 is normal.

[0022] Since DRV - VCO = VRG is applied between the gate and source of the N-type transistor 11, the comparison between the regulated voltage VRG and the detection voltage Vdet corresponds to the comparison between the gate-source voltage and the detection voltage Vdet. According to this embodiment, by satisfying VRG < Vdet < VgsMax, an overvoltage of the gate-source voltage can be detected by the detection voltage Vdet that does not exceed the maximum rating VgsMax of the gate-source voltage.

[0023] Also, in this embodiment, when the power supply voltage is VCC, the detection voltage Vdet satisfies VRG < Vdet < VgsMax < VCC.

[0024] Since the regulated voltage VRG is lower than the power supply voltage VCC, for example, when an abnormality such as a short circuit occurs between the power supply node and the output node of the regulator 110, there is a possibility that a voltage equal to the power supply voltage VCC at most is output to the output node of the regulator 110. As described above, since the regulated voltage VRG becomes the gate-source voltage of the N-type transistor 11, there is a possibility that the power supply voltage VCC at most is applied between the gate and source. However, since VgsMax < VCC, there is a possibility that the N-type transistor 11 may malfunction.

[0025] In this regard, according to this embodiment, since an overvoltage of the gate-source voltage is detected by the detection voltage Vdet that does not exceed the maximum rating VgsMax of the gate-source voltage, the N-type transistor 11 can be protected from overvoltage.

[0026] In this embodiment, the charge pump circuit 120 includes a drive circuit 160 and a gate control circuit 170. An enable signal CPEN for the charge pump circuit 120 is input to the drive circuit 160 from the control circuit 150. When the enable signal CPEN indicates enable, the drive circuit 160 outputs a drive signal CHP1 to one end of the boost capacitor 12 based on the regulated voltage VRG. A signal CHP2 from the other end of the boost capacitor 12 is input to the gate control circuit 170. The gate control circuit 170 outputs a gate control voltage DRV based on the signal CHP2 and the source voltage VCO of the N-type transistor 11. When an overvoltage is detected by the overvoltage detection circuit 130, the control circuit 150 stops the drive circuit 160 by outputting an enable signal CPEN indicating disable.

[0027] According to this embodiment, when the enable signal CPEN indicates enable, the drive circuit 160 outputs the drive signal CHP1, and the gate control circuit 170 outputs the gate control voltage DRV. When the enable signal CPEN indicates disable, the output of the drive signal CHP1 is stopped, and the output of the gate control voltage DRV is stopped. As a result, when an overvoltage is detected, the control circuit 150 outputs the enable signal CPEN indicating disable, and the charge pump circuit 120 can be stopped.

[0028] 2. Detailed configuration example 2 shows a first detailed configuration example of the drive circuit 160 and the gate control circuit 170. The drive circuit 160 includes a first transistor TRA1, a second transistor TRA2, and a charge pump control circuit 162. The gate control circuit 170 includes a first diode DI1, a second diode DI2, a resistor RB, and a switch circuit TRB.

[0029] The first transistor TRA1 is provided between the output node NVRG of the regulator 110 and one end of the boost capacitor 12. Specifically, the first transistor TRA1 is a P-type transistor, and has a source connected to the output node NVRG of the regulator 110 and a drain connected to the terminal TCHP1.

[0030] The second transistor TRA2 is provided between one end of the boost capacitor 12 and the ground node. Specifically, the second transistor TRA2 is an N-type transistor, with a source connected to the ground node and a drain connected to the terminal TCHP1.

[0031] The first diode DI1 is provided between the other end of the boost capacitor 12 and the gate of the N-type transistor 11. The forward direction of the first diode DI1 is the direction from the other end of the boost capacitor 12 to the gate. That is, the anode of the first diode DI1 is connected to the terminal TCHP2, and the cathode is connected to the terminal TDRV. The first diode DI1 is, for example, a Schottky barrier diode.

[0032] The second diode DI2 is provided between the source of the N-type transistor 11 and the other end of the boost capacitor 12. The forward direction of the second diode DI2 is the direction from the source of the N-type transistor 11 to the other end of the boost capacitor 12. That is, the anode of the second diode DI2 is connected to the source voltage input terminal TVCO, and the cathode is connected to the terminal TCHP2. The second diode DI2 is, for example, a Schottky barrier diode.

[0033] The resistor RB is provided between the gate and source of the N-type transistor 11. Specifically, one end of the resistor RB is connected to the cathode of the first diode DI1 and the terminal TDRV, and the other end is connected to the anode of the second diode DI2 and the source voltage input terminal TVCO.

[0034] The switch circuit TRB is provided between the gate and source of the N-type transistor 11. Specifically, the switch circuit TRB is a P-type transistor. The source of the P-type transistor is connected to the cathode of the first diode DI1 and the terminal TDRV, and the drain is connected to the anode of the second diode DI2 and the source voltage input terminal TVCO. A signal for controlling the switch circuit TRB to be on or off is input to the gate from the control circuit 150.

[0035] The control circuit 150 turns on the switch circuit TRB to fix the N-type transistor 11 to the off state. For example, when the circuit device 100 is in the shutdown state, the control circuit 150 turns on the switch circuit TRB to reliably cut off the power supply to the load 300.

[0036] 3 is a waveform diagram showing the operation of the charge pump circuit 120. In the following, the forward voltages of the first diode DI1 and the second diode DI2 will be ignored.

[0037] When the enable signal CPEN indicates enable, the charge pump control circuit 162 alternately turns on the first transistor TRA1 and the second transistor TRA2. When the first transistor TRA1 is off and the second transistor TRA2 is on, the drive signal CHP1 is 0V. At this time, the signal CHP2 has the same voltage as the source voltage VCO due to the second diode DI2. When the first transistor TRA1 goes from off to on and the second transistor TRA2 goes from on to off, the drive signal CHP1 rises from 0V to the regulated voltage VRG. As a result, the signal CHP2 becomes a voltage higher than the source voltage VCO by the regulated voltage VRG.

[0038] This voltage VCO+VRG is the gate control voltage DRV, and is output via the first diode DI1 to the gate of the N-type transistor 11. The gate of the N-type transistor 11 is charged by the charge supplied by the drive circuit 160, and in the steady state, the gate control voltage DRV is maintained at VCO+VRG.

[0039] When the enable signal CPEN indicates disable, the charge pump control circuit 162 does not drive the first transistor TRA1 and the second transistor TRA2. This stops the charge pump circuit 120. For example, the charge pump control circuit 162 keeps the first transistor TRA1 on and the second transistor TRA2 off. After the charge pump circuit 120 stops, the gate-source voltage of the N-type transistor 11 becomes 0V due to the resistor RB.

[0040] Fig. 4 is a waveform diagram for explaining the operation of the circuit device 100 when the first detailed configuration example is applied to Fig. 1. Note that the drive signals CHP1 and CHP2 are square waves when the charge pump circuit 120 is enabled, but only the high level of the square waves is shown here.

[0041] Assume that at time t0, the regulated voltage VRG becomes an overvoltage of the voltage VK. The voltage VK is higher than the detection voltage Vdet of the overvoltage detection circuit 130. At time t0, when the regulated voltage VRG becomes higher than the detection voltage Vdet, the overvoltage detection circuit 130 changes the overvoltage detection signal DET from high level to low level. Here, the low level indicates active.

[0042] The control circuit 150 sets the enable signal CPEN from high to low at time t1 after the overvoltage detection signal DET changes from high to low by providing a delay time t1-t0 by filter processing or the like. Here, a high level indicates enable, and a low level indicates disable. By providing the delay time t1-t0, malfunctions due to noise or the like are prevented.

[0043] In the period from time t0 to t1, the high level of the drive signal CHP1 is voltage VK. The high level of the signal CHP2 gradually rises in response to the charge supplied from the drive circuit 160 via the boost capacitor 12, and approaches VCO+VK. As a result, the gate control voltage DRV output to the gate of the N-type transistor 11 gradually rises and approaches VCO+VK, so that the gate-source voltage of the N-type transistor 11 approaches VK. At this time, for example, a delay time t1-t0 is set so that the gate-source voltage does not exceed the maximum rated VgsMax.

[0044] 5 is a second detailed configuration example of the drive circuit 160 and the gate control circuit 170. In the second detailed configuration example, the gate control circuit 170 includes transistors TRE1 and TRE2, a rectification control circuit 172, a resistor RB, and a switch circuit TRB. Note that the same reference numerals are used to denote the components described in the first detailed configuration example, and descriptions of those components will be omitted as appropriate.

[0045] The transistors TRE1 and TRE2 are P-type transistors. The source of the transistor TRE1 is connected to the terminal TDRV, and the drain is connected to the terminal TCHP2. The source of the transistor TRE2 is connected to the terminal TCHP2 and the drain of the transistor TRE1, and the drain is connected to the source voltage input terminal TVCO.

[0046] When the enable signal CPEN indicates enable, the rectification control circuit 172 controls the rectification by the transistors TRE1 and TRE2 by switching the transistors TRE1 and TRE2. The rectification control circuit 172 switches the transistors TRE1 and TRE2 according to the switching states of the first transistor TRA1 and the second transistor TRA2 of the drive circuit 160. Specifically, when the first transistor TRA1 is off and the second transistor TRA2 is on, the rectification control circuit 172 turns off the transistor TRE1 and turns on the transistor TRE2. When the first transistor TRA1 is on and the second transistor TRA2 is off, the rectification control circuit 172 turns on the transistor TRE1 and turns off the transistor TRE2. This realizes a charge pump operation with a signal waveform similar to that of FIG. 3.

[0047] 6 shows an example of a detailed configuration of the overvoltage detection circuit 130. The overvoltage detection circuit 130 includes a detection circuit 131 and an output circuit 132.

[0048] The detection circuit 131 detects whether the regulated voltage VRG exceeds a detection voltage. The detection circuit 131 includes Zener diodes DC1 to DC3 and resistors RC1 and RC2. The Zener diodes DC1 to DC3 are connected in series between the output node NVRG of the regulator 110 and a node NC1. The forward direction of the Zener diodes DC1 to DC3 is from the node NC1 to the output node NVRG. The resistors RC1 and RC2 are connected in series between the node NC1 and a ground node. Specifically, one end of the resistor RC1 is connected to the node NC1, and the other end is connected to a node NDVQ. One end of the resistor RC2 is connected to the node NDVQ, and the other end is connected to the ground node. The output signal DVQ of the detection circuit 131 is output to the node NDVQ.

[0049] The output circuit 132 converts the output signal DVQ of the detection circuit 131 into a signal level of the internal power supply voltage VDA of the circuit device 100 and outputs it as an overvoltage detection signal DET. The internal power supply voltage VDA is a power supply voltage supplied to circuits inside the circuit device 100, such as the control circuit 150, and is a voltage lower than the regulated voltage VRG. For example, the internal power supply voltage VDA is supplied from a regulator (not shown) or the like provided in the circuit device 100. The output circuit 132 includes a resistor RC3 and a transistor TRC. One end of the resistor RC3 is connected to the internal power supply node NVDA, and the other end is connected to the output node NDET of the overvoltage detection circuit 130. The transistor TRC is an N-type transistor. The drain of the transistor TRC is connected to the output node NDET of the overvoltage detection circuit 130, the source is connected to the ground node, and the gate is connected to the node NDVQ.

[0050] The Zener voltage of each Zener diode is Vtz. When the regulated voltage VRG is lower than 3×Vtz, no current flows through the Zener diodes DC1 to DC3, and the output signal DVQ of the detection circuit 131 is the ground voltage GND. Since the transistor TRC of the output circuit 132 is off, the overvoltage detection signal DET is the internal power supply voltage VDA. When the regulated voltage VRG is higher than 3×Vtz, the Zener diodes DC1 to DC3 break down and current flows, and the voltage of the node NC1 is VRG-3×Vtz. The resistors RC1 and RC2 divide the voltage VRG-3×Vtz, and the divided voltage is output as the output signal DVQ. This divided voltage is higher than the threshold voltage of the transistor TRC. Since the transistor TRC is on, the overvoltage detection signal DET is the ground voltage GND. In this configuration example, the detection voltage of the overvoltage is 3×Vtz.

[0051] In the above embodiment, the overvoltage detection circuit 130 includes Zener diodes DC1 to DC3. The Zener diodes DC1 to DC3 are provided between a power supply node NVCC and a ground node, and the forward direction is from the ground node to the power supply node NVCC. The overvoltage detection circuit 130 outputs an overvoltage detection signal DET based on the voltages on the anode sides of the Zener diodes DC1 to DC3.

[0052] According to this embodiment, by using the Zener diodes DC1 to DC3, it is possible to detect whether the regulated voltage VRG exceeds the Zener voltage of the Zener diodes DC1 to DC3. That is, the detection voltage of the overvoltage is set by the Zener voltage. When the regulated voltage VRG exceeds the Zener voltage of the Zener diodes DC1 to DC3, the voltage on the anode side of the Zener diodes DC1 to DC3 changes, and an overvoltage detection signal DET is output based on that voltage, thereby outputting an overvoltage detection signal DET indicating whether an overvoltage occurs.

[0053] 7 shows an example of a detailed configuration of the regulator 110. The regulator 110 includes resistors RD1 to RD4, transistors TRD1 to TRD3, and Zener diodes DD1 and DD2.

[0054] One end of resistor RD1 is connected to a power supply node NVCC, and the other end is connected to one end of resistor RD2 and the gate of transistor TRD2. The other end of resistor RD2 is connected to the drain of transistor TRD1. Transistor TRD1 is an N-type transistor. The source of transistor TRD1 is connected to the ground node, and an enable signal RGEN for regulator 110 is input from control circuit 150 to the gate of transistor TRD1.

[0055] The transistor TRD2 is a P-type transistor. The source of the transistor TRD2 is connected to the power supply node NVCC, and the drain is connected to one end of the resistor RD3. The other end of the resistor RD3 is connected to the cathode of the Zener diode DD1 and the gate of the transistor TRD3. The anode of the Zener diode DD1 is connected to the cathode of the Zener diode DD2, and the anode is connected to the ground node.

[0056] The transistor TRD3 is an N-type transistor. The drain of the transistor TRD3 is connected to the power supply node NVCC, and the source of the transistor TRD3 is connected to one end of the resistor RD4 and the output node NVRG of the regulator 110. The other end of the resistor RD4 is connected to the ground node.

[0057] When the enable signal RGEN is at a high level, the regulator 110 is enabled. At this time, the transistor TRD3 is on, and the voltage divided by the resistors RD1 and RD2 is input to the gate of the transistor TRD2. The transistor TRD2 passes a constant current through the Zener diodes DD1 and DD2, and the voltage of the cathode of the Zener diode DD1 becomes 2×Vtz, and this voltage is input to the gate of the transistor TRD3. If the threshold voltage of the transistor TRD3 is Vth_trd3, the voltage 2×Vtz-Vth_trd3 is output as the regulated voltage VRG.

[0058] The circuit device of the present embodiment described above controls an N-type transistor provided between a power supply node and a load. The circuit device includes a regulator, a charge pump circuit, an overvoltage detection circuit, and a control circuit. The regulator regulates a power supply voltage from the power supply node to output a regulated voltage. The charge pump circuit performs a charge pump operation based on the regulated voltage to output a gate control voltage to a gate node of the N-type transistor. The overvoltage detection circuit detects an overvoltage of the regulated voltage, and outputs an overvoltage detection signal that is the detection result. When an overvoltage is detected by the overvoltage detection circuit, the control circuit performs control to stop the charge pump circuit based on the overvoltage detection signal.

[0059] Since the gate control voltage is output based on the regulated voltage, when the regulated voltage becomes an overvoltage, there is a risk that an overvoltage will be applied to the gate node of the N-type transistor. According to this embodiment, when the overvoltage detection circuit detects an overvoltage of the regulated voltage, the control circuit stops the charge pump circuit, so that the N-type transistor is protected from the overvoltage.

[0060] In this embodiment, the charge pump circuit may output the gate control voltage by boosting the voltage based on the regulated voltage with the source voltage of the N-type transistor as a reference.

[0061] Since the boosted voltage based on the regulated voltage becomes the gate-source voltage of the N-type transistor, when the regulated voltage becomes an overvoltage, there is a risk that an overvoltage will be applied between the gate and source of the N-type transistor. According to this embodiment, when the overvoltage detection circuit detects an overvoltage of the regulated voltage, the control circuit stops the charge pump circuit, so that the N-type transistor is protected from the overvoltage.

[0062] In the present embodiment, the circuit device may include a source voltage input terminal to which a source voltage is input. The charge pump circuit may perform boosting based on the source voltage input to the source voltage input terminal.

[0063] According to this embodiment, the source voltage of the N-type transistor can be input to the charge pump circuit via the source voltage input terminal. The charge pump circuit can boost based on the regulated voltage with this source voltage as a reference.

[0064] Also, in this embodiment, let the source voltage of the N-type transistor be VCO, the regulated voltage be VRG, the maximum rating of the gate-source voltage of the N-type transistor be VgsMax, and the detection voltage of the overvoltage be Vdet. At this time, the gate control voltage may be DRV = VCO + VRG. The overvoltage detection circuit may detect the overvoltage by comparing the detection voltage Vdet that satisfies VRG < Vdet < VgsMax with the regulated voltage VRG.

[0065] Since DRV - VCO = VRG is applied between the gate and source of the N-type transistor, the comparison of the regulated voltage and the detection voltage corresponds to the comparison of the gate-source voltage and the detection voltage. According to this embodiment, by satisfying VRG < Vdet < VgsMax, the overvoltage of the gate-source voltage can be detected by the detection voltage Vdet that does not exceed the maximum rating VgsMax of the gate-source voltage.

[0066] Also, in this embodiment, let the power supply voltage be VCC. At this time, the detection voltage Vdet may satisfy VRG < Vdet < VgsMax < VCC.

[0067] Since the regulated voltage VRG is lower than the power supply voltage VCC, there is a possibility that a voltage up to the same as the power supply voltage VCC is output to the output node of the regulator. Since the regulated voltage VRG becomes the gate-source voltage of the N-type transistor, there is a possibility that a voltage up to the power supply voltage VCC is applied between the gate and source. However, since VgsMax < VCC, there is a possibility that the N-type transistor malfunctions. According to this embodiment, since the overvoltage of the gate-source voltage is detected by the detection voltage Vdet that does not exceed the maximum rating VgsMax of the gate-source voltage, the N-type transistor can be protected from overvoltage.

[0068] In the present embodiment, the overvoltage detection circuit includes a Zener diode. The Zener diode may be provided between a power supply node and a ground node. The forward direction of the Zener diode may be from the ground node to the power supply node. The overvoltage detection circuit may output an overvoltage detection signal based on a voltage on the anode side of the Zener diode.

[0069] According to this embodiment, by using a Zener diode, it is possible to detect whether the regulated voltage exceeds the Zener voltage of the Zener diode. That is, the detection voltage of the overvoltage is set by the Zener voltage. When the regulated voltage exceeds the Zener voltage of the Zener diode, the voltage on the anode side of the Zener diode changes, and an overvoltage detection signal is output based on that voltage, thereby outputting an overvoltage detection signal indicating whether an overvoltage occurs.

[0070] In this embodiment, the charge pump circuit may include a drive circuit and a gate control circuit. The drive circuit may receive an enable signal for the charge pump circuit from the control circuit, and when the enable signal indicates enable, output a drive signal to one end of the boost capacitor based on the regulated voltage. The gate control circuit may receive a signal from the other end of the boost capacitor, and output a gate control voltage based on the signal and the source voltage of the N-type transistor. When an overvoltage is detected by the overvoltage detection circuit, the control circuit may stop the drive circuit by outputting an enable signal indicating disable.

[0071] According to this embodiment, when the enable signal indicates enable, the drive circuit outputs a drive signal, causing the gate control circuit to output a gate control voltage. When the enable signal indicates disable, the output of the drive signal is stopped, causing the output of the gate control voltage to be stopped. As a result, when an overvoltage is detected, the control circuit outputs an enable signal indicating disable, thereby stopping the charge pump circuit.

[0072] In this embodiment, the drive circuit may include a first transistor provided between the output node of the regulator and one end of the boost capacitor, and a second transistor provided between one end of the boost capacitor and a ground node. The gate control circuit may include a first diode provided between the other end of the boost capacitor and a gate node of the N-type transistor, and a second diode provided between a source node of the N-type transistor and the other end of the boost capacitor. The forward direction of the first diode may be from the other end of the boost capacitor to the gate node. The forward direction of the second diode may be from the source node of the N-type transistor to the other end of the boost capacitor.

[0073] According to this embodiment, when the first transistor is off and the second diode is on, the anode of the first diode becomes the source voltage of the N-type transistor, and when the first transistor is on and the second diode is off, the anode of the first diode becomes a voltage obtained by adding the regulated voltage to the source voltage of the N-type transistor. This voltage is output to the gate node of the N-type transistor via the first diode. As a result, a voltage equal to the regulated voltage is applied between the gate and source of the N-type transistor. In this embodiment, when the regulated voltage becomes an overvoltage, the charge pump circuit is stopped, thereby protecting the gate and source of the N-type transistor from the overvoltage.

[0074] In this embodiment, the gate control circuit may also include a resistor provided between the gate node and the source node of the N-type transistor.

[0075] According to this embodiment, after the charge pump circuit stops, the gate node and source node of the N-type transistor are made to have the same potential via the resistor, so that the N-type transistor is turned off.

[0076] In this embodiment, the gate control circuit may include a switch circuit that is provided between the gate node and the source node of the N-type transistor and is turned on when the N-type transistor is turned off.

[0077] According to this embodiment, the N-type transistor can be fixed to the off state by turning on the switch circuit. For example, when the circuit device is in the shutdown state, the switch circuit TRB is on, so that the power supply to the load can be reliably cut off.

[0078] Although the present embodiment has been described in detail as above, it will be easily understood by those skilled in the art that many modifications are possible without substantially departing from the novel matters and effects of the present disclosure. Therefore, all such modifications are intended to be included in the scope of the present disclosure. For example, a term described at least once in the specification or drawings together with a different term having a broader meaning or synonymy can be replaced with that different term anywhere in the specification or drawings. All combinations of the present embodiment and modifications are also included in the scope of the present disclosure. Furthermore, the configurations and operations of the regulator, overvoltage detection circuit, charge pump circuit, control circuit, load, circuit device, electronic device, etc. are not limited to those described in the present embodiment, and various modifications are possible. [Explanation of symbols]

[0079] 10...electronic device, 11...N-type transistor, 12...boosting capacitor, 100...circuit device, 110...regulator, 120...charge pump circuit, 130...overvoltage detection circuit, 131...detection circuit, 132...output circuit, 150...control circuit, 160...drive circuit, 162...charge pump control circuit, 170...gate control circuit, 172...rectification control circuit, 300...load, CHP1...drive signal, CHP2...signal, CPEN...enable signal, DC1 to DC3...Zener diodes, DET...overvoltage detection signal, DI1...first diode, DI2...second diode, DRV...gate control voltage, NVCC...power supply node, TRA1...first transistor, TRA2...second transistor, TRB...switch circuit, TVCO...source voltage input terminal, VCC...power supply voltage, VCO...source voltage, VRG...regulated voltage, Vdet...detection voltage

Claims

1. A circuit device for controlling an N-type transistor provided between a power supply node and a load, a regulator that outputs a regulated voltage by regulating a power supply voltage from the power supply node; a charge pump circuit that performs a charge pump operation based on the regulated voltage to output a gate control voltage to a gate node of the N-type transistor; an overvoltage detection circuit that detects an overvoltage of the regulated voltage and outputs an overvoltage detection signal that is the detection result; a control circuit that performs control to stop the charge pump circuit based on the overvoltage detection signal when the overvoltage is detected by the overvoltage detection circuit; A circuit device comprising:

2. 2. The circuit device according to claim 1, The charge pump circuit includes: A circuit device comprising: a gate control voltage output section that outputs the gate control voltage by boosting the regulated voltage with respect to a source voltage of the N-type transistor.

3. 3. The circuit device according to claim 2, a source voltage input terminal to which the source voltage is input; The charge pump circuit includes: A circuit device, characterized in that the boosting is performed based on the source voltage input to the source voltage input terminal.

4. 4. The circuit device according to claim 2, When the source voltage of the N-type transistor is VCO, the regulated voltage is VRG, the maximum rating of the gate-source voltage of the N-type transistor is VgsMax, and the detection voltage of the overvoltage is Vdet, The gate control voltage is DRV=VCO+VRG, The overvoltage detection circuit includes: A circuit device comprising: a detection voltage Vdet that satisfies VRG<Vdet<VgsMax; and a regulated voltage VRG, thereby detecting the overvoltage.

5. 5. The circuit device according to claim 4, When the power supply voltage is VCC, The circuit device is characterized in that the detection voltage Vdet satisfies VRG<Vdet<VgsMax<VCC.

6. In claim 4 or 5, The overvoltage detection circuit includes: a Zener diode provided between the power supply node and a ground node, the Zener diode having a forward direction from the ground node to the power supply node; a first input terminal for inputting a voltage to be applied to an anode side of the Zener diode, the first input terminal for inputting a voltage to be applied to an anode side of the Zener diode, and a second input terminal for inputting a voltage to be applied to an anode side of the Zener diode.

7. 7. The circuit device according to claim 2, The charge pump circuit includes: a drive circuit that receives an enable signal of the charge pump circuit from the control circuit, and outputs a drive signal to one end of a boost capacitor based on the regulated voltage when the enable signal indicates an enable; a gate control circuit which receives a signal from the other end of the boost capacitor and outputs the gate control voltage based on the signal and the source voltage of the N-type transistor; Including, The control circuit includes: a circuit device which stops the drive circuit by outputting the enable signal indicating disable when the overvoltage is detected by the overvoltage detection circuit;

8. 8. The circuit device according to claim 7, The drive circuit includes: a first transistor provided between an output node of the regulator and the one end of the boost capacitor; a second transistor provided between the one end of the boost capacitor and a ground node; Including, The gate control circuit includes: a first diode provided between the other end of the boost capacitor and the gate node of the N-type transistor, the first diode having a forward direction from the other end of the boost capacitor to the gate node; a second diode provided between the source node of the N-type transistor and the other end of the boost capacitor, the second diode having a forward direction from the source node of the N-type transistor to the other end of the boost capacitor; A circuit device comprising:

9. 9. The circuit device according to claim 8, The gate control circuit includes: A circuit device comprising: a resistor provided between the gate node and the source node of the N-type transistor.

10. 10. The circuit arrangement according to claim 8, The gate control circuit includes: a switch circuit provided between the gate node and the source node of the N-type transistor, the switch circuit being turned on when the N-type transistor is turned off.

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