Semiconductor device and method for producing the same

Abstract

The present invention relates to a semiconductor device comprising a wafer (1) having a monolithic semiconductor substrate, in particular a silicon substrate (1), and at least one integrated electronic component (3) extending in and / or on the semiconductor substrate (2), the wafer having a front end (5) and an upper back end (6) located thereon, the front end including the integrated electronic component or at least one of the integrated electronic components, and a photonic platform (8) fabricated on a side (9) of the wafer facing away from the front end, the photonic platform including at least one waveguide (12) and at least one electro-optical element (15), in particular at least one photodetector and / or at least one electro-optical modulator, the electro-optical element or at least one of the electro-optical elements of the photonic platform being connected to the integrated electronic component or at least one of the integrated electronic components of the wafer.

Description

[Technical field]

[0001] The present invention relates to a semiconductor device and a method for manufacturing the same.Further, the present invention relates to a semiconductor device and a method for manufacturing the same. [Background technology]

[0002] Data exchange within chips, and especially between chips, is increasingly approaching capacity limits. The number of possible connections is limited by the available chip area and by technological factors affecting manufacturability. Furthermore, the bandwidth of the electrical connections is limited by electrical losses, which increase exponentially with frequency. In various application areas, the need for high-bandwidth I / O interfaces exceeds current capabilities. Examples of applications are the so-called disaggregated computing field, which in particular concerns or includes configurable networking of CPUs or GPUs and memories, CPU-memory connectivity, IoT networks for autonomous mobility, etc. In such cases, extreme bandwidths are often required, with data transfers from Gb / s to Tb / s.

[0003] Currently, I / O interfaces are implemented electronically in nature. They also apply in the essential areas of memory connections, sensor networks (IoT) and data communication. The I / O bandwidth currently technically possible is often not sufficient to achieve the desired transfer rate. Physical relations with fundamentally limiting effects, such as losses and the minimum dimensions of electrical contacts, prevent significant improvements in performance. Electrical losses have a major impact especially at high frequencies (for example, 10 dB / m in the range around 50 GHz for coaxial conductors), while the losses of optical fibers in the range of 0.1 dB / km are infinitesimal in comparison. Changing to optical interfaces can solve the bandwidth and range problems. However, the major challenge here is to manufacture low-cost, high-performance components available in very large quantities. Currently, this is only possible with silicon technology, but only with limited photonic capabilities. III-V semiconductors are better suited, but they cannot be monolithically integrated with Si technology.

[0004] In addition to I / O interfaces, other application areas are also conceivable: optical systems such as filters or spectrometers, or even neural networks for machine learning. The close integration of photonics and electronics may enable novel chip architectures.

[0005] Optical interfaces for data communication are realized to some extent by heterointegration and bonding of electronic and optical chips, i.e. the optical and electronic chips are fabricated with different technologies and then bonded together. For this purpose, optical circuits based on III-V transition semiconductors are usually bonded to a silicon wafer with the electronic control circuitry. The advantage is that each circuit type can be fabricated with the process best suited for it. However, the main disadvantages are the expensive manufacturing technology for bonding (chips have to be bonded to the wafer one by one), the time-consuming sequential operations and the interruption of the production line. After bonding the individual chips to the wafer, the wafer as a whole cannot be further processed. In a next step the wafer is separated and the chips are finished separately (although the main part of the manufacturing process has already been completed).

[0006] Alternatively, silicon can be used as the starting material, and electronic and photonic circuits can be obtained on one chip. However, in this case, the combination of electronic and photonic circuit technologies is fixed, since the optical and electronic circuits are manufactured on the same layer. Si electronics and photonics are arranged side by side on one wafer. This is known, for example, from Non-Patent Document 1. The advantage of this combined technology with Si technology is that it can significantly reduce costs and time compared to the die-attach and bonding strategies of III-V semiconductors. However, Si photonic devices usually have the disadvantage of inferior performance compared to III-V transition type semiconductors. Another major disadvantage is that the electronics and photonics technologies are fixed, so only certain types of microchips can be rationally manufactured for technical and economic reasons.

[0007] Patent Document 1 discloses a semiconductor device having an integrated circuit. The device includes a plurality of chips having integrated circuits fixed at intervals from each other in a recess in a carrier substrate. A planar coat including a waveguide and a photonic device is deposited on the chip and substrate surfaces to provide intra-chip optical connections for photonic devices on one chip, or inter-chip optical connections for photonic devices on different chips.

[0008] Previously known semiconductor devices have been proven in principle, but there is still a need for alternative devices, in particular individual chips with integrated photonics, available in large quantities with reasonable fabrication effort and therefore at reasonable cost. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] US Patent No. 2014 / 0264400A1 [Non-Patent Document 1] "Integrating photonics with silicon nanoelectronics for the next generation of systems on a chip," Nature, Vol. 556, pp. 349-354 (2018), doi.10.1038 / s41586-018-0028-z. Summary of the Invention [Problem to be solved by the invention]

[0010] It is an object of the present invention to provide an alternative semiconductor device in which the integration of electronic circuits and photonic components is realized, making it possible to obtain chips with integrated photonics in large quantities with reasonable effort, and further to provide a method for the manufacture of such a device. [Means for solving the problem]

[0011] The first-mentioned object is achieved by a semiconductor device comprising a wafer having a preferably monolithic semiconductor substrate, in particular a silicon substrate, and at least one integrated electronic component extending in and / or on said semiconductor substrate, said wafer having a front end and a back end extending above it, said front end comprising said integrated electronic component, or at least one of said integrated electronic components, and a photonic platform fabricated on a side of the wafer facing away from said front end, said photonic platform comprising at least one waveguide and at least one electro-optical element, in particular at least one photodetector and / or at least one electro-optical modulator, and wherein at least one of the electro-optical elements of the photonic platform is connected to said integrated electronic component, or at least one of said integrated electronic components, of the wafer.

[0012] The second stated object is achieved by a method for manufacturing a semiconductor device, comprising the steps of: providing a wafer having a semiconductor substrate, preferably a monolithic silicon substrate, and at least one integrated electronic component extending in and / or on said semiconductor substrate, said wafer having a front end and a back end extending therefrom, said front end comprising said integrated electronic component or at least one of said integrated electronic components; - fabricating a photonic platform on the side of the wafer facing away from the front end, said photonic platform comprising at least one waveguide and at least one electro-optical element, in particular at least one photodetector and / or at least one electro-optical modulator;

[0013] In other words, the basic idea of ​​the present invention is to fabricate directly on the back end of a wafer, in particular to build directly thereon a photonic platform having at least one waveguide and at least one electro-optical element.

[0014] In the prior art, a wafer is understood in a commonly known manner as a part or element or device from which multiple chips are obtained by wafer dicing, also known as wafer fragmentation (Wafer-Zerkleinern in German). Dicing or fragmentation may include, for example, cutting or sawing or scribing or breaking of the wafer (by laser). In English, a single or singular chip is also called a die, and a plural chip is also called a die or dice. Note that some chips after dicing are also called bare chips or bare dies. "Bare" refers to a chip that has not yet been put into a package. A "bare" chip without a package is also called chip for short.

[0015] When viewed in cross section, the vertical structure is divided into different sub-regions. The lowest part is called the front-end, or FEOL for short, and contains one or more integrated electronic components. The integrated electronic component(s) may be, for example, transistors and / or capacitors and / or resistors. Above the front-end is the back-end, or BEOL for short, which usually contains various metal planes to which the integrated electronic components of the FEOL are interconnected.

[0016] The wafer includes a number of regions that undergo dicing, fragmentation, and integration to form chips or dies, respectively. These regions are also referred to herein as chip or die regions. Each chip region of the wafer preferably includes a portion or a sub-region of the wafer, in particular of the monolithic semiconductor substrate. Each chip region preferably further includes one or more integrated electronic components that extend within and / or over the corresponding region of the semiconductor substrate, in particular in the FEOL when viewed in cross section. It is emphasized that the chip regions do not represent isolated chips, i.e. the wafer does not include isolated chips.

[0017] It is also possible that several chip areas of a wafer, in particular the integrated electronic component(s) of all chip areas are identical, in which case several identical chips (or in any case parts thereof) on which the photonic platform is fabricated, can be obtained by dicing from the device according to the invention.

[0018] Conveniently, the wafer has one or more marks at which dicing can or should occur.

[0019] In the context of the present invention, the photonic platform is deposited directly on the wafer even before the wafer is divided (diced) into individual chips. In the device according to the invention, the photonic platform is fabricated, in particular deposited, on the wafer, so that afterwards a number of chips with integrated photonics can be obtained therefrom simply by dicing. Even if there is no photonic platform in the back-end, dicing can be performed as with conventional wafers. In particular, it is possible to use existing equipment and facilities for this purpose. As a result, individual chips with photonics can also be reasonably mass-produced.

[0020] The side of the wafer facing away from the front end on which the photonic platform has been fabricated or will be fabricated may also be referred to as the top side of the wafer.

[0021] In a useful embodiment, the device according to the invention is characterized in that the photonic platform region fabricated thereon extends over multiple, in particular each, chip region of the wafer, each platform region advantageously including at least one, and preferably a plurality of waveguides and at least one, and preferably a plurality of electro-optical elements connected to at least one integrated electronic component or circuit of the respective underlying chip region.

[0022] The photonic platform expediently comprises a plurality of functional parts, and it is particularly preferred that at least one, in particular exactly one, of the functional parts extending above the respective chip area is assigned to each chip area of ​​the wafer.

[0023] According to the invention, the photonic platform is in particular fabricated on the back end of the wafer after the (conventional) wafer fabrication process is fully completed. In particular, this allows it to be done without being aligned with the (conventional) wafer fabrication process. Also, the fabrication of the photonic platform can be done completely separate from the (conventional) wafer fabrication. This provides a high degree of freedom.

[0024] That the integrated electronic components extend in and / or on a semiconductor substrate, in particular of a wafer of the device according to the invention, means that they are arranged in and / or directly on the substrate, although it is of course also possible for the integrated electronic components to extend partially in the substrate and also directly on the substrate in cross section, for example directly on one or more faces of the substrate.

[0025] The semiconductor substrate of the semiconductor device according to the invention is preferably of one-piece construction. In particular, it is a monolithic substrate. The substrate may be manufactured in several layers.

[0026] The semiconductor substrate may further be characterized as having a circular periphery. Alternatively or additionally, it may have a diameter in the range of 600 mm to 50 mm, preferably 500 mm to 100 mm. Exemplary diameters include 150 mm, 200 mm, 300 mm, 450 mm, etc.

[0027] As the photonic platform is / was fabricated on the back-end, rather than at the same level as the front-end electronics, it has the major advantage of not requiring additional space (also called real estate) for the photonics, thus not exacerbating the often existing problem of limited real estate at the front-end.

[0028] The photonic platform is / was fabricated on a wafer means that it is / was fabricated directly on the wafer, including for example deposition / deposition of material directly on the wafer(s). The photonic platform is preferably characterized in that it comprises material deposited on the side of the wafer facing away from the front end. Thus, in the method according to the invention, fabrication of the photonic platform may comprise deposition of material on the side of the wafer facing away from the front end. In particular, the photonic platform is not / is not fabricated independently of the wafer, for example on a separate substrate, and then transferred to the wafer and bonded to the wafer, for example by bonding. Rather, it is / is obtained on the wafer.

[0029] The photonic platform of the semiconductor device of the present invention may be free of bonding layers, except for one or more electro-optical elements or components of at least one of its components.

[0030] In a particularly advantageous embodiment, the photonic platform comprises a planarization coat of dielectric material, which is preferably fabricated on the side of the wafer facing away from the front end, and more preferably, the waveguide or at least one of the waveguides may be fabricated on the side of the planarization coat facing away from the wafer.

[0031] The method according to the invention may therefore be more particularly characterised in that the fabrication of the photonic platform comprises the fabrication of a planarising coat of dielectric material, in particular on the face of the wafer facing away from the front end.

[0032] The planarizing coat of the photonic platform provided in accordance with these embodiments may form the basis of one or more photonic layers or photonic surfaces, each preferably including at least one waveguide and / or at least one electro-optical element.

[0033] The waveguide, or at least one of the waveguides, may then be fabricated, more preferably on the side of the planarizing coat facing away from the wafer.

[0034] The fabrication of at least one waveguide may further comprise that a waveguide material is applied, preferably evaporated or spin-coated or transferred, in particular on the side of the planarization coat facing away from the wafer, and then structuring of the preferably evaporated waveguide material is carried out, in particular by lithography and / or reactive ion etching. For example, the same evaporation processes can be used as described below in connection with the planarization coat.

[0035] When the photonic platform includes a planarization coat on the back end, the planarization coat is not fabricated separately from the wafer, e.g., on a separate substrate, and then transferred to the wafer and attached thereto, e.g., by bonding, but rather is made or fabricated on it, and it can also be said that the planarization coat is a monolithic layer, specifically a layer monolithic with or relative to the wafer.

[0036] More specifically, the planarizing coat is characterized by a roughness of less than RMS 2.0 nm, preferably less than RMS 1.0 nm, particularly preferably less than RMS 0.3 nm, on the side facing away from the wafer. For example, the lower limit may be RMS 0.01 nm. In other words, the roughness can be, for example, in the range of RMS 2.0 nm to RMS 0.01 nm, preferably in the range of RMS 1.0 nm to RMS 0.01 nm, particularly preferably in the range of RMS 0.3 nm to RMS 0.01 nm. The abbreviation nm here and below means nanometer (10-9 m), as known per se. RMS stands for root mean squared. RMS roughness is also called "quadratische Rauheit" in German.

[0037] In a further embodiment of the device according to the invention, the planarization coat comprises or consists of spin-on-glass and / or at least one polymer and / or at least one oxide, in particular silicon dioxide, and / or at least one nitride.The method according to the invention may therefore comprise producing a planarization coat that consists of or comprises spin-on-glass and / or at least one polymer and / or at least one oxide, in particular silicon dioxide, and / or at least one nitride.

[0038] Spin-on-glass is usually a liquid substance that can be used to coat wafers with spin-on-glass coating. After spin-on-glass coating, a layer is formed on the wafer with a thickness that depends on the surface topology. Therefore, recesses are partially filled and a planarizing effect is achieved by the spin-on-glass coating. Spin-on-glass is usually heated after deposition, resulting in a glassy layer.

[0039] Alternatively or additionally, the planarizing coat can be formed by vapor deposition, in particular chemical vapor deposition (CVD), preferably low pressure chemical vapor deposition (LPCVD) and / or plasma enhanced chemical vapor deposition (PECVD), and / or by physical vapor deposition of a coating material on the side of the wafer facing away from the front end and subsequent processing of the side of the deposited material facing away from the wafer, preferably by chemical mechanical polishing and / or by resist planarization.

[0040] The method according to the invention can also optionally provide that, as part of the production of the planarization coat, at least one layer of coating material is deposited on the side of the wafer facing away from the front end, in particular by chemical vapor deposition, preferably by low-pressure chemical vapor deposition and / or plasma-assisted chemical vapor deposition and / or physical vapor deposition. Preferably, the deposited material is then chemically mechanically polished and / or resist planarized on the side facing away from the wafer, particularly preferably such that a roughness of less than RMS 2.0 nm, preferably less than RMS 1.0 nm, particularly preferably less than RMS 0.3 nm is obtained. Chemical mechanical polishing and / or resist planarization can be carried out in particular such that a roughness in the range of RMS 2.0 nm to RMS 0.01 nm, preferably in the range of RMS 1.0 nm to RMS 0.01 nm, particularly preferably in the range of RMS 0.3 nm to RMS 0.01 nm is obtained.

[0041] Roughness in these regions has proven to be particularly suitable. They are especially advantageous for avoiding stresses and distortions in the overlying layers. In this context, reference is also made to the article "Identifying suitable substrates for high-quality graphene-based heterostructures" by L. Banzels et al., Journal of 2D Materials and Applications, Vol. 4, No. 2, 025030, 2017.

[0042] Atomic force microscopy (abbreviated AFM) can be used as a measurement method for determining roughness, as described in particular in EN ISO 25178. Atomic force microscopy is primarily covered in part 6 of this standard (EN ISO 25178-6:2010-01), which discusses measurement methods for determining roughness.

[0043] There are a variety of prior art chemical vapor deposition processes, all of which can be used in the context of the present invention. What they all have in common is that typically introduced gases undergo a chemical reaction that results in the deposition of a desired material.

[0044] Also with regard to physical vapor deposition, all the variations known from the prior art can be used: purely by way of example, electron beam evaporation, in which a material is melted and evaporated by an electron beam, thermal evaporation, in which a material is heated to its melting point by a heater and evaporated onto the target substrate, and sputter deposition, in which atoms are knocked out of a material carrier by a plasma and deposited on the target substrate.

[0045] Alternatively or in addition to the above deposition processes, atomic layer deposition is also possible, in which insulating or conducting materials (dielectrics, semiconductors or metals) are deposited sequentially, atomic layer by atomic layer.

[0046] In chemical mechanical polishing, the object to be polished, such as a wafer, is usually polished by rotating it between polishing pads. The polishing is carried out chemically on the one hand, and physically on the other hand, using a polishing paste. The combination of chemical and physical actions allows the production of a smooth surface with a sub-nanometer scale.

[0047] In particular, resist planarization includes single or repeated spin-on-glass deposition followed by etching, preferably reactive ion etching (RIE). Planarization of surfaces with height differences, such as SiO2 surfaces, can be achieved by spin-on-glass deposition and etching. The spin-on-glass coating can partially compensate for the height difference. That is, the valleys of the topology will have a thicker coating thickness after spin-on-glass coating than the adjacent plateaus. The etching rates of spin-on-glass and, for example, SiO2 are similar or the same in a compatible RIE process. Compatibility here refers in particular to the selection of pressure, gas flow rate, gas mixture composition, and power according to the situation. If the entire spin-on-glass coating is spin-on-glass coated and then etched by RIE, the height difference is reduced due to the planarizing effect of the spin-on-glass coating. By repeating this process, the height difference can be further reduced. When depositing the SiO2 coating, it is necessary to take into account the thickness of the SiO2 coating consumed and to achieve the desired SiO2 coating thickness after the final etching process is completed. It should be emphasized that resist planarization is not limited to SiO2 and can also be considered with other materials. It is advantageous if the etching rate of the material is similar to or at least substantially the same as that of spin-on-glass. This condition is met for SiO2 and spin-on-glass. However, materials with etching rates that differ from that of spin-on-glass, for example by a factor of two, are also possible, and in that case several passes are generally required. For example, hydrogen silsesquioxane and / or polymers can be applied as liquid materials, and in particular spun on. Subsequent baking results in vitrification, which is why they are also called spin-on glass. Hydrogen silsesquioxane (HSQ) is a type of inorganic compound with the formula [HSiO3 / 2]n.

[0048] In a further advantageous embodiment, the photonic platform comprises at least one additional planarization coat, which, or at least one of the additional planarization coats, if there are several, can then preferably be made of the same material as the planarization coat and can also be manufactured in the same way as the planarization coat, although this is only optional and not limiting.

[0049] The additional planarizing coat, or, if there are multiple, one of the additional planarizing coats, may be disposed or fabricated on at least one of the waveguides and / or the planarizing coat.

[0050] In the method according to the invention, it can be provided that, preferably following the production of the at least one waveguide, at least one additional planarizing coat is optionally produced, the production of which particularly preferably comprises the application, in particular deposition, of a coating material on the side of the planarizing coat facing away from the at least one waveguide and / or the wafer.

[0051] The coating material of the additional planarizing coat is completely similar to the planarizing coat and may be or have been subjected to a planarizing treatment, in particular a chemical mechanical polishing and / or a resist planarizing treatment, at least on its side facing away from the wafer. Here again, this is carried out or preferably carried out so as to obtain a roughness on the side facing away from the wafer of less than RMS 2.0 nm, preferably less than RMS 1.0 nm, particularly preferably less than RMS 0.3 nm. Also for the at least one additional planarizing coat, it is preferably provided that the chemical mechanical polishing and / or resist planarization is carried out so as to obtain a roughness in the range of RMS 2.0 nm to RMS 0.01 nm, preferably in the range of RMS 1.0 nm to RMS 0.01 nm, particularly preferably in the range of RMS 0.3 nm to RMS 0.01 nm.

[0052] Fabrication of the planarizing coat and / or additional planarizing coat may further include applying a coating material to the treated side following the planarizing process, the treated side sometimes referred to as the top side.

[0053] Furthermore, a planarizing coat and / or an additional planarizing coat or additional planarizing coats can be preferably applied on the surface to be planarized and can include one or more cover layers, which can be, for example, dichalcogenide layers or dichalcogenide heterostructures or also boron nitride layers. These materials are preferably deposited or transferred without the need for chemical mechanical polishing or resist planarization, although it is not excluded to carry this out again.

[0054] Of course, it is possible for the photonic platform to include other layers in addition to one or more planarizing coats and / or one or more top coats.

[0055] The coating may comprise exactly one layer or may comprise several layers. It may consist of only one material or may comprise several materials. For example, the coating may have two or more layers of two or more different materials. Of course, the coating may be multi-layered, but also all made of the same material. In particular, a coating with more than two layers may be obtained or may exist, since several layers, for example several atomic layers, are provided for its production, for example deposited.

[0056] Furthermore, also for the waveguide(s) of the device according to the invention, they are not bonded to an underlying coat, but rather they are or have been fabricated on an underlying coat, in particular a planarizing coat, or on a wafer. For example, a suitable waveguide material is or has been provided on the planarizing coat, for example laminated or evaporated thereon, and then, if necessary, structured or structured to obtain the waveguide(s), for example by lithography and / or etching. Lithography preferably comprises, in a manner known per se, applying a photosensitive resist and exposing it to light, in particular ultraviolet light, in particular by spinning it. The parts that do not want to be exposed are conveniently covered with a mask. After development, the structure on the mask is transferred to the resist coat.

[0057] The waveguide, or at least one of the waveguides, or all of the waveguides may be embedded in a coat and / or may extend between two coats. For example, one or more of the multiple waveguides may be considered to be embedded in the additional planarization coat or at least one of the additional planarization coats. One or more waveguides extending between two coats and embedded in one coat may be obtained, for example, by fabricating the waveguide(s) on the side of the planarization coat facing away from the wafer and then fabricating the planarization coat on the waveguide(s), which fabrication includes applying, in particular depositing, a coating material on the waveguide(s) and on the uncovered areas of the underlying planarization coat.

[0058] In a preferred embodiment, the waveguide of the photonic platform, or at least one of the waveguides, if there are several waveguides, comprises or is made of at least one material that is transparent to electromagnetic radiation of wavelengths of 850 nm and / or 1310 nm and / or 1550 nm. Particularly preferably, it is transparent to electromagnetic radiation of wavelengths of 800 nm to 900 nm and / or 1260 nm to 1360 nm (the so-called Original Band or O-band for short) and / or 1360 nm to 1460 nm (the so-called Extend Band or E-band for short) and / or 1460 nm to 1530 nm (the so-called Short Band or S-band for short) and / or 1530 nm to 1565 nm (the so-called Conventional Band or C-band for short) and / or 1565 nm to 1625 nm (the so-called Long Band or L-band for short). These wavelength bands are known in the field of communication engineering.

[0059] The waveguide or, in the case of a plurality, at least one of the plurality of waveguides of the photonic platform of the semiconductor device according to the invention may in further advantageous embodiments comprise titanium dioxide and / or aluminum nitride and / or tantalum pentoxide and / or silicon nitride and / or aluminum oxide and / or silicon oxynitride and / or lithium niobate and / or silicon, in particular polysilicon, and / or indium phosphite and / or gallium arsenide and / or indium gallium arsenide and / or aluminum gallium arsenide and / or at least one dichalcogenide, in particular a two-dimensional transition metal dichalcogenide, and / or a chalcogenide glass and / or a resin or a resin-containing material, in particular SU8 and / or a polymer or a polymer-containing material, in particular OrmoComp, or comprise one or more of these materials. In the method according to the invention, preferably at least one waveguide is fabricated that comprises or is made of one of these materials, or that comprises or is made of a combination of one or more of these materials.

[0060] At least one waveguide expediently consists of or comprises a material whose refractive index differs from the refractive index of the material or materials of the planarizing coat and / or the additional planarizing coat (if any), especially when at least one waveguide has a common interface with the planarizing coat and / or the additional planarizing coat.

[0061] Purely exemplary refractive index pairs include: 3.4 (Si) for waveguide(s), 1.5 (SiO2) for planarization coat(s), and for the dielectric: 2.4 (TiO2) for waveguide(s), 1.5 (SiO2) for planarization coat(s), 2 (SiN) for waveguide(s), 1.47 for planarization coat(s).

[0062] In case at least one additional planarization coat is provided, it is also applicable for the planarization coat to consist of or contain a material whose refractive index differs from that of the material of the at least one waveguide, in particular when it is in contact with the at least one waveguide, i.e. when it has or forms a common interface with the waveguide.

[0063] It is particularly preferred that the refractive index of the material of the waveguide(s) is at least 20% greater, preferably at least 30% greater, than the refractive index of the material of the planarizing coat and / or the additional planarizing coat.

[0064] In these embodiments, in other words, a refractive index contrast has been or will be realized between at least one waveguide and the planarizing coat and / or at least one waveguide and additional planarizing coats (if any).

[0065] A waveguide is an element or component for guiding electromagnetic waves, especially light. For guiding, a wavelength-dependent cross section of material is expediently provided that is optically transparent at least for this wavelength and is differentiated by a refractive index contrast from adjacent materials that are also transparent for this wavelength. If the refractive index of the surrounding material is low, the light is guided in the region of higher refractive index. In the particular case, especially of the slit mode, two high refractive index regions are separated from a low refractive index region that is narrow relative to the wavelength, in which the light is guided. To reduce losses due to scattering, it is advantageous to have a small roughness of the sidewalls.

[0066] For the dimensions of the waveguide(s), the following applies in particular: The thickness is preferably in the range of 150 nanometers to 10 micrometers. The width and length of the waveguide(s), i.e. the lateral extent parallel to the wafer surface, may in particular be in the range of 100 nanometers and 10 micrometers.

[0067] One or more of the waveguides can be designed, for example, as a strip waveguide, characterized, for example, by a rectangular or square cross section. One or more of the waveguides can alternatively or additionally be formed as a ridge waveguide, with a T-shaped cross section. Still alternatively or additionally, one or more of the waveguides can be added by a slot waveguide.

[0068] The one or more waveguides of the device according to the invention may, for example, be formed of several parts or segments, for example, when viewed in cross section, including or consisting of a first, for example a lower or left segment and a second, for example an upper or right segment, in other words a section or part. The cross section of one or more waveguide segments may be characterized as being rectangular or square. If the waveguide includes or consists of two or more segments, these may be adjacent to each other, or may be fused together, or may be spaced apart from each other, for example by forming a gap or a slot.

[0069] The photonic platform provided in accordance with the present invention may conveniently include a plurality of waveguides, and may further include at least two waveguides that extend at least partially one above the other, in other words, there may be two or more planes of waveguides present or "stacked" on top of each other, providing further space savings, enhanced functionality and more complex circuitry.

[0070] Furthermore, it is possible to make surface-stabilized structures out of waveguides, such as multimode interference couplers (MMIs), i.e. 50:50 splitters based on interference, or directional couplers, which are two lengths of parallel waveguides that couple light from one into the other, or it is possible to get, for example, a Mach-Zehnder interferometer (2x50 / 50 MMI as a splitter, with two arms in between).

[0071] A further embodiment is characterized in that in addition to the at least one electro-optical element, the photonic platform also comprises at least one optical element, in particular at least one interferometer, such as a Mach-Zehnder interferometer, and / or at least one interference coupler, such as a multimode interference coupler, and / or at least one directional coupler, and / or at least one polarization converter, and / or at least one splitter, and / or at least one ring resonator. The at least one optical element preferably comprises or is formed by one or more waveguides and / or waveguide sections. In particular, the at least one optical element may comprise only a portion or a part of a waveguide, viewed in the longitudinal direction of the waveguide, in other words viewed over a long section. An optical element formed as a ring resonator expediently consists of a preferably self-contained ring-shaped waveguide forming the resonator and a preferably straight waveguide section coupled thereto. The coupling may be achieved via a directional coupler, which preferably includes or is formed by a region where the distance between the ring waveguide and the straight waveguide section is such that light couples between them.

[0072] The method according to the invention may therefore be characterized in that at least one optical element is preferably at least one interferometer, such as for example a Mach-Zehnder interferometer, and / or at least one interference coupler, such as a multimode interference coupler, and / or at least one directional coupler, and / or at least one polarization converter, and / or at least one splitter, and / or at least one ring resonator.

[0073] The photonic platform may also include one or more thermo-optical devices. One such device may include, for example, a heating element and a length of waveguide, the heating element being positioned relative to the waveguide portion such that the heating element can heat the waveguide portion. The heating element may, for example, be one that increases in temperature when an electric current is passed through it. For example, the heating element may be positioned in proximity to the waveguide. Heating the waveguide with the heating element can change the refractive index of the waveguide. This effect can be used, for example, for phase matching. The thermo-optical device may be associated with or form part of an interferometer of the photonic platform.

[0074] In a further embodiment, the photonic platform has a passivation coat and / or metallization on the side facing away from the wafer. The photonic platform is preferably finally finished with a passivation coat and / or metallization. In other words, the passivation coat and / or metallization forms the last or top coat of the photonic platform.

[0075] Metal cladding is particularly suitable, or designed to provide somewhat lower index contrast so that sidewall roughness is less of an issue. Typically, losses are routed back into the waveguide(s).

[0076] A passivation coat is preferably used to protect the arrangement or circuit from environmental influences, in particular water. The passivation coat can consist, for example, of a dielectric material. In particular, aluminum oxide (Al2O3) and silicon dioxide (SiO2) have proven to be suitable.

[0077] The top final passivation coat expediently has openings or interruptions to allow electrical connection to the underlying contacts. The openings or interruptions in the passivation coat can be or have been obtained, for example, by lithography and / or etching, in particular reactive ion etching.

[0078] Reactive ion etching is a dry etching process that allows selective and directional etching of the substrate surface, usually by special gaseous chemicals excited to form a plasma. A resist mask can be used to protect the parts that are not to be etched. The chemical etching and process parameters usually determine the selectivity of the process, i.e. the etching rates of different materials. This property is important to limit the depth of the etching process and to define one coat separately from another.

[0079] In a further advantageous embodiment, the semiconductor device according to the invention is characterized in that the back end of the wafer and the photonic platform comprise an interconnection element, by means of which the integrated circuit or at least one of the integrated circuits of the wafer is connected to the electro-optical element or at least one of the electro-optical elements of the photonic platform.

[0080] Thus, as an advantageous further development, the method according to the invention can be provided in such a way that the back end of the provided wafer comprises an interconnection element connected to the front end integrated circuit or to at least one of the front end integrated circuits, the interconnection element being fabricated into a photonic platform which is connected on the one hand to the back end interconnection element and on the other hand to the electro-optical element or to at least one of the electro-optical elements.

[0081] The interconnect element may in particular be a vertical electrical interconnect, also known in English as Vertical Interconnect Access, or Via or VIA. The VIA is usually defined by lithography and etched dry chemically using RIE. Metallization is then preferably performed, building up the metallized surface by CMP (Damascene process) or lithography and RIE.

[0082] The interconnection elements expediently comprise or consist of at least one electrically conductive material, in particular a metal such as copper and / or aluminium and / or tungsten.

[0083] In further embodiments, the electro-optical element(s), or at least a portion thereof, may be present or fabricated on one or more of the waveguide, and / or the side of the planarizing coat facing away from the wafer, and / or the side of the additional planarizing coat, if any, facing away from the wafer.

[0084] The electro-optical element(s) of the semiconductor device according to the invention can in principle be any device designed to generate and / or transmit and / or receive optical signals. In particular, it can be or may be a device for optical data communication and / or a spectrometer and / or a tunable electro-optical filter and / or a switch and / or an attenuator, in particular a device for machine learning. It may also include nonlinear optical elements.

[0085] An electro-optical element designed as a filter may for example comprise a ring resonator, preferably in combination with a modulator.

[0086] The electro-optical element, or, if there is a plurality of electro-optical elements, at least one electro-optical element, or alternatively each electro-optical element, in a practical embodiment, in particular comprises at least two contacts or contact elements which contact the active element or in any case serve to contact the interconnection element to the active element.

[0087] Preferably, the electro-optical element, or, in the case of a plurality, at least one electro-optical element or alternatively each electro-optical element further comprises at least one active element. In addition to the at least one active element, the electro-optical element may comprise a portion of a waveguide, in particular a long portion of a waveguide. It is also possible that an active element or a portion of the electro-optical element forms a waveguide, or at least a portion of a waveguide, in particular a long portion of a waveguide. It is also possible that several, for example two active elements or portions thereof together form a waveguide or a portion, in particular a long portion of a waveguide, for example a ridge waveguide. And expediently, the active element or elements comprise a material that is transparent to electromagnetic radiation of at least one wavelength, preferably at least one wavelength band. Preferably, then, the at least one material is transparent to electromagnetic radiation of wavelengths of 850 nm and / or 1310 nm and / or 1550 nm. Particularly preferably, it transmits electromagnetic radiation in the wavelength bands of 800 nm to 900 nm and / or 1260 nm to 1360 nm (the so-called Original Band or O band for short) and / or 1360 nm to 1460 nm (the so-called Extend Band or E band for short) and / or 1460 nm to 1530 nm (the so-called Short Band or S band for short) and / or 1530 nm to 1565 nm (the so-called Conventional Band or C band for short) and / or 1565 nm to 1625 nm (the so-called Long Band or L band for short).

[0088] If at least one active element is provided, it preferably comprises or consists of at least one material capable of absorbing electromagnetic radiation of at least one wavelength, preferably at least one wavelength band, and generating an electrical optical signal as a result of the absorption, and / or the refractive index of which varies in response to a voltage, the presence of charge(s), and / or an electric field. Preferably, then, the at least one material is adapted to absorb electromagnetic radiation of wavelengths 850 nm and / or 1310 nm and / or 1550 nm, and to generate an optical signal as a result of the absorption. It is particularly preferred that the at least one material is capable of absorbing electromagnetic radiation in the wavelength ranges from 800 nm to 900 nm and / or 1260 nm to 1360 nm (the so-called Original Band or O-band for short) and / or 1360 nm to 1460 nm (the so-called Extend Band or E-band for short) and / or 1460 nm to 1530 nm (the so-called Short Band or S-band for short) and / or 1530 nm to 1565 nm (the so-called Conventional Band or C-band for short) and / or 1565 nm to 1625 nm (the so-called Long Band or L-band for short) and generating an optical signal as a result of said absorption.

[0089] A material that changes its refractive index is understood to change, in particular, its dispersion (in particular the refractive index) and / or its absorption. The dispersion or refractive index is usually realized in the real part of the complex refractive index, and the absorption in the imaginary part of the complex refractive index. Materials that change their refractive index in response to the presence of a voltage and / or charge(s) and / or an electric field are understood here to be characterized in particular by the Pockels effect and / or the Franz-Keldysh effect and / or the Kerr effect. Furthermore, materials characterized by the plasma dispersion effect are also considered as such materials.

[0090] Exemplary materials for the active element(s) are graphene, possibly chemically modified graphene, and / or germanium and / or lithium niobate and / or electro-optical polymers and / or silicon and / or compound semiconductors, such as III-V and / or II-VI semiconductors, and / or dichalcogenides, in particular two-dimensional transition metal dichalcogenides, as well as heterostructures of two-dimensional materials. Two-dimensional materials other than graphene are therefore alternatively or additionally possible. In particular, electro-optical polymers are understood as polymers characterized by having a strong linear electro-optical coefficient (Pockels effect). A strong linear electro-optical coefficient is understood to be such that it preferably reaches at least 150 pm / V, preferably at least 250 pm / V. The electro-optical coefficient is at least about 5 times higher than that of lithium niobate.

[0091] Different chalcogenides also exist. In the context of the present invention, transition metal dichalcogenides as two-dimensional materials, such as MoS2 and WSe2, have proven to be particularly suitable.

[0092] It should be noted that lithium niobate and electro-optic polymers are based on electro-optics, in particular the Pockels effect, i.e. the E-field changes the refractive index (as the Pockels effect is used in Pockels cells for example). In the case of germanium, it is the Franz-Keldysh effect, i.e. the electric field shifts the valence edge and the conduction band edge relative to each other, changing the optical properties. These effects are electric field based effects. In the case of silicon and graphene, it is the plasma dispersion effect, which is charge carrier based, i.e. bringing charge carriers (electrons or holes) into the optical mode region (either in the device there is a capacitor to charge or there is a diode with a junction to deplete and concentrate). The charge carrier concentration changes the refractive index (real part of the exponent) and the absorption (imaginary part of the exponent, leading to the absorption of free carriers).

[0093] III-V semiconductors consist of compound semiconductors in which the main elements of groups III and V are combined in a manner known per se. II-VI semiconductors are compound semiconductors that consist of elements of main groups II or 12 with elements of main group VI.

[0094] Graphene, among other materials, has proven to be a particularly suitable material for the active element(s) of the electro-optical element(s) of the semiconductor device of the present invention.

[0095] Many materials are characterized by both the fact that their refractive index changes in response to the presence of a voltage and / or charge and / or an electric field, and by the fact that they absorb electromagnetic radiation of at least one wavelength and generate an electrical optical signal as a result of this absorption. This is the case, for example, with graphene. Graphene is therefore suitable both for the active element of a photodetector and a modulator. It also applies to dichalcogenides, such as two-dimensional transition metal dichalcogenides, heterostructures of two-dimensional materials, germanium, silicon, and compound semiconductors, in particular III-V and / or II-VI semiconductors. For example, lithium niobate is generally only suitable for modulators. Being transparent, it does not meet the absorption properties and is therefore not suitable for a photodetector.

[0096] At least one active element of the one or more electro-optical elements may be in the form of a membrane. A membrane is known per se to be characterized by a lateral extent that is preferably significantly greater than its thickness. At least one active element of the one or more electro-optical elements may further be characterized by a square or rectangular cross section.

[0097] The one or more active elements may be composed of or formed from one or more layers or coats of at least one refractive index varying and / or absorbing material, in particular the at least one active element may be formed as a film including multiple coats or layers of one or more different materials.

[0098] Films of graphene, possibly chemically modified graphene, or dichalcogenide-graphene heterostructures consisting of at least one layer of graphene and at least one layer of dichalcogenide, or arrays of at least one layer of boron nitride and at least one layer of graphene have proven to be particularly suitable.

[0099] The active element may, for example, comprise or be provided by one or more silicon coatings, in which case, in particular, one or more active elements or parts thereof may form a waveguide (part).

[0100] The active element(s) may be further doped or may be doped parts or regions, for example p-doped and / or n-doped, and may consist of corresponding parts or regions. There may also be or be provided p-doped and n-doped regions, and preferably intermediate undoped regions. This is also called pin transition, where the i means essentially, i.e. undoped.

[0101] A further advantageous embodiment is characterized in that an active element is provided having a p-doped region and an n-doped region, the two doped regions being adjacent to one another or with an undoped region located between them, the two doped regions optionally, possibly together with the intermediate undoped region, forming a waveguide or part of a waveguide.

[0102] Also, an element or coating of electro-optic polymer may be provided between two active elements, such as doped silicon.

[0103] Furthermore, in order to obtain active elements for a plurality of electro-optical elements, at least one film or coat (having one or also several layers) optionally extending over the entire lateral extent of the wafer is provided or provided, for example deposited, and from this large film, by suitable construction processes, which may for example include lithography and / or etching, a plurality of small film- or coat-like active elements extending adjacent to one another in one plane for a plurality of devices are obtained or can be made to be obtained. In this way, with relatively little effort, a large number of active elements for a plurality of electro-optical elements can be obtained.

[0104] Alternatively or additionally, the active element or at least one of the active elements may be or have been provided by a transfer process, which in particular means that the respective element(s) is not monolithically fabricated on the wafer or a coat fabricated thereon, but is fabricated separately and then transferred, in other words has been transferred. For example, the graphene transfer process can be found in the articles by Li et al., "Large-Area Synthesis of High-Quality and Uniform Graphene Films on Copper Foils," Science, Vol. 324, pp. 1312 (2009) and by Pe et al., "Roll-to-roll production of 30-inch graphene films for transparent electrodes," Nature Nanotech. 5, 574-578 (2010), for LiNbO in "Integrated lithium niobate electro-optic modulators operating at CMOS-compatible voltages," Nature, Vol. 562, pp. 101104 (2018), or, in particular, for GaAs in "Transfer print techniques for heterogeneous integration of photonic components." "Heterogeneous integration of photonic components" Advances in Quantum Electronics, Vol. 52, March 2017, pp. 1-17. Using one of these methods, it is also possible to obtain one or more graphene or LiNbO or GaAs coats / films in the context of the present invention.

[0105] The construction can also follow a transcription process.

[0106] In a further embodiment, the electro-optical element or at least one of the electro-optical elements is realized by a modulator including an active element or an electrode, the active element or an electrode including at least one material whose refractive index changes in response to a voltage and / or the presence of a charge and / or an electric field, the active element or an electrode being preferably spaced apart from each other and offset from each other such that one is partially located on top of the other. The material corresponding to at least one of the one or two active elements may be graphene and / or at least one dichalcogenide, in particular a two-dimensional transition metal dichalcogenide, and / or a heterostructure of two-dimensional materials and / or germanium and / or lithium niobate and / or at least one electro-optical polymer and / or silicon, and / or at least one compound semiconductor, in particular at least one III-V semiconductor and / or at least one II-VI semiconductor.

[0107] In other words, instead of two active elements, one active element and one conventional electrode are sufficient for the modulator. In particular, the electrode does not consist of at least one material with a variable refractive index, or does not include such a material but includes at least one conductive material. If an electrode is provided instead of one of the active elements, it can be in the form of a film, possibly with multiple layers, or, by analogy with the active element, a single metal film or a multi-layer metal film.

[0108] Also in the case of a modulator, the active element(s) may preferably comprise graphene, optionally chemically modified graphene, and / or at least one dichalcogenide, in particular a two-dimensional transition metal dichalcogenide, and / or a heterostructure of two-dimensional materials and / or germanium and / or lithium niobate and / or at least one electro-optical polymer and / or silicon, and / or at least one compound semiconductor, in particular at least one III-V semiconductor and / or at least one II-VI semiconductor.

[0109] The two active elements, or an active element and an electrode, are preferably arranged at a distance from each other and / or offset from each other, such that one lies partially above the other, in other words a portion of one active element is aligned or overlapping, even if not necessarily in contact, with a portion of the other active element or electrode. Preferably, at least in the region that extends above the other, in other words in the overlapping region, the two active elements or an active element and an electrode, or at least portions thereof, extend at least substantially parallel to each other.

[0110] Also, in the case of a modulator having two active elements or one active element and a conventional electrode, each active element or one active element and the electrode may further be formed as a membrane.

[0111] Electro-optical modulators can be used in particular for coding optical signals. Electro-optical modulators can also be designed as ring modulators.

[0112] Alternatively or additionally, the electro-optical element or at least one of the electro-optical elements can be realized by a photodetector comprising one, preferably exactly one, active element comprising or consisting of at least one material, in particular graphene and / or at least one dichalcogenide, in particular a two-dimensional transition metal dichalcogenide, and / or a heterostructure of two-dimensional materials and / or germanium and / or silicon and / or at least one compound semiconductor, in particular at least one III-V semiconductor and / or at least one II-VI semiconductor, which absorbs electromagnetic radiation of at least one wavelength, preferably at least one wavelength band, and generates an electrical optical signal as a result of said absorption.

[0113] In a photodetector, at least one electro-optically active material is useful for absorbing light.

[0114] In particular, photodetectors can be used to convert signals from the optical world back to the electronic world.

[0115] The electro-optical element or at least one electro-optical element, both in the case of the modulator and in the case of the detector, may furthermore be so designed or fabricated in the case of the method according to the invention with plasmonic coupling.

[0116] Conveniently, at least one plasmonic structure comprising or made of a plasmonic active material, preferably gold and / or silver and / or aluminum and / or copper, is then provided on the active element or at least one of the active elements. The plasmonic structure preferably comprises at least a pair of plasmonic elements arranged adjacent to each other and made of or comprising a plasmonic active material. The plasmonic elements may be characterized by having a portion tapered in the direction of each other plasmonic element. For example, the plasmonic elements may be characterized by a triangular shape.

[0117] In the case of a modulator, a preferably elongated plasmonic element may be provided that may be or may be arranged at least substantially parallel to the waveguide, in other words guiding the light and the plasmonic waveguide in parallel past the active element, as described in Du et al., “Efficient electro-optic modulation in low-loss graphene-plasmonic slot waveguides,” Optics Communications (2019), doi:https: / / doi.org / 10.1016 / j.optcom.2019.124559.

[0118] The responsivity of photodetectors, especially those containing graphene, can be improved by plasmon-enhanced absorption. For example, as shown in Mar et al., “Plasmonically Enhanced Graphene Photodetector Featuring 100 Gbit / s Data Reception, High Responsivity, and Compact Size,” ACS Photonics, 2019, 6, 154-161 (2018), a plasmonic structure is fabricated on a graphene channel as an active element on a waveguide. The fluctuations of the resonance density in the plasmonic structure are excited by the optical mode. This collective motion of the electron distribution is called plasmon and propagates through the plasmonic structure. Characteristics include a higher electric field strength compared to the optical mode. This results in stronger absorption in graphene and common absorbing materials.

[0119] A further embodiment is characterized in that at least on one side of the active element or at least one of the active elements, a waveguide is provided with a tapered end portion in the direction of the active element or at least one active element, preferably terminating in an apex. The tapered end may extend up to the active element or at least one active element. Alternatively or additionally, a contact element may be provided on each of the two sides of the tapered portion, which contact element is connected to the active element and has a portion tapered in the opposite direction and lying next to the tapered end of the waveguide.

[0120] Also, in each case, the two sides of the active element or at least one active element in each case may be provided with a waveguide that ends in a tapered end portion, preferably an apex, in the direction of the active element. Both ends may then be applied to extend to the active element or at least one active element. Also, the two sides of each tapered portion may be provided with a contact element, in each case connected to the active element or at least one active element, that is located next to the respective tapered end of the waveguide and has a tapered portion tapering in the opposite direction. Two contact elements may be provided, each having two widening portions, preferably on opposite sides, one at each end. The respective widening portions of the contact elements preferably follow the tapered shape of the respective waveguide end. The distance between the tapered waveguide end and the contact element portion adjacent to it and extending on either side may be kept equal in the direction of the active element. However, it may be increased or decreased at least to a certain extent.

[0121] In particular, this embodiment may further provide that the active element comprises or consists of at least one electro-optical polymer (see also the publication by Coase et al., "Silicon-Organic Hybrid (SOH) and Plasmonic-Organic Hybrid (POH) Integration," Journal of Lightwave Technology, Vol. 34, No. 2, 2016).

[0122] In other words, plasmonic coupling can occur even without a waveguide underneath the absorber, i.e., a transition from an optical mode to a plasmonic mode occurs, and the plasmonic mode interacts with the absorbing material. This is also discussed in the context of photodetectors in the publication by Ding Y, Chen Z, Du X et al., “Ultra-compact integrated graphene plasmonic photodetector with bandwidth above 110 GHz,” (2019), Nanophotonics, doi:10.1515 / nanoph-2019-0167. In the context of modulators, further reference is made to the publication by Ding et al., “Efficient electro-optic modulation in low-loss graphene-plasmonic slot waveguides,” Nanoscale, 2017, No. 9, 15576.

[0123] In particular, the modulator as an electro-optical element may alternatively or additionally further comprise two active elements, each realized by a silicon film or coating. For example, one layer of coating or film containing or made of polysilicon and one layer of coating or film containing or made of crystalline silicon. Both active elements may also contain or be made of polysilicon. Of the two active elements, one is preferably p-doped and the other n-doped. The difference in doping results in a change in capacitance. The two active elements are preferably offset from each other, so that they overlap. The overlapping area preferably forms a waveguide or a waveguide section. By applying a voltage, the charge carrier concentration can be changed in the area of ​​the waveguide or the waveguide section, i.e. in the optical mode of operation, and as a result the optical signal can be encoded. A corresponding silicon-based modulator is also described in the paper by M. Webster et al., "An efficient MOS-capacitor based silicon modulator and CMOS drivers for optical transmitters," 11th International Conference on Group IV Photonics (GFP), Paris, 2014, pp. 1-2, doi:10.1109 / Group4.2014.6961998.

[0124] If the electro-optical element or at least one of the electro-optical elements is or becomes a modulator, it may further include a diode or a capacitor, in particular an integrated III-V semiconductor modulator as described in the article by Hiaki, “Heterogeneously integrated III-V / Si MOS capacitor Mach-Zehnder modulator,” Nature Photonics, Vol. 11, pp. 482-485 (2017).

[0125] If an electro-optical element or a diode for at least one electro-optical element has been provided or is to be provided, it may comprise multiple coats of different compositions, for example InGaAsP, in particular to form the pn junction and the two contact regions.

[0126] The electrodes of the active element(s) and possibly one or more electro-optical elements can be provided, for example, on the side of the planarization coat facing away from the wafer, or on an additional planarization coat, in particular fabricated on the waveguide(s). Each element(s) may be connected to contact or contact elements on one or the other side, respectively. The contact or contact elements can be connected from the front end to one or more electronic components by interconnection elements, in particular VIAs. The interconnection elements, in particular VIAs, can extend through the planarization coat, the additional planarization coat (if any) and the semiconductor substrate to the electronic component(s). By connected it is convenient to understand electrically conductively connected.

[0127] It should be noted that in the case of detectors, in particular with only one active element, the active element can be brought into contact with two contacts or contact elements, preferably on opposite sides, in particular for the connection with one or more electronic components from the front end, and in the case of modulators with two active elements or one active element and one electrode, these, in particular for the connection with one or more electronic components from the front end, are adapted to be brought into contact with one contact or contact element, respectively, preferably in the case that their end regions or ends face the surface facing away from the overlapping regions in cross section.

[0128] Also, at least one active element can be located on the side of one or more waveguides facing away from the wafer. This has the advantage that the active element is closer to the waveguide(s). This allows more interactions to be achieved between the active element(s) and the optical modes in the waveguide. Furthermore, this eliminates the need for a separate planarization coat, resulting in shorter components and fewer steps.

[0129] In another embodiment, the active element(s) are provided on a side of the control electrode(s) facing away from the wafer, preferably on a side of the control electrode(s) facing away from the wafer, and the control electrode or electrodes are fabricated on a side of the waveguide(s) facing away from the wafer.

[0130] Note that the side of an element facing away from the wafer may also be referred to as its top side, e.g., the planarizing coat, additional planarizing coat, waveguide, waveguide base, deposited material, graphene film, control electrodes, and / or photonic platform facing away from the wafer may also be referred to as the top side.

[0131] In the case of a modulator with two active elements or an active element and an electrode, it is also possible to provide a passivation coat between the two active elements or between the active element and the electrode. The passivation coat is expediently made of a dielectric material. It can therefore also be called a dielectric coat. At the same time, an etching protection can also be formed. Oxides and nitrides are particularly suitable as materials for such coats. In particular, aluminum oxide, silicon nitride and hafnium oxide have proven to be suitable. If a passivation coat is provided between two active elements or between an active element and an electrode, it is preferably a sandwich-like structure with the active element, the passivation coat and the active element or the electrode, the two active elements or the active element and the electrode being preferably laterally offset from each other.

[0132] It is also possible that the active element(s) and electrodes (if any) of at least one electro-optical element extend partially over one or more waveguides and partially over the planarizing coat(s) or additional planarizing coat(s) or one or more control electrodes.

[0133] Additionally, one or more active elements may be located at least partially, and possibly completely, within the waveguide, at least one of the waveguides, or between two portions of the waveguide.

[0134] The active element or at least one of the active elements is conveniently positioned with respect to the at least one waveguide such that it is at least partially exposed to the evanescent field of the electromagnetic radiation guided by the waveguide. Preferably, the at least one active element is positioned at a distance of 50 nm or less from the at least one waveguide, more preferably at a distance of 30 nm or less, for example at a distance of 10 nm.

[0135] In a waveguide, a portion of the electromagnetic radiation, in particular light, is evanescently guided outside the waveguide. The interfaces of the waveguide are dielectric and, depending on the circumstances, the intensity distribution is described by exponentially decaying Maxwellian boundary conditions. If an electro-optically active material, for example graphene, is brought onto or near the waveguide in the evanescent field, photons can interact with the material, in particular graphene.

[0136] The photodetector advantageously has an active element comprising or consisting of at least one such material and two contacts.

[0137] Graphene has four effects that lead to photocurrent. The first is the bolometric effect, where absorbed energy increases the resistance of graphene, reducing the applied direct current. The change in the direct current is the optical signal. The second effect is photoconductivity, where absorbed photons increase the charge carrier concentration, and the added charge carriers reduce the resistance of graphene, since resistance is proportional to charge carrier concentration. Applying a direct current increases the current, and the change in the current is the optical signal. There is also a thermoelectric effect, where a thermoelectric voltage is generated from the p-n junction and the temperature gradient at this junction due to the different Seebeck coefficients of the p and n regions. The temperature gradient is due to the energy of the absorbed optical signal. This thermoelectric voltage is then the signal. The fourth effect is due to the separation of excited electron-hole pairs at the p-n junction. The resulting photocurrent is the signal.

[0138] In the case of the modulator, as explained above, an electrical control electrode and an active element suitably insulated for this purpose can be provided, which comprises or consists of at least one material, in particular graphene, whose refractive index changes depending on a voltage or charge or electric field, or the electrode can also be made of said material, in particular graphene, so that in operation the two active elements then come together in an evanescent field and perform an electro-optical function. Graphene, for example, can change its optical properties by a control voltage. Particularly advantageous is the graphene-dielectric-graphene arrangement, in which a capacitance is created and the two graphene films influence each other. The voltage charges the capacitance consisting of the graphene electrodes that form the two active elements, and the electrons occupy states in the graphene. As a result, the Fermi energy (energy of the last occupied state in the crystal) is shifted to higher energies (or lower energies due to symmetry). When the Fermi energy is half the energy of the photon, the photon is no longer absorbed, since the free states necessary for the absorption process are already occupied with the appropriate energy. As a result, in this state, graphene becomes transparent since absorption is prohibited. By varying the voltage, graphene can be switched between absorbing and transmitting. Continuously irradiated laser light can be used to transmit information since its intensity is modulated. Similarly, the real part of the refractive index also changes with the control voltage. By varying the voltage, the phase position of the laser can be modulated via the change in the refractive index, thus realizing phase modulation. Preferably, the phase modulation is manipulated in the range where all states are occupied up to half the photon energy, whereby graphene is transparent, the real part of the refractive index is shifted significantly, and the change in absorption plays a minor role.

[0139] The electro-optical element or at least one of the electro-optical elements may further include at least one, preferably two gate electrodes. In particular, in the case of an electro-optical element embodied as a photodetector, preferably two gate electrodes can be assigned to the active element. And, preferably, they are embodied and arranged so that the charge carrier concentration of the active element, for example the graphene film, can be adjusted through them, and thus, for example, a pn transition can be obtained. And, the gate electrode is arranged at a suitable distance from the active element, and is preferably electrically insulated, for example, via a dielectric coat. Also, a dielectric coat may be provided on the active element, and the gate electrode may be arranged on this.

[0140] A further particularly advantageous embodiment is characterized in that the semiconductor device according to the invention, in particular its photonic platform, comprises at least one coupling device associated with at least one, preferably exactly one, of the waveguides. The (respective) coupling device then serves expediently to couple electromagnetic radiation, in particular in the infrared and / or visible wavelength range, into at least one of the waveguides of the photonic platform with which the (respective) coupling device is associated and / or to couple electromagnetic radiation, in particular in the infrared and / or visible wavelength range, out of at least one of the waveguides of the photonic platform with which the (respective) coupling device is associated. For this purpose it can be suitably embodied and arranged. It is true that in Si photonics, all wavelengths below 1100 nm are absorbed by Si, so that due to the band gap they are generally only suitable for the infrared wavelength range. This is not usually the case for dielectric materials, which are also transparent in the visible wavelength range and therefore suitable for spectroscopic measurements.

[0141] Particularly preferably, the coupling device or at least one of the coupling devices is embodied and arranged such that electromagnetic radiation, in particular in the infrared and / or visible wavelength range, can be coupled therewith from an optical fiber into at least one of the waveguides of the photonic platform and / or such that electromagnetic radiation, in particular in the infrared and / or visible wavelength range, can be coupled therewith from at least one of the waveguides of the photonic platform into an optical fiber. The optical fiber will typically have a larger diameter than the waveguide(s), and the coupling device(s) will further preferably be configured in such a case to allow coupling and / or decoupling.

[0142] A coupling device may include a portion, particularly an end, of the waveguide with which it is associated, for example an end that tapers or widens towards the end.

[0143] More specifically, the at least one coupling device may have at least one grating structure specifically designed and arranged such that its first diffraction order is located in the associated waveguide. Such coupling devices may also be referred to as grating coupling devices or grating couplers for short. See also the article "CMOS-compatible high efficiency double-etched apodized waveguide grating coupler", Optics Express, Vol. 21, pp. 7868-7874, 2013, for the design and operation of grating couplers.

[0144] If at least one coupling device is provided by a grating coupler, it is further preferred that it contains a reflector or that a reflector is assigned to it. A reflector is particularly preferred, since it can be positioned so that maximum coupling is obtained. If a reflector is not present, then the interface between the back end and the plane usually becomes a reflector automatically, since there is a refractive index jump at the interface. If a grating coupler is provided, then a reflector is also particularly advantageous, since the situation is precisely defined in contrast to the interface. For example, a Bragg reflector can be created by using a metal foil or a stack of thin metal or dielectric coatings as a reflector.

[0145] The planarizing coat is preferably provided with a reflector, which may consist of or include a metal, for example aluminum, and / or is characterized by a rectangular shape and / or is slightly larger than the grating coupler and / or is positioned at a suitable distance from, preferably below, the grating coupler.

[0146] Alternatively or additionally, at least one of the coupling devices can be designed as a lateral coupling device (lateral coupler for short). The coupling device expediently has at least one coupling element embodied and arranged such that electromagnetic radiation can be coupled laterally into and / or from therein. Lateral means in particular transverse to the lateral extent of the wafer, in particular to the face of the wafer facing away from the front end.

[0147] Also, reference is made to the article "Ultra-low-loss inverted taper coupler for Silicon-on-insulator ridge waveguide," Optics Communications, Vol. 283, Edition 19, October 2010, pp. 3678-3682, regarding the design and operation of grating couplers.

[0148] The grating coupling device can also be designed and arranged such that the electromagnetic radiation to be coupled can be incident, in particular from above (obliquely), or the electromagnetic radiation to be coupled can be coupled, in particular upwards (obliquely), from the grating, and more preferably can be embodied and arranged such that coupling can take place at an angle in the range of 0° to 30°, in particular an angle of 10°, relative to the normal to the front end of the wafer or to the face of the device according to the invention facing away from the front end.

[0149] Compared to lateral couplers, grating couplers, which have radiation entering and exiting from above or at an angle upwards, have the advantage that their functionality can usually be verified before dicing, whereas in the case of lateral couplers, the sides or edges of the elements where the electromagnetic radiation enters and where the electromagnetic radiation exits are not exposed until dicing and may only be tested at that time.

[0150] As a further development, at least two coupling devices may be provided, at least one of which is a lateral coupling device (or lateral coupler for short) and at least one of which is a grating coupling device (or grating coupler for short). If both types of couplers are provided, it is also possible to measure the components with the grating coupler during production and use the lateral coupler when all are ready. Preferably, at least one waveguide is associated with two couplers, one of one type and one of the other type.

[0151] The coupling device(s) are preferably fabricated together with at least one waveguide with which they are associated, which may involve lithographically defining them as well as the waveguide and structuring them by etching, in particular dry chemical etching.

[0152] The invention also relates to a method for manufacturing at least one semiconductor device, providing a semiconductor device according to the invention and a method for segmenting, in other words dicing, which results in at least one chip, usually several chips, with integrated photonics, each of which represents a semiconductor device according to the invention. This "bare" chip or each "bare" chip with photonics can for example be inserted into a package. It is noted that a semiconductor device according to the invention, including a conventional chip with integrated circuits and a part of a photonic platform built thereon, can alternatively be called a chip.

[0153] A further object of the present invention is to provide semiconductor devices obtained by dividing, in other words dicing, the semiconductor device according to the present invention.

[0154] The resulting semiconductor device according to the invention after dicing is characterized by a photonic platform or a portion thereof whose lateral extent at least substantially corresponds to the lateral extent of the underlying chip or semiconductor substrate, the photonic platform or portion thereof deriving its shape and extent from the dicing, like the underlying substrate.

[0155] A housing may be provided surrounding the semiconductor device, in which case the side of the device on which the front end is located preferably abuts the inside of the housing.

[0156] For embodiments of the invention reference is made also to the dependent claims and the following description of several embodiments with reference to the attached drawings, in which: [Brief description of the drawings]

[0157] [Figure 1] 1 shows a purely schematic top view of an embodiment of a semiconductor device according to the invention; [Diagram 2] FIG. 2 is a purely schematic partial cross-sectional view of the semiconductor device of FIG. [Diagram 3]FIG. 6 is a purely schematic top view of the photodetector of FIGS. 2, 4 and 5; [Figure 4] 2 is a purely schematic partial cross-sectional view of a second embodiment of a semiconductor device according to the invention; FIG. [Diagram 5] 3 is a purely schematic partial cross-sectional view of a third embodiment of a semiconductor device according to the invention; FIG. [Figure 6] 4 is a purely schematic partial cross-sectional view of a fourth embodiment of a semiconductor device according to the invention; FIG. [Figure 7] 5 is a purely schematic partial cross-sectional view of a fifth embodiment of a semiconductor device according to the invention; FIG. [Figure 8] FIG. 13 is a purely schematic partial cross-sectional view of a sixth embodiment of a semiconductor device according to the invention. [Figure 9] FIG. 9 is a purely schematic top view of the modulator of FIG. 8. [Figure 10] FIG. 13 is a purely schematic partial cross-sectional view of a seventh embodiment of a semiconductor device according to the invention. [Figure 11] FIG. 13 is a purely schematic partial cross-sectional view of an eighth embodiment of a semiconductor device according to the invention. [Figure 12] 1 shows a purely schematic example of the contactability of active elements of an electro-optical element of a semiconductor device. [Figure 13] 1 shows a purely schematic example of the contactability of active elements of an electro-optical element of a semiconductor device. [Figure 14] 1 shows a purely schematic example of the contactability of active elements of an electro-optical element of a semiconductor device. [Figure 15] 1 shows a purely schematic example of the contactability of active elements of an electro-optical element of a semiconductor device. [Figure 16] 1 shows a purely schematic example of the contactability of active elements of an electro-optical element of a semiconductor device. [Figure 17] FIG. 13 is a purely schematic partial cross-sectional view of a ninth embodiment of a semiconductor device according to the invention. [Figure 18]FIG. 16 is a purely schematic partial cross-sectional view of a tenth embodiment of a semiconductor device according to the invention. [Figure 19] FIG. 2 is a purely schematic partial cross-sectional view of an eleventh embodiment of a semiconductor device according to the invention; [Figure 20] FIG. 23 is a purely schematic partial cross-sectional view of a twelfth embodiment of a semiconductor device according to the invention. [Figure 21] FIG. 1 shows a purely schematic top view of a first embodiment of a photodetector using plasmon coupling; [Figure 22] FIG. 2 shows a purely schematic top view of a second embodiment of a photodetector using plasmon coupling; [Diagram 23] FIG. 1 shows a purely schematic top view of an embodiment of a modulator using plasmonic coupling. [Figure 24] FIG. 2 shows a purely schematic top view of an example of a lateral coupling device; [Diagram 25] FIG. 25 is a schematic cross-sectional view of the lateral binding device of FIG. 24. [Figure 26] FIG. 2 shows a purely schematic top view of an example grating coupling device; [Figure 27] FIG. 27 is a cross-sectional view illustrating a schematic diagram of the grating coupling device illustrated in FIG. 26. [Figure 28] 2 shows steps of a method for manufacturing a device according to FIG. 1; [Figure 29] 1 shows a purely schematic top view of three semiconductor devices according to the invention; [Diagram 30] FIG. 30 is a purely schematic cross-sectional view of the semiconductor device according to the present invention of FIG. 29. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0158] In the drawings, the same components are given the same reference numerals.

[0159] Figure 1 shows, purely diagrammatically and in a highly simplified manner, a top view of a semiconductor device according to the invention. It comprises a wafer 1, which is partly visible in the partial cross-section according to figure 2, which comprises a monolithic silicon substrate 2 and a number of integrated electronic components 3, which in the illustrated example are shown extending in the semiconductor substrate 2. The integrated electronic components 3, which may in particular be transistors and / or resistors and / or capacitors, are shown in a simplified manner only by hatched lines bearing the reference number 3 in the schematic diagram 2. At that location in the substrate 2, in a manner well known in the art, a number of integrated electronic components 3 can be found. They may also be components of processors such as CPUs and / or GPUs, forming such components in a manner also known in the art.

[0160] The wafer 1 is a component or device from which multiple chips can be obtained by (wafer) dicing, also called "wafer-zerkleiner" in German, in a manner well known from the prior art. The dicing or fragmentation can for example be performed by (laser) cutting or sawing or scribing or breaking of the wafer 1. The wafer therefore consists of multiple areas, each of which will form a chip after dicing. These areas are called chip areas 4.

[0161] In Fig. 1, these are shown purely diagrammatically with thin lines. Each chip area 4 of the wafer 1 comprises a part or partial area of ​​the monolithic semiconductor substrate 2 and is typically equipped with at least one, preferably several, integrated electronic components 3. Depending on the design of the wafer 1, which depends on the concrete application, for example up to ten, or even tens, hundreds or thousands of integrated electronic components 3 are provided in each chip area 4. These can be arranged side by side and / or stacked.

[0162] The wafer 1 has a front end (abbreviated FEOL) 5, in which a number of integrated electronic components 3 are arranged, and an upper layer back end (abbreviated BEOL) 6, in which or through which the integrated electronic components 3 of the front end 5 are interconnected by different metal planes. The integrated electronic components 3 in the FEOL 5 and the associated interconnects in the BEOL 6 form the integrated circuit of the wafer 1 in a manner that is well known in advance. The FEOL 5 is also sometimes called the transistor front end and the BEOL the metal back end. The metal plane contains a number of interconnection elements 7, in this case realized by so-called VIAs, an abbreviation for Vertical Interconnect Access. The VIAs 7 are made of metal, for example copper, aluminum, tungsten, etc.

[0163] The depicted semiconductor device 1, as can be clearly seen in the cross-sectional view according to Fig. 2, is located above the wafer 1 and further comprises, according to the invention, a photonic platform 8 which is fabricated on its back end 6, in particular built directly thereon. Note that the chip area 4 in Fig. 1 is shown with thin lines, since in the top view it is located below the photonic platform 8.

[0164] The wafer 1 is characterized in the illustrated embodiment by a diameter of 200 mm. This is also the diameter of the entire semiconductor device (see FIG. 1), including the wafer 1 and, above it, the photonic platform 8 fabricated thereon. The partial cross section according to FIG. 2 shows in the vertical direction the entire device according to FIG. 1 with its superimposed components or coats or elements, but in the horizontal direction only a very small part of the device, in particular one small place or part of the chip area 4, and is therefore small compared to the overall extent of the device in the horizontal direction. This also applies to some other parts. In this case, the chip areas 4 are characterized in plan view by a rectangular shape, each with a side length of 2 mm in one direction and 3 mm in the other direction. However, in FIG. 1, they are shown as squares, purely for the sake of simplicity.

[0165] 2, a photonic platform 8 provided in accordance with the present invention is fabricated on a side 9 of the wafer 1 facing away from the front end 5 and includes a planarization coat 10 comprising a dielectric material. In this case, the planarization coat 10 comprises silicon dioxide (SiO2), although it should be understood that this is exemplary and other materials may be used.

[0166] In the embodiment shown, the planarizing coat 10 is a coat obtained by depositing a corresponding coating material, here SiO2, on the face 9 of the wafer 1 facing away from the front end 5 and then planarizing the deposited material on the face 11 facing away from the wafer 1. The planarizing coat 10 is characterized by a process roughness of its face 11 facing away from the wafer 1 of 0.2 nm RMS, which is therefore to be understood as an example.

[0167] In the embodiment shown, the planarizing coat 10 extends over the entire surface of the face 9 of the wafer 1 facing away from the front end 5. The material of the planarizing coat 10 is deposited over the entire surface of the face 9 of the wafer 1 facing away from the front end 5. This is characterized by at least substantially corresponding to the diameter of the wafer 1.

[0168] The photonic platform 8 further comprises a number of waveguides 12 fabricated on the face 11 of the planarization coat 10 facing away from the wafer 1. Dielectrics, preferably titanium dioxide, also used in the illustrated embodiment, are particularly suitable as waveguide material. Alternatively or additionally, the waveguides 12 can be provided made of aluminum nitride and / or tantalum pentoxide and / or silicon nitride and / or aluminum oxide and / or silicon oxynitride and / or lithium niobate, or semiconductors such as silicon, indium phosphide, gallium arsenide, indium gallium arsenide, aluminum gallium arsenide, dichalcogenides or chalcogenide glasses, polymers such as SU8 or OrmoComp.

[0169] Typical dimensions of the waveguides 12 are a thickness in the range of 150 nm and 10 μm, and a lateral extent parallel to the wafer surface of between 100 nm and 10 μm in width. Purely by way of example, a thickness of 300 nm and a width of 1.1 μm can be mentioned. The specific dimensions of the waveguides 12 may vary, in particular their width, depending on the function they perform.

[0170] In this case, the photonic platform 8 also comprises an additional planarization coat 13 made of the same material as the planarization coat 10, namely in this case SiO2. The additional planarization coat 13 is characterized on its side 14 facing away from the wafer 1 by a roughness that corresponds to the roughness of the planarization coat 10. It is emphasized that the planarization coat 10 and the additional planarization coat 13 can be characterized by the same material, the same extent and the same roughness on the sides 11 and 14 facing away from the wafer 1, respectively, as is the case in this case, but this is not necessary and therefore should not be understood as limiting.

[0171] The photonic platform 8 also includes a number of electro-optical elements 15, which may be, among other things, photodetectors and / or modulators. In the illustrated embodiment, the photonic platform 8 includes both a number of photodetectors 15 and a number of modulators 15.

[0172] Figure 2 shows a schematic diagram of an example of an electro-optical element, specifically a photodetector 15. Figure 3 shows, again purely schematic, a top view of part of the device of Figure 1, specifically the photodetector 15 of Figure 2.

[0173] Figures 4 and 5 show exemplary partial cross-sections of further embodiments of a semiconductor device according to the invention, which may correspond in plan view to those of Figure 1, in which in each case a photodetector 15 and an underlying waveguide 12 are shown, whereby in each case the photodetector 15 and / or the waveguide 12 are embodied instead of the one in Figure 2. It should be noted that the schematic representation of Figure 3 also corresponds to the detector 15 from Figures 4 and 5, with the proviso that only the upper narrow part of the waveguide with a T-shaped cross-section (see Figures 4 and 5) is shown.

[0174] 6 and 7 show partial cross-sectional views of a further embodiment of a semiconductor device according to the invention, in which the photodetector 15 is also provided as an electro-optical element, the structure of which differs from that of FIGS.

[0175] Figures 8, 10 and 11 show partial cross-sections of further embodiments of semiconductor devices according to the invention, each showing an electro-optical element embodied as a modulator 15. Figure 9 shows a top view of the modulator 15 of Figure 8.

[0176] The photodetectors 15 according to Fig. 2 and Fig. 4 to Fig. 7 each comprise an active element 16 made of a material that absorbs electromagnetic radiation of at least one wavelength, preferably at least one wavelength band, and generates an electrical optical signal as a result of the absorption. In the examples of Fig. 2 and Fig. 4 to Fig. 7, the active element 16 of the photodetector 15 is respectively realized by a graphene film 16. Graphene can also change its refractive index (refraction and / or absorption) depending on the voltage and / or charge and / or electric field. It is also possible that the active element 16 is realized by a film that comprises or consists of at least one other material, for example a film that comprises or consists of a dichalcogenide-graphene heterostructure consisting of at least one layer of graphene and at least one layer of dichalcogenide, or a film consisting of at least one layer of boron nitride and at least one layer of graphene. There are various chalcogenides, but transition metal dichalcogenides as two-dimensional materials, such as MoS2 and WSe2, are particularly suitable here.

[0177] On comparison, it can be seen that the arrangements shown in Figures 2 and 4 differ only in the shape of the waveguide 12. Whereas Figure 2 shows a strip waveguide 12 with a rectangular cross section, Figure 4, like Figure 5, shows a ridge waveguide 12 with a T-shaped cross section, with a first upper waveguide segment 12a with a narrow rectangular cross section and a second lower waveguide segment 12b with a significantly wider rectangular cross section. The example of Figure 5 differs from the example of Figure 4 only in that here no additional planarizing coat 13 is provided. It should be noted that the waveguide 12 in the embodiment according to Figure 2 can alternatively be embodied as a so-called slot waveguide, with two waveguide segments spaced apart from each other to form, for example, a slot or a gap.

[0178] Where the waveguide 12 includes multiple segments 12a, 12b, all of the segments may be formed of the same material, as is the case here, although this is not required and the segments may be composed of or include different materials.

[0179] In the examples shown in Figures 2, 4 and 5, the graphene film 16 of the respective electro-optical element 15 extends in each case above the long portion of the waveguide 12 shown in the figure. This can also be easily seen from the top view shown in Figure 3. In the embodiments according to Figures 2 and 4, the graphene film or one-layer graphene film 16, 16a is in each case produced or provided on the face 14 of the additional planarization coat 13 facing away from the wafer 1. As can be seen, the graphene film 16 here extends in each case in the area of ​​the trapezoidal portion of the additional planarization coat 13 on the latter, in particular by means of resist planarization. In the embodiment shown in Figure 5, the graphene film 16 is arranged directly on the waveguide 12.

[0180] 6 and 7 show an embodiment in which, unlike in FIGS. 2, 4 and 5, the graphene film 16 extends not above but inside (FIG. 6) or below (FIG. 7) the respective waveguide 12. The shape of the waveguide 12 is also formed as a ridge waveguide 12 with a T-shaped cross section. Thus, the waveguide 12 in the example of FIG. 6 is composed of a first, upper waveguide segment 12a, a middle section 12b and a lower waveguide segment 12c. The waveguide segments 12a, 12b, 12c all have a rectangular cross section, with the middle and lower segments 12b, 12c being significantly wider. The middle waveguide segment 12b is provided on the graphene film 16 and serves both as a passivation coat and as a waveguide segment 12b (sometimes also referred to as a waveguide slab). In this case, the segment 12b, which also serves as a passivation coat, is made of aluminum oxide. Alternatively or additionally, they may also comprise or consist of dichalcogenides and / or dichalcogenide heterostructures and / or SiO2 and / or boron nitride. The two further segments 12a, 12c may also comprise or consist of, for example, aluminum oxide or titanium dioxide.

[0181] The embodiment of Figure 7 differs from that of Figure 6 in that there is no lower waveguide segment 12c. The graphene film 16 is now deposited directly on the face 11 of the planarization coat 10 facing away from the wafer 5.

[0182] In particular in the case of an electro-optical element embodied as a photodetector 15, it is also possible to assign two gate electrodes to the active element 16. These are then preferably embodied and arranged in such a way that the charge carrier concentration in the active element, in this case the graphene film 16, can be adjusted via them, thus making it possible, for example, to obtain a pn junction. The gate electrodes can, for example, be arranged above the graphene film 16 and electrically insulated via a dielectric coat.

[0183] The modulators 15 according to Fig. 8, Fig. 10 and Fig. 11 each consist of two active elements provided by a film 16 of graphene, specifically a lower part 16a and an upper part 16b. It is also true that for the modulator 15, the active elements can be embodied in different ways, for example as a film including or consisting of at least one other material. The two graphene films 16a, 16b extend at a distance from each other and are not in electrical contact with each other. Rather, they are electrically insulated from each other by an intermediate coat 17 of a dielectric material, preferably an oxide or nitride, currently aluminum oxide. The dielectric coat 17 also serves as a passivation and as an etching protection or stop. As can be seen by comparing Fig. 2 with Fig. 6, the arrangement is the same, except that the modulator 15 of Fig. 8 includes a second active element 16b and is additionally provided with a dielectric coat 17.

[0184] The two graphene layers 16a, 16b are offset from each other so as to partially overlap or overlap (without touching). In the overlapping regions, the two graphene layers 16a, 16b or their corresponding parts are further adapted to extend at least substantially parallel to each other. Note that instead of the modulator 15 including two active elements 16a, 16b, an electrode including a conductive material, such as copper or aluminum, may be provided in place of one of the active elements.

[0185] In the embodiment shown in Figure 8, a lower graphene film 16a, similar to the single graphene film 16 of the detectors of Figures 2 and 4, is provided on face 14 of the additional planarizing coating 13, again in the region of the trapezoid above the waveguide 12. A second, upper graphene film extends on face 18 of the dielectric coating 17 facing away from the wafer 5.

[0186] Analogous to the various embodiments from figures 2, 4 and 5, the embodiments of figures 8, 10 and 11 also differ essentially in that the waveguide 12 is characterized by a different shape and that here, neither in figures 10 nor in figure 11, there is a second additional planarizing coat 13. Whereas the embodiment of figure 8 comprises a strip waveguide 12, the embodiments according to figures 10 and 11 each comprise a ridge waveguide 12 with a T-shaped cross section or profile. The waveguide of figure 10 comprises, in cross section, four waveguide segments 12a, 12b, 12c, 12d, while the waveguide of figure 11 comprises three segments 12a, 12b, 12c. All segments 12a to 12d have a rectangular cross section, but as can be seen, the upper segment 12a, similar to figures 4 and 5, is significantly smaller in width than the underlying segments 12b, 12c and, in the case of figure 11, 12d. The two or three lower segments 12a, 12b, 12c are each characterized by the same width in the illustrated embodiment. Segment 12d of the waveguide 12 in Figure 10 may be considered and sometimes referred to as the waveguide base.

[0187] In the embodiment of Figure 11, the lower graphene film 16a extends between the now single planarization coat 10 and the segment 12c of the ridge waveguide 12 extending thereover, and the upper graphene film 16b extends between segments 12b and 12c. Thus, the upper graphene film 16b extends within the waveguide 12. The lower graphene film 16a is fabricated or provided on the face 11 of the planarization coat facing away from the wafer 5, and the upper graphene film 16b is fabricated on segment 12c.

[0188] Each of the active elements 16, 16a, 16b of all detectors 15 and modulators 15 of the photonic platform 8 is positioned relative to and associated with a respective waveguide 12, identifiable in the figure, such that it is at least partially exposed to the evanescent field of the electromagnetic radiation guided by the respective waveguide 12. Preferably, at least a portion of each active element 16, 16a, 16b extends a distance of 50 nm or less, preferably 30 nm or less, from the respective waveguide 12. As can be seen, for example, in FIG. 2, the additional planarizing coat 13 between the waveguide 12 and the graphene film 16 is correspondingly thin or "thinned" with respect to its thickness in the remaining areas.

[0189] Each electro-optical element, specifically each photodetector 15 and each modulator 15 in the embodiment shown, is further electrically conductively connected to at least one of the integrated electronic components 3 of the front end 5 of the respective wafer 1. As can be seen in the schematic cross-sectional views according to Figures 2 to 4 and 8, 10 and 11, the connection is realised via vias 7 of the back end 6 of the wafer 1 as well as vias 7 extending through the planarisation coat 10 and possibly through the coat or element.

[0190] In particular, in the detector 15, each graphene membrane 16 is electrically conductively connected in its opposite end region via a contact or contact element 19 to the upper end of a via 7 which extends through the planarization coat 10, possibly through a coat or element, to the back end 6 of the wafer 1. The top view from FIG. 3 shows the via 7 connected to the former underlying contact element 19 with thin lines.

[0191] In the modulator 15, each of the two graphene layers 16a, 16b is connected at one end region to a contact element 19 and above that to a VIA 7.

[0192] The contact between the active element, currently the graphene membrane 16, 16a, 16b, of the electro-optical element 15 and the contact element 19 can in principle be designed in various ways. Figures 12 to 16 show five possibilities as an example.

[0193] According to the option shown in Fig. 12, the end regions of the graphene membranes 16, 16a, 16b are in contact with a part of the underside of a contact element 19, which is here expediently made from a metal optimized for graphene, for example nickel and / or titanium and / or aluminium and / or copper and / or chromium and / or palladium and / or platinum and / or gold and / or silver.

[0194] The embodiment shown in Fig. 13 differs from the arrangement according to Fig. 10 only in that the contact element 19 comprises not only one but two metal layers 19a, 19b, whereby a better performance for further connections can be achieved, since the upper layer 19b can comprise a metal optimized for further connections. The lower layer 19a, which is in contact with the graphene membrane 16, 16a, 16b, is expediently again composed of a metal optimized for graphene. Preferably, the layer 19a is made of nickel and the layer 19b of aluminum, or the layer 19a is made of titanium and the layer 19b of aluminum. Other combinations of nickel and / or titanium and / or aluminum and / or copper and / or chromium and / or palladium and / or platinum and / or gold and / or silver are also possible, as are both active elements comprising or made of graphene and active elements comprising or made of other electro-optical active materials.

[0195] In the example shown in Fig. 14, the contact element 19 also includes a third lower metal layer 19c, which serves as a bonding agent. This layer 19c may, for example, include titanium or chromium or aluminum oxide. Layer 19a may, for example, consist of nickel and / or titanium and / or aluminum and / or copper and / or chromium and / or palladium and / or platinum and / or gold and / or silver. Layer 19b may also consist of one of these metals or a combination thereof.

[0196] In the embodiment according to Figures 15 and 16, the end region of the active element, in this case the graphene membrane 16, 16a, 16b, extends between a first lower metal layer 19a optimized for graphene and a second upper metal layer 19d of the contact element 19, also optimized for graphene. For this purpose, the end region of the active element 16 is characterized by having an S-shaped cross section. The two layers 19a and 19d are preferably made of palladium or nickel or gold or platinum or a combination of nickel and / or titanium and / or aluminum and / or copper and / or chromium and / or palladium and / or platinum and / or gold and / or silver.

[0197] The embodiment of FIG. 16 differs from the example of FIG. 15 only in that, like FIG. 14, the contact element 19 includes a third metal layer 19b optimized for further connection and may, for example, include aluminum, like layer 19b of FIG. 13.

[0198] For all contact examples, the graphene film 16 may be covered by the contact element 19 or a layer thereof such that the current passes vertically from the contact element 19 or its layers 19a-19d to the graphene (top contact), or the graphene film 16 may terminate at the end of the contact element 19 or its layers 19a-19d such that the current passes laterally to the graphene film 16 (side contact). For example, the arrangement according to Fig. 13 may also be embodied as a top contact.

[0199] A passivation coat 25 is preferably provided on each active element, i.e. preferably on each of the graphene films 16. This can only be seen in Figs. 12 to 16, which show enlarged cross-sections of the graphene films 16, 16a, 16b, respectively. In this case, the passivation coat 25 is made of aluminum oxide. Alternatively or additionally, the passivation coat 25 may also comprise or consist of dichalcogenides and / or dichalcogenide heterostructures and / or SiO2 and / or boron nitride. The passivation coat 25 passivates the active elements, in this case the graphene films, and at the same time acts as an etching stop layer, allowing selective etching of the contact elements 19 for connection to the VIAs 7.

[0200] It should be noted that in the case of the modulator 15, the dielectric coating 17 (see FIG. 8) provided between the two active elements 16a, 16b can already serve to passivate the lower element 16b. In this case, the passivation coating 25 does not have to be assigned to it as well.

[0201] Moreover, it should be noted that, even if in the examples according to Figures 12 to 16 the active elements 16, 16a, 16b are realized by graphene films, the illustrated embodiments are in no way limited to this material, and the contacts can also be designed accordingly for active elements 16 that include or are made of one or more other materials.

[0202] An embodiment of a photodetector 15 or modulator 15 having an active element that does not use graphene is shown in FIGS.

[0203] In this respect, the embodiment of FIG. 17 includes an active element 16 formed by a coat of polycrystalline silicon that also forms the waveguide 12. As can be seen, the silicon coat 16 has the shape of a ridge waveguide with a T-shaped cross section. In this case, the silicon coat forming the active element 16 and the waveguide 12 has two doped regions, namely a p-doped region 16p and an n-doped region 16n. It should be noted that, alternatively, there may also be pin transitions, i.e. there may be an undoped region between the p-doped and n-doped regions. The silicon coat 6 is connected to two contact elements 19, similar to the active element 16 of the embodiment of FIGS. 2 and 4 to 7. Depending on the polarity of the applied voltage, the charge carrier concentration in the barrier coat changes, and as a result, the absorption and refractive index of the waveguide 12 also change. It can also be said that here the waveguide 12 is designed as a diode in order to obtain a modulator.

[0204] FIG. 18 shows another embodiment of a silicon modulator, also known as SISCAP (see also the publication "An efficient MOS-capacitor based silicon modulator and CMOS drivers for optical transmitters" by M. Webster et al., 11th International Conference on Group IV Photonics (GFP), Paris, 2014, pp. 1-2, doi:10.1109 / Group4.2014.6961998). Here, two active elements 16a, 16b are provided, each formed by a silicon coat, preferably of crystalline silicon or polysilicon or amorphous silicon. Here, the active element 16a is p-doped and the active element 16b is n-doped. The active elements 16a, 16b are further arranged offset from each other so as to be located above each other in the overlapping region, which is similar to the active elements 16 of the embodiments from FIG. 8, FIG. 10, FIG. 11. The overlapping region then forms the waveguide 12. In this region the charge carrier concentration, and therefore the optical properties of the waveguide 12, can be tailored.

[0205] Figure 19 shows another embodiment of a silicon modulator 15, which also includes two active elements 16a, 16b formed by p- and n-doped silicon coatings, respectively, which are planarly adjacent to each other and between them an element of electro-optical polymer 26 is provided. The two active elements 16a, 16b and the electro-optical polymer element 29 form a ridge waveguide 12 with a gap formed by the element 26. In other words, the side walls of the gap now act as electrodes of a capacitance. The electric field in the gap affects the optical properties of the polymer, allowing the modulation of the optical signal.

[0206] 20 shows an example of a modulator using a diode 27 made of a compound semiconductor. The diode 27 is made of coatings 27a-27d of different compositions, for example InGaAsP, to form a pn junction and two contact regions. The contact regions are connected by an electrode 28 to a contact element 19 and thus to the integrated electronic component 4.

[0207] The electro-optical element or at least one electro-optical element, both in the case of the modulator 15 and in the case of the detector 15, may further be so designed or fabricated using plasmonic coupling.

[0208] Embodiments corresponding to FIGS. 21 to 23 can be shown (in each case purely diagrammatically).

[0209] In this regard, Figure 21 is an example of a photodetector 15 having a plasmonic structure 29 made of or including a plasmonic active material, specifically provided on an active element 16. In an embodiment, the plasmonic structure 29 includes three pairs of plasmonic elements 30 arranged adjacent to each other and made of or including a plasmonic active material. Currently, the plasmonic elements are made of gold. Other examples of suitable materials include silver and / or aluminum and / or copper. The plasmonic element 30 forms a quasi-antenna on the waveguide 12 to enhance the absorption (see also Marr et al., “Plasmonically Enhanced Graphene Photodetector Featuring 100 Gbit / s Data Reception, High Responsivity, and Compact Size,” ACS Photonics, 2019, No. 6, pp. 154-161 (2018)). Such a plasmonic structure may be on or be provided on the active element 16 in an arrangement according to FIG. 2, FIG. 4, or FIG. 5, for example.

[0210] FIG. 22 shows an embodiment of a photodetector 15 without a waveguide 12 or a portion of such a waveguide below or above the active element 16, but preferably with a waveguide 12 in-plane with and laterally of the active element 16, the waveguide 12 having a portion 31 tapering in a V-shape towards the active element 16. This portion 31 tapers to a point that in FIG. 22 extends to the left of the active element 16, e.g., the graphene membrane. As can be seen, the contact element 19 here includes a portion 19e tapering in the opposite direction, i.e., away from the active element 16. In a manner of speaking, the contact element 19 partially follows the tapered end 31 of the waveguide 12, enabling plasmonic coupling.

[0211] FIG. 23 shows an analog modulator 15 using plasmonic coupling. As can be seen, two opposite sides of the active element 16, e.g. a graphene film, have V-shaped tapered waveguide sections 31, and oppositely tapered sections 19e of the contact element 19 are provided for both associated waveguide sections 31 and 19e. Thus, coupling from the optical mode to the plasmonic mode and back to the optical mode is possible. In particular, in this embodiment, the active element may further comprise or consist of at least one electro-optic polymer (see also the publication by Coase et al. "Silicon-Organic Hybrid (SOH) and Plasmonic-Organic Hybrid (POH) Integration", Journal of Lightwave Technology, Vol. 34, No. 2, 2016).

[0212] The photonic platform 8 fabricated on a wafer 1 of a semiconductor device according to the invention generally comprises a large number of electro-optical elements 15, in particular realized by photodetectors and / or modulators. This is also the case in the illustrated embodiment. In particular, each part of the photonic platform 8 extending above the chip area 4 of the wafer 1 already comprises a number of electro-optical elements 15 and a number of waveguides 12. For example, each part of the photonic platform 8 extending above the chip area 4 may be provided with tens, hundreds or even thousands of electro-optical elements 15 and / or waveguides 12. In each case, the number can be selected according to the specific application.

[0213] In the illustrated embodiment of the semiconductor device according to the invention, all electro-optical elements 15 and waveguides 12 of the photonic platform 8 are structurally identical. In this respect, this coincidence allows a particularly simple and fast fabrication. It is emphasized, however, that it is of course also possible for the semiconductor device according to the invention to comprise variants of the embodiments shown in figures 2, 4 to 8, 10, 11 and / or 17 to 23, for example both a detector 15 with an underlying waveguide 12 according to figure 2 and a modulator 15 and a waveguide 12 according to figure 8. There may also be more than two variants of the embodiments according to figures 2, 4 to 8, 10, 11 and / or 17 to 23, for example all of them may be present once or more than once each.

[0214] In order to be able to realise in the photonic platform 8 not only configurations with an additional planarising coat 13 (see for example Figures 2, 4 and 8) but also configurations without such a coat (see for example Figures 5, 10 and 11), after the preferably two-dimensional fabrication of the additional planarising coat 13, this coat may be partially removed again, for example by lithography and subsequent etching, whenever a configuration without the additional planarising coat is desired. Also, for other coats which are only desired in some places and not everywhere, entirely similar procedures can be or have been used.

[0215] The active elements 16, 16a, 16b of each electro-optical element may be electrically conductively connected to one, or in the case of a detector, two, contact elements 19 in any of the ways shown in Figures 12 to 16. It is possible for all active elements 16, 16a, 16b of a semiconductor device according to the invention to be contacted in the same way by contact elements 19. Alternatively, it is of course also possible to contact different active elements 16 of the device in different ways.

[0216] In Figures 3 and 9, in addition to the active elements 16, 16a, 16b, the waveguides 12 and the contact elements 19, coupling devices 32 of the photonic platform 8 are shown diagrammatically for coupling light into or out of the waveguides 12. One coupling device 32 is here arranged at each of the opposite ends of the respective waveguide 12. In this case, the coupling devices 32 are respectively designed as lateral or grating coupling devices. Figures 24 to 27 show purely schematic examples thereof. Figures 24 and 25 show a lateral coupling device 32 in plan view and in cross section, and Figures 26 and 27 show a grating coupling device 32 in plan view and in cross section.

[0217] A coupling device 32, or even two coupling devices 32, may be associated with several, possibly even each of the waveguides 12 of the photonic platform 8. In particular, if light is to be coupled, two coupling devices 32 are associated or are associated with the waveguides 12. However, it may also be possible that only initial coupling is desired in some cases, in which case one coupling device 32 is sufficient.

[0218] The embodiment of the lateral coupling device 32 shown in Fig. 24 and Fig. 25 consists of a lateral coupling element 33, preferably made of a resin or resin-containing material, in particular SU8, or / and silicon nitride, or / and silicon oxynitride, or a dielectric, whose refractive index is between that of the waveguide 12 (in particular n=2.4) and that of the element 33 acting as a mode field converter, such as, for example, aluminum oxide (n=1.68) (SU8 n=1.56). As can be seen, the latter is characterized not only by a width b, but also by a height h exceeding the extension of the waveguide 12 in the corresponding direction, which in this case corresponds to a multiple thereof in each case. The lateral coupling device 32 further comprises an end 34 of the waveguide 12 extending into the lateral coupling element, which, as can be easily seen in Fig. 24, is conically tapered towards said end. It should be noted that in Fig. 24 the contour of the tapered part 34 is shown in thin lines, since in plan view it is obscured by a part of the element 33. This element 33 allows the mode field to be matched from the diameter of the optical fiber (e.g., diameter 5 μm-15 μm) to the size of the waveguide 12 (e.g., height 300 nm, width 1.1 μm). The tapered tip 34 of the waveguide 12 causes an adiabatic tuning of the effective refractive index in the region of the mode field, so that the optical mode becomes increasingly transferred from the coupled structure into the waveguide 12.

[0219] As can be seen from the top view of FIG. 26, the grating coupling device 32 is formed by the end 35 of the waveguide 12, which is conically widened towards the end and has a grating structure 36 on the side facing away from the wafer 5, as is also clearly shown in the cross-section of FIG. 27. This widening allows the dimensions of the waveguide 12 (for example, height 300 nm, width 1.1 μm) to be adapted to the diameter of the mode field in the optical fiber (for example, 5 μm to 15 μm), thus increasing the coupling efficiency. In the top view according to FIG. 26, the grating structure 36 is merely simplified by a few parallel lines. The incident light is diffracted by a grating-like arrangement of refractive index steps. The dimensions of the grating are conveniently calculated in such a way that, at a given angle of incidence, the first diffraction order is located in the waveguide 12 and thus the light is coupled into the waveguide 12.

[0220] The coupling devices 32 are coplanar with the respective waveguides 12 , i.e. they are disposed on the side 11 of the planarizing coat 10 facing away from the wafer 5 .

[0221] The waveguide 12, which is only partially shown in the partial views of FIGS. 21-23, may also be provided with a coupling device 32 at its end, which is not visible in the figures.

[0222] In addition to the electro-optical element 15, the photonic platform 8 may also include one or more optical elements. These may be, for example, one or more interferometers, such as Mach-Zehnder interferometers, and / or MMIs and / or directional couplers and / or ring resonators and / or polarization converters and / or splitters. The optical elements are usually formed by dividing the waveguide 12 into several parts and arranging them accordingly. In particular, they constitute surface-stabilized structures of the waveguide 12 or of the long waveguide parts. Parts, in particular parts of the longitudinal direction of the waveguide 12, i.e. the long parts of the waveguide 12 shown for example in Fig. 2, Fig. 4 to Fig. 11, may in each case be components of such optical elements, in particular parts in front of or behind the electro-optical element 15, in a direction oriented perpendicular to the drawing plane.

[0223] It is also possible for the photonic platform 8 to include one or more thermo-optical elements. For example, one such device includes a heating element and a long portion of the waveguide 12, the heating element being positioned relative to the cross section of the waveguide so as to heat the cross section of the waveguide. Heating the waveguide 12 with the heating element can change the refractive index of the long portion of the waveguide 12. This effect can be used, for example, for phase matching. The thermo-optical element can also be associated with or form part of an interferometer of the photonic platform. For example, the long portions of the waveguide 12 shown in Figures 2, 4-11 can each be part of a thermo-optical element, and can also be portions in front of or behind the electro-optical element 15 in a direction oriented perpendicular to the plane of the drawing.

[0224] The photonic platform 8 further comprises a passivation coating 37 (see FIG. 1) which extends above the electro-optical element 15 and preferably forms a top finish of the photonic platform 8 and the semiconductor device. The passivation coating 37 also constitutes a metallization. Note that the passivation coating 37 is not shown in the views according to FIGS. 3 and 9, where only the underlying device 15 is shown.

[0225] To obtain the semiconductor device shown in Figure 1, in a first step S1 (see Figure 28) a wafer 1 is provided with integrated circuits including integrated electronic components 3 and with metallization including vias 7. The wafer 1 can be any conventional wafer 1 obtained by a conventional manufacturing process.

[0226] Then, a photonic platform 8 is fabricated on the BEOL 6 of the wafer 1 .

[0227] In particular, in a second step S2, a planarizing coat 10 is produced on the back end 6 of the wafer 1. For this purpose, a coating material, in this case silicon dioxide (SiO2), is applied, which can be done, for example, by chemical vapor deposition, such as low pressure chemical vapor deposition (LPCVD) or plasma enhanced chemical vapor deposition (PECVD), by physical vapor deposition or by spin coating using spin-on glass. In this case, PECVD is used. After the coating material has been deposited, the side of the coating facing away from the wafer 5 is subjected to a planarization process (step S3), in this case a resist planarization process, so that the side 11 facing away from the wafer 5 has a roughness RMS of 0.2 nm.

[0228] Resist planarization involves single or repeated spin-on-glass deposition followed by etching, in this case reactive ion etching (RIE). The spin-on-glass coat can partially compensate for the height difference; that is, the valleys of the topology have a thicker coat thickness after spin-on-glass coating than the adjacent plateaus. If the entire spin-on-glass coat is etched after spin-on-glass coating, for example by RIE, the height difference is reduced due to the planarizing effect of the spin-on-glass coat. By repeating this, the height difference can be further reduced until the desired roughness is obtained.

[0229] It should be noted that a correspondingly lower roughness of the surface 11 of the planarizing coat 10 facing away from the wafer 5 can alternatively be obtained, for example via chemical mechanical polishing (CMP).

[0230] The next step S4 involves the fabrication of the waveguides. For this purpose, a waveguide material, in this case titanium dioxide (TiO2), is deposited in particular over the entire surface 11 of the resulting planarization coat 10. As with the planarization coat, the material can be deposited by PVD or CVD, in particular PECVD or LPCVD, or by spin coating. It is also possible to carry out ALD (Atomic Layer Deposition) or transfer printing processes. As with the planarization coat 10, LPCVD is used. Lithography and structuring, in particular by reactive ion etching (RIE), is carried out to obtain the individual waveguides 12.

[0231] To obtain the strip waveguide 12 (see, for example, Figures 3 and 8), the waveguide material is completely removed where it is not desired to leave the strip waveguide 12, in other words, the underlying coating 10 is etched away.

[0232] The coupling device 32 to which those waveguide ends 34, 35 belong (see Fig. 3, Fig. 9 and Fig. 24 to Fig. 27) is in this embodiment fabricated with a ridge or strip waveguide 12, in the case of a ridge waveguide 12, the lateral extent of the waveguide 12 in the region of the coupling points can be dry-chemically removed in a separate etching step. A waveguide 12 consisting of overlapping coats can be built up with a top coat 12a after completion of the coat structure, in the case of a ridge waveguide 12, the lateral extent of the waveguide in the region of the coupling points can be dry-chemically removed in a separate etching step. In both cases, a mode converter can be defined between the ridge waveguide 12 and the strip waveguide 12, the part of the ridge waveguide 12 can be formed as a strip waveguide 12 using lithography and RIE.

[0233] The grating coupler 32 having the grating structure 36 can be lithographically defined and dry-chemically constructed.

[0234] In the case of the lateral coupling element (mode converter) 33, dielectrics and / or semiconductors and / or resins and / or polymers are deposited in one or more layers and structured by lithography and / or RIE.

[0235] In a next step S5, an additional planarizing coat 13 is produced on the face 11 of the waveguide 12 and the planarizing coat 10. In this case, it is obtained in a manner completely similar to the planarizing coat 10, by deposition using PECVD and resist planarization. As a result of the resist planarization, the cross section of the additional planarizing coat 13 above the waveguide 12 is trapezoidal (see FIG. 2).

[0236] Also, for the additional planarizing coat 13, instead of LPCVD and CMP, other processes of the above mentioned processes can be used, applied to allow another planarizing treatment, such as CMP, and / or additional planarization, as described above for the planarizing coat 10. When CMP is used, a generally flat surface is obtained, i.e. there is then no trapezoidal portion on top of the waveguide 12 as shown in FIG. 2 (and also e.g. FIG. 4 and FIG. 9).

[0237] The planarizing coat 10 and the additional planarizing coat 13 are preferably applied on the surface to be planarized and may comprise one or more cover layers, which may be, for example, dichalcogenide layers or dichalcogenide heterostructures or also boron nitride layers. These materials are preferably deposited or transferred without the need for further chemical mechanical polishing or further resist planarization, although repeating this again is not excluded.

[0238] It should be noted, for the sake of completeness, that if the semiconductor device according to the invention also has areas without the additional planarizing coat 13, for example areas with a structure corresponding to that shown in Figure 5, Figure 10 or Figure 11, the additional planarizing coat 13 (and any coats located thereon) are then again partially removed, in particular by lithography and etching.

[0239] In step S6, the vias 7 are produced through the planarizing coat 10 and the additional planarizing coat 13. In principle, any method known from the prior art is possible. In particular, the areas in which they extend are first preferably defined lithographically and then dry-chemically etched with RIE. Metallization is then carried out, building up the metallized surface, for example by means of CMP (Damascene process), lithography, RIE, etc. It is possible both that the vias 7 are produced through both planarizing coats 10, 13 after the completion of the additional planarizing coat 13, and also that after the completion of the first coat 10, parts of the vias 7 are produced through the first planarizing coat 10 and after the completion of the second additional planarizing coat 13, parts of the vias 7 are produced through the second coat 13.

[0240] After that, the electro-optical element 15 is fabricated.

[0241] For this purpose, in step S7, each active element of the detector, realized by a graphene film 16, is provided on face 14 of the additional planarizing coat 13 facing away from the wafer 5, for example by deposition on face 14, then in step S8, contact elements 19 (single layer or multilayer) are obtained.

[0242] The deposition of the graphene film 16 can for example be carried out via a transfer process, as explained in more detail above, and in particular a graphene film produced on another substrate or on another metal foil or on another germanium wafer is transferred in each case to the additional planarizing coat 13. It is also possible to produce the graphene film directly on the additional planarizing coat 13, which can for example involve the deposition of a material.

[0243] When using a transfer process, the passivation coat 25 can already be provided on the side of each graphene film 16 facing away from the wafer 5, for example by depositing this layer thereon and then transferring it therewith. Alternatively, the passivation coat 25 can be deposited after the graphene film(s) 16 have been transferred or fabricated.

[0244] It is also possible to first fabricate a full graphene film and / or a full passivation coat on the additional planarization coat 13, extending over the entire surface of the additional planarization coat 13. In this case, a further structuring is then carried out, in particular by lithography and RIE, in order to obtain individual graphene films 16 as active elements of the plurality of electro-optical elements 16.

[0245] The contact element 19 or its layers 19a to 19d are then preferably fabricated by depositing one (FIG. 12) or several layers (FIGS. 13 to 16) of metal over the entire surface and structuring by lithography and RIE.

[0246] The method described with the manufacturing sequence of first the graphene membrane 16 and then the contact element 19 allows the contact to be achieved as shown diagrammatically in FIGS.

[0247] In the contact variants shown in Figures 15 and 16, only the lower metal layer 19c or 19a of the contact element 19 is produced first, then the graphene membrane 16 and then the additional layer 19b, 19d or two additional layers 19a, 19b or 19d, 19b. It is also possible to deposit a suitable metal over the whole surface and structure it by lithography or RIE.

[0248] In the penultimate step S9, an upper passivation coat 37, preferably of Al2O3 and SiO2, is deposited, in which, in particular, openings to contact elements are preferably produced by lithography and RIE (step S10), preferably openings to contact elements serving to connect the photonics and / or electronics with the outside.

[0249] By the above procedure, a semiconductor device including the strip waveguide 12 and the electro-optical element 15 as shown in FIG. 2 can be obtained.

[0250] If it is desired to obtain a semiconductor device having exclusively or additionally a region configured as shown in FIG. 4, i.e. a region including a ridge waveguide 12, then only step S4 needs to be modified in such a way that segment 12a is laterally etched shallower, leaving the waveguide material laterally of segment 12a, thereby obtaining segments 12b, 12c which are free of strip waveguides.

[0251] 5, only the additional planarizing coat 13 needs to be partially removed again before fabricating the ridge waveguide 12. If it is desired to obtain a semiconductor device that does not at any point have the additional planarizing coat 13, its fabrication may of course be omitted entirely.

[0252] To obtain the embodiment shown in Fig. 6, first the lower waveguide segment 12c is produced on the side of the planarization coat 10 facing away from the wafer using the methods described above, for example PECVD. The active elements are then produced, in this case the graphene membrane 16 and the contact elements 19, the order of which again depends on which of the contact schemes shown in Figs. 12 to 16 is chosen. Then a passivation coat 25 is produced on the graphene membrane 16 (only shown in Figs. 12 to 16), followed by the two further segments 12b, 12a and the coat 37.

[0253] To obtain the arrangement shown in FIG. 7, a substantially similar procedure can be followed, omitting only the step of fabricating the waveguide segment 12c and providing a graphene film 16 on the surface 11 of the planarization coat 10 facing away from the wafer 5.

[0254] Also, when fabricating a semiconductor device according to the invention that includes one or more modulators 15 as electro-optical elements, the procedure differs in part from that described above in connection with FIG.

[0255] In the embodiment according to FIG. 8, for example, the planarizing coat 10 and the additional planarizing coat 13, up to the production of this coat 13 and the vias 7, can in principle be the same, ie steps S1 to S6.

[0256] However, the fabrication of each modulator(s) 15 then first involves providing one layer of the lower graphene membrane 16a as one of the two active elements on the additional planarization coat 13 and fabricating only one contact element 19 at one end region thereof towards the left in Fig. 8. The fabrication can be carried out in a similar manner as described above in relation to Fig. 2 for the one layer of graphene membrane 16 and the two contact elements 19.

[0257] Thereafter, a dielectric coating 17 is applied, for example by evaporation, preferably of aluminium oxide, or it can be applied by a transfer process.

[0258] Subsequently, a second, upper graphene membrane 16b is produced, followed by a second contact element 19 with its end region facing towards the right in Fig. 6. This production can again be carried out in a similar manner as described above in relation to Fig. 2 for one graphene membrane 16 and two contact elements 19.

[0259] Then, through the above-mentioned steps S8 and S9, the upper surface stabilizing coat 37 and its openings can be obtained.

[0260] 10, steps S1 to S6 can also be performed identically, after which the additional planarizing coat 13 can again be partially removed. Alternatively, it is also possible to omit their production, i.e. step S5, and to produce only the VIAs through the planarizing coat 10 in step S6.

[0261] Next, on the face 11 of the planarization coat 10 facing away from the wafer 5, a segment 12d, i.e. the waveguide base, is produced by depositing an optically transparent, preferably dielectric or semiconductor, coat and structuring it by lithography and RIE. In this case, TiO2 is deposited.

[0262] On the face of the waveguide base 12d facing away from the wafer 5, a lower graphene film 16a, then the associated contact elements 19, are produced on this, a waveguide segment 12c, an upper graphene film 16b with associated contact elements 19 on this, a waveguide segment 12b on this, and on this, a waveguide segment 12a, characterized by a significantly smaller width than the other segments 12b, 12c, 12d, are produced. The material of the waveguide segment 12b can be produced, for example, by a coat of dielectric or semiconducting material produced by ALD, or by CVD or transfer and a chalcogenide coat obtained by ALD, and / or by PVD and structured by lithography and RIE. Segment 12a is then provided, provided by ALD and / or PVD and / or PECVD and / or LPCVD with a dielectric or semiconducting material and / or dichalcogenide coat obtained by CVD or transfer and structured using lithography and RIE.

[0263] The graphene membranes 16a, 16b and the contact elements 19 may be fabricated in a manner similar to that described above in connection with FIG.

[0264] In this embodiment, the upper graphene film 16 extends within the waveguide 12 .

[0265] Finally, steps S9 and S10 can be performed again to obtain the passivation coat 37 and openings therein.

[0266] To obtain the arrangement according to FIG. 11, one can proceed substantially similarly to that described above in relation to FIG. 10, the only difference being that the fabrication of the bottom waveguide segment 12d in FIG. 10 is omitted and the lower graphene film 16a is fabricated directly on the face 11 of the planarization coat 10.

[0267] To obtain the arrangement according to FIG. 17, the same procedure is repeated (steps S1 to S3) until the planarizing coat 10 is completed. Then, on the surface 11 facing away from the wafer 5, a silicon coat 16 is produced as an active element. This can again involve the processes described above, for example CVD or PVD processes, spin coating, material deposition through a layer and subsequent construction (for example lithography or RIE) to obtain a T-shape. The resulting ridge waveguide is p-doped on one side and n-doped on the other side, obtaining the regions 16p and 16n. In this way, a pn junction is obtained. Then, the contact elements 19 can be produced.

[0268] For a modulator 15 shown in FIG. 18 designed as a so-called SISCAP, steps S1 to S3 may again be the same, followed by the production of two layers of silicon coats 16a and 16b each forming an active element, which may involve, for example, material deposition by one of the processes mentioned above, for example CVD or PVD processes or spin coating, followed by structuring (for example lithography and RIE) and the production of the associated contact elements 19.

[0269] With regard to FIG. 19, it is possible in principle to proceed similarly to FIG. 17, by adding an element 26 made of electro-optical polymer between the two elements 16a and 16b.

[0270] To obtain a modulator 15 according to Fig. 20, steps S1 to S5 may be the same as those described above in relation to Fig. 2. On the face 14 of the additional planarizing coat 13 facing away from the wafer 5, it is then possible to produce a first electrode 28 with associated contact elements 19, then a diode 27 with its coats 27a to 27d and then a second electrode 28 with its associated contact elements 19, thus involving in each case a material deposition and subsequent construction.

[0271] Finally, in all of the embodiments of Figures 17-20, the coat 37 can be prepared in a similar manner as the remaining embodiments.

[0272] As can be seen, photonic platform 8 is fabricated directly on BEOL 6 of wafer 1, or may be referred to as being monolithically fabricated on wafer 1, or as being a monolithic platform 8. In particular, coatings 10, 13, 37 and waveguide 12 are fabricated directly on wafer 1 by depositing appropriate materials onto BEOL 6 of wafer 1, or onto coatings already fabricated thereon, respectively, rather than separately fabricating coatings 10, 13, 37 or waveguide 12 and then connecting them by adhesive.

[0273] It should be noted that the above-described method for manufacturing a semiconductor device according to the present invention is an embodiment of the method according to the present invention.

[0274] After the semiconductor device according to the invention has been completed, a number of chips with integrated photonics can be obtained therefrom in a simple and fast manner, in particular by simple dicing, in other words by fragmentation.

[0275] 1, a dicing can be performed, for example including (laser) cutting and / or sawing and / or breaking along the illustrated lines that define the chip areas 4. In principle, the dicing can be performed in any manner known from the prior art, in particular as in the prior art for a conventional wafer 1.

[0276] Fig. 29 shows, by way of example, a purely schematic plan view of three chips with integrated photonics obtained by such dicing. These represent embodiments of semiconductor devices 38 according to the invention. Each of these semiconductor devices 38 comprises a chip 39 whose extent corresponds to the chip area 4 of the wafer 1 and an overlying portion 40 of the photonic platform 8, the lateral extent of which due to dicing at least substantially coincides with the lateral extent of the underlying chip 39. The chip 39 and said overlying portion 40 of the photonic platform 8 can be seen from the purely schematic cross-sectional view shown in Fig. 30.

[0277] It should be noted that in this highly simplified diagram, only the two overlap regions defined by the chip 39 and the photonics 40 are shown, without their coatings or components.

[0278] The chip 39 includes, in particular, a plurality of integrated electronic components 3 such as transistors and / or capacitors and / or resistors, which may, for example, be part of a processor of the chip 39, and the portion 40 of the photonic platform 8 includes, in particular, a plurality of electro-optical elements 15, as may be taken in particular from Figures 2 to 11 and Figures 17 to 23.

[0279] The resulting semiconductor devices 38 obtained by dicing the semiconductor device according to the invention, each representing a bare chip with monolithically integrated photonics, can then be inserted into a package for further use, as is known for conventional bare chips.

[0280] The photonic platform portion 40 may for example be used to convert electrical signals from integrated electrical components of the chip 39 into optical signals, so that communication with other chips of the device 38 and / or other integrated electronic components 4 can be achieved by optical means. For this purpose, light may be modulated by a modulator 15 coupled to an integrated electronic component, such as a transistor 4, and the modulated optical signal may be received by a photodetector 15 coupled to another integrated electronic component, such as a transistor 4, of the same or a different chip.

Claims

1. A photonic platform (8) comprising: a wafer (1) having a semiconductor substrate (2); and at least one integrated electronic component (3) extending in and / or on the semiconductor substrate (2), the wafer (1) having a front end (5) and a back end (6) located thereon, the front end (5) including at least one of the integrated electronic components (3); and a photonic platform (8) fabricated on a face (9) of the wafer (1) facing away from the front end (5), the photonic platform including at least one waveguide (12) and at least one electro-optical element (15).

1. A semiconductor device comprising: a photonic platform (8) having a surface (11) of said electro-optical element (15) connected to at least one of said integrated electronic components (3) of said wafer (1); and said photonic platform (8) having a planarization coating (10) of a dielectric material, said planarization coating (10) having a surface (11) of said planarization coating (10) facing away from said wafer (1) having a roughness of less than RMS 2.0 nm, and at least one layer of a further planarization coating (13) having a surface (14) facing away from said wafer (1) having a roughness of less than RMS 2.0 nm.

2. 2. The semiconductor device of claim 1, wherein the back end (6) of the wafer (1) and the photonic platform (8) include an interconnection element (7) through which at least one of the integrated electronic components (3) of the wafer (1) is connected to at least one of the electro-optical elements (15) of the photonic platform (*8).

3. 3. The semiconductor device according to claim 1 or 2, characterized in that the photonic platform (8) comprises a material deposited on the face (9) of the wafer (1) facing away from the front end (5).

4. the planarization coat (10) being a coat formed by chemical vapor deposition and / or physical vapor deposition and / or atomic layer deposition of at least one coating material on the face (9) of the wafer (1) facing away from the front end (5) and subsequent processing of the deposited material on the face (11) facing away from the wafer (1) by chemical mechanical polishing and / or by resist planarization, and / or the surface (11) of the planarizing coat (10) facing away from the wafer (1) is characterized by a roughness of less than 1.0 nm RMS; and / or 4. The semiconductor device according to claim 3, characterized in that the planarization coat (10) comprises or consists of spin-on glass and / or at least one polymer and / or at least one oxide and / or at least one nitride.

5. 5. A semiconductor device according to claim 1, characterized in that the planarizing coat (10) is made on the face (9) of the wafer (1) facing away from the front end (5).

6. A semiconductor device as described in any one of claims 1 to 5, characterized in that at least one layer of the planarization coating (13) is formed from the same material as the planarization coating (10).

7. at least one layer of the planarization coat (13) is formed by chemical vapor deposition and / or physical vapor deposition and / or atomic layer deposition of at least one coating material on the face (9) of the wafer (1) facing away from the front end (5) and by subsequent processing of the deposited material on the face (14) facing away from the wafer (1) by chemical mechanical polishing and / or by resist planarization, and / or at least one layer of said planarization coating (13) is characterized on its surface (14) facing away from said wafer (1) by a roughness of less than 1.0 nm RMS; and / or 7. A semiconductor device according to claim 1, characterized in that at least one layer of the planarization coat (13) comprises or consists of spin-on glass and / or at least one polymer and / or at least one oxide and / or at least one nitride.

8. 8. A semiconductor device according to claim 1, characterized in that the at least one waveguide (12) comprises or consists of titanium dioxide and / or aluminium nitride and / or tantalum pentoxide and / or silicon nitride and / or aluminium oxide and / or silicon oxynitride and / or lithium niobate and / or silicon and / or indium phosphite and / or gallium arsenide and / or indium gallium arsenide and / or aluminium gallium arsenide and / or at least one dichalcogenide and / or a chalcogenide glass and / or a resin or resin-containing material and / or a polymer or polymer-containing material.

9. The semiconductor device according to any one of the preceding claims, characterized in that the photonic platform (8) comprises at least two waveguides (12).

10. The semiconductor device according to any one of the preceding claims, characterized in that the photonic platform (8) comprises at least one coupling device (20) associated with at least one of the waveguides (12).

11. 11. The semiconductor device according to claim 1, wherein at least one of the electro-optical elements (15) comprises at least one active element (16, 16a, 16b) that absorbs electromagnetic radiation of at least one wavelength and generates an electrical optical signal as a result of said absorption and / or that comprises or is made of at least one material whose refractive index changes in response to a voltage and / or the presence of an electric charge and / or an electric field.

12. At least one of said electro-optical elements is a modulator (15) comprising an active element (16a) made of at least one material whose refractive index changes in response to the presence of a voltage and / or charge and / or an electric field; and an active element (16b) made of at least one material whose refractive index changes in response to the presence of a voltage and / or charge and / or an electric field; or provided by electrodes, 12. The semiconductor device according to claim 11, characterized in that the two active elements (16a, 16b), or the active element and the electrode, are spaced apart from each other and / or offset from each other such that one is partially above the other.

13. A semiconductor device as described in claim 12, characterized in that at least one material of the active element (16a) and / or at least one material of the further active element (16b) comprises or consists of graphene and / or at least one dichalcogenide and / or a heterostructure of two-dimensional materials and / or germanium and / or lithium niobate and / or at least one electro-optical polymer and / or silicon and / or at least one compound semiconductor.

14. 14. A semiconductor device according to claim 1, characterized in that at least one of the electro-optical elements is realized by a photodetector (15) including an active element (16) made of at least one material that absorbs electromagnetic radiation of at least one wavelength and generates an electrical optical signal as a result of said absorption.

15. The semiconductor device of claim 14, characterized in that at least one material of the active element (16) comprises or consists of graphene and / or at least one dichalcogenide and / or a heterostructure of two-dimensional materials and / or germanium and / or lithium niobate and / or at least one electro-optical polymer and / or silicon and / or at least one compound semiconductor.

16. 16. The semiconductor device according to claim 11, characterized in that on or above at least one of the active elements (16, 16a, 16b) there is provided at least one plasmonic structure (29) comprising or consisting of a plasmonic active material, the plasmonic structure (29) comprising at least a pair of plasmonic elements (30) comprising or consisting of a plasmonic active material arranged adjacent to each other and characterized by a portion tapering towards the respective other plasmonic element (30).

17. 17. The semiconductor device according to claim 16, characterized in that on at least one face of at least one of the active elements (16, 16a, 16b), the waveguide (12) is provided with a tapered end (31) in the direction of the active element, the tapered end (31) extending to the at least one of the active elements (16, 16a, 16b) and / or that on each of the two faces of the tapered portion (31) a contact element (19) is provided, the contact element (19) being connected to the at least one of the active elements (16, 16a, 16b) and the contact element (19) having a portion (19a) tapered in the opposite direction and located adjacent to the tapered end (31) of the waveguide (12).

18. 18. The semiconductor device according to claim 17, characterized in that a waveguide (12) having an end (31) tapered in the direction of at least one of the active elements (16, 16a, 16b) is provided on each of the two faces of the at least one active element (16, 16a, 16b), the respective tapered end (31) extending to the at least one active element (16, 16a, 16b) and / or that a contact element (19) is provided on each of the two faces of the respective tapered portion (31), the contact element (19) being connected to the at least one active element (16, 16a, 16b) and having a portion (19a) tapered in the opposite direction and located adjacent to the tapered end (31) of the respective waveguide (12).

19. providing a wafer (1) having a semiconductor substrate (2) and at least one integrated electronic component (3) extending in and / or on the semiconductor substrate (2), the wafer (1) having a front end (5) and a back end (6) located thereon, the front end (5) including the integrated electronic component (3) or at least one of the integrated electronic components (3); - fabricating a photonic platform (8) on a side (9) of said wafer (1) facing away from said front end (5), said photonic platform (8) comprising at least one waveguide (12) and at least one electro-optical element (15), the fabrication of the photonic platform (8) comprises fabricating a planarization coat (10), the fabrication of the planarization coat (10) comprising a coating material being applied to a face (9) of the wafer (1) facing away from the front end (5), the fabrication of the photonic platform (8) comprises fabricating at least one further planarization coat (13), The coating material of the planarizing coat (10) is planarized at least on the surface (11) facing away from the wafer (1) so that the surface roughness is less than 2.0 nm; and / or the coating material of the further planarizing coat (13) or at least one coating material of the further planarizing coat (13) has subsequently been planarized at least on the surface (14) facing away from the wafer (1) such that the roughness of said surface is less than 2.0 nm. A method for manufacturing a semiconductor device, comprising:

20. 20. The method according to claim 19, characterized in that the back end (6) of the provided wafer (1) comprises an interconnection element (7) connected to the integrated electronic components (3) of the front end (5) or to at least one of the integrated electronic components (3), and in the photonic platform (8) an interconnection element (7) is fabricated which is connected on the one hand to the interconnection element (7) of the back end (6) and on the other hand to at least one of the electro-optical elements (15).

21. 21. The method according to claim 17 or 20, characterized in that the fabrication of the photonic platform (8) comprises a material deposited on the face (9) of the wafer (1) facing away from the front end (5).

22. A method according to any one of claims 19 to 21, characterized in that at least one of the waveguides (12) is fabricated on the surface (11) of the planarizing coat (10) facing away from the wafer (1).

23. 23. The method according to any of claims 19 to 22, characterized in that the production of the planarization coat (10) comprises a subsequent planarization treatment in which the coating material is subjected to at least its face (11) facing away from the wafer (1) to obtain a roughness of less than 1.0 nm RMS.

24. The method according to claim 19, wherein at least one further planarizing coat (13) is applied after the manufacture of at least one waveguide (12).

25. A method according to claim 24, characterized in that the production of the further planarization coat (13) comprises applying a coating material to a surface (11) of the planarization coat (10) facing away from the wafer (1) and / or at least one waveguide (12), and then carrying out a planarization process on at least the surface (14) facing away from the wafer (1).

26. 26. The method of claim 25, wherein the planarization process is such as to obtain a lateral roughness of less than 1.0 nm RMS.

27. 27. The method according to any of claims 19 to 26, characterized in that the production of the planarizing coat (10) and / or the planarizing coat (13) comprises applying an additional coating material to the treated surface following the planarizing treatment.

28. 28. The method according to any of claims 19 to 27, characterized in that the fabrication of the at least one waveguide (12) comprises applying a waveguide material to the face (11) of the planarization coat (10) facing away from the wafer (1) and then carrying out a structuring of the applied waveguide material.

29. A method according to any of claims 19 to 28, characterized in that for at least one of the waveguides (12), at least one coupling device (32) is manufactured, which coupling device serves to couple electromagnetic radiation to and / or from the at least one waveguide (12).

30. A method for manufacturing at least one semiconductor device (38) comprising providing a semiconductor device according to any one of claims 1 to 18 and segmenting.

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