NITRIDE SEMICONDUCTOR LIGHT EMITTING ELEMENT AND METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR LIGHT EMITTING ELEMENT

Abstract

A nitride semiconductor light-emitting device capable of improving light output and a method for manufacturing the nitride semiconductor light-emitting device are provided. [Solution] A nitride semiconductor light emitting element 1 includes a substrate 2, a first buffer layer 3 formed on the substrate 2 and containing Al and N, a second buffer layer 4 formed on the first buffer layer 3, containing Al, Ga and N and having a smaller Al composition ratio than the first buffer layer 3, an n-type semiconductor layer 5 formed on the second buffer layer 4, an active layer 7 formed on the n-type semiconductor layer 5 and emitting ultraviolet light having a central wavelength of 365 nm or less, and a p-type semiconductor layer 9 formed on the active layer 7. The silicon concentration at the center of the first buffer layer 3 in the stacking direction is 1.02×10 18 [atoms / cm 3 ]below.

Description

[Technical field]

[0001] The present invention relates to a nitride semiconductor light-emitting device and a method for manufacturing the nitride semiconductor light-emitting device. [Background technology]

[0002] Patent Document 1 discloses a Group III nitride semiconductor epitaxial substrate including a sapphire substrate, an undoped AlN layer formed on the sapphire substrate, and an AlN buffer layer formed on the undoped AlN layer. In the Group III nitride semiconductor epitaxial substrate described in Patent Document 1, the silicon concentration in the AlN buffer layer is set to 1.0×10 19 / cm 3 It is assumed to be greater than [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2015-35535 A Summary of the Invention [Problem to be solved by the invention]

[0004] However, when the Group III nitride semiconductor epitaxial substrate described in Patent Document 1 is used to manufacture a nitride semiconductor light-emitting device that emits ultraviolet light, the high silicon concentration in the buffer layer makes it easy for ultraviolet light to be absorbed, resulting in a decrease in optical output.

[0005] The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a nitride semiconductor light-emitting element capable of improving the optical output, and a method for manufacturing the nitride semiconductor light-emitting element. [Means for solving the problem]

[0006] In order to achieve the above object, the present invention provides a semiconductor device comprising: a substrate; a first buffer layer containing Al and N formed on the substrate; a second buffer layer formed on the first buffer layer, containing Al, Ga, and N, and having a lower Al composition ratio than the first buffer layer; an n-type semiconductor layer formed on the second buffer layer; an active layer formed on the n-type semiconductor layer and emitting ultraviolet light having a central wavelength of 365 nm or less; and a p-type semiconductor layer formed on the active layer, wherein the silicon concentration at the center of the stacking direction of the first buffer layer is 1.02×10 18 [atoms / cm 3 ] or less a negative peak appears in the distribution of silicon concentration of the second buffer layer in the stacking direction, and the silicon concentration of the negative peak is equal to or higher than the silicon concentration at the center of the first buffer layer in the stacking direction. To provide a nitride semiconductor light emitting device 。 In order to achieve the above object, the present invention provides a semiconductor device comprising: a substrate; a first buffer layer containing Al and N formed on the substrate; a second buffer layer formed on the first buffer layer, containing Al, Ga, and N, and having a lower Al composition ratio than the first buffer layer; an n-type semiconductor layer formed on the second buffer layer; an active layer formed on the n-type semiconductor layer and emitting ultraviolet light having a central wavelength of 365 nm or less; and a p-type semiconductor layer formed on the active layer, wherein the silicon concentration at the center of the stacking direction of the first buffer layer is 1.02×10 18 [atoms / cm 3 ] or less, and in the distribution of silicon concentration in the stacking direction, a positive peak appears in a range in the stacking direction that includes the position of the interface of the first buffer layer on the second buffer layer side.

[0007] In order to achieve the above object, the present invention provides a method for forming a first buffer layer containing Al and N on a substrate, forming a second buffer layer containing Al, Ga, and N and having a smaller Al composition ratio than the first buffer layer on the first buffer layer, forming an n-type semiconductor layer on the second buffer layer, forming an active layer emitting ultraviolet light having a central wavelength of 365 nm or less on the n-type semiconductor layer, and forming a p-type semiconductor layer on the active layer, wherein the silicon concentration at the center of the stacking direction of the first buffer layer is 1.02×10 18 [atoms / cm 3 ] or less an intermediate body in which the first buffer layer is formed on the substrate is exposed to an atmosphere containing silicon before the second buffer layer is formed, so that a positive peak appears in a range of the stacking direction including a position of an interface of the first buffer layer on the second buffer layer side in a distribution of silicon concentration in the stacking direction; A method for manufacturing a nitride semiconductor light emitting device is provided. Effect of the Invention

[0008] According to the present invention, it is possible to provide a nitride semiconductor light-emitting element capable of improving the optical output and a method for manufacturing the nitride semiconductor light-emitting element. [Brief description of the drawings]

[0009] [Figure 1] 1 is a schematic diagram illustrating a configuration of a nitride semiconductor light emitting device according to an embodiment. [Diagram 2] 1 is a graph showing silicon concentration distributions in wafers for Samples 1 to 5 in an experimental example. [Diagram 3] 3 is a graph showing an enlarged view of a portion of FIG. 2. [Figure 4] 13 is a graph showing the relationship between the central silicon concentration of the first buffer layer and the optical output in an experimental example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] [Embodiment Mode] An embodiment of the present invention will be described with reference to Figures 1 to 3. Note that the embodiment described below is shown as a preferred specific example for carrying out the present invention, and while there are some parts that specifically exemplify various technical matters that are technically preferable, the technical scope of the present invention is not limited to this specific embodiment.

[0011] (Nitride semiconductor light emitting device 1) FIG. 1 is a schematic diagram showing the configuration of a nitride semiconductor light-emitting element 1. In FIG. 1, the dimensional ratio of the stacking direction of each semiconductor layer of the nitride semiconductor light-emitting element 1 (hereinafter also simply referred to as "light-emitting element 1") does not necessarily match the actual one. Hereinafter, the stacking direction of each semiconductor layer of the light-emitting element 1 is referred to as the up-down direction. Also, one side in the up-down direction, that is, the side on which each semiconductor layer of the substrate 2 is grown (e.g., the upper side in FIG. 1) is referred to as the upper side, and the opposite side (e.g., the lower side in FIG. 1) is referred to as the lower side. Note that the expressions up and down are for convenience, and do not limit the attitude of the light-emitting element 1 with respect to the vertical direction, for example, when the light-emitting element 1 is used.

[0012] The light-emitting element 1 constitutes, for example, a light-emitting diode (LED) or a semiconductor laser (LD: Laser Diode). In this embodiment, the light-emitting element 1 constitutes a light-emitting diode that emits light with a wavelength in the ultraviolet region. In particular, the light-emitting element 1 in this embodiment emits ultraviolet light with a central wavelength of 240 nm or more and 365 nm or less. The light-emitting element 1 can be used in the fields of, for example, sterilization (e.g., air purification, water purification, etc.), medicine (e.g., phototherapy, measurement and analysis, etc.), UV curing, etc.

[0013] The light-emitting element 1 includes a first buffer layer 3, a second buffer layer 4, an n-type semiconductor layer 5, a compositionally graded layer 6, an active layer 7, an electron blocking layer 8, and a p-type semiconductor layer 9, which are arranged in this order on a substrate 2. The light-emitting element 1 also includes an n-side electrode 11 provided on the n-type semiconductor layer 5, and a p-side electrode 12 provided on the p-type semiconductor layer 9.

[0014] The semiconductor constituting the light emitting element 1 is, for example, Al. a Ga b In 1-a-b In this embodiment, the semiconductor constituting the light emitting element 1 can be Al. c Ga 1-c The semiconductor material uses a binary or ternary group III nitride semiconductor represented by N (0≦c≦1). Some of these group III elements may be replaced with boron (B), thallium (Tl), etc. Also, some of the nitrogen may be replaced with phosphorus (P), arsenic (As), antimony (Sb), bismuth (Bi), etc.

[0015] The substrate 2 is made of a material that transmits the light emitted by the active layer 7. In this embodiment, the substrate 2 is a sapphire (Al2O3) substrate. The growth plane 21 formed on the upper surface of the substrate 2 is a c-plane. This c-plane may have an off-angle. Alternatively, for example, an aluminum nitride (AlN) substrate or an aluminum gallium nitride (AlGaN) substrate may be used as the substrate 2.

[0016] The first buffer layer 3 is formed on the substrate 2. The first buffer layer 3 has a higher Al composition ratio than the second buffer layer 4. p Ga 1-p N (0.7≦p≦1). The Al composition ratio is also referred to as AlN mole fraction. In this embodiment, the first buffer layer 3 is made of aluminum nitride. The thickness of the first buffer layer 3 is greater than the thickness of the second buffer layer 4. For example, the thickness of the first buffer layer 3 is 1800 nm or more and 2200 nm or less.

[0017] FIG. 2 is a graph showing silicon concentration distribution in the stacking direction of wafers according to samples 1 to 3 having the configuration of this embodiment and wafers according to samples 4 and 5 not having the configuration of this embodiment. Hereinafter, when silicon concentration distribution is simply mentioned, it means the distribution of silicon concentration in the stacking direction. FIG. 2 shows the silicon concentration distribution in the stacking direction region around the first buffer layer 3 in the light emitting element 1. In FIG. 2, the boundaries of each semiconductor layer are shown by thin solid lines in the vertical direction. FIG. 2 shows the silicon concentration obtained by secondary ion mass spectrometry (SIMS) by injecting ions into the wafer from the top (i.e., the side opposite to the substrate). FIG. 3 is an enlarged view of the vicinity of the second buffer layer 4 in FIG. 2. Details of samples 1 to 5 will be described in the experimental example described later.

[0018] As shown in FIG. 2, the first buffer layer 3 has a silicon concentration that is lower than the measurement limit (e.g., 5.00×10 15 [atoms / cm 3]) or more. Since the first buffer layer 3 is a semiconductor layer with a high Al composition ratio as described above, silicon (Si) in the first buffer layer 3 is unlikely to enter the lattice sites of the aluminum nitride constituting the first buffer layer 3, and is likely to exist at the interstitial sites of the aluminum nitride. At least a part of the silicon existing at the interstitial sites of the aluminum nitride exists in a state in which a compound such as silicon nitride is precipitated. The silicon existing undoped in the first buffer layer 3 absorbs ultraviolet light with a central wavelength of 365 nm or less emitted by the active layer 7, and is presumed to be a factor in reducing the light output of the light emitting device 1. Therefore, as described below, in the light emitting device 1 of this embodiment, the silicon concentration of the first buffer layer 3 is low.

[0019] Here, the interface of the first buffer layer 3 with the substrate 2 is referred to as the first interface 31, and the interface of the first buffer layer 3 with the second buffer layer 4 is referred to as the second interface 32. In the silicon concentration distribution of the light emitting element 1, a region from the first interface 31 of the first buffer layer 3 to a position a predetermined distance (for example, 500 nm) above is a region where accurate measurement of the silicon concentration is difficult due to the influence of the substrate 2. In addition, in the silicon concentration distribution, a range from the second interface 32 of the first buffer layer 3 to a position a predetermined distance (for example, 250 nm) below is a region where the silicon concentration is locally high due to the influence of silicon contained in the vicinity of the second interface 32 of the first buffer layer 3. In the first buffer layer 3, the change in the silicon concentration of the first buffer layer 3 in the stacking direction is gradual (for example, the change is 2.00×10 17 [atoms / cm 3 ] within the range below.

[0020] In the light-emitting device 1 of this embodiment, the silicon concentration at the center C in the stacking direction of the first buffer layer 3 (see the dashed line in FIG. 2) (hereinafter, “center silicon concentration Si center ") is 1.02 × 10 18 [atoms / cm3 This suppresses the absorption of ultraviolet light emitted by the active layer 7 in the first buffer layer 3, improving the optical output of the light emitting device 1. In addition, the central silicon concentration Si center is 0.91 × 10 18 [atoms / cm 3 ] or less is preferable, and 0.83 × 10 18 [atoms / cm 3 These values ​​are supported by experimental examples described later. Furthermore, the central silicon concentration Si center The lower limit is 0[atoms / cm 3 ] or more. Considering feasibility, for example, 1.00 × 10 16 [atoms / cm 3 The central silicon concentration Si center is, for example, the average silicon concentration in a range between a position 30 nm away from the center C in the stacking direction on one side in the stacking direction and a position 30 nm away from the center C in the stacking direction on the other side in the stacking direction.

[0021] 2 and 3, in the silicon concentration distribution of the light-emitting element 1, a positive peak P1 appears in a range in the stacking direction including the position of the second interface 32. The positive peak means a peak that is convex toward the side where the silicon concentration value is high (upper side in the graphs of FIGS. 2 and 3) in the silicon concentration distribution of the light-emitting element 1, and the negative peak means a peak that is convex toward the side where the silicon concentration value is low (lower side in the graphs of FIGS. 2 and 3). The silicon concentration of this positive peak P1 (i.e., peak top value Si top ) is 1.15 × 10 18 [atoms / cm 3 ] or more is preferable, and 2.22 × 10 18 [atoms / cm 3 In this way, by containing at least a certain amount of silicon in the vicinity of the second interface 32 of the first buffer layer 3, dislocations extending upward from the substrate 2 are suppressed from extending further upward than the second interface 32. topcan be set to be less than the silicon concentration of the n-type semiconductor layer 5, for example.

[0022] As shown in FIG. 1, the second buffer layer 4 is formed on the first buffer layer 3. The second buffer layer 4 is made of undoped Al q Ga 1-q N (0≦q<1). An undoped semiconductor layer means a semiconductor layer to which no impurities are intentionally added during the formation of the semiconductor layer, and a semiconductor layer containing a trace amount of impurities that is inevitably included is also considered to be an undoped semiconductor layer. The Al composition ratio q of the second buffer layer 4 can be, for example, equal to or greater than the Al composition ratio r of the n-type semiconductor layer 5 and less than the Al composition ratio p of the first buffer layer 3. The Al composition ratio q of the second buffer layer 4 is, for example, 45% or more and 65% or less. The film thickness of the second buffer layer 4 is, for example, 80 nm or more and 120 nm or less.

[0023] As shown in FIG. 2, the second buffer layer 4 contains silicon at a concentration equal to or higher than the measurement limit of silicon concentration by, for example, SIMS. A negative peak P2 appears in the silicon concentration distribution of the second buffer layer 4. This can be formed, for example, because the upper end of the second buffer layer 4 is adjacent to the n-type semiconductor layer 5 with a high silicon concentration, the lower end of the second buffer layer 4 is adjacent to the end of the first buffer layer 3 on the second interface 32 side where the silicon concentration is locally high, and no silicon source is supplied (or only a very small amount is supplied) during deposition of the second buffer layer 4. The silicon concentration of the negative peak P2 (i.e., the peak bottom value Si bottom ) is the central silicon concentration Si of the first buffer layer 3 center The above is preferable (i.e., only sample 1 among samples 1 to 5 in FIG. 2). In the second buffer layer 4, the Al composition ratio is lower and silicon is more easily doped than in the first buffer layer 3, and the peak bottom value Si bottom is the central silicon concentration Si centerBy setting the value to the above value, the second buffer layer 4 is doped with silicon, and an appropriate distortion occurs in the crystal lattice constituting the second buffer layer 4. As a result, it is presumed that lattice relaxation is less likely to occur during the formation of the n-type semiconductor layer 5 on the second buffer layer 4, and the crystallinity of the n-type semiconductor layer 5 is improved. bottom is 2.00 x 10 17 [atoms / cm 3 If the silicon concentration of the second buffer layer 4 is too high, cracks may occur in the second buffer layer 4, making it difficult to form the second buffer layer 4. Therefore, the peak bottom value Si bottom is 1.00 x 10 18 [atoms / cm 3 ] or less is preferred.

[0024] 1, the n-type semiconductor layer 5 is formed on the second buffer layer 4. The n-type semiconductor layer 5 is, for example, Al doped with n-type impurities. r Ga 1-r N (0≦r≦1). In this embodiment, silicon (Si) is used as the n-type impurity. The same applies to semiconductor layers containing n-type impurities other than the n-type semiconductor layer 5. Note that germanium (Ge), selenium (Se), tellurium (Te), etc. may also be used as the n-type impurity. The Al composition ratio r of the n-type semiconductor layer 5 is, for example, 45% or more and 65% or less. The n-type semiconductor layer 5 may have a single-layer structure or a multi-layer structure.

[0025] The compositionally graded layer 6 is formed on the n-type semiconductor layer 5. The compositionally graded layer 6 is made of Al s Ga 1-s N (0≦s≦1). The Al composition ratio at each position in the vertical direction of the composition gradient layer 6 increases toward the upper side. Note that the composition gradient layer 6 may include a region in which the Al composition ratio does not increase toward the upper side, for example, in a very small region in the vertical direction (for example, a region of 5% or less of the entire vertical direction of the composition gradient layer 6).

[0026] The compositional gradient layer 6 preferably has an Al composition ratio at its lower end that is substantially the same as (for example, within a 5% difference) the Al composition ratio at the upper end of the n-type semiconductor layer 5 adjacent to the lower side of the compositional gradient layer 6. Also, the compositional gradient layer 6 preferably has an Al composition ratio at its upper end that is substantially the same as (for example, within a 5% difference) the Al composition ratio at the lower end of the barrier layer 71 adjacent to the upper side of the compositional gradient layer 6.

[0027] The active layer 7 is formed on the compositional gradient layer 6. The active layer 7 in this embodiment has a multiple quantum well structure having a plurality of well layers 721, 722. The bandgap of the active layer 7 is adjusted so that it can emit ultraviolet light with a central wavelength of 240 nm or more and 365 nm or less. When the active layer 7 has a multiple quantum well structure as in this embodiment, from the viewpoint of improving the light output, the central wavelength of the ultraviolet light emitted by the active layer 7 is preferably 250 nm or more and 320 nm or less, and more preferably 260 nm or more and 290 nm or less. In this embodiment, the active layer 7 has three barrier layers 71 and three well layers 721, 722, and the barrier layers 71 and the well layers 721, 722 are alternately laminated. In the active layer 7, a barrier layer 71 is located at the lower end, and a well layer 722 is located at the upper end.

[0028] Each barrier layer 71 is formed of Al t Ga 1-t N (0 < t ≦ 1). The Al composition ratio t of each barrier layer 71 is, for example, 75% or more and 95% or less. Also, the film thickness of each barrier layer 71 is, for example, 2 nm or more and 50 nm or less.

[0029] The well layers 721, 722 are formed of Al u Ga 1-u N (0 < u < 1). The Al composition ratio u of each well layer 721, 722 is smaller than the Al composition ratio t of the barrier layer 71 (that is, u < t).

[0030] The three well layers 721, 722 have different configurations between the bottom well layer 721, which is the well layer disposed at the bottom, and the upper well layer 722, which is the two well layers other than the bottom well layer 721. For example, the film thickness of the bottom well layer 721 is 1 nm or more larger than the film thickness of each of the two upper well layers 722, and the Al composition ratio of the bottom well layer 721 is 2% or more larger than the Al composition ratio of each of the two upper well layers 722. In this embodiment, the upper well layer 722 has a film thickness of 2 nm to 4 nm and an Al composition ratio of 25% to 45%, and the bottom well layer 721 has a film thickness of 4 nm to 6 nm and an Al composition ratio of 35% to 55%. The difference in film thickness between the bottom well layer 721 and each upper well layer 722 can be 2 nm to 4 nm.

[0031] By making the Al composition ratio of the bottom well layer 721 larger than that of the upper well layer 722, the crystallinity of the bottom well layer 721 is improved. This is because the difference in Al composition ratio between the bottom well layer 721 and the n-type semiconductor layer 5 is reduced. By improving the crystallinity of the bottom well layer 721, the crystallinity of each semiconductor layer of the active layer 7 formed above the bottom well layer 721 is also improved. This improves the mobility of carriers in the active layer 7 and improves the light output. This effect becomes more pronounced as the film thickness of the bottom well layer 721 increases, but from the viewpoint of suppressing an increase in the electrical resistance value of the entire light-emitting device 1, the film thickness of the bottom well layer 721 is designed to be equal to or less than a predetermined value.

[0032] In the present embodiment, the active layer has a multiple quantum well structure with three well layers, but is not limited thereto and may have a multiple quantum well structure with two or four or more well layers. Also, the active layer may have a single quantum well structure with only one well layer.

[0033] The electron blocking layer 8 is formed on the active layer 7. The electron blocking layer 8 has the role of improving the electron injection efficiency into the active layer 7 by suppressing the occurrence of an overflow phenomenon in which electrons leak from the active layer 7 to the p-type semiconductor layer 9 side (hereinafter also referred to as the electron blocking effect). The electron blocking layer 8 has a stacked structure in which a first layer 81 and a second layer 82 are stacked in order from the bottom side.

[0034] The first layer 81 is provided on the active layer 7. The first layer 81 is composed of, for example, Al v Ga 1-v N (0 < v ≦ 1). The Al composition ratio v of the first layer 81 is, for example, 90% or more, and in this embodiment, it is composed of aluminum nitride. The film thickness of the first layer 81 is, for example, 0.5 nm or more and 5.0 nm or less.

[0035] The second layer 82 is composed of, for example, Al w Ga 1-w N (0 < w < 1). The Al composition ratio w of the second layer 82 is smaller than the Al composition ratio v of the first layer 81 (that is, w < v), and is, for example, 70% or more and 90% or less. The film thickness of the second layer 82 is larger than the film thickness of the first layer 81, and is, for example, 15 nm or more and 100 nm or less.

[0036] Since a semiconductor layer with a larger Al composition ratio has a larger electrical resistance value, if the film thickness of the first layer 81 with a relatively high Al composition ratio is made too large, an excessive increase in the overall electrical resistance value of the light-emitting element 1 will occur. Therefore, it is preferable to make the film thickness of the first layer 81 somewhat small. On the other hand, if the film thickness of the first layer 81 is made small, the probability that electrons tunnel through the first layer 81 from the bottom side to the top side can increase. Therefore, in the light-emitting element 1 of this embodiment, by forming the second layer 82 on the first layer 81, the electrons passing through the entire electron blocking layer 8 are suppressed.

[0037] Each of the first layer 81 and the second layer 82 may be an undoped layer, a layer containing an n-type impurity, a layer containing a p-type impurity, or a layer containing both an n-type impurity and a p-type impurity. Magnesium (Mg) may be used as the p-type impurity, but zinc (Zn), beryllium (Be), calcium (Ca), strontium (Sr), barium (Ba), carbon (C), or the like may also be used. The same applies to other semiconductor layers containing p-type impurities. When each electron block layer 8 contains an impurity, the impurity contained in each electron block layer 8 may be contained in the entirety of each electron block layer 8, or may be contained in a part of each electron block layer 8.

[0038] Silicon is contained between the electron blocking layer 8 and the p-type semiconductor layer 9. Magnesium is easily attracted to silicon, and hydrogen is easily bonded to magnesium. The presence of silicon between the electron blocking layer 8 and the p-type semiconductor layer 9 suppresses the diffusion of magnesium and hydrogen from the p-type semiconductor layer 9 to the active layer 7, thereby extending the life of the light-emitting element 1. Furthermore, the presence of silicon between the electron blocking layer 8 and the p-type semiconductor layer 9 may form a layer having pits (for example, so-called V pits) between the electron blocking layer 8 and the p-type semiconductor layer 9. The pits are formed by supplying a silicon source to a location where dislocations exist, and therefore the formation of the pits suppresses the dislocations from progressing upward beyond the pits, thereby extending the life of the light-emitting element 1.

[0039] The p-type semiconductor layer 9 is formed on the electron blocking layer 8. The p-type semiconductor layer 9 has a smaller Al composition ratio than the electron blocking layer 8, and is doped with p-type impurities. x Ga 1-x N (0≦x<1). In this embodiment, the p-type semiconductor layer 9 has a laminated structure in which a first p-type cladding layer 91, a second p-type cladding layer 92, and a p-type contact layer 93 are laminated in this order from the bottom.

[0040] The first p-type clad layer 91 is provided to be in contact with the second layer 82. The first p-type clad layer 91 is made of Al y Ga 1-y N (0 < y < 1). The Al composition ratio y of the first p-type clad layer 91 is, for example, 45% or more and 65% or less. The film thickness of the first p-type clad layer 91 is, for example, 15 nm or more and 35 nm or less.

[0041] The second p-type clad layer 92 is made of Al z Ga 1-z N (0 < z < 1). The Al composition ratio at each position in the vertical direction of the second p-type clad layer 92 becomes smaller as the position is higher. Note that the second p-type clad layer 92 may include a region where the Al composition ratio does not decrease as it goes upward in a very small part of the stacking direction (for example, a region within 5% of the entire stacking direction of the second p-type clad layer 92).

[0042] It is preferable that the Al composition ratio of the lower end portion of the second p-type clad layer 92 is substantially the same as that of the first p-type clad layer 91 (for example, the difference is within 5%), and the Al composition ratio of the upper end portion of the second p-type clad layer 92 is substantially the same as that of the p-type contact layer 93 (for example, the difference is within 5%). The film thickness of the second p-type clad layer 92 can be, for example, 2 nm or more and 4 nm or less.

[0043] The p-type contact layer 93 is a layer to which the p-side electrode 12 described later is connected, and is doped with a high concentration of p-type impurities. The p-type contact layer 93 is configured such that the Al composition ratio becomes low (for example, 10% or less) to achieve an ohmic contact with the p-side electrode 12, and from this viewpoint, it is preferably formed of p-type gallium nitride (GaN). The film thickness of the p-type contact layer 93 is, for example, 10 nm or more and 25 nm or less. Note that the p-type semiconductor layer 9 may be a single layer or a plurality of layers.

[0044] The n-side electrode 11 is formed on an exposed surface 51 that is exposed upward from the active layer 7 in the n-type semiconductor layer 5. The n-side electrode 11 may be, for example, a multilayer film in which titanium (Ti), aluminum, titanium, and titanium nitride (TiN) are laminated in this order on the n-type semiconductor layer 5.

[0045] The p-side electrode 12 is formed on the upper surface of the p-type semiconductor layer 9. The p-side electrode 12 may be made of, for example, rhodium (Rh). In this embodiment, the p-side electrode 12 is a reflective electrode having a reflectance of 50% or more, preferably 60% or more, at the central wavelength of light emitted by the active layer 7, but is not limited thereto.

[0046] The light emitting element 1 is flip-chip mounted on a package substrate (not shown) for use. That is, the side of the light emitting element 1 on which the n-side electrode 11 and the p-side electrode 12 are provided in the up-down direction faces the package substrate, and each of the n-side electrode 11 and the p-side electrode 12 is mounted on the package substrate via a connection member such as a gold bump. Light is extracted from the substrate 2 side (i.e., the lower side) of the flip-chip mounted light emitting element 1.

[0047] (Method of manufacturing the nitride semiconductor light emitting element 1) Next, an example of a method for manufacturing the light emitting device 1 of this embodiment will be described. In this embodiment, a first buffer layer 3, a second buffer layer 4, an n-type semiconductor layer 5, a compositionally graded layer 6, an active layer 7, an electron blocking layer 8, and a p-type semiconductor layer 9 are epitaxially grown in sequence on a disk-shaped substrate 2 by metal organic chemical vapor deposition (MOCVD). That is, in this embodiment, the disk-shaped substrate 2 is placed in a chamber, and the source gases of the semiconductor layers to be formed on the substrate 2 are introduced into the chamber to form the semiconductor layers on the substrate 2. As source gases for epitaxially growing the semiconductor layers, trimethylaluminum (TMA) as an aluminum source, trimethylgallium (TMG) as a gallium source, ammonia (NH3) as a nitrogen source, tetramethylsilane (TMSi) as a silicon source, and biscyclopentadienylmagnesium (Cp2Mg) as a magnesium source can be used.

[0048] The MOCVD method is also called Metal Organic Vapor Phase Epitaxy (MOVPE). When epitaxially growing each semiconductor layer on the substrate 2, other epitaxial growth methods such as Molecular Beam Epitaxy (MBE) and Hydride Vapor Phase Epitaxy (HVPE) can also be used.

[0049] In the method for manufacturing the light emitting device 1 of this embodiment, when the first buffer layer 3 is formed, the central silicon concentration Si centerAs described above, the amount of TMSi supplied during deposition of the first buffer layer 3 is reduced. For example, the chamber used for depositing each semiconductor layer of the light-emitting element 1 is designed to contain as little material containing silicon as a constituent element as possible. If a material containing silicon is used for the chamber, silicon may be released from the material constituting the chamber during deposition of the wafer, and there is a concern that the first buffer layer 3 may contain a large amount of silicon. For example, in the HVPE method, quartz (SiO2) is often used for the chamber, so that it is preferable to deposit each semiconductor layer of the light-emitting element 1 by the MOCVD method. In this embodiment, the amount of TMSi supplied during deposition of the first buffer layer 3 is set to 3.0 sccm or less (including zero). This also reduces the central silicon concentration Si center becomes lower as mentioned above.

[0050] Furthermore, in the manufacturing method of the light-emitting device 1 of this embodiment, an intermediate body consisting of the substrate 2 and the first buffer layer 3 obtained after the deposition of the first buffer layer 3 is exposed to an atmosphere containing silicon. For example, the intermediate body is temporarily taken out from the chamber into the atmosphere containing silicon. As a result, silicon is taken into the first buffer layer 3 from the surface of the first buffer layer 3 opposite to the substrate 2, and the above-mentioned positive peak P1 appears in the silicon concentration distribution of the light-emitting device 1.

[0051] Then, after the intermediate body is returned into the chamber, the second buffer layer 4, the n-type semiconductor layer 5, the composition gradient layer 6, the active layer 7, the electron blocking layer 8, and the p-type semiconductor layer 9 are epitaxially grown in sequence. In this embodiment, the silicon source TMSi is not supplied when the second buffer layer 4 is formed, and therefore the second buffer layer 4 is formed as an undoped semiconductor layer. Other manufacturing conditions such as the growth temperature, growth pressure, and growth time for epitaxially growing each semiconductor layer of the wafer can be general conditions according to the configuration of each semiconductor layer.

[0052] After each semiconductor layer is formed on the disk-shaped substrate 2, a mask is formed on a portion of the p-type semiconductor layer 9, i.e., on a portion other than the portion that will become the exposed surface 51 of the n-type semiconductor layer 5. Then, the region where the mask is not formed is removed by etching from the upper surface of the p-type semiconductor layer 9 to the middle of the n-type semiconductor layer 5 in the vertical direction. As a result, the exposed surface 51 that is exposed toward the upper side is formed in the n-type semiconductor layer 5. After the exposed surface 51 is formed, the mask is removed.

[0053] Next, an n-side electrode 11 is formed on the exposed surface 51 of the n-type semiconductor layer 5, and a p-side electrode 12 is formed on the p-type semiconductor layer 9. The n-side electrode 11 and the p-side electrode 12 may be formed by a well-known method such as an electron beam deposition method or a sputtering method. The above-completed product is cut into desired dimensions to produce a plurality of light-emitting elements 1 as shown in FIG. 1 from one wafer.

[0054] (Functions and Effects of the Embodiments) In the light emitting device 1 of this embodiment, the silicon concentration Si center But 1.02 × 10 18 [atoms / cm 3 ] or less. This improves the light output of the light-emitting element 1. This value is supported by experimental examples described later.

[0055] In addition, in the distribution of the silicon concentration of the second buffer layer 4, a negative peak P2 appears, and the silicon concentration of the negative peak P2 (i.e., the peak bottom value Si bottom ) is the silicon concentration Si at the center C in the stacking direction of the first buffer layer 3 center The second buffer layer 4 has a lower Al composition ratio and is more easily doped with silicon than the first buffer layer 3. bottom is the silicon concentration Si at the center C in the stacking direction of the first buffer layer 3. centerAs a result, the second buffer layer 4 is doped with silicon, and an appropriate distortion occurs in the crystal lattice constituting the second buffer layer 4. As a result, it is presumed that lattice relaxation is less likely to occur when the n-type semiconductor layer 5 is formed on the second buffer layer 4, and the crystallinity of the n-type semiconductor layer 5 is improved. Furthermore, the silicon concentration of the first buffer layer 3 is lower, and the light output of the light-emitting element 1 is also improved.

[0056] In addition, in the silicon concentration distribution of the light-emitting element 1, a positive peak P1 appears in a range in the stacking direction that includes the position of the second interface 32. In this manner, by containing at least a certain amount of silicon in the vicinity of the second interface 32 of the first buffer layer 3, dislocations extending upward from the substrate 2 are prevented from extending further upward than the second interface 32.

[0057] In addition, the silicon concentration of the positive peak P1 (i.e., the peak top value Si top ) is 2.22 × 10 18 [atoms / cm 3 As a result, dislocations extending upward from the substrate 2 are further prevented from extending beyond the second interface 32.

[0058] The Al composition ratio of the second buffer layer 4 is equal to or greater than the Al composition ratio of the n-type semiconductor layer 5. This prevents a sudden change in the Al composition ratio between one buffer layer vertically adjacent to the second buffer layer 4 and the n-type semiconductor layer 5, thereby preventing dislocations in the n-type semiconductor layer 5 from occurring due to lattice mismatch.

[0059] Furthermore, an intermediate body in which the first buffer layer 3 is formed on the substrate 2 is exposed to an atmosphere containing silicon before forming the second buffer layer 4. This makes it possible to easily manufacture the light-emitting element 1 in which the above-mentioned positive peak P1 appears in the silicon concentration distribution.

[0060] As described above, according to the present embodiment, it is possible to provide a nitride semiconductor light-emitting device capable of improving the optical output and a method for manufacturing the nitride semiconductor light-emitting device.

[0061] [Experimental Example] In this experimental example, the central silicon concentration Si center This is an example in which the change in the optical output of the wafer was evaluated when the temperature was changed. In addition, among the names of the components used in this experimental example, those that are the same as those used in the above embodiment represent the same components as those in the above embodiment unless otherwise specified.

[0062] In this experimental example, as shown in FIG. 2, the central silicon concentration Si center Wafers according to Samples 1 to 5, which have different silicon concentrations Si center The adjustment was performed by changing the supply amount of TMSi, which is a silicon source, when forming the first buffer layer 3 of each of Samples 1 to 5. The supply amount of TMSi when forming the first buffer layer 3 was 0.0 sccm for Sample 1, 2.5 sccm for Sample 2, 3.0 sccm for Sample 3, 3.5 sccm for Sample 4, and 4.0 sccm for Sample 5 (see Table 2 described later). In addition, in Samples 1 to 5, the central silicon concentration Si center As a result of changing the silicon concentration distribution in the second buffer layer 4, the peak-bottom value Si bottom , and the peak top value Si top The wafers of samples 1 to 5 are explained with reference to Table 1.

[0063] [Table 1]

[0064] The thickness of each semiconductor layer listed in Table 1 was measured by a transmission electron microscope. The Al composition ratio of each layer listed in Table 1 is a value estimated from the secondary ion intensity of Al measured by SIMS. The column for the composition gradient layer 6 in Table 1 indicates that the Al composition ratio at each position in the vertical direction of the composition gradient layer 6 gradually increases from 55% to 85% from the bottom end to the top end of the composition gradient layer 6. The column for the second p-type cladding layer 92 in Table 1 indicates that the Al composition ratio at each position in the vertical direction of the second p-type cladding layer 92 gradually decreases from 55% to 0% from the bottom end to the top end of the second p-type cladding layer 92.

[0065] The Si concentration and Mg concentration shown in Table 1 are the silicon concentration and magnesium concentration obtained when the wafer is measured from above using SIMS. In Table 1, the silicon concentration of the bottom well layer 721 indicates the peak concentration of the silicon concentration at each position in the vertical direction of the bottom well layer 721. In Table 1, the points marked with * in the Si concentration column indicate that the semiconductor layer is thin and therefore it is difficult to accurately measure the silicon concentration and magnesium concentration. In Table 1, the notation "BG" in the Si concentration and Mg concentration columns indicates the background level. The background level is the concentration of silicon or magnesium detected when silicon or magnesium is not doped. In Table 1, the silicon concentration in the second layer 82 of the electron block layer 8 and the first p-type cladding layer 91 of the p-type semiconductor layer 9 is (2.00±1.00)×10 19 [atoms / cm 3 ], which means that the other positions in the stacking direction except for this peak are at the background level.

[0066] In Table 1, the configurations common to Samples 1 to 5 are shown without distinguishing between Samples 1 to 5, and the configurations different from each other in Samples 1 to 5, i.e., the silicon concentration of the first buffer layer 3 and the silicon concentration of the second buffer layer 4, are shown individually for each of Samples 1 to 5. The column for silicon concentration of the first buffer layer 3 in Table 1 lists the central silicon concentration Si center The column of silicon concentration of the second buffer layer 4 in Table 1 lists the peak bottom value Si bottom The following is stated.

[0067] The light emission output (arbitrary units) of each of Samples 1 to 5 can be measured by various known methods. In this experimental example, as an example, a method was used in which In (indium) electrodes were attached to the center and edge of a single wafer, a predetermined current was passed through these electrodes to cause the center of the wafer to emit light, and this light emission was measured by a photodetector installed at a predetermined position. The magnitude of the current passed during measurement was 20 mA. The results are shown in Table 2 and Figure 4. Figure 4 shows the central silicon concentration Si center 1 is a graph showing the relationship between the temperature and the optical output.

[0068] [Table 2]

[0069] As can be seen from Table 2 and FIG. 4, the central silicon concentration Si center is 1.02 × 10 18 [atoms / cm 3 In the samples 1 to 3 that satisfy the following, the central silicon concentration Si center is 1.02 × 10 18 [atoms / cm 3 ]. Therefore, the central silicon concentration Si center to 1.02 × 10 18 [atoms / cm 3] or less, the optical output can be improved. center is 0.91 × 10 18 [atoms / cm 3 ] or less, high optical output was obtained. Therefore, it is considered that the central silicon concentration Si center is 0.91 x 10 18 [atoms / cm 3 Furthermore, it is preferable that the central silicon concentration Si center is 0.83 × 10 18 [atoms / cm 3 ] or less, the highest optical output was obtained. Therefore, the central silicon concentration Si center is 0.83 x 10 18 [atoms / cm 3 From the same viewpoint, it is more preferable that the central silicon concentration Si center is 9.12 x 10 17 [atoms / cm 3 ] or less is preferable, 8.39 × 10 17 [atoms / cm 3 ] or less is preferable, 3.10 × 10 16 [atoms / cm 3 ] or less is more preferable.

[0070] It is also found that sample 1, in which TMSi was not supplied during deposition of the first buffer layer 3, had a higher optical output than any of samples 2 to 5, in which TMSi was supplied during deposition of the first buffer layer 3. Therefore, it is preferable to form the first buffer layer 3 as an undoped semiconductor layer. Note that, when the TMSi flow rate during deposition of the first buffer layer 3 was made higher than that of sample 5, the first buffer layer 3 cracked, making deposition difficult.

[0071] Also, from Table 2, the peak bottom value Si bottom is the central silicon concentration Si center For sample 1, the peak bottom value Si bottomis the central silicon concentration Si center The optical output is higher than that of Samples 2 to 5, which have a peak-bottom value Si bottom is the central silicon concentration Si of the first buffer layer 3 center The above is preferred.

[0072] (Summary of the embodiment) Next, the technical ideas grasped from the above-described embodiment will be described by using the reference numerals and the like in the embodiment. However, the reference numerals and the like in the following description do not limit the components in the claims to the members and the like specifically shown in the embodiment.

[0073] [1] A first embodiment of the present invention includes a substrate 2, a first buffer layer 3 formed on the substrate 2 and containing Al and N, a second buffer layer 4 formed on the first buffer layer 3, containing Al, Ga, and N, and having a smaller Al composition ratio than the first buffer layer 3, an n-type semiconductor layer 5 formed on the second buffer layer 4, an active layer 7 formed on the n-type semiconductor layer 5 and emitting ultraviolet light having a central wavelength of 365 nm or less, and a p-type semiconductor layer 9 formed on the active layer 7, wherein the silicon concentration at the center of the stacking direction of the first buffer layer 3 is 1.02×10 18 [atoms / cm 3 The nitride semiconductor light-emitting device 1 has a capacitance of 1.0 or less. This makes it possible to improve the optical output of the nitride semiconductor light emitting element 1.

[0074] [2] A second embodiment of the present invention is the first embodiment, wherein a negative peak P2 appears in the distribution of silicon concentration of the second buffer layer 4 in the stacking direction, and the silicon concentration of the negative peak P2 is equal to or higher than the silicon concentration at the center of the first buffer layer 3 in the stacking direction. It is presumed that this improves the crystallinity of the n-type semiconductor layer 5.

[0075] [3] A third embodiment of the present invention is characterized in that, in the first or second embodiment, a positive peak P1 appears in a range of the stacking direction including the position of the interface 32 of the first buffer layer 3 on the second buffer layer 4 side in the distribution of silicon concentration in the stacking direction. This prevents dislocations from the substrate 2 from extending toward the p-type semiconductor layer 9 side.

[0076] [4] A fourth embodiment of the present invention is the third embodiment, wherein the silicon concentration of the positive peak P1 is 2.22×10 18 [atoms / cm 3 ] or more. This further suppresses dislocations from the substrate 2 from extending toward the p-type semiconductor layer 9 side.

[0077] [5] A fifth embodiment of the present invention is any one of the first to fourth embodiments, in which the Al composition ratio of the second buffer layer 4 is equal to or higher than the Al composition ratio of the n-type semiconductor layer 5. This suppresses the occurrence of dislocations in the n-type semiconductor layer 55 due to lattice mismatch.

[0078] [6] A sixth embodiment of the present invention includes forming a first buffer layer 3 containing Al and N on a substrate 2, forming a second buffer layer 4 containing Al, Ga, and N and having a smaller Al composition ratio than the first buffer layer 3 on the first buffer layer 3, forming an n-type semiconductor layer 5 on the second buffer layer 4, forming an active layer 7 emitting ultraviolet light having a central wavelength of 365 nm or less on the n-type semiconductor layer 5, and forming a p-type semiconductor layer 9 on the active layer 7. The silicon concentration at the center of the stacking direction of the first buffer layer 3 is 1.02×10 18 [atoms / cm 3 The method for producing the nitride semiconductor light-emitting element 1 is as follows. This makes it possible to manufacture a nitride semiconductor light emitting device 1 with improved optical output.

[0079] [7] A seventh embodiment of the present invention is such that, in the sixth embodiment, an intermediate in which the first buffer layer 3 is formed on the substrate 2 is exposed to an atmosphere containing silicon before the second buffer layer 4 is formed, so that a positive peak P1 appears in the distribution of silicon concentration in the stacking direction in a range of the stacking direction including the position of the interface 32 of the first buffer layer 3 on the second buffer layer 4 side. This makes it possible to easily manufacture the nitride semiconductor light emitting element 1 in which dislocations from the substrate 2 are suppressed from extending toward the p-type semiconductor layer 9 side.

[0080] (Additional Note) Although the embodiment of the present invention has been described above, the invention according to the claims is not limited to the above embodiment. It should be noted that not all of the combinations of features described in the embodiment are essential to the means for solving the problems of the invention. The present invention can be modified appropriately without departing from the spirit of the invention. [Explanation of symbols]

[0081] 1...Nitride semiconductor light emitting device 2...Substrate 3…First buffer layer 31...1st interface 32…Second interface 4…Second buffer layer 5...n-type semiconductor layer 55...n-type semiconductor layer 7…Active layer 9...p-type semiconductor layer P1: Positive peak P2: Negative peak

Claims

1. A substrate; a first buffer layer containing Al and N formed on the substrate; a second buffer layer formed on the first buffer layer, the second buffer layer containing Al, Ga, and N and having a lower Al composition ratio than the first buffer layer; an n-type semiconductor layer formed on the second buffer layer; an active layer formed on the n-type semiconductor layer and emitting ultraviolet light having a central wavelength of 365 nm or less; a p-type semiconductor layer formed on the active layer, The silicon concentration at the center of the first buffer layer in the stacking direction is 1.02×10 １８ [atoms / cm ３ ] or less, a negative peak appears in the distribution of silicon concentration of the second buffer layer in the stacking direction; the silicon concentration at the negative peak is equal to or higher than the silicon concentration at the center in the stacking direction of the first buffer layer; Nitride semiconductor light emitting device.

2. A substrate, a first buffer layer containing Al and N formed on the substrate; a second buffer layer formed on the first buffer layer, the second buffer layer containing Al, Ga, and N and having a lower Al composition ratio than the first buffer layer; an n-type semiconductor layer formed on the second buffer layer; an active layer formed on the n-type semiconductor layer and emitting ultraviolet light having a central wavelength of 365 nm or less; a p-type semiconductor layer formed on the active layer, the silicon concentration at the center of the first buffer layer in the stacking direction is 1.02×10 18 [atoms / cm 3 ] or less; a positive peak appears in a range of the silicon concentration distribution in the stacking direction including a position of an interface of the first buffer layer on a side of the second buffer layer; Nitride semiconductor light emitting device.

3. a positive peak appears in a range of the silicon concentration distribution in the stacking direction including a position of an interface of the first buffer layer on a side of the second buffer layer; The nitride semiconductor light emitting device according to claim 1 .

4. The silicon concentration at the positive peak is 2.22×10 １８ [atoms / cm ３ ] or more, The nitride semiconductor light emitting device according to claim 2 or 3.

5. The Al composition ratio of the second buffer layer is equal to or greater than the Al composition ratio of the n-type semiconductor layer. The nitride semiconductor light emitting device according to claim 1 .

6. forming a first buffer layer containing Al and N on a substrate; forming a second buffer layer on the first buffer layer, the second buffer layer containing Al, Ga, and N and having a lower Al composition ratio than the first buffer layer; forming an n-type semiconductor layer on the second buffer layer; forming an active layer on the n-type semiconductor layer, the active layer emitting ultraviolet light having a central wavelength of 365 nm or less; forming a p-type semiconductor layer on the active layer; The silicon concentration at the center of the first buffer layer in the stacking direction is 1.02×10 １８ [atoms / cm ３ ] or less, an intermediate body in which the first buffer layer is formed on the substrate is exposed to an atmosphere containing silicon before the second buffer layer is formed, so that a positive peak appears in a range of the stacking direction including a position of an interface of the first buffer layer on the second buffer layer side in a distribution of silicon concentration in the stacking direction; A method for manufacturing a nitride semiconductor light-emitting device.

7. A negative peak appears in the distribution of silicon concentration of the second buffer layer in the stacking direction, the silicon concentration at the negative peak is equal to or higher than the silicon concentration at the center in the stacking direction of the first buffer layer; The method for producing a nitride semiconductor light emitting device according to claim 6 .

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