Electronic component, coil component, and method for manufacturing electronic component

By thickening and widening the circuit pattern connection portion below interlayer connections and optimizing the plating process, the stress on interlayer connections is reduced, improving the connection reliability in electronic components.

JP7616158B2Active Publication Date: 2025-01-17MURATA MFG CO LTD
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Patent Information

Application Number
JP2022098412
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2022-06-17
Publication Date
2025-01-17
Estimated Expiration
2042-06-17

AI Technical Summary

Technical Problem

The connection reliability between circuit patterns in electronic components is compromised due to stress concentration at interlayer connections, particularly when the distance between wiring layers is wide and the interlayer connections are thick, leading to potential connection breaks and reduced reliability.

Method used

The circuit pattern is designed with a thicker and wider connection portion directly below the interlayer connection, and the plating process is optimized to form this portion with a higher current density or a trapezoidal cross-section to enhance thickness, while using insulating walls and electrolytic plating to control plating solution flow.

Benefits of technology

This design reduces stress on interlayer connections and improves the connection reliability between the circuit pattern and the wiring conductor, enhancing the overall performance of the electronic component.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

To improve connection reliability between a circuit pattern embedded in an insulating layer and a wiring conductor outside the insulating layer in an electronic component that includes the circuit pattern.SOLUTION: An electronic component includes an insulating layer, a circuit pattern embedded in the insulating layer, a wiring conductor formed outside the insulating layer, and an interlayer connection portion that connects a circuit connection portion that is a part of the circuit pattern and the wiring conductor through an opening in the insulating layer, and in the circuit pattern, a portion of the circuit connection portion directly below the interlayer connection portion is thicker than an average thickness of a portion other than the circuit connection portion.SELECTED DRAWING: Figure 2
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Description

[Technical field]

[0001] The present invention relates to an electronic component, a coil component, and a method for manufacturing an electronic component. [Background technology]

[0002] Conventionally, there has been known a coil component configured by embedding a coil section formed of a plurality of wiring layers including a spiral circuit pattern formed by plated wiring, insulating layers formed between the plated wiring and between the wiring layers, and interlayer connectors that electrically connect a portion of the circuit pattern of each wiring layer in a resin containing magnetic powder (Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2020-136467 A Summary of the Invention [Problem to be solved by the invention]

[0004] In the coil component, stress is applied to the interlayer connection due to temperature rise during operation and changes in environmental temperature. This stress is concentrated on the bottom surface of the interlayer connection, and it is considered that the connection breaks from that point. Therefore, if the distance between the circuit patterns of two adjacent wiring layers is wide and the interlayer connection is thick, the generated stress is also large, and there is a concern that the connection reliability of the interlayer connection will decrease. In addition, when a circuit pattern of one wiring layer is plated on top of a circuit pattern of another wiring layer, if the circuit pattern of the other wiring layer is plated continuously on top of the thick interlayer connection, a recess is likely to occur on the upper surface of the circuit pattern of the other wiring layer at a position corresponding to the interlayer connection, and this recess may decrease the connection reliability of the circuit patterns between these wiring layers.

[0005] An object of the present invention is to improve the connection reliability between a circuit pattern and a wiring conductor outside an insulating layer in an electronic component having a circuit pattern embedded in an insulating layer. [Means for solving the problem]

[0006] One aspect of the present invention is a semiconductor device comprising an insulating layer and a circuit pattern embedded in the insulating layer. , distribution a line conductor; and an interlayer connection portion that connects a circuit connection portion that is a part of the circuit pattern and the wiring conductor through an opening in the insulating layer, the insulating layer and the wiring conductor are covered with an element body made of a resin containing magnetic powder, and an external electrode connected to the circuit connection portion is provided on one main surface of the element body, The circuit pattern has a thickness of about 100 mm at a portion immediately below the interlayer connection portion of the circuit connection portion. a thickness of the wiring conductor that is greater than the thickness of the circuit connection portion, a maximum width of the circuit connection portion is greater than a width of a portion other than the circuit connection portion, and a width of the wiring conductor is formed to be substantially equal to the maximum width of the circuit connection portion. It is an electronic component. Another aspect of the present invention includes a step of forming a plurality of insulating walls arranged at a predetermined interval on a metal layer, and a step of forming the circuit pattern by electrolytic plating of a metal between the insulating walls, wherein in the step of forming the insulating walls, wide openings are formed with at least some of the intervals being larger than the remaining intervals, and in the step of forming the circuit pattern, a current density in the electrolytic plating is set to 10 ASD or more, so that the wide openings have a thickness greater than the remaining openings. The above Circuit Pattern The circuit connection part The present invention relates to a method for manufacturing an electronic component, comprising: Another aspect of the present invention is a method for manufacturing a semiconductor device comprising the steps of: forming a plurality of insulating walls arranged at a predetermined interval on a metal layer; and growing a metal between the insulating walls by electrolytic plating. The aboveand a step of forming a circuit pattern, in which in the step of forming the insulating wall, wide openings are formed with at least some of the intervals being larger than the remaining intervals, and the photosensitive resin is exposed to irradiation light from a projection exposure device set off-focus with respect to a surface of the photosensitive resin formed on the metal layer, thereby forming a cross section of the insulating wall along a plane perpendicular to the extending direction of the circuit pattern into an inverse tapered shape whose width decreases toward the metal layer, and in the step of forming the circuit pattern, the inverse tapered insulating wall makes it more difficult for a plating solution flowing into the openings to circulate in the remaining openings than in the wide openings, thereby forming a thickness of the wide opening greater than that of the remaining openings. The above Circuit Pattern The circuit connection part The present invention relates to a method for manufacturing an electronic component, comprising: Effect of the Invention

[0007] According to the present invention, in an electronic component having a circuit pattern embedded in an insulating layer, it is possible to improve the connection reliability between the circuit pattern and the wiring conductor outside the insulating layer. [Brief description of the drawings]

[0008] [Figure 1] 1 is a schematic diagram showing an internal structure of a coil component according to a first embodiment of the present invention. [Diagram 2] 2 is a detailed view of the wiring layer in part A of FIG. 1. [Diagram 3] 2A to 2C are diagrams illustrating a manufacturing process of the coil component illustrated in FIG. [Figure 4] 4A to 4C are diagrams illustrating a manufacturing process of the coil component illustrated in FIG. 1 following FIG. 3. [Diagram 5] 5A to 5C are diagrams illustrating the manufacturing process of the coil component illustrated in FIG. 1, following FIG. 4. [Figure 6] 6 is a schematic diagram showing an internal structure of a coil component according to a second embodiment of the present invention. FIG. [Figure 7] 7 is a detailed view of the wiring layer in part B of FIG. 6. [Figure 8]7A to 7C are diagrams illustrating a manufacturing process of the coil component illustrated in FIG. 6. [Figure 9] 9A to 9C are diagrams showing the manufacturing process of the coil component shown in FIG. 6 following FIG. 8. [Figure 10] 10A to 10C are diagrams illustrating a manufacturing process of the coil component illustrated in FIG. 6, following the manufacturing process illustrated in FIG. [Figure 11] 10 is a schematic diagram showing an internal structure of a coil component according to a third embodiment of the present invention. FIG. [Figure 12] 12 is a detailed view of the wiring layer in part C of FIG. 11. [Figure 13] 12A to 12C are diagrams illustrating a manufacturing process of the coil component illustrated in FIG. [Figure 14] 14 is a diagram showing a manufacturing process of the coil component shown in FIG. 11 following FIG. 13. [Figure 15] 15A to 15C are diagrams showing the manufacturing process of the coil component shown in FIG. 11 following FIG. 14. [Figure 16] FIG. 13 is a schematic diagram showing an internal structure of a coil component according to a fourth embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the following embodiments, a coil component will be described as an example of an electronic component. Note that the drawings may partially include schematic diagrams. Also, the dimensions and ratios in the schematic diagrams may differ from the actual values.

[0010] [First embodiment] First, the first embodiment will be described. FIG. 1 is a schematic diagram showing the internal structure of a coil component 1 according to this embodiment. The coil component 1 includes an insulating layer 11 and a circuit pattern 12 embedded in the insulating layer 11. The insulating layer 11 and the circuit pattern 12 form a wiring layer 10. The wiring layer 10 is ring-shaped in a plan view from above in the figure, and the circuit pattern 12 is formed in a spiral shape inside the wiring layer 10 in the plan view to form a coil portion. Here, FIG. 1 shows a cross section along a plane perpendicular to the extension direction of the circuit pattern 12.

[0011] The insulating layer 11 is mainly made of an insulating material, for example, an insulating resin. The insulating material may contain a filler material mainly made of silicon oxide (SiO2) or aluminum oxide (Al2O3). The wiring layer 10 is embedded in an element body 2 which is a resin containing magnetic powder. The principal surface direction of the element body 2 and the principal surface direction of the wiring layer 10 are approximately parallel to each other.

[0012] The circuit pattern 12 is a single conductor formed in the above-mentioned spiral shape along the main surface direction of the wiring layer 10. The insulating layer 11 includes a support layer 11a that extends in the main surface direction of the wiring layer 10 and supports the circuit pattern 12.

[0013] A circuit connection portion 12a which is an end portion of the circuit pattern 12 is connected to an external electrode 15 formed on one main surface of the element body 2 via an extraction wiring 14 which is a wiring conductor formed outside the insulating layer 11. The main surface of the element body 2 on which the external electrode 15 is formed is referred to as the electrode surface 2a. A solder resist 16 is applied to the electrode surface 2a on the portion other than the external electrode 15. Here, the main surface of the wiring layer 10 may include irregularities within the surface, and may include distortion in a cross-sectional view including the normal to the main surface.

[0014] Fig. 2 is a partial detailed view of the wiring layer 10 in part A shown in Fig. 1. The portion of the wiring layer 10 on the right side shown in Fig. 1 is similarly configured. In this embodiment, the width of the circuit connection portion 12a of the circuit pattern 12 connected to the lead-out wiring 14 is wider than the width of the other circuit portion 12b of the circuit pattern 12. Note that the "width of the circuit pattern 12" means the maximum width in a cross section along a plane perpendicular to the extension direction of the circuit pattern 12.

[0015] In particular, in this embodiment, the thickness t1 of the circuit connection portion 12a of the circuit pattern 12 connected to the lead-out wiring 14 is thicker than the thickness t2 of the circuit portion 12b of the circuit pattern 12 other than the circuit connection portion 12a. As a result, in the coil component 1, the distance between the circuit connection portion 12a of the circuit pattern 12 and the lead-out wiring 14 can be shortened and the thickness of the interlayer connection portion 13 (portion surrounded by dotted line in the figure) can be reduced to connect the circuit pattern 12 and the lead-out wiring 14, compared to a conventional configuration in which the entire circuit pattern is formed with the same thickness. More precisely, the thickness t1 is the thickness of the portion of the circuit connection portion 12a directly below the interlayer connection portion 13, and the thickness t2 is the average thickness of the circuit portion 12b. In addition, when measuring the thickness of the portion of the circuit connection portion 12a directly below the interlayer connection portion 13, the boundary between the circuit connection portion 12a and the interlayer connection portion 13 may be determined based on the interface displayed in a cross-sectional image captured by a transmission electron microscope. However, when it is said that the thickness t1 is thicker than the thickness t2, it is not necessary to measure each thickness precisely and precisely. For example, in a certain cross section as shown in FIG. 2, when the maximum value of the thickness t1 is obviously larger than the thickness t2, it can be said that the thickness t1 is thicker than the thickness t2. Also, for example, if the thickness t2 does not exceed the maximum value of the measured thickness t1 at each point of the circuit portion 12b and the circuit portion 12b includes even a small number of points below the maximum value, it can be said that the thickness t1 is thicker than the thickness t2. Also, for example, even if the thickness t2 is equal to the maximum value of the measured thickness t1 at a portion of the circuit portion 12b, it can be said that the thickness t1 is thicker than the thickness t2 if the proportion of the points below the maximum value of the thickness t2 is greater than the proportion of the circuit portion 12b at that portion.

[0016] As a result, in the coil component 1, the stress applied to the interlayer connection 13 due to fluctuations in environmental temperature, etc. can be reduced, thereby improving the connection reliability between the circuit pattern 12 embedded in the insulating layer 11 and the lead-out wiring 14.

[0017] The coil component 1 can be produced, for example, as follows. 3, 4, and 5 are diagrams illustrating a manufacturing process of the coil device 1. 3, first, a substrate 3 is prepared (S100), and a resin layer 4, which is an insulating resin and which will become a part of the insulating layer 11, is formed on the substrate 3 (S102). Next, a seed layer 5a is formed on the resin layer 4 (S104). The seed layer 5a is a power supply film made of copper metal for plating growth by SAP (Semi Additive Process), and is a metal layer that can be formed by sputtering or electroless plating.

[0018] Next, a resist 6 is applied onto the seed layer 5a, and openings for forming a circuit pattern 12 are provided by patterning using photolithography. As a result, a plurality of insulating walls arranged at a predetermined interval are formed on the seed layer 5a as the resist 6 with openings (S106). Next, a copper metal is plated and grown by electrolytic plating along the openings of the resist 6 between the insulating walls to form a circuit pattern 12 (S108), and the resist 6 and the seed layer 5a are removed (S110). Here, in step S106, a wide opening is formed at a position where the circuit connection portion 12a is to be formed, with the interval of the resist 6 being larger than the intervals in other positions. Furthermore, in step S108, the current density in the electrolytic plating is set to a high current density of 10 ASD (Ampere per Square Decimator) or more, so that the plating growth rate in the wide opening is significantly increased compared to the other openings, and a circuit pattern 12 that is thicker in the circuit connection portion 12a formed in the wide opening than the other circuit portions 12b is formed.

[0019] 4, next, an insulating resin is patterned to cover the circuit pattern 12 to form an insulating layer 11 (S112). As a result, a wiring layer 10 in which the circuit pattern 12 is embedded in the insulating layer 11 is formed.

[0020] Next, a seed layer 5b is formed on the upper surface of the insulating layer 11 (S114). Subsequently, a resist 6 is applied onto the seed layer 5b, and an opening in the resist 6 is formed above the circuit connection portion 12a by patterning using photolithography (S116). Then, electrolytic plating is performed using the seed layer 5b in the opening in the resist 6 to form the lead-out wiring 14 above the circuit connection portion 12a (S118), and the resist 6 is removed (S120).

[0021] 5, next, an upper magnetic layer 7 is formed so as to cover the wiring layer 10 and the lead-out wiring 14, and the surface is ground to expose the top surface of the lead-out wiring 14 (S122). Next, after removing the substrate 3 (S124), a lower magnetic layer 8 is formed (S126). As a result, the wiring layer 10 and the lead-out wiring 14 are embedded in the element body 2 constituted by the upper magnetic layer 7 and the lower magnetic layer 8.

[0022] Next, solder resist 16 is applied to the principal surface of the element body 2 (as shown in the figure), avoiding the surface of the lead-out wiring 14 (S128), and the conductor of the external electrode 15 is formed on the upper part of the lead-out wiring 14, for example by plating (S130), thereby completing the coil component 1.

[0023] [Second embodiment] Next, a second embodiment will be described. Fig. 6 is a schematic diagram showing the internal structure of a coil device 20 according to a second embodiment of the present invention. Fig. 7 is a partial detailed view of part B in Fig. 6. In Figs. 6 and 7, components that are the same as those of the coil device 1 shown in Figs. 1 and 2 are indicated by the same reference numerals as those shown in Figs. 1 and 2, and the above description of Figs. 1 and 2 is incorporated herein.

[0024] Coil component 20 has a similar configuration to coil component 1, but has a wiring layer 21 instead of wiring layer 10. Wiring layer 21 has a similar configuration to wiring layer 10, but has an insulating layer 22 and a circuit pattern 23 instead of insulating layer 11 and circuit pattern 12. Insulating layer 22 has support layer 22a similar to support layer 11a of insulating layer 11. In addition, circuit pattern 23 has circuit connection portion 23a and circuit portion 23b similar to circuit connection portion 12a and circuit portion 12b of circuit pattern 12.

[0025] Circuit pattern 23 has a similar configuration to circuit pattern 12, but the cross-sectional shape along a plane perpendicular to the extending direction of circuit pattern 23 is different from that of circuit pattern 12. That is, the cross-sectional shape of circuit pattern 23 is a trapezoid in which the length of the upper side, which is the side closer to lead-out wiring 14 formed outside wiring layer 21, is shorter than the length of the lower side opposite to the upper side. Also, in circuit pattern 23, width W1 of the upper side of the trapezoid in circuit connection portion 23a is wider than width W2 of the upper side of the trapezoid in circuit portion 23b, which is the portion other than circuit connection portion 23a.

[0026] In the coil component 20 having the above configuration, the circuit pattern 23 having a trapezoidal cross section can be formed by plating growth in an opening having a trapezoidal cross section formed by, for example, the support layer 21a and a pair of insulating walls provided on the support layer 21a at positions sandwiching the circuit pattern 23 in the width direction. In this case, the plating solution flows in from a narrow opening at the upper side of the opening having the trapezoidal cross section where the plating growth is performed (see steps S206 and S208 in FIG. 8), so that the plating solution is less likely to circulate in the opening compared to the case of forming a circuit pattern having a rectangular cross section, and the difference in plating growth rate with respect to the difference in the width of the opening becomes large.

[0027] For this reason, in the coil component 20, the wide circuit connection portion 23a can be formed thicker than the circuit portion 23b, and the thickness of the interlayer connection portion 13 can be more easily reduced. As a result, the thickness of the interlayer connection portion 13 between the circuit connection portion 23a and the drawing wiring 14 can be reduced, thereby reducing the stress applied to the interlayer connection portion 13 due to fluctuations in environmental temperature, etc., and improving the connection reliability between the circuit pattern 23 and the drawing wiring 14.

[0028] The coil component 20 can be fabricated, for example, as follows. 8, 9, and 10 are diagrams illustrating the manufacturing process of the coil device 20. 8, first, a substrate 3 is prepared (S200), and a resin layer 4, which is an insulating resin and which will become part of the insulating layer 22, is formed on the substrate 3 (S202). Next, a seed layer 5a is formed on the resin layer 4 (S204). The seed layer 5a is a power supply film made of copper metal for plating growth by SAP, and is a metal layer that can be formed by sputtering or electroless plating.

[0029] Next, a photosensitive resin resist 6 is applied onto the seed layer 5a, and openings 6a, 6b for forming a circuit pattern 23 are provided by patterning using photolithography (S206). At this time, the focus position of the projection exposure device used for photolithography is set on the substrate 3, for example, shifted upward from the surface of the negative type resist 6. As a result, the resist 6 remaining on the seed layer 5a after development has an inverse tapered shape whose width decreases toward the substrate 3.

[0030] Here, the resist 6 remaining on the seed layer 5a, which is a metal layer, in step S206 corresponds to a plurality of insulating walls arranged at a predetermined interval on the metal layer in this disclosure. If the resist 6 is a positive type, a cross section having a similar inverse tapered shape can be formed by shifting the focus position of the projection exposure apparatus downward from the surface of the resist 6. That is, whether the resist 6 is a negative type or a positive type, the cross section of the resist 6 can be formed into an inverse tapered shape by exposing the resist 6 to irradiation light from a projection exposure apparatus set off-focus with respect to the surface of the resist 6.

[0031] Next, copper metal is grown by electrolytic plating along the openings of the resist 6 to form a circuit pattern 23 having a trapezoidal cross section (S208), and the resist 6 and the seed layer 5a are removed (S210). Since the cross section of the walls of the resist 6 formed in step S206 is formed in an inverse tapered shape, the openings 6a, 6b formed between these walls have a narrower width through which the plating solution can flow than when the resist walls are rectangular.

[0032] For this reason, the plating growth rate decreases significantly as the interval between the inversely tapered walls of the resist 6 becomes narrower. For this reason, in the coil component 20 of the present embodiment in which the circuit pattern 23 having a trapezoidal cross section is formed, the thickness of the circuit connection portion 23a can be easily formed to be thicker with respect to the circuit portion 23b in a state in which the current density during the plating growth in step S208 is set lower than in the case of the coil component 1 described above (step S108 in FIG. 3).

[0033] 9, next, an insulating resin is patterned so as to cover the circuit pattern 23, thereby forming an insulating layer 22 (S212). As a result, a wiring layer 21 in which the circuit pattern 23 is embedded in the insulating layer 22 is formed.

[0034] Next, a seed layer 5b is formed on the upper surface of the insulating layer 22 (S214). Subsequently, a resist 6 is applied onto the seed layer 5b, and an opening in the resist 6 is formed above the circuit connection portion 23a by patterning using photolithography (S216). Then, electrolytic plating is performed using the seed layer 5b in the opening in the resist 6 to form the lead wiring 14 above the circuit connection portion 23a (S218), and the resist 6 is removed (S220).

[0035] 10, next, upper magnetic layer 7 is formed to cover wiring layer 21 and lead-out wiring 14, and the surface is ground to expose the top surface of lead-out wiring 14 (S222). Next, after substrate 3 is peeled off (S224), lower magnetic layer 8 is formed (S226). As a result, wiring layer 21 and lead-out wiring 14 are embedded in element body 2 composed of upper magnetic layer 7 and lower magnetic layer 8.

[0036] Next, solder resist 16 is applied to the main surface of the element body 2 (as shown in the figure), avoiding the surface of the lead-out wiring 14 (S228), and the conductor of the external electrode 15 is formed on the upper part of the lead-out wiring 14, for example by plating (S230), thereby completing the coil component 20.

[0037] [Third embodiment] Next, a third embodiment will be described. Fig. 11 is a schematic diagram showing the internal structure of a coil device 30 according to a third embodiment of the present invention. Fig. 12 is a partial detailed view of part C in Fig. 11. In Figs. 11 and 12, components that are the same as those of the coil device 1 shown in Figs. 1 and 2 are indicated by the same reference numerals as those shown in Figs. 1 and 2, and the above description of Figs. 1 and 2 is incorporated herein.

[0038] The coil component 30 has a similar configuration to the coil component 1, but has a wiring layer 31 instead of the wiring layer 10. The wiring layer 31 has a similar configuration to the wiring layer 10, but has a circuit pattern 33 instead of the circuit pattern 12. The circuit pattern 33 has a circuit connection portion 33a and a circuit portion 33b similar to the circuit connection portion 12a and the circuit portion 12b of the circuit pattern 12. The circuit pattern 33 has a similar configuration to the circuit pattern 12, but includes a seed pattern 34 formed on a support layer 11a that is a part of the insulating layer 11. The seed pattern 34 is used when producing the circuit pattern 33 by plating growth using SAP. The seed pattern 34 includes a seed pattern 34a included in the circuit connection portion 33a of the circuit pattern 33 and a seed pattern 34b included in the circuit portion 33b.

[0039] In this embodiment, in particular, the width W3 of the seed pattern 34a included in the circuit connection portion 33a is larger than the width W4 of the seed pattern 34b included in the circuit portion 33b. As a result, in the coil component 30, the plating growth rate of the circuit connection portion 33a can be made higher than the plating growth rate of the circuit portion 33b during the formation of the circuit pattern 33, making the thickness of the circuit connection portion 33a thicker than that of the circuit portion 33b. As a result, the thickness of the interlayer connection portion 13 between the circuit connection portion 33a and the drawing wiring 14 can be made thinner, reducing stress applied to the interlayer connection portion 13 due to fluctuations in environmental temperature and the like, and improving the connection reliability between the circuit pattern 33 and the drawing wiring 14.

[0040] The coil component 30 can be fabricated, for example, as follows. 13, 14, and 15 are diagrams illustrating the manufacturing process of the coil device 30. 13, first, a substrate 3 is prepared (S300), and a resin layer 4, which is an insulating resin and which will become part of the insulating layer 11, is formed on the substrate 3 (S302). Next, a seed layer 5a is formed on the resin layer 4 (S304). The seed layer 5a is a power supply film made of copper metal for plating growth by SAP, and is a metal layer that can be formed by sputtering or electroless plating.

[0041] Next, the seed layer 5a is patterned by photolithography to form a seed pattern 34 (S306). The seed pattern 34 is used in a later process for plating growth of the circuit pattern 33. The seed pattern 34 includes a seed pattern 34a used for plating growth of the circuit connection portion 33a and a seed pattern 34b used for plating growth of the circuit portion 33b.

[0042] Next, a resist 6 is applied onto the seed layer 5a, and openings for forming the circuit pattern 33 are provided by patterning using photolithography (S308).

[0043] Subsequently, copper metal is grown by electrolytic plating along the openings of the resist 6 to form the circuit pattern 33 (S310), and the resist 6 and the seed layer 5a are removed (S312).

[0044] 14, next, an insulating resin is patterned to cover the circuit pattern 33, thereby forming an insulating layer 11 (S314). As a result, a wiring layer 31 in which the circuit pattern 33 is embedded in the insulating layer 11 is formed.

[0045] Next, a seed layer 5b is formed on the upper surface of the insulating layer 11 (S316). Subsequently, a resist 6 is applied onto the seed layer 5b, and an opening in the resist 6 is formed above the circuit connection portion 33a by patterning using photolithography (S318). Then, electrolytic plating is performed using the seed layer 5b in the opening in the resist 6 to form the lead-out wiring 14 above the circuit connection portion 33a (S320), and the resist 6 is removed (S322).

[0046] 15, next, an upper magnetic layer 7 is formed to cover the wiring layer 31 and the lead-out wiring 14, and the surface is ground to expose the top surface of the lead-out wiring 14 (S324). Next, the substrate 3 is peeled off (S326), and then the lower magnetic layer 8 is formed (S328). As a result, the wiring layer 31 and the lead-out wiring 14 are embedded in the element body 2 composed of the upper magnetic layer 7 and the lower magnetic layer 8.

[0047] Next, solder resist 16 is applied to the main surface of the element body 2 (as shown in the figure), avoiding the surfaces of the lead-out wiring 14 (S330), and the conductor of the external electrode 15 is formed on the upper part of the lead-out wiring 14, for example by plating (S332), thereby completing the coil component 30.

[0048] [Fourth embodiment] Next, a fourth embodiment will be described. Fig. 16 is a schematic diagram showing the internal structure of a coil device 40 according to a fourth embodiment of the present invention. In Fig. 16, the same components as those of the coil device 1 shown in Fig. 1 are denoted by the same reference numerals as those shown in Fig. 1, and the above description of Fig. 1 is incorporated herein.

[0049] Coil component 40 includes two wiring layers 41 and 42 stacked in the direction of the main surface of element body 2. Similar to wiring layer 10, wiring layers 41 and 42 have circuit patterns 45 and 46 embedded in insulating layers 43 and 44, respectively.

[0050] Similar to the circuit pattern 12, the circuit pattern 45 includes a circuit connection portion 45a and a circuit portion 45b. The circuit connection portion 45a is connected to the lead-out wiring 14, which is a wiring conductor formed outside the wiring layer 41, by the interlayer connection portion 13 through an opening in the insulating layer 43. Similarly to the circuit pattern 12, the thickness of the circuit connection portion 45a of the circuit pattern 45 is thicker than the thickness of the circuit portion 45b, which is the portion other than the circuit connection portion 45a.

[0051] Similar to the circuit pattern 12, the circuit pattern 46 includes a circuit connection portion 46a and a circuit portion 46b. The circuit connection portion 46a is connected to a circuit portion 45b of the circuit pattern 45 of the wiring layer 41, which is a wiring conductor formed outside the wiring layer 42, by an interlayer connection portion 47 through an opening in the insulating layer 44. Similarly to the circuit pattern 12, the thickness of the circuit connection portion 46a of the circuit pattern 46 is thicker than the thickness of the circuit portion 46b, which is the portion other than the circuit connection portion 46a.

[0052] As a result, in coil component 40, similarly to coil component 1, the distance between circuit connection portion 45a of circuit pattern 45 and lead-out wiring 14 can be shortened and the thickness of interlayer connection portion 13 can be reduced to connect circuit pattern 45 and lead-out wiring 14. Similarly, in coil component 40, the distance between circuit connection portion 46a of circuit pattern 46 and circuit pattern 45 of wiring layer 41 can be shortened and the thickness of interlayer connection portion 47 can be reduced to connect circuit pattern 46 and circuit pattern 45.

[0053] As a result, in coil component 40, the stress applied to interlayer connections 13 and 47 due to fluctuations in environmental temperature, etc. can be reduced, thereby improving the connection reliability between draw-out wiring 14, circuit pattern 45, and circuit pattern 46.

[0054] In the present embodiment, the coil component 40 includes two wiring layers 41 and 42, but may include three or more stacked wiring layers. The circuit patterns of the respective stacked wiring layers may be provided with circuit connection parts connected to wiring conductors outside the respective wiring layers at any positions of the circuit patterns according to the design of the coil component 40.

[0055] [Other embodiments] In the above-described embodiment, the coil components 1, 20, 30, and 40 are shown as examples of electronic components having wiring layers, but the electronic components for which the present invention can be implemented may be any electronic components other than coil components that include one or more wiring layers having a cross-sectional structure similar to that of the wiring layers 10, 21, 31, 41, or 42. The planar view of such a wiring layer is not limited to a ring shape and may have any shape depending on the circuit design of the electronic component. Furthermore, in the above-described embodiment, the circuit pattern 12 is in a spiral shape, but is not limited to this, and may be in a circular shape of less than one turn, a linear shape, a meandering shape, or the like. In the above-described embodiment, the external electrode 15 is formed separately on the end face of the lead-out wiring 14, but this is not limited thereto, and the external electrode 15 may be the end face of the lead-out wiring 14. That is, the wiring conductor may be both the lead-out wiring 14 and the external electrode 15. The external electrode 15 is formed using any method such as coating, plating, or sputtering, and may be made of any material such as copper, silver, nickel, tin, or gold. The external electrode 15 may also have a layered structure having a plurality of different layers. In the above-described embodiment, the insulating layer 11 is made of insulating resin, but it may be made of a sintered body such as glass, alumina, ferrite, etc. In addition, the insulating layer 11 may have the same configuration as the element body 2 and be integrated with the element body 2.

[0056] In addition, the characteristic configurations and manufacturing methods thereof shown in the above-mentioned embodiments can be used in combination with each other in any electronic component. For example, any number of wiring layers having the same configuration as the wiring layers 10, 21, 31, 41, and 42 may be used in any combination in one electronic component. In addition, for example, the high current density electrolytic plating of the first embodiment may be combined in the second, third, and fourth embodiments, the reverse tapered insulating wall of the second embodiment may be combined in the first, third, and fourth embodiments, and the seed pattern of the third embodiment may be combined in the first, second, and fourth embodiments. In particular, the method of making the thickness of the circuit connection portion thicker than the thickness of the portion other than the circuit connection portion may be any of the methods exemplified in the first, second, and third embodiments, and is not limited thereto.

[0057] It should be noted that all of the above-described embodiments are merely examples of one aspect of the present invention, and any modifications and applications are possible without departing from the spirit and scope of the present invention.

[0058] In addition, unless otherwise specified, the horizontal, vertical, and other directions, various numerical values, shapes, and materials in the above-described embodiments include a range in which the same action and effect as those directions, numerical values, shapes, and materials are achieved (a so-called equivalent range).

[0059] [Configuration supported by the above embodiment] The above-described embodiment supports the following configurations.

[0060] (Configuration 1) An electronic component comprising: an insulating layer; a circuit pattern embedded in the insulating layer; a wiring conductor formed outside the insulating layer; and an interlayer connection portion that connects a circuit connection portion that is a part of the circuit pattern to the wiring conductor through an opening in the insulating layer, wherein the thickness of the circuit pattern at a portion directly below the interlayer connection portion is thicker than the average thickness of portions other than the circuit connection portion. According to the electronic component of configuration 1, the distance between the circuit connection portion, which is a part of the circuit pattern embedded in the insulating layer, and the wiring conductor can be reduced to reduce the thickness of the interlayer connection portion, thereby improving the connection reliability between the circuit pattern and the wiring conductor outside the insulating layer.

[0061] (Configuration 2) The electronic component according to configuration 1, wherein the width of the circuit connection portion of the circuit pattern is wider than the width of a portion other than the circuit connection portion. According to the electronic component of configuration 2, in the circuit pattern, the thickness of the circuit connection portion can be easily formed to be thicker than the thickness of the portion other than the circuit connection portion.

[0062] (Configuration 3) The electronic component described in configuration 1, wherein the cross-sectional shape of the circuit pattern along a plane perpendicular to the extension direction of the circuit pattern is a trapezoid in which the length of an upper side, which is the side closer to the wiring conductor, is shorter than the length of a lower side opposite the upper side, and the width of the upper side of the trapezoid at the circuit connection portion of the circuit pattern is wider than the width of the upper side of the trapezoid at portions other than the circuit connection portion. According to the electronic device of configuration 3, when the circuit pattern is formed by plating growth, the difference in plating growth rate relative to the width of the circuit pattern can be increased, and the thickness of the circuit connection portion can be easily made thicker than the thickness of the portion other than the circuit connection portion.

[0063] (Configuration 4) An electronic component according to configuration 1 or 2, wherein the circuit pattern has a seed pattern extending along the circuit pattern on a bottom surface, which is the surface farther from the wiring conductor, and the seed pattern extending along the bottom surface has a width at the circuit connection portion that is wider than the width at portions other than the circuit connection portion. According to the electronic component of configuration 4, the thickness of the circuit connection portion can be easily formed to be thicker than the thickness of the portion other than the circuit connection portion.

[0064] (Configuration 5) The electronic component according to any one of configurations 1 to 4, comprising at least two of the circuit patterns stacked in a direction perpendicular to the main surface of the insulating layer. According to the electronic component of configuration 5, in the connection between a plurality of stacked circuit patterns, the thickness of the interlayer connection portion can be reduced, thereby improving the reliability of the connection.

[0065] (Configuration 6) A coil component which is the electronic component according to any one of configurations 1 to 5, wherein the circuit pattern constitutes a coil. According to the coil component of configuration 6, a good connection state between the circuit pattern and other conductors can be established, thereby improving reliability.

[0066] (Configuration 7) A method for manufacturing an electronic component, comprising: a step of forming a plurality of insulating walls arranged at a predetermined interval on a metal layer; and a step of forming a circuit pattern by electrolytic plating a metal between the insulating walls, wherein in the step of forming the insulating walls, wide openings are formed in which at least some of the intervals are larger than the remaining intervals, and in the step of forming the circuit pattern, a current density in the electrolytic plating is set to 10 ASD or more, thereby forming a circuit pattern in the wide opening that is thicker than the remaining openings. According to the method for manufacturing an electronic component of configuration 7, the thickness of the circuit pattern formed in the wide opening can be easily made thicker than the thickness of the circuit pattern formed in the other openings. Therefore, when a wiring conductor is formed on top of the circuit pattern in the wide opening, the connection reliability between the circuit pattern and the wiring conductor can be improved.

[0067] (Configuration 8) A method for manufacturing an electronic component, comprising: a step of forming a plurality of insulating walls arranged at predetermined intervals on a metal layer; and a step of forming the circuit pattern by plating and growing a metal between the insulating walls by electrolytic plating, wherein in the step of forming the insulating walls, wide openings are formed with at least some of the intervals being larger than the remaining intervals, and the photosensitive resin is exposed to irradiation light from a projection exposure device set off-focus on a surface of the photosensitive resin formed on the metal layer, thereby forming a cross section of the insulating wall along a plane perpendicular to an extension direction of the circuit pattern into an inverse tapered shape whose width decreases toward the metal layer, and in the step of forming the circuit pattern, the inverse tapered insulating walls make it more difficult for a plating solution flowing into the openings to circulate in the remaining openings than in the wide opening, thereby forming a circuit pattern in the wide opening that is thicker than the remaining openings. According to the method for manufacturing an electronic component of configuration 8, the thickness of the circuit pattern formed in the wide opening can be easily made thicker than the thickness of the circuit pattern formed in the other openings. Therefore, when a wiring conductor is formed on top of the circuit pattern in the wide opening, the connection reliability between the circuit pattern and the wiring conductor can be improved. [Explanation of symbols]

[0068] 1, 20, 30, 40...coil component, 2...element body, 3...substrate, 4...resin layer, 5a, 5b...seed layer, 6...resist, 6a, 6b...opening, 7...upper magnetic layer, 8...lower magnetic layer, 10, 21, 31, 41, 42...wiring layer, 11, 22, 43, 44...insulating layer, 11a, 32a...support layer, 12, 33, 45, 46...circuit pattern, 12a, 23a, 45a, 46a...circuit connection portion, 12b, 23b, 45b, 46b...circuit portion, 13, 47...interlayer connection portion, 14...drawing wiring, 15...external electrode, 16...solder resist, 34, 34a, 34b...seed pattern.

Claims

1. an insulating layer, a circuit pattern embedded in the insulating layer, a wiring conductor, and an interlayer connection portion that connects a circuit connection portion that is a part of the circuit pattern and the wiring conductor through an opening in the insulating layer, the insulating layer and the wiring conductor are covered with an element body made of a resin containing magnetic powder, and an external electrode connected to the circuit connection portion is provided on one main surface of the element body, the circuit pattern is formed such that a thickness of a portion of the circuit connection portion directly below the interlayer connection portion is greater than a thickness of a portion other than the circuit connection portion, a maximum width of the circuit connection portion is greater than a width of the portion other than the circuit connection portion, and a width of the wiring conductor is substantially equal to the maximum width of the circuit connection portion. Electronic components.

2. The circuit pattern has a width of the circuit connection portion that is wider than a width of a portion other than the circuit connection portion. The electronic component according to claim 1 .

3. a cross section of the circuit pattern along a plane perpendicular to an extending direction of the circuit pattern has a trapezoidal shape in which a length of an upper side that is a side closer to the wiring conductor is shorter than a length of a lower side opposite to the upper side, the width of the upper side of the trapezoidal shape at the circuit connection portion is wider than the width of the upper side of the trapezoidal shape at a portion other than the circuit connection portion; The electronic component according to claim 1 .

4. the circuit pattern has a seed pattern extending along the circuit pattern on a bottom surface that is a surface farther from the wiring conductor; the seed pattern extending along the bottom surface has a width at the circuit connection portion greater than a width at a portion other than the circuit connection portion; The electronic component according to claim 1 .

5. At least two of the circuit patterns are stacked in a direction perpendicular to the main surface of the insulating layer. The electronic component according to claim 1 .

6. The circuit pattern forms a coil. A coil component which is the electronic component according to any one of claims 1 to 5.

7. The external electrode is an end of the wiring conductor. The electronic component according to claim 1 .

8. The external electrode is provided separately from the wiring conductor. The electronic component according to claim 1 .

9. A method for manufacturing the electronic component according to claim 1, comprising: forming a plurality of insulating walls arranged at predetermined intervals on a metal layer; forming the circuit pattern by electrolytic plating of a metal between the insulating walls; Equipped with In the step of forming the insulating wall, a wide opening is formed such that at least a part of the interval is larger than the other parts of the interval, In the step of forming the circuit pattern, a current density in the electrolytic plating is set to 10 ASD or more, so that the wide opening is formed with a circuit connection portion of the circuit pattern that is thicker than the other openings. A method for manufacturing electronic components.

10. A method for manufacturing the electronic component according to claim 1, comprising the steps of: forming a plurality of insulating walls arranged at predetermined intervals on a metal layer; forming the circuit pattern by electrolytic plating of a metal between the insulating walls; Equipped with In the step of forming the insulating wall, a wide opening is formed with at least a part of the interval being larger than the remaining interval, and the photosensitive resin formed on the metal layer is exposed to irradiation light from a projection exposure device set off-focus on a surface of the photosensitive resin formed on the metal layer, thereby forming a cross section of the insulating wall along a plane perpendicular to an extending direction of the circuit pattern into an inverse tapered shape whose width decreases toward the metal layer; In the step of forming the circuit pattern, the inversely tapered insulating wall makes it more difficult for the plating solution flowing into the openings to circulate in the other openings than in the wide openings, thereby forming the circuit connection portion of the circuit pattern in the wide opening, which is thicker than the other openings. A method for manufacturing electronic components.

Citation Information

Patent Citations

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