Etching method and substrate processing apparatus

Abstract

To provide an etching processing method and a substrate processing device which can improve a selected ratio of a foundation layer relative to a film to be subjected to etching.SOLUTION: The etching processing method includes: a step in which a substrate, in which a laminated film including at least a silicon-containing insulation layer, a foundation layer and a mask layer is formed, is placed on a placement base; a step of supplying processing gas including at least either of fluorocarbon gas and hydrofluorocarbon gas; a step of selecting a range of a surface temperature of at least either of a member opposing to the substrate and a member provided on an outer periphery of the substrate, of members in a processing container, on the basis of a combination of a material quality of the silicon-containing insulation layer and a material quality of the foundation layer; a step of controlling the surface temperature of at least either of the member opposing to the substrate and the member provided on the outer periphery of the substrate to a desired temperature in a range of the selected surface temperatures; a step of etching the silicon-containing insulation layer while generating plasma in the processing container supplied with the processing gas.SELECTED DRAWING: Figure 9

Description

[Technical field]

[0001] The present disclosure relates to an etching processing method and a substrate processing apparatus. [Background technology]

[0002] The manufacture of three-dimensional stacked semiconductor memories such as 3D-NAND flash memories involves an etching process in which a plurality of holes are formed in a silicon-containing insulating layer using plasma. One example of an etching process for forming a device structure of 3D-NAND is a process in which, when etching holes in a silicon oxide layer, the silicon layer of the substrate and the metal layer located in between are simultaneously and highly selectively etched. In this etching process, a relatively shallow hole is formed to expose the metal layer located in the middle of the silicon oxide layer, and a deep hole is formed to expose the silicon layer below the metal layer. At this time, a process with a high selectivity of the underlying metal film to the silicon oxide layer is required. In addition to device structures of 3D-NAND, a process with a high selectivity of the underlying layer to the film to be etched and a low loss of the underlying layer is required.

[0003] In order to ensure a high selectivity, one method is to form a protective film on the tungsten layer using highly depository process conditions. For example, Patent Document 1 proposes a plasma processing method that can form a protective film on the surface of an etching stop layer when etching an oxide layer and can suppress blocking of the opening of a hole.

[0004] Patent Document 2 proposes a method for etching a silicon-containing insulating layer by supplying a process gas containing at least a fluorocarbon gas or a hydrofluorocarbon gas, oxygen, nitrogen, and CO, in order to achieve both a metal layer selectivity and a mask selectivity, and generating plasma in a process container to which the process gas is supplied. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2014-090022 A [Patent Document 2] JP 2019-036612 A Summary of the Invention [Problem to be solved by the invention]

[0006] The present disclosure provides an etching method capable of improving the selectivity of an underlayer to a film to be etched. [Means for solving the problem]

[0007] According to one aspect of the present disclosure, there is provided an etching method comprising the steps of: placing a substrate on a mounting table in a processing vessel, the substrate having a laminated film formed thereon, the laminated film including at least a silicon-containing insulating layer, a base layer disposed under the silicon-containing insulating layer, and a mask layer disposed over the silicon-containing insulating layer; supplying a processing gas including at least one of a fluorocarbon gas and a hydrofluorocarbon gas; selecting a surface temperature range of at least one of a member facing the substrate on the mounting table and a member disposed on the outer periphery of the substrate among members in the processing vessel by combining a material of the silicon-containing insulating layer and a material of the base layer; controlling a surface temperature of at least one of a member facing the substrate and a member disposed on the outer periphery of the substrate to a desired temperature within the surface temperature range selected by the selecting step; and generating a plasma in the processing vessel to which the processing gas is supplied, to etch the silicon-containing insulating layer. Effect of the Invention

[0008] According to one aspect, the selectivity of the underlayer to the film to be etched can be improved. [Brief description of the drawings]

[0009] [Figure 1]FIG. 1 is a schematic cross-sectional view showing an example of a substrate processing apparatus according to an embodiment. [Diagram 2] A diagram showing the laminated film of a 3D NAND flash memory. [Diagram 3] 4 is a diagram showing the relationship between plasma electron temperature and the degree of gas dissociation. [Figure 4] FIG. 13 is a graph showing the relationship between the degree of gas dissociation and the deposition rate on each side of a hole. [Diagram 5] 5A and 5B are diagrams showing an example of the temperature of an upper top plate and the like and a polymer on a substrate according to the embodiment. [Figure 6] 6 is a diagram showing an example of the temperature and adsorption amount of an upper top plate according to the embodiment. [Figure 7] 5A and 5B are diagrams showing an example of temperature control of an upper top plate and a state of a polymer according to the embodiment. [Figure 8] 13 is a graph showing an example of experimental results showing the relationship between the surface temperature of the upper top plate and the loss of the tungsten layer according to the embodiment. [Figure 9] 4 is a flowchart showing an etching method according to the embodiment. [Figure 10] 10 is a flowchart showing a method for controlling the temperature of an upper top plate in an etching method according to a modified example of the embodiment. [Figure 11] FIG. 11 is a diagram for explaining the temperature control method of FIG. 10. [Figure 12] FIG. 4 is a diagram showing an example of a temperature control area of ​​an upper tabletop according to an embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Hereinafter, an embodiment of the present disclosure will be described with reference to the drawings. In the drawings, the same components are denoted by the same reference numerals, and duplicated descriptions may be omitted.

[0011] [Substrate processing equipment] A substrate processing apparatus 1 according to an embodiment will be described with reference to Fig. 1. Fig. 1 is a schematic cross-sectional view showing an example of the substrate processing apparatus 1 according to an embodiment. The substrate processing apparatus 1 is an apparatus for performing a predetermined plasma processing on a substrate. The substrate processing apparatus 1 has a cylindrical processing vessel 10 made of, for example, aluminum whose surface has been anodized. The processing vessel 10 is grounded. The inside of the processing vessel 10 forms a processing chamber 10s in which a substrate W is processed.

[0012] A mounting table ST is provided at the bottom of the processing vessel 10. The mounting table ST has a lower electrode plate 16 and an electrostatic chuck 18. The mounting table ST may further have a metal plate 14. In this embodiment, a cylindrical metal plate 14 is disposed via an insulating plate 12 made of ceramics or the like, and a lower electrode plate 16 made of, for example, aluminum is provided on the metal plate 14. An electrostatic chuck 18 is provided on the lower electrode plate 16, and a semiconductor wafer (hereinafter referred to as a "substrate W"), which is a substrate to be processed, is placed on the electrostatic chuck 18.

[0013] The electrostatic chuck 18 attracts and holds the substrate W by electrostatic force. The electrostatic chuck 18 has a structure in which an electrode 20 made of a conductive film is sandwiched between a pair of insulating layers or insulating sheets, and a DC power supply 22 is electrically connected to the electrode 20. The substrate W is attracted to and held by the electrostatic chuck 18 by Coulomb force generated by application of a DC voltage from the DC power supply 22 to the electrode 20.

[0014] A conductive edge ring (also referred to as a focus ring) 24 made of silicon is disposed on the upper surface of the lower electrode plate so as to surround the outer periphery of the substrate W. A cylindrical lower outer periphery insulating ring 26 made of, for example, quartz is provided on the side surfaces of the lower electrode plate 16 and the metal plate 14.

[0015] A coolant flow passage 28 is provided inside the metal plate 14, for example, on the circumference. The coolant flow passage 28 is connected to a chiller unit provided outside the processing vessel 10 via pipes 30a and 30b, and a coolant at a predetermined temperature, for example, brine, is circulated and supplied to the coolant flow passage 28. The substrate processing apparatus 1 is configured to be capable of controlling the temperature of the lower electrode plate 16 by controlling the temperature or flow rate of the coolant supplied from the chiller unit to the coolant flow passage 28.

[0016] Furthermore, a heat transfer gas, for example, He gas, is supplied between the upper surface of the electrostatic chuck 18 and the rear surface of the substrate W from a heat transfer gas supply mechanism (not shown) via a gas supply line 32 .

[0017] A shower head 34 that functions as an upper electrode facing the mounting table ST is provided above the mounting table ST. The shower head 34 and the mounting table ST are configured to form a pair of electrodes as an upper electrode and a lower electrode. The space between the shower head 34 and the mounting table ST in the processing chamber 10s becomes a plasma generation space.

[0018] The showerhead 34 is supported on the upper part of the processing vessel 10 via an upper peripheral insulating ring 42. The showerhead 34 includes an upper top plate 36, the lower surface of which is exposed to the plasma generation space, and a base member 38 that supports the upper top plate 36. The upper peripheral insulating ring 42 is an annular member that surrounds the outer peripheries of the upper top plate 36 and the base member 38 and is made of an insulating member.

[0019] The upper top plate 36 has a plurality of gas holes 37 formed therein for supplying a processing gas into the processing chamber 10. The upper top plate 36 is made of, for example, silicon (Si) or silicon carbide (SiC).

[0020] The base member 38 is made of a conductive material, such as aluminum whose surface is anodized, and detachably supports the upper top plate 36 at its lower portion. A heater 45 for adjusting the surface temperature of the upper top plate 36 is provided near the upper top plate 36 of the base member 38. The heater 45 may be provided on the upper top plate 36. The surface temperature of the upper top plate 36 is controlled by controlling the heater 45. A gas diffusion space 40 for supplying a process gas to the multiple gas holes 37 is formed inside the base member 38. A plurality of gas pipes 41 are formed at the bottom of the base member 38 so as to be located below the gas diffusion space 40. The multiple gas pipes 41 are respectively connected to the multiple gas holes 37.

[0021] The base member 38 is provided with a gas inlet 62 for introducing a processing gas into the gas diffusion space 40. One end of a gas supply pipe 64 is connected to the gas inlet 62. The other end of the gas supply pipe 64 is connected to a processing gas supply source 66 for supplying a processing gas. A mass flow controller (MFC) 68 and an opening / closing valve 70 are provided in the gas supply pipe 64, in this order from the upstream side. Processing gas for plasma etching or the like is supplied from the processing gas supply source 66 to the gas diffusion space 40 via the gas supply pipe 64, and is supplied from the gas diffusion space 40 into the processing vessel 10 via the gas pipe 41 and the gas hole 37 in a shower-like manner.

[0022] A coolant flow path 92 is formed inside the base member 38. The coolant flow path 92 is connected to a chiller unit provided outside the processing vessel 10 via piping, and the coolant is circulated and supplied. That is, the shower head 34 configures a coolant circulation system including the coolant flow path 92, piping, and the chiller unit as a temperature adjustment mechanism. The chiller unit is configured to be able to control the temperature or flow rate of the coolant supplied to the coolant flow path 92 by receiving a control signal from a control unit 100 described later. The control unit 100 controls the temperature or flow rate of the coolant supplied from the chiller unit to the coolant flow path 92. The surface temperature of the upper top plate 36 can also be controlled by controlling the temperature or flow rate of the coolant supplied to the coolant flow path 92.

[0023] A first RF power supply 48 is electrically connected to the shower head 34 as an upper electrode via a low pass filter (LPF), a matching box 46, and a power feed rod 44 (not shown). The first RF power supply 48 is a power supply that outputs RF power for plasma excitation, and supplies RF power of a frequency in the range of 13.56 MHz to 100 MHz, for example, 60 MHz, to the shower head 34. The matching box 46 is a matching box that matches the load impedance to the internal (or output) impedance of the first RF power supply 48. The matching box 46 functions so that the output impedance and the load impedance of the first RF power supply 48 appear to match when plasma is generated in the processing chamber 10.

[0024] In addition, a cylindrical ground conductor 10a is provided so as to extend from the side wall of the processing vessel 10 to a position above the height position of the shower head 34. A ceiling wall portion of the cylindrical ground conductor 10a is electrically insulated from the power feed rod 44 by an insulating tubular member 44a.

[0025] A second RF power supply 90 is electrically connected to the lower electrode plate 16 via a matching box 88. The second RF power supply 90 is a power supply that outputs RF power for ion attraction (bias voltage), and supplies RF power with a frequency in the range of 300 kHz to 13.56 MHz, for example, 2 MHz, to the lower electrode plate 16. The matching box 88 is a matching box that matches the load impedance to the internal (or output) impedance of the second RF power supply 90. The matching box 88 functions so that the internal impedance and the load impedance of the second RF power supply 90 appear to match when plasma is generated in the processing vessel 10.

[0026] An exhaust port 80 is provided at the bottom of the processing vessel 10, and an exhaust device 84 is connected to the exhaust port 80 via an exhaust pipe 82. The exhaust device 84 has a vacuum pump such as a turbo molecular pump, and can reduce the pressure inside the processing vessel 10 to a desired vacuum level. A transfer port 85 for the substrate W is provided at the side wall of the processing vessel 10, and the transfer port 85 can be opened and closed by a gate valve 86. A deposit shield 11 is detachably provided along the inner wall of the processing vessel 10 to prevent etching by-products (deposits) from adhering to the processing vessel 10. The deposit shield 11 is also provided on the outer periphery of the lower outer peripheral insulating ring 26. An exhaust plate 83 is provided between the deposit shield 11 on the side wall side of the processing vessel 10 and the deposit shield 11 on the side of the lower outer peripheral insulating ring 26. As the deposit shield 11 and the exhaust plate 83, an aluminum material coated with ceramics such as Y2O3 can be suitably used.

[0027] A conductive member (GND block) 91 connected to ground in a DC manner is provided at a portion of the deposit shield 11 constituting the inner wall of the processing vessel at approximately the same height as the substrate W. This prevents abnormal discharge.

[0028] The operation of the substrate processing apparatus 1 having such a configuration is controlled by the control unit 100. The control unit 100 is, for example, a computer, and controls each unit of the substrate processing apparatus 1. The control unit 100 performs an etching process on the substrate W according to a recipe stored in the storage unit. The control unit 100 controls the surface temperature of the upper top plate 36 during the etching process. A thermometer 50 is provided on the lower surface of the upper top plate 36 or in its vicinity. The thermometer 50 may be, but is not limited to, a thermocouple, a thermograph, a laser interference thermometer, or the like. The thermometer 50 measures the surface temperature of the upper top plate 36 (the temperature of the surface facing the mounting table ST or the substrate W) and transmits the measured temperature value to the control unit 100. The control unit 100 controls the heating temperature of the heater 45 according to the measured temperature value, and controls the surface temperature of the upper top plate 36 to a desired temperature.

[0029] In the substrate processing apparatus 1 according to this embodiment, RF power (high frequency power) for plasma excitation is applied from the first RF power supply 48 to the shower head 34, and RF power for ion attraction is applied from the second RF power supply 90 to the lower electrode plate 16. However, the first RF power supply 48 and the second RF power supply 90 may be connected to the lower electrode plate 16 to apply high frequency power for plasma excitation and high frequency power for ion attraction. Alternatively, the second RF power supply 90 may not be provided, and the first RF power supply 48 may be connected to the shower head 34 or the lower electrode plate 16 to apply high frequency power for plasma excitation.

[0030] [Film composition on substrate] Next, the film configuration on the substrate will be described with reference to Fig. 2. Fig. 2 is a diagram showing the laminated film of a 3D NAND flash memory. For example, a multi-level contact (hereinafter also referred to as "MLC"), which is one step of the 3D NAND, is formed by providing a tungsten layer (W) 130 functioning as an electrode with steps at different depths as shown in Fig. 2. The silicon oxide layer (SiO2) 140 on the tungsten layer 130 is etched.

[0031] In this example, the tungsten layer 130 and the silicon oxide layer 140 have a stacked structure and form a stacked film. The tungsten layer 130 may have a multi-layer structure, for example, 60 to 200 layers. The silicon oxide layer 140 is an example of a silicon-containing insulating layer. The tungsten layer 130 is an example of an underlayer disposed below a silicon-containing insulating layer.

[0032] The mask layer 150 is disposed on the silicon oxide layer 140. The mask layer 150 may be an organic film or other material. The silicon layer (Si) 110 and the silicon nitride layer (SiN) 120 are formed below the tungsten layer 130 located at different depths.

[0033] With this film configuration, a laminated film is formed on the substrate W, the laminated film having at least a silicon oxide layer 140, a tungsten layer 130 disposed between the silicon oxide layers 140, and a mask layer 150 disposed on top of the silicon oxide layer 140.

[0034] The silicon oxide layer 140 on each tungsten layer 130 is etched to the respective depths of the tungsten layers 130. As the generation of device structures advances, the number of stacked layers will increase, and the aspect ratio (AR) will also increase accordingly, and an increase in the etching time is expected.

[0035] For this reason, it is necessary to increase the selectivity of the tungsten layer 130 to the silicon oxide layer 140 in long-term etching. In particular, in the tungsten layer 130 located at a shallower position among the multiple tungsten layers 130, the etching time (overetching time) after the tungsten layer 130 is exposed becomes long. For this reason, a high selectivity of the tungsten layer 130 to the silicon oxide layer 140 is required. Also, in structures other than MLC, a process in which the base layer has a high selectivity to the film to be etched and loss of the base layer is small is desired.

[0036] Therefore, in the etching method according to the present embodiment, the following steps are performed to improve the selectivity of a metal underlayer such as the tungsten layer 130. First, the etching method performs a step of placing the substrate W on the placement table ST in the processing vessel 10. The substrate W has a laminated film formed thereon, which includes at least a silicon-containing insulating layer, a underlayer disposed under the silicon-containing insulating layer, and a mask layer disposed over the silicon-containing insulating layer. Next, a step of supplying a processing gas containing at least one of a fluorocarbon gas and a hydrofluorocarbon gas is performed. Next, a step of selecting a surface temperature range of at least one of the members facing the substrate on the placement table and the members provided on the periphery of the substrate among the members in the processing vessel, based on a combination of the material of the silicon-containing insulating layer and the material of the underlayer. Next, the surface temperature of at least one of the members facing the substrate and the members provided on the periphery of the substrate is controlled to a desired temperature within the surface temperature range selected by the selection step. Next, a process is performed in which plasma is generated in the processing chamber 10 to which the processing gas has been supplied, to etch the silicon-containing insulating layer (here, the silicon oxide layer 140). The upper top plate 36 is an example of at least one of the members in the processing chamber 10, which face the substrate W on the mounting table ST and which are provided on the outer periphery of the substrate W.

[0037] The type of CF-based polymer that adheres to the substrate W, among the CF-based radicals and ions contained in the plasma of the processing gas containing a fluorocarbon gas or a hydrofluorocarbon gas, can be controlled by the surface temperature of the upper top plate 36. Therefore, in the etching method according to the present embodiment, the surface temperature of the upper top plate 36 is controlled to adjust the type of CF-based polymer that adheres to the substrate W. This makes it possible to improve the selectivity of the tungsten layer 130, which is the underlying layer, to the silicon oxide layer 140, while maintaining the etching rate of the silicon oxide layer 140, which is an example of a film to be etched.

[0038] The process gas may contain a rare gas. Examples of rare gas include He gas and Ar gas. In this specification, the silicon oxide layer 140 is used as an example of the film to be etched, but the film to be etched is not limited to this and may be any silicon-containing insulating layer. Examples of the silicon-containing insulating layer include at least one of a silicon oxide layer, a silicon nitride layer, a stacked structure of a silicon oxide layer and a silicon nitride layer, and a low-k film layer such as an organic-containing silicon oxide layer, and a combination thereof.

[0039] In this specification, the tungsten layer 130 is taken as an example of the underlayer for the film to be etched, but the underlayer is not limited to this and may be any conductive layer. Other examples of the conductive layer may be a metal layer or a silicon layer. Examples of the metal layer include tungsten, molybdenum (Mo), titanium (Ti), aluminum (Al), and copper (Cu). An example of the silicon layer is a silicon-containing layer having conductivity, such as polycrystalline silicon (Poly-Si) or amorphous silicon. The silicon layer may also be a silicon substrate that is monocrystalline silicon. When the film to be etched is not a silicon nitride layer, a silicon nitride layer may be used as the underlayer that requires a selectivity.

[0040] In addition, in the process for structures other than MLC, it may be desired that the underlayer has a high selectivity to the film to be etched and that the loss of the underlayer is small. In such a structure, the underlayer for the film to be etched is not limited to a conductive layer such as a metal layer or a silicon layer. For example, the film to be etched may be a silicon oxide film and the underlayer may be a silicon nitride film, as in a Self-Aligned Contact (SAC) structure. The film to be etched may be at least one of a silicon oxide layer or a Low-K film layer, and the underlayer may be at least one of a silicon carbide layer or a silicon carbonitride layer, as in a Via structure. In these cases, it is also desired that the loss of the underlayer is small, and the etching method of this embodiment can be applied.

[0041] The dissociation of fluorocarbon gas will be described with reference to Figures 3 and 4. Figure 3 is a diagram showing the relationship between the plasma electron temperature and the degree of dissociation of gas. Figure 4 is a diagram showing the relationship between the degree of dissociation of gas and the deposition rate on each side of the hole.

[0042] The horizontal axis of Figure 3 shows the plasma electron temperature Te, and the relationship between the plasma electron temperature Te and the degree of dissociation of C4F6 gas is shown. As the plasma electron temperature Te increases, the energy of one electron increases, making it easier for the gas to dissociate when the electron collides with the gas, and also easier for precursors such as highly dissociated radicals and further ionized ions to be generated. The generated precursors contribute to the deposition of polymers. Radical precursors act isotropically from the plasma to the substrate W, while ionic precursors act anisotropically. In addition, precursors deposited on the film to be etched contribute as an etchant that promotes the etching of the film to be etched by interacting with ions drawn into the substrate W by the high-frequency power for drawing ions.

[0043] As shown in FIG. 3, when C4F6 gas is supplied into the processing vessel 10 as a fluorocarbon gas, dissociation of the C4F6 gas is not easily promoted if the plasma electron temperature Te is low. In this case, the precursors of low dissociation (C3F4 radicals, C3F4 + ions, etc.), and highly dissociated precursors (CF2 radicals, CF2 + As the plasma electron temperature Te increases, the dissociation of the C4F6 gas progresses, the number of highly dissociated CF radicals increases, and the number of poorly dissociated precursors decreases. In other words, the number of poorly dissociated precursors with a high adsorption coefficient (adsorption power) such as C3F4 decreases, and the number of highly dissociated precursors with a low adsorption coefficient such as CF2 increases. However, as shown in FIG. 4, both highly dissociated precursors and poorly dissociated precursors exist in the plasma generated in the processing chamber 10s, and the ratio of the highly dissociated precursors to the poorly dissociated precursors changes.

[0044] Although Fig. 3 shows the dissociation pattern of C4F6 gas, as shown in Fig. 4, dissociation is promoted by the plasma electron temperature Te in C4F8 gas, C3F8 gas, C6F6 gas, and C5F8 gas, which are used as fluorocarbon gases other than C4F6 gas. Dissociation is also promoted by the plasma electron temperature Te in hydrofluorocarbon gases such as C2H2F4 gas and C3H2F4 gas, which are used instead of or as an added gas to fluorocarbon gases. Depending on the type of gas used, CF3 radicals, CF3 + Precursors such as ions are generated.

[0045] C2F2 radicals and C2F + The precursors, such as ions, have properties between those of the low dissociation precursor and the high dissociation precursor. + Ions are classified as low dissociation precursors represented by CxFy (x≧2, y≧1) and are distinguished from high dissociation precursors represented by CFz (z≧1).

[0046] In this way, the weakly dissociated precursor has a high adsorption coefficient and is likely to adhere to the upper surface of the mask layer 150 and the upper portion (side surface) of the hole opening. Therefore, the weakly dissociated precursor is likely to be consumed on the upper surface and side surface of the mask layer 150, forms a polymer on the upper surface and side surface of the mask layer 150, and is unlikely to reach the bottom surface and side surface of the hole H formed in the silicon oxide layer 140.

[0047] In contrast, a highly dissociated precursor has a low adsorption coefficient and is less likely to adhere to the upper surface or side surface of the mask layer 150. As a result, the highly dissociated precursor is less likely to be consumed on the upper surface or side surface of the mask layer 150 and is more likely to reach the side surface or bottom surface of the hole H formed in the silicon oxide layer 140. Therefore, compared with a low dissociated precursor, a highly dissociated precursor is more likely to form a polymer on the side surface or bottom surface of the hole formed in the silicon oxide layer 140, which contributes to improving the selectivity of the tungsten layer 130.

[0048] In addition to the plasma electron temperature Te, the type of polymer adhering to the substrate W can be controlled by the temperatures of the upper top plate 36 and the side wall of the processing vessel 10 seen from the substrate W in terms of a solid angle. Fig. 5 is a diagram showing an example of the temperatures of the upper top plate 36 and the side wall seen from the substrate W in terms of a solid angle (the side wall above the substrate W) according to the embodiment, and the type of polymer adhering to the substrate W.

[0049] 5(a), a heavy polymer such as CxFy, which has a large adsorption coefficient and is low in dissociation, can be selectively adsorbed onto the upper top plate 36 and the side wall. On the other hand, a light polymer such as CFz, which has a small adsorption coefficient and is highly dissociated, can be selectively adsorbed onto the tungsten layer 130 (underlying layer) of the substrate W.

[0050] In this case, as shown in FIG. 5(c), the mask selectivity is reduced because the polymer of CxFy with low dissociation is difficult to adhere to the mask layer 150, but the polymer of CFz supplied into the hole is increased, so the selectivity of the tungsten layer 130 is improved. That is, as shown in FIG. 5(a), by controlling the temperature of the upper top plate 36 etc. to a low temperature, the precursor with low dissociation and high adsorption coefficient that adheres to the substrate W is reduced, and the precursor with high dissociation and low adsorption coefficient is adhered to the substrate W. Since the precursor such as CF2 has a low adsorption coefficient, it is difficult to adhere to the mask layer 150 and proceeds to the bottom of the hole H. As a result, the opening of the hole H in the mask layer 150 does not narrow (A' in FIG. 5(c)), and a large amount of the precursor of CFz can be supplied to the tungsten layer 130 exposed at the bottom of the hole, so the selectivity of the tungsten layer 130 is improved (B' in FIG. 5(c)).

[0051] In contrast, when the upper top plate 36 and / or the side wall of the processing vessel 10 visible from the substrate W are controlled to a high temperature, both the low dissociated CxFy polymer and the high dissociated CFz polymer are adsorbed onto the substrate W side, as shown in FIG. 5(b).

[0052] In this case, as shown in Fig. 5(d), polymers with low dissociation such as C2F4 and C3F4, which have high adsorption coefficients, adhere to the mask layer 150, and the mask selectivity increases, but clogging, in which the opening of the hole H narrows, is likely to occur (Fig. 5(d) A). In addition, because the opening of the hole H narrows, less polymer reaches the bottom of the hole, and the selectivity of the tungsten layer 130 deteriorates (Fig. 5(d) B).

[0053] [Top plate temperature control] Next, a desired surface temperature of the upper top plate 36 to be controlled in order to improve the selectivity of the tungsten layer 130 to the silicon oxide layer 140 will be described with reference to FIG. 6. FIG. 6 is a diagram showing an example of the surface temperature and adsorption amount of the upper top plate 36 according to the embodiment. The horizontal axis of FIG. 6(a) and (b) indicates the surface temperature of the upper top plate 36, the vertical axis of FIG. 6(a) indicates the adsorption amount of the polymer adsorbed on the upper top plate 36, and the vertical axis of FIG. 6(b) indicates the adsorption amount of the polymer adsorbed on the substrate W. a° C. and b° C. on the horizontal axis are temperatures at which the adsorption amounts of the highly dissociated CFz polymer and the poorly dissociated CxFy polymer adsorbed on the upper top plate 36 start to increase when the surface temperature of the upper top plate 36 is lowered.

[0054] According to this, when the surface temperature of the upper top plate 36 is higher than b° C., neither the low dissociated CxFy polymer nor the high dissociated CFz polymer is adsorbed to the upper top plate 36, and these polymers are almost entirely adsorbed to the substrate W.

[0055] When the surface temperature of the upper top plate 36 is gradually lowered from b° C., the low-dissociated CxFy polymers that easily adsorb to the mask layer 150 on the substrate W adhere to the upper top plate 36 first. When the surface temperature of the upper top plate 36 is further lowered to a° C., the highly dissociated CFz polymers that easily adsorb to the tungsten layer 130 adhere to the upper top plate 36 in addition to the low-dissociated CxFy polymers.

[0056] When the surface temperature of the upper top plate 36 is lower than a° C., both the low dissociated CxFy polymer and the high dissociated CFz polymer are mostly adsorbed onto the upper top plate 36, and these polymers are not adsorbed onto the substrate W.

[0057] In summary, when C4F8 gas is supplied into the processing vessel 10 in FIG. 7, if the surface temperature of the upper top plate 36 is higher than b° C. (in the case of "high temperature" in FIG. 7), both the low dissociated CxFy polymer and the highly dissociated CFz polymer are adsorbed onto the substrate W. As a result, the opening of the hole H becomes narrower due to the low dissociated CxFy polymer, making it difficult for the highly dissociated CFz polymer to be supplied to the bottom of the hole, causing a decrease in the selectivity of the tungsten layer 130 and a decrease in the etching rate. On the other hand, the mask selectivity becomes good.

[0058] On the other hand, when the surface temperature of the upper top plate 36 is lower than a° C. (in the case of “low temperature” in FIG. 7), both the low dissociation CxFy polymer and the high dissociation CFz polymer are adsorbed on the upper top plate 36. As a result, the low dissociation precursor (C3F4 radical, C3F4 + ions, etc.) and highly dissociated precursors (CF2 radicals, CF2 + Almost no ions, etc., reach the substrate W. This results in a decrease in the etching rate, a decrease in the selectivity of the tungsten layer 130, and a decrease in the mask selectivity.

[0059] Therefore, by controlling the surface temperature of the upper top plate 36 within the range of a°C to b°C in the intermediate temperature region shown in Fig. 6 (in the case of "medium temperature" in Fig. 7), the amount of the low-dissociated CxFy polymer adsorbed to the upper top plate 36 side increases, and the amount of the CxFy polymer adsorbed to the substrate W decreases. This makes it possible to suppress clogging without narrowing the opening of the hole H. In addition, the highly dissociated CFz polymer is supplied to the substrate W and serves as an etchant to increase the etching rate and to be adsorbed to the bottom of the tungsten layer 130, thereby improving the selectivity of the tungsten layer 130.

[0060] In this way, the surface temperature of the upper top plate 36 is controlled to a temperature in the intermediate temperature range. As a result, due to the difference in the adsorption coefficient of the polymer depending on the molecular weight, the radicals and ions of CFz effective for obtaining the selectivity of the tungsten layer 130 are not trapped by the upper top plate 36 but are transported to the substrate W. On the other hand, the radicals and ions of CxFy that cause clogging are controlled to be adsorbed on the upper top plate 36 side. This makes it possible to improve the selectivity of the tungsten layer 130 while maintaining the etching rate of the silicon oxide layer 140. It should be noted that, regarding the mask selectivity, a mask selectivity of about the average value of the mask selectivity when the surface temperature of the upper top plate 36 is set to a high temperature of b° C. or higher and the mask selectivity when the surface temperature is set to a low temperature of a° C. or lower can be ensured.

[0061] Furthermore, even in the intermediate temperature range of a°C to b°C, by controlling the temperature from close to a°C to close to b°C, it is possible to control the ratio of poorly dissociated CxFy polymers and highly dissociated CFz polymers adsorbed onto the substrate W.

[0062] [Experimental Results] 8 is an example of a graph of experimental results showing the relationship between the surface temperature of the upper top plate 36 according to the embodiment and the loss of the tungsten layer 130. The horizontal axis of the graph shows the surface temperature of the upper top plate 36, and the vertical axis shows the amount of loss of the tungsten layer 130.

[0063] In this experiment, plasma was generated using the substrate processing apparatus 1 under the following process conditions. <Process conditions> Gas types: C4F6 gas, CO gas, O2 gas Pressure in processing chamber: 20mT (2.67Pa) RF power for plasma excitation: 100MHz High frequency power for ion attraction: 3.2MHz

[0064] According to this, it was found that in order to keep the amount of loss in the tungsten layer 130 at about 24 nm or less, it is preferable to control the surface temperature of the upper top plate 36 within the range of (a) 115° C. to (b) 270° C. Furthermore, it was found that in order to keep the amount of loss in the tungsten layer 130 at about 10 nm or less, it is preferable to control the surface temperature of the upper top plate 36 within the range of (a) 160° C. to (b) 230° C.

[0065] The results of this experiment are obtained when a substrate is used in which a silicon oxide layer 140 is formed as the etching target film and a tungsten layer 130 is formed as the underlayer as the laminated film. Depending on the type of film, the etchant that promotes etching of the etching target film and the precursor that becomes a polymer that improves the selectivity with the underlayer may differ slightly, and therefore the preferable range of the surface temperature of the upper top plate 36 may also shift slightly. In this case, it is desirable to perform an experiment using the film type of the laminated film that is actually used, or to use a simulator that can calculate the generation of the precursor and the surface reaction with the laminated film to determine the preferable temperature range according to the film type of the laminated film.

[0066] Also, since the dissociation pattern differs depending on the type of gas used, the preferable range of the surface temperature of the upper top plate 36 may shift slightly. Note that information regarding the appropriate range of the surface temperature of the upper top plate 36 for combinations of the film types of the film to be etched (silicon-containing insulating layer) and the base film, and combinations of the above-mentioned combinations of film types plus a gas type, is obtained in advance by experiments, etc. Then, the obtained information is stored in a memory unit possessed by the control unit 100 and made into a database. This allows a°C and b°C to be determined in the process (step S2) of selecting the surface temperature range of the upper top plate 36 based on the information, which will be described later, by referring to the memory unit storing the information.

[0067] [Etching method] In light of the above, an etching method performed in the substrate processing apparatus 1 while controlling the surface temperature of the upper top plate 36 to within the intermediate temperature range of a° C. to b° C. by the control unit 100 will be described with reference to FIG. 9. FIG. 9 is a flowchart showing the etching method according to the embodiment. As a result, when etching the silicon oxide layer 140, which is the film to be etched, the amount of loss of the tungsten layer 130 can be reduced to approximately 10 nm or less, and the selectivity of the tungsten layer 130 to the silicon oxide layer 140 can be improved.

[0068] When this process is started, first, a substrate W having a layered film formed by stacking a silicon layer 110, a multi-layer tungsten layer 130 having different levels, a silicon oxide layer 140 which is the film to be etched, and a mask layer 150 in that order is loaded into the processing vessel 10 and placed on the mounting table ST (step S1).

[0069] Next, the surface temperature of the upper top plate 36 is selected in the range of a°C to b°C in the intermediate temperature region according to the combination of the film types of the etching target film and the underlayer film of the laminated film formed on the substrate W (step S2). As shown in [Experimental Results] and FIG. 8, when the laminated film includes a silicon oxide layer 140 as the etching target film and a tungsten layer 130 as the underlayer, the surface temperature of the upper top plate 36 is selected in the range of (a) 160°C to (b) 230°C. Note that when the film type is known in advance, step S2 may be performed before step S1 or simultaneously with step S1.

[0070] Next, the surface temperature of the upper top plate 36 is controlled to a first temperature (step S3) within the temperature range selected in step 2. The first temperature is a temperature that is preset within the range of (a) 160°C to (b) 230°C.

[0071] Next, fluorocarbon gas such as C4F6 gas (C x F yA processing gas containing a fluorocarbon gas is supplied into the processing chamber 10 (step S4). Next, a high frequency power for plasma excitation and a high frequency power for ion attraction are applied to generate a processing gas plasma containing a fluorocarbon gas (step S5). In step S4, only the high frequency power for plasma excitation may be applied.

[0072] Next, the silicon oxide layer 140, which is the film to be etched, is etched (step S6). While the silicon oxide layer 140 is being etched, the surface temperature of the upper top plate 36 is controlled in the range of (a) 160°C to (b) 230°C. As an example, as shown in step S61, the surface temperature of the upper top plate 36 may be repeatedly controlled alternately between a first temperature and a second temperature (e.g., first temperature > second temperature) which is different from the first temperature and is preset in the range of (a) 160°C to (b) 230°C. When the etching process of the silicon oxide layer 140 is completed, this process ends.

[0073] According to the etching method of the embodiment, while etching the silicon oxide layer 140, the surface temperature of the upper top plate 36 is controlled in the range of (a) 160°C to (b) 230°C. This controls so that highly dissociated CFz radicals and ions, which are effective for obtaining a selectivity of the tungsten layer 130, are not trapped by the upper top plate 36 but are mainly transported to the substrate W. In addition, poorly dissociated CxFy radicals and ions, which cause clogging, are mainly adsorbed on the upper top plate 36 side. This makes it possible to improve the selectivity of the tungsten layer 130 while maintaining the etching rate of the silicon oxide layer 140.

[0074] Moreover, by repeatedly controlling the surface temperature of the upper top plate 36 between the first temperature and the second temperature in the range of (a) 160°C to (b) 230°C, it is possible to vary the ratio of CFz radicals and ions and CxFy radicals and ions trapped on the upper top plate 36. This makes it possible to finely adjust the etching rate of the silicon oxide layer 140 and the selectivity of the tungsten layer 130.

[0075] [Variations] Next, a method for controlling the temperature of the upper top plate 36 in the etching method according to a modified example of the present embodiment will be described with reference to Fig. 10 and Fig. 11. Fig. 10 is a flow chart showing a method for controlling the temperature of the upper top plate 36 in the etching method according to a modified example of the present embodiment. Fig. 11 is a diagram for explaining the temperature control method of Fig. 10.

[0076] In this modification, during etching of the silicon oxide layer 140 in step S6 shown in Fig. 9, a temperature control method for the upper top plate 36 shown in Fig. 10 is executed instead of step S61. The temperature control method in Fig. 10 is controlled by the control unit 100.

[0077] Fig. 10 illustrates a case where a silicon oxide layer 140 is etched in a laminated film having three tungsten layers 130 as shown in Fig. 2. The region up to the first tungsten layer 130 is set in advance as a shallow region, the region up to the second tungsten layer 130 as an intermediate region between the shallow region and the deep region, and the region up to the third tungsten layer 130 as a deep region. However, the configuration of the laminated film is simplified for ease of explanation and is not limited thereto.

[0078] 9 is started, and the temperature control method of FIG. 10 is executed, first, it is determined whether a shallow region of the silicon oxide layer 140 is being etched (step S11). While etching is being performed up to the first tungsten layer 130, it is determined that a shallow region of the silicon oxide layer 140 is being etched. In this case, the surface temperature of the upper top plate 36 is increased stepwise or continuously within the range of (a)°C to (b)°C (step S12).

[0079] In the example of FIG. 11(a), in the case of etching a shallow region up to the tungsten layer 130 in the first stage of three stages (N=3), the surface temperature of the upper top plate 36 on the vertical axis is increased in three stages, (a)°C, (a)°C+α, and (b)°C, with respect to the processing time on the horizontal axis. As a result, in the early stage of etching the shallow region, the surface temperature of the upper top plate 36 is controlled to (a)°C, making it easier to trap the low-dissociated CxFy radicals and ions on the upper top plate 36. As a result, the highly dissociated CFz radicals and ions, which have a low adsorption coefficient, are transported to the bottom of the hole without narrowing the opening of the hole H, and the selectivity of the tungsten layer 130 is improved mainly by the polymer of CFz.

[0080] Thereafter, the surface temperature of the upper top plate 36 is increased stepwise, and at the end of the etching of the shallow region, the surface temperature of the upper top plate 36 is controlled to (b) °C, and the CxFy radicals and ions are transported to the substrate W side. This causes the CxFy polymer to adhere to the opening of the hole H, improving the mask selectivity.

[0081] Then, when the etching has been completed down to the first-stage tungsten layer 130, the result in step S11 is determined as "No," and etching of the shallow region of the silicon oxide layer 140 is terminated. Next, it is determined whether the deep region of the silicon oxide layer 140 has been etched (step S13). During etching down to the second-stage tungsten layer 130, it is determined that the deep region of the silicon oxide layer 140 has not been etched (that is, the intermediate region between the shallow region and the deep region has been etched).

[0082] At this time, the surface temperature of the upper top plate 36 is controlled to, for example, (a)+α°C within the range of (a)°C to (b)°C (step S14). For example, the surface temperature of the upper top plate 36 may be controlled to maintain the temperature last controlled in step S12, or may be controlled to another temperature within the range of (a)°C to (b)°C.

[0083] When etching has started up to the third tungsten layer 130 and it is determined that a deep region of the silicon oxide layer 140 has been etched, the surface temperature of the upper top plate 36 is lowered stepwise or continuously within the range of (a)°C to (b)°C (step S15).

[0084] In the example of Fig. 11(b), in the case of etching a deep region up to the tungsten layer 130 in the third stage of three stages (N = 3), the surface temperature of the upper top plate 36 on the vertical axis is lowered in three stages: (b) °C, (a) °C + α, and (a) °C. This makes it possible to obtain the effect in the early stage of etching described in the etching of shallow regions as an effect in the final stage of etching. Also, it is possible to obtain the effect in the early stage of etching described in the etching of shallow regions as an effect in the final stage of etching.

[0085] According to this modification, the surface temperature of the upper top plate 36 is controlled within the range of (a)°C to (b)°C to maintain the etching rate and suppress the loss of the tungsten layer 130. At this time, the surface temperature of the upper top plate 36 is variably controlled according to the depth of the etched silicon oxide layer 140. For example, the surface temperature of the upper top plate 36 may be controlled so that the temperature increases as the etched silicon oxide layer 140 becomes deeper in a shallow region. Also, the surface temperature of the upper top plate 36 may be controlled so that the temperature decreases as the etched silicon oxide layer 140 becomes deeper in a deep region. This allows the state of the polymer on the substrate W to be finely adjusted by temperature control that emphasizes the selectivity of the tungsten layer 130 and temperature control that emphasizes the mask selectivity. The surface temperature of the upper top plate 36 is not limited to being increased or decreased stepwise, and may be increased or decreased continuously.

[0086] As described above, according to the etching method and the substrate processing apparatus 1 of the present embodiment and the modified example, the surface temperature of the upper top plate 36 is controlled to a desired range. Specifically, during the etching process, the surface temperature of the upper top plate 36 is controlled to a desired temperature in the range of (a)°C to (b)°C. This makes it possible to control the amount of highly dissociated CFz radicals and ions for obtaining the selectivity of the tungsten layer 130 and the amount of less dissociated CxFy radicals and ions that cause clogging trapped on the upper top plate 36 side. This makes it possible to improve the selectivity of the tungsten layer 130 while maintaining the etching rate of the silicon oxide layer 140.

[0087] Furthermore, as a secondary effect, the flow rate of O2 gas in the process gas can be reduced or the addition of O2 gas can be eliminated. Conventionally, O2 gas is added to the process gas, and clogging near the mask layer 150 is suppressed by O2 gas plasma. However, according to the etching process method of the present embodiment and the modified example, the surface temperature of the upper top plate 36 is controlled within a desired range, so that the low dissociated CxFy radicals and ions can be trapped mainly on the upper top plate 36 side. This can suppress the narrowing of the hole opening due to the CxFy polymer. Furthermore, the flow rate of O2 gas in the process gas can be adjusted to finely adjust the opening of the hole H, and the selectivity of the tungsten layer 130 can be further improved.

[0088] [Temperature control for each area] The upper top plate 36 is disk-shaped, and each of the multiple regions of the upper top plate 36 can be temperature-controlled independently. Fig. 12 is a diagram showing an example of the temperature-controlled regions of the upper top plate 36 according to the embodiment. Fig. 12(a), (b), and (c) show an example in which the lower surface of the upper top plate 36 is divided into multiple temperature-controlled regions.

[0089] 12(a), the upper top plate 36 is divided into a central region 36a and an outer peripheral region 36b in the radial direction, and the temperature of each region of the upper top plate 36 is controlled separately by heaters 45 provided in the region 36a and the region 36b. This reduces bias in the radial temperature distribution of the upper top plate 36, and improves the in-plane uniformity of the temperature distribution of the upper top plate 36.

[0090] 12(b), the upper top plate 36 is divided in the radial direction into a central region 36a and an outer peripheral region, and the outer peripheral region is divided in the circumferential direction into a plurality of regions 36b1 to 36b8. The temperature of each region is controlled separately by heaters 45 provided in the region 36a and the plurality of regions 36b1 to 36b8. This reduces the bias in the radial temperature distribution of the upper top plate 36 and the bias in the circumferential temperature distribution on the outer periphery, and further improves the in-plane uniformity of the temperature distribution of the upper top plate 36.

[0091] 12(c), the upper top plate 36 is divided into a plurality of lattice-shaped regions 36c, and the temperature of each region 36c is controlled separately by a heater 45 provided in each of the regions 36c. This also makes it possible to improve the in-plane uniformity of the temperature distribution of the upper top plate 36.

[0092] However, the temperature control region of the upper top plate 36 is not limited to this. For example, in Fig. 12(a), the upper top plate 36 is divided into two regions in the radial direction, but it may be divided into three or more regions in the radial direction for temperature control. In Fig. 12(b), the outer peripheral region is divided in the circumferential direction, but both the center and outer peripheral regions may be divided into multiple regions, or only the inner peripheral side may be divided into multiple regions. In Fig. 12(c), the upper top plate 36 is divided into a lattice shape, but the shape for dividing the upper top plate 36 is not limited to a rectangle, and may be a polygon other than a square, such as a triangle or a honeycomb shape.

[0093] The etching method and the substrate processing apparatus according to the embodiments and the modified examples disclosed herein should be considered as illustrative and not restrictive in all respects. The above-described embodiments can be modified and improved in various forms without departing from the scope and spirit of the appended claims. The matters described in the above-described embodiments can be configured in other ways without contradiction, and can be combined without contradiction.

[0094] For example, the member in the processing vessel 10 to be subjected to the temperature control in the etching processing method of the present disclosure is not limited to the upper top plate 36. The member in the processing vessel 10 to be subjected to the temperature control may be at least one of a member facing the substrate W and a member provided on the outer periphery of the substrate. For example, examples of the member facing the substrate W to be subjected to the temperature control include the upper top plate 36 and the upper outer periphery insulating ring 42 on the outer periphery of the upper top plate 36. Examples of the member provided on the outer periphery of the substrate to be subjected to the temperature control include the edge ring 24 arranged on the outer periphery of the substrate W, the lower outer periphery insulating ring 26 arranged on the outer periphery of the edge ring 24, and the deposit shield 11. In addition, the member in the processing vessel 10 to be subjected to the temperature control may be a part (e.g., an inner periphery region, an outer periphery region) when the upper top plate 36 is divided into a plurality of regions.

[0095] The substrate processing apparatus of the present disclosure can be applied to any type of apparatus, including Capacitively Coupled Plasma (CCP), Inductively Coupled Plasma (ICP), Radial Line Slot Antenna (RLSA), Electron Cyclotron Resonance Plasma (ECR), and Helicon Wave Plasma (HWP). [Explanation of symbols]

[0096] 1. Substrate Processing Equipment 10 Processing vessel 10s Processing chamber 11 Depot Shield 14 Metal Plate 16 Lower electrode plate 18 Electrostatic Chuck 24 Edge Ring 26 Lower outer peripheral insulation ring 34 Shower Head 36 Top plate 38 Base material 42 Upper peripheral insulation ring 45 Heater 48 First RF Power Source 50 thermometer 90 Second RF power supply 130 Tungsten layer 140 Silicon oxide layer ST Stand

Claims

1. A step of placing a substrate on a mounting table in a processing chamber, the substrate having a laminated film including at least a silicon-containing insulating layer, a base layer disposed under the silicon-containing insulating layer, and a mask layer disposed over the silicon-containing insulating layer; supplying a process gas comprising at least one of a fluorocarbon gas or a hydrofluorocarbon gas; selecting a surface temperature range of at least one of a member facing the substrate on the mounting table and a member provided on an outer periphery of the substrate among members in the processing chamber, by a combination of a material of the silicon-containing insulating layer and a material of the underlayer; a step of controlling the surface temperature of at least one of a member facing the substrate and a member provided on an outer periphery of the substrate to a desired temperature within the range of surface temperatures selected by the selecting step; and generating plasma in the processing chamber to which the processing gas is supplied, thereby etching the silicon-containing insulating layer.

1. An etching method comprising:

2. The surface temperature of the member is variably controlled according to the depth of the etched silicon-containing insulating layer. The etching method according to claim 1 .

3. The surface temperature of the member is controlled so as to increase as the etching depth increases in a region where the etched depth of the silicon-containing insulating layer is a predetermined shallow depth, and is controlled so as to decrease as the etching depth increases in a region where the etched depth of the silicon-containing insulating layer is a predetermined deep depth. The etching method according to claim 2 .

4. The surface temperature of the member is repeatedly controlled alternately between a predetermined first temperature and a second temperature different from the first temperature. The etching method according to any one of claims 1 to 3.

5. The member is a member facing the substrate. The etching method according to any one of claims 1 to 4.

6. The member is an upper top plate. The etching method according to claim 5 .

7. The upper top plate is disk-shaped, a surface temperature of the upper top plate is controlled independently for each of a plurality of regions obtained by dividing a surface of the upper top plate facing the mounting table into a plurality of regions; The etching method according to claim 6.

8. the silicon-containing insulating layer is formed of at least one of a silicon oxide layer, a silicon nitride layer, a laminated structure of a silicon oxide layer and a silicon nitride layer, and a low-k film layer; The etching method according to any one of claims 1 to 7.

9. The underlayer is a conductive layer. The etching method according to any one of claims 1 to 8.

10. The conductive layer is formed of a metal layer or a silicon layer. The etching method according to claim 9.

11. The metal layer is formed of tungsten. The etching method according to claim 10.

12. The silicon-containing insulating layer is formed of a silicon oxide layer, The underlayer is formed of a silicon nitride layer. The etching method according to any one of claims 1 to 7.

13. The silicon-containing insulating layer is formed of at least one of a silicon oxide layer and a low-k film layer, The underlayer is formed of at least one of a silicon carbide layer and a silicon carbonitride layer. The etching method according to any one of claims 1 to 7.

14. The silicon-containing insulating layer is formed of a silicon oxide layer, The underlayer is formed of tungsten, The surface temperature of the member is set to a desired temperature in the range of 115°C to 270°C. The etching method according to any one of claims 1 to 9.

15. The surface temperature of the member is set to a desired temperature in the range of 160°C to 230°C. The etching method according to claim 14.

16. A processing vessel; a mounting table for mounting a substrate having a laminated film formed thereon, the laminated film including at least a silicon-containing insulating layer, a base layer disposed under the silicon-containing insulating layer, and a mask layer disposed over the silicon-containing insulating layer; A substrate processing apparatus having a control unit, The control unit is placing the substrate on the stage; supplying a process gas comprising at least one of a fluorocarbon gas or a hydrofluorocarbon gas; selecting a surface temperature range of at least one of a member facing the substrate on the mounting table and a member provided on an outer periphery of the substrate among members in the processing chamber, based on a combination of a material of the silicon-containing insulating layer and a material of the underlayer; a step of controlling the surface temperature of at least one of a member facing the substrate and a member provided on an outer periphery of the substrate to a desired temperature within the range of surface temperatures selected by the selecting step; and generating plasma in the processing chamber to which the processing gas is supplied, thereby etching the silicon-containing insulating layer. Substrate processing equipment.

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