VCSEL Module

Abstract

The VCSEL module according to the present invention provides a VCSEL module in which a VCSEL and a switching element are integrated and which can be made compact. [Solution] The VCSEL module 150 has a VCSEL 316, a switching element 315 for the VCSEL 316 that is arranged below the VCSEL 316 and electrically connected to the VCSEL 316, and a substrate 312 that is arranged below the switching element 315 and electrically connected to the switching element 315.

Description

[Technical field]

[0001] The present invention relates to a VCSEL module that uses a VCSEL (Vertical Cavity Surface Emitting Laser) as a light source. [Background technology]

[0002] Japanese Patent Application Laid-Open No. 2016-45066 describes a distance measuring device that measures distance based on light (hereinafter referred to as "reflected light") that is emitted from a light source and reflected by an object. The distance measuring device includes a distance image sensor, a light source, and a control unit. The distance image sensor is a charge distribution type distance image sensor, and the light source is composed of a laser light irradiation device such as a VCSEL module, an LED, or the like. The control unit supplies a drive signal S D is applied and a pulsed light (light intensity signal S LP ), and outputs the first transfer signal S1 and the second transfer signal S2 to the range image sensor.

[0003] FIG. 24 is a timing chart for explaining a method of measuring distance in the above-mentioned distance measuring device. In the above-mentioned distance measuring device, the light intensity signal S LP The rise period T P and the falling period T F The influence of the interference is reduced, and the distance measurement accuracy is improved.

[0004] US Patent Application Publication No. 2018 / 0278011 describes a laser diode module 600 with improved light source rise. FIG. 25 is a perspective view of the laser diode module 600. The laser diode module 600 includes a substrate 610, a laser diode 620 including a plurality of laser diodes DL, a capacitor 630 including capacitors C1 and C2, and an IC4 including a driver circuit 640 including a transistor TL connected in series with the laser diode DL. Light is emitted from the laser diode 620 in the direction of the arrow G.

[0005] Fig. 26 is a circuit diagram of the laser diode module 600 shown in Fig. 25. The laser diode module 600 includes a power terminal Vs, a control terminal ON, and a ground terminal GND. A switching transistor TL and a laser diode DL are connected in series between the power terminal Vs and the ground terminal GND, and capacitors C1 and C2 are connected in parallel to this series circuit. The control terminal ON is connected to the gate electrode of the transistor TL.

[0006] Japanese Patent Application Laid-Open No. 2009-105240 describes a light emitting device having a VCSEL and a resistive element whose resistance has a positive temperature characteristic and is connected in series to the VCSEL. The resistive element connected in series to the VCSEL compensates for temperature changes in the impedance characteristics of the VCSEL, thereby preventing high frequency noise and degradation of the drive signal due to impedance mismatch.

[0007] Japanese Patent Laid-Open No. 2004-31456 describes an optical interconnection device that is miniaturized by arranging a submount substrate, on the upper side of which an IC driver is arranged and a VCSEL is arranged on the rear side.

[0008] FIG. 16 of US Pat. No. 8,488,921 describes an apparatus in which a submount is disposed on an upper portion of a printed wiring board, an IC chip is disposed on the upper portion of the submount, and a VCSEL is disposed on the upper portion of the IC chip.

[0009] FIG. 2 of JP 2009-8721 A describes an optical module in which a light-emitting element array is arranged on the top of a printed circuit board, a driving IC is arranged on the top of the light-emitting element array, and a memory IC is arranged on the top of the driving IC. Summary of the Invention

[0010] However, none of the documents described a VCSEL module having a three-stage structure in which a switching element is disposed on the top of a substrate and a VCSEL is disposed on the top of the switching element.

[0011] Therefore, an object of the VCSEL module according to the present invention is to provide a VCSEL module in which a VCSEL and a switching element are integrated and which can be made compact.

[0012] According to one embodiment of the present VCSEL module, the VCSEL includes a VCSEL, a switching element for the VCSEL disposed below the VCSEL and electrically connected to the VCSEL, and a substrate disposed below the switching element and electrically connected to the switching element.

[0013] The VCSEL module includes a current control element disposed between the VCSEL and the switching element or between the switching element and the substrate, The current controlling element is preferably electrically connected in series with the VCSEL and the switching element.

[0014] The VCSEL module further includes a wiring electrode formed on the substrate, The switching element or current control element is preferably electrically connected to the wiring electrode via a solder ball, a stud bump, or a metal piece.

[0015] In the above VCSEL module, it is preferable that a connection portion of the wiring electrode that is connected to the gate electrode of the current steering element is formed thicker than other portions.

[0016] The above VCSEL module preferably further comprises a capacitor electrically connected to the VCSEL.

[0017] The VCSEL module further includes a first electrode made of a metal, The substrate acts as a metallic second electrode, the VCSEL has a VCSEL first terminal disposed on a front surface and a VCSEL second terminal disposed on a rear surface, the switching element is formed within the semiconductor device, The semiconductor device preferably has a first terminal connected to the first electrode and the cathode, a second terminal connected to the cathode, and a third terminal connected to the second electrode.

[0018] In the above VCSEL module, it is preferable that the semiconductor device has a current control element that controls a current flowing through the VCSEL, and that the current control element is connected between the second terminal and the switching element or between the switching element and the third terminal.

[0019] In the above-mentioned VCSEL module, the semiconductor device has a rectangular plate shape including a first side surface, a second side surface and a third side surface perpendicular to the first side surface, a fourth side surface opposite the first side surface, a top surface, and a bottom surface; the first terminal is disposed on an end of the top surface along the first side surface adjacent to the first electrode; The second terminal is disposed in the center of the top surface, The third terminal is preferably disposed at an end of the top surface along the second side surface or the third side surface.

[0020] In the above VCSEL module, the first electrode and the first terminal are preferably connected by a plurality of bonding wires.

[0021] In the above VCSEL module, the second electrode and the third terminal are preferably connected by a plurality of bonding wires.

[0022] In the above-mentioned VCSEL module, the semiconductor device has a monitoring circuit for monitoring the temperature of the VCSEL, the current flowing through the VCSEL, or the amount of light emitted from the VCSEL; The monitoring circuit terminal to be connected to the monitoring circuit is preferably disposed at an end along the fourth surface of the front surface of the semiconductor device.

[0023] The above VCSEL module preferably further comprises a third electrode connected to the monitoring circuit terminal.

[0024] The above VCSEL module preferably further comprises a resin frame formed so as to cover part of the surfaces of the first electrode and the second electrode and part of the surfaces of the first terminal and the third terminal.

[0025] In the above VCSEL module, the frame preferably has a support surface in which an opening is formed through which the VCSEL is viewable.

[0026] The above VCSEL module preferably further comprises an optical element supported on the support surface and transmitting light emitted from the VCSEL.

[0027] In the light emitting device described above, the frame preferably has a protrusion protruding inwardly from the outer wall of the frame above the support surface in order to position the optical element.

[0028] In the above VCSEL module, a heat dissipation path for transmitting heat from the VCSEL toward the second electrode is preferably formed in the semiconductor device between the second terminal and a lower surface of the semiconductor device.

[0029] In the above-mentioned VCSEL module, the semiconductor device has a fourth terminal connected to the second electrode, the fourth terminal is disposed at an end of the top surface along the other of the second side surface or the third side surface on which the third terminal is disposed; It is preferable that the current flowing from the cathode of the VCSEL into the semiconductor device be divided by the third terminal and the fourth terminal into the left and right sides of the semiconductor device and flow to the second electrode.

[0030] In the VCSEL module according to the embodiment, it is possible to provide a VCSEL module in which the VCSEL and the switching element are integrated and which can be made compact. [Brief description of the drawings]

[0031] [Figure 1] 1 is a side view of a VCSEL module 100 according to a first embodiment. [Diagram 2] 1A is a bottom view of a first FET 201 included in the VCSEL module 100, and FIG. 1B is a top view of the first FET 201. FIG. [Diagram 3] 2 is a circuit diagram of the VCSEL module 100 shown in FIG. [Figure 4] 2 is a characteristic diagram of the VCSEL module 100 shown in FIG. [Diagram 5] 5(a) to 5(f) are explanatory diagrams of a manufacturing method of the VCSEL module 100. [Figure 6] 1(a) to 1(f) are diagrams illustrating a method for manufacturing a VCSEL module 130, which is a first modified example of the VCSEL 100 module. [Figure 7] 13(a) to 13(f) are diagrams illustrating a method for manufacturing a VCSEL module 140, which is a second modified example of the VCSEL 100 module. [Figure 8] 1A is a top view of the framed VCSEL 100 module 100, and FIG. 1B is a cross-sectional view taken along the line AA shown in FIG. [Figure 9] 1A is a top view of a framed VCSEL 100 module 100', and FIG. 1B is a cross-sectional view taken along line BB shown in FIG. [Figure 10] FIG. 11 is a perspective view of a VCSEL module 150 according to a second embodiment. [Figure 11] FIG. 11 is a perspective view of the VCSEL module 150 shown in FIG. 10 excluding optical elements. [Figure 12] FIG. 11 is a perspective view of the VCSEL module 150 shown in FIG. 10 excluding optical elements and a frame. [Figure 13] 11 is a cross-sectional view of the VCSEL module 150 taken along line CC shown in FIG. [Figure 14] FIG. 11 is a perspective view of the frame shown in FIG. [Figure 15] FIG. 11 is a circuit diagram of the VCSEL module 150 shown in FIG. [Figure 16] 11 is a diagram illustrating a schematic connection relationship between the second electrode, the semiconductor device, and the light-emitting element illustrated in FIG. 10. [Figure 17]11 is an explanatory diagram of a method for manufacturing the VCSEL module 150 shown in FIG. [Figure 18] 18 is a top view corresponding to the electrode preparing step shown in FIG. 17. [Figure 19] 18 is a top view corresponding to the semiconductor device mounting step shown in FIG. 17. [Figure 20] 18 is a top view corresponding to the light emitting element mounting step shown in FIG. 17. [Figure 21] 18 is a top view corresponding to the bonding wire step shown in FIG. 17. [Figure 22] 18 is a top view corresponding to the frame forming step shown in FIG. 17. [Figure 23] 1A is a plan view of the VCSEL module 150 excluding the base of the frame 318, FIG. 1B is a cross-sectional view taken along line DD in FIG. 1A, and FIG. 1C is a cross-sectional view taken along line EE in FIG. [Figure 24] 1 is a timing chart of a distance measuring device shown as a conventional technique. [Diagram 25] FIG. 6 is a perspective view of a laser diode module 600 shown as a prior art. [Figure 26] FIG. 26 is a circuit diagram of the laser diode module 600 shown in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0032] A preferred embodiment of the VCSEL module will be described below with reference to the drawings. However, the technical scope of the present invention is not limited to these embodiments, but extends to the inventions described in the claims and their equivalents. In the description of the drawings, the same or equivalent elements are given the same reference numerals, and duplicate descriptions are omitted. The scale of the components may be changed as appropriate for the purpose of explanation.

[0033] FIG. 1 is a side view of a VCSEL module 100 according to a first embodiment. As shown in FIG. 1, the VCSEL module 100 includes a substrate 101, a VCSEL 105, a first FET 201, and a second FET 202. The second FET 202, the first FET 201, and the VCSEL 105 are stacked on the substrate 101 in this order from the bottom of the figure. Note that a capacitor 113 (see FIG. 3) is mounted on the substrate 101, and terminal electrodes for connecting to an external circuit are formed, but FIG. 1 shows only the members constituting the stack structure, that is, the VCSEL 105, the first FET 201, the second FET 202, and the members related to their mounting. Note that an optical component such as a lens for controlling the light distribution of the VCSEL 105 may be disposed on the VCSEL 105, or a wall-like structure may be provided outside the stack structure, but these will be described later.

[0034] The substrate 101 is a flat plate whose base material is made of aluminum nitride, and has a patterned metal layer (wiring electrodes 110a to 110d, etc.) on its upper surface. The base material is not limited to aluminum nitride, and may be a resin such as FR4.

[0035] The VCSEL 105 is a surface-emitting light source that is an assembly of laser diodes with an anode on the top surface and a cathode on the bottom surface. The anode is connected to the wiring electrode 110a by a bonding wire 109, and the cathode is connected to the drain electrode 206 of the first FET 201 via the first conductive adhesive member 103. The VCSEL 105 has a thickness of 200 μm and a planar size of 1.0 mm×1.0 mm, but the size is not limited to this.

[0036] The first FET 201 has a drain electrode 206 provided over the entire upper surface of the FET die 203, and a source electrode 204 and a gate electrode 205 on the lower surface. The source electrode 204 included in the first FET 201 is connected to the drain electrode 206 included in the second FET 202 via the first conductive adhesive member 103, and the gate electrode 205 is connected to the wiring electrode 110b via the second conductive member 107. The second FET 202 is the same as the first FET 201, and the source electrode 204 and the gate electrode 205 included in the second FET 202 are connected to the wiring electrode 110d and the wiring electrode 110c via the first conductive adhesive member 103, respectively. The first and second FETs 201 and 202 have a thickness of 100 μm and a planar size of 1.4 mm×1.4 mm, and each of the electrodes 204 to 206 is plated with Ni-Au.

[0037] The first conductive adhesive member 103 is a material having adhesiveness and electrical conductivity, such as sintered Ag, AuSn, solder, etc., but is not limited to these as long as it has adhesiveness and electrical conductivity. The second conductive member 107 includes a solder ball 107a (see FIG. 5) as a member that can increase height. Other materials that can be used for the second conductive member 107 include a solder plate, a gold bump, a metal plate, etc. The first conductive adhesive member 103 and the second conductive member 107 are preferably made of a metal material with low electrical resistivity. This can keep the impedance low, and the VCSEL module 100 can easily pass a large current for a short period of time.

[0038] 2A and 2B are bottom and top views of a first FET 201 included in the VCSEL module 100. As shown in Fig. 2A, a small-area drain electrode 206, indicated by "D", a large-area source electrode 204, indicated by "S", and a small-area gate electrode 205, indicated by "G", are disposed on the bottom surface of the first FET 201. As shown in Fig. 2B, a drain electrode 206, indicated by "D", occupying the entire top surface is disposed on the top surface of the first FET 201.

[0039] The drain electrode 206 on the back surface is connected to the drain electrode 206 on the top surface inside the first FET 201, but is not connected to the wiring electrodes 110a-110d of the substrate 101 (see FIG. 1). The first FET 201 has a trench structure, so that a current flows from the top surface to the bottom surface. The second FET 202 has exactly the same structure and characteristics as the first FET 201, so a description thereof will be omitted.

[0040] Fig. 3 is a circuit diagram of the VCSEL module 100. In Fig. 1, only the VCSEL 105 and the first and second FETs 201 and 202 are shown as circuit elements, but as described above, the capacitor 113 is also mounted on the substrate 101. Therefore, in Fig. 3, the capacitor 113 and the circuit related to the capacitor 113 are shown by dotted lines.

[0041] 3, the VCSEL module 100 has a power supply terminal 111a, a gate terminal 111b of a first FET 201, a gate terminal 111c of a second FET 202, and a source terminal 111d. As shown in Fig. 3, the VCSEL 105, the first FET 201, and the second FET 202 are connected in series between the power supply terminal 111a and the source terminal 111d, and the capacitor 113 is connected in parallel to this series circuit. Each of the terminals 111a to 111d is a terminal electrode formed on the lower surface of the substrate 101 for connection to an external device, and is electrically connected to the wiring electrodes 110a to 110d via a through hole or via provided in the substrate 101. 。

[0042] An external power supply (not shown) charges the capacitor 113 via the power supply terminal 111a mainly when not emitting light. On the other hand, when emitting light, a large current needs to flow through the VCSEL module 100 for a short period of only about 10 (ns). However, the external power supply cannot respond during this period, and the current required for this 10 (ns) period cannot be supplied only from the power supply terminal 111a. Therefore, most of the current that causes the VCSEL 105 to emit light comes from the discharge of the capacitor 113.

[0043] A predetermined constant voltage is applied to the gate terminal 111b from the outside, causing the first FET 201 to function as a current control element. A control pulse with a width of about 10 (ns) is applied to the gate terminal 111c from the outside, causing the second FET 202 to function as a switching element.

[0044] Fig. 4 is a characteristic diagram obtained by simulation of the current 401 flowing through the VCSEL 105 when a control pulse with a width of 10 (ns) is applied to the gate terminal 111c (see Fig. 3). The vertical axis represents the current (A) and the horizontal axis represents the time (ns). For comparison, Fig. 4 also shows the current 402 flowing through the laser diode DL of the laser diode module 600 shown in Figs. 25 and 26 as a conventional example.

[0045] In the simulation, the inductance of the current path from the capacitor 113 through the VCSEL 105 back to the capacitor 113 is set to 1 nH. As shown in FIG. 4, when a control pulse is applied to the gate terminal 111c, the VCSEL 105 enters constant current operation within 1 ns from the rise of the current. On the other hand, when a control pulse is applied to the current 402 in the conventional example, the current value continues to increase until the application of the control pulse ends. Thus, in the VCSEL module 100, the waveform of the current 401 of the VCSEL 105 rises in 1 ns or less with respect to the control pulse, the top is flat, and the flat portion is secured for about 8 ns. Since the amount of light emitted from the VCSEL 105 is proportional to the input current, it is possible to keep the amount of light emitted from the VCSEL 105 constant during the flat portion.

[0046] 5 is an explanatory diagram of a manufacturing method of the VCSEL module 100. Fig. 5(a) to (f) show side views of characteristic states in each process. As in Fig. 1, Fig. 5(a) to (f) do not show anything other than the VCSEL 105, the first and second FETs 201, 202, and their associated members.

[0047] As shown in FIG. 5(a), first, a substrate 101 having wiring electrodes 110a to 110d and the like on its upper surface is prepared. Next, as shown in FIG. 5(b), a first conductive adhesive member 103 is applied to the upper surfaces of the wiring electrodes 110b to 110d, except for the wiring electrode 110a for bonding wire. Next, as shown in FIG. 5(c), a second FET 202 is connected to the substrate 101. At this time, the second FET 202 is arranged such that the gate electrode 205 and the source electrode 204 overlap the wiring electrodes 110c and 110d, respectively, via the first conductive adhesive member 103.

[0048] 5(d), the solder ball 107a is placed on the wiring electrode 110b, and the first conductive adhesive member 103 is applied to the upper surface of the second FET 202. Note that the first conductive adhesive member 103 is interposed between the solder ball 107a and the wiring electrode 110b to fix the solder ball 107a, but if the solder ball 107a can be fixed by another method such as flux, the first conductive adhesive member 103 is not necessarily required.

[0049] 5(e), the first FET 201 is connected to the upper surface of the second FET 202. It is assumed that the VCSEL 105 is previously connected to the upper surface of the first FET 201 with the first conductive adhesive member 103. The gate electrode 205 included in the first FET 201 is connected to the solder ball 107a, and the source electrode 204 is connected to the drain electrode 206 of the second FET 202 via the first conductive adhesive member 103.

[0050] Finally, as shown in FIG. 5(f), the VCSEL module 100 is heated to stabilize the connection state. At this time, the first conductive adhesive member 103 is hardened by the first heating. Next, the temperature is raised to melt the solder ball 107a, and the solder ball 107a is connected to the first conductive adhesive member 103. At this time, the solder ball 107a and the gate electrode 205 of the second FET 202 are also connected. In this manner, the second conductive member 107 is completed by connecting the solder ball 107a and the first conductive adhesive member 103. Thereafter, the anode of the VCSEL 105 and the wiring electrode 110a are connected by the bonding wire 109. Note that, if the first conductive adhesive member 103 is not used in the second conductive member 107, the solder ball 107 is directly connected to the electrode 110b.

[0051] As described above, the VCSEL module 100 has a structure in which the VCSEL 105, the first FET 201 which is a current control element, the second FET 202 which is a switching element, and the substrate 101 are stacked in four stages. In addition, since the first FET 201 is not necessarily required, the VCSEL module 100 may have a structure in which the VCSEL 105, the second FET 202 which is a switching element, and the substrate 101 are stacked in three stages (a three-stage stack structure).

[0052] In the VCSEL 105, a current flows almost linearly from the anode on the top surface to the cathode on the bottom surface. Similarly, in the first FET 201 and the second FET 202, a current flows almost linearly from the drain electrode 206 on the top surface to the source electrode 204 on the bottom surface. That is, in the stack structure consisting of the VCSEL 105 and the first and second FETs 201 and 202, a current flows linearly from the top to the bottom over a short distance. As a result, in the stack structure of the VCSEL module 100, the inductance is minimized, and the current rise and fall characteristics are improved. In addition, since this stack structure includes the first FET 201 that functions as a current control element in the current path, even if an extremely short pulse current is applied, the current does not continue to rise during that time (see current 401 in FIG. 4).

[0053] As described above, VCSEL module 100 minimizes the inductance of the current path including VCSEL 105, thereby suppressing the rise and fall times of the pulse current flowing through VCSEL 105 to 1 ns or less, and in addition, even if the control pulse width is extremely short, the top of the current waveform is flattened within the control pulse width by first FET 201 functioning as a current control element. Therefore, VCSEL module 100 improves the waveform of the pulse current flowing through VCSEL 105 so that it approaches a square wave (see current 401 in FIG. 4).

[0054] In the VCSEL module 100, the first FET 201 functions as a current control element and the second FET 202 functions as a switching element, but the arrangement of the first FET 201 and the second FET 202 may be reversed.

[0055] As described in FIG. 5( e), the first FET 201 is disposed above the second FET 202 with the VCSEL 105 already mounted on the first FET 201. However, the first FET 201 may be disposed above the second FET 202 and then the VCSEL 105 may be mounted on the first FET 201.

[0056] In the VCSEL module 100, the same element is used for the first FET 201 and the second FET 202, but it is also possible to realize a stack structure by using FETs of different sizes for each, and the same effect can be obtained in this way.

[0057] 6 is an explanatory diagram of a VCSEL module 130, which is a first modified example of the VCSEL module 100, and a manufacturing method thereof. FIGS. 6(a) to 6(f) show side views of characteristic states in each process. Note that FIGS. 6(a) to 6(f) also do not show anything other than the VCSEL 105, the first and second FETs 201 and 202, and components related to their mounting, such as the capacitor 113 (see FIG. 3). Additionally, optical elements and frames that may be added are not shown.

[0058] As described above, the second conductive member 107 that connects the gate electrode 205 of the first FET 201 and the wiring electrode 110b of the substrate 101 is not limited to a member including a solder ball 107a. Therefore, in the VCSEL module 130, a VCSEL module 130 in which the second conductive member 107 includes a metal piece will be described.

[0059] First, the structure of the VCSEL module 130 will be described with reference to FIG. 6(f). As shown in FIG. 6(f), in the VCSEL module 130, the second FET 202, the first FET 201, and the VCSEL 105 are also stacked on the substrate 101 in this order from the bottom of the figure. At this time, in the second conductive member 107c, the first conductive adhesive member 103, the metal piece 107b, and the first conductive adhesive member 103 are stacked from the bottom. Comparing FIG. 6(f) with FIG. 1, the VCSEL module 130 has a basic structure in common with the VCSEL module 100, and differs only in the second conductive member 107c that connects the gate electrode 205 of the first FET 201 and the wiring electrode 110b. Note that, like the VCSEL module 100, the VCSEL module 130 does not necessarily require the first FET 201.

[0060] As shown in FIG. 6(a), first, a substrate 101 having wiring electrodes 110a to 110d on its upper surface is prepared. Next, as shown in FIG. 6(b), a first conductive adhesive member 103 is applied to the upper surfaces of the wiring electrodes 110b to 110d, except for the wiring electrode 110a for bonding wire. Next, as shown in FIG. 6(c), a second FET 202 and a metal piece 107b are connected to the substrate 101. At this time, the second FET 202 is arranged so that the gate electrode 205 and the source electrode 204 overlap the wiring electrodes 110c and 110d, respectively, via the first conductive adhesive member 103. At the same time, the metal piece 107b is arranged so that it overlaps the wiring electrode 110b via the first conductive adhesive member 103.

[0061] Next, as shown in Fig. 6(d), the first conductive adhesive member 103 is applied to the upper surface of the metal piece 107b and the second FET 202. Next, as shown in Fig. 6(e), the first FET 201 mounting the VCSEL 105 is connected to the upper surface of the metal piece 107b and the second FET 202. Finally, as shown in Fig. 6(f), the VCSEL module 100 is heated to harden the first conductive adhesive member 103. At this time, the second conductive member 107c is also completed.

[0062] In the VCSEL module 100 in which the second conductive member 107 includes the solder ball 107a, the solder ball 107a is melted and connected to the hardened first conductive connection member 103 on the wiring electrode 110b, which complicates the temperature profile and makes the manufacturing conditions difficult. In contrast, in the VCSEL module 130, the connection with the metal piece 107b is completed only by hardening the first conductive connection member 103, so the temperature profile of the VCSEL module 130 is simplified. In other words, the manufacturing conditions are simplified because it is necessary to mainly consider the hardening of the first conductive resin 103 when heating. In addition, the metal piece 107b is placed together with the second FET 202 in the process shown in FIG. 6(c), so the burden of the process is only slightly increased. In addition, the metal piece 107b has less variation in external shape than the solder ball 107, which also contributes to simplification of the manufacturing process.

[0063] 7 is an explanatory diagram of a VCSEL module 140, which is a second modified example of the VCSEL module 100, and a manufacturing method thereof. Figures 7(a) to (f) show side views of characteristic states in each process. Note that, also in Figures 7(a) to (f), only the capacitor 113 (see Figure 3), the VCSEL 105, the first and second FETs 201 and 202, and the members related to their mounting are shown. Furthermore, optical elements and frames that may be added are not shown.

[0064] The VCSEL module 100 and the VCSEL module 130 each employ second conductive members 107, 107c including solder balls 107a and metal pieces 107b. However, the second conductive member 107 is not necessarily required to connect the gate electrode 205 of the first FET 201 and the wiring electrode 110b of the substrate 101. Therefore, a VCSEL module 140 that does not use the second conductive members 107, 107b, etc. will be described.

[0065] First, the structure of the VCSEL module 140 will be described with reference to FIG. 7(f). As shown in FIG. 7(f), the VCSEL module 140 also has a second FET 202, a first FET 201, and a VCSEL 105 stacked on a substrate 101 in this order from the bottom of the figure. At this time, a thick copper plating layer 107 is formed on the upper part of the wiring electrode 110b, and a gate electrode 205 of the first FET 201 is connected to the wiring electrode 110b via a first conductive adhesive member 103 and a thick copper plating layer 107d. Comparing FIG. 7(f) with FIG. 1, the VCSEL module 140 has a basic structure in common with the VCSEL module 100, and differs only in the structure for connecting the gate electrode 205 of the first FET 201 to the wiring electrode 110b. Note that, like the VCSEL module 100, the VCSEL module 130 does not necessarily require the first FET 201.

[0066] As shown in FIG. 7(a), first, a substrate 101 having wiring electrodes 110a to 110d and the like on its upper surface is prepared. At this time, the wiring electrode 110b has a thick copper plating layer 107d formed on its upper surface by a plating method, and is thicker than the other wiring electrodes 110a, 110c, and 110d. Next, as shown in FIG. 7(b), a first conductive adhesive member 103 is applied to the upper surfaces of the wiring electrodes 110c and 110d, except for the wiring electrode 110a for bonding wires and the wiring electrode 110b having the thick copper plating layer 107d. Next, as shown in FIG. 7(c), a second FET 202 is connected to the substrate 101. At this time, the second FET 202 is arranged so that the gate electrode 205 and the source electrode 204 overlap the wiring electrodes 110c and 110d, respectively, via the first conductive adhesive member 103.

[0067] Next, as shown in Fig. 7(d), the first conductive adhesive member 103 is applied to the thick copper plating layer 107d and the upper surface of the second FET 202. Next, as shown in Fig. 7(e), the first FET 201 mounting the VCSEL 105 is connected to the thick copper plating layer 107d and the upper surface of the second FET 202. Finally, as shown in Fig. 7(f), the VCSEL module 140 is heated to harden the first conductive adhesive member 103. At this time, the connection between the gate electrode 205 of the second FET 202 and the wiring electrode 110b is also completed.

[0068] The manufacturing process of VCSEL module 140 shown in Figures 7(b) to (f) is simpler than the manufacturing process of VCSEL module 130 shown in Figures 6(b) to (f). That is, the manufacturing process of VCSEL module 140 does not include a step of forming second conductive member 107c.

[0069] Fig. 8 is a diagram showing the VCSEL module 100 to which a first frame 500 has been added. Fig. 8(a) shows a top view, and Fig. 8(b) is a cross-sectional view taken along line AA in Fig. 8(a).

[0070] The first frame 500 is a black resin member, and is disposed on top of the substrate 101 so as to cover the entire VCSEL module 100, except for a central opening 501 where part of the VCSEL 105 is exposed. Covering the VCSEL module 100 with the first frame 500 improves environmental resistance and makes it suitable for long-term use. Light emitted from the VCSEL 105 is emitted to the outside through the opening 501.

[0071] An optical element having a predetermined optical characteristic may be disposed so as to cover the opening 501. As the optical element, for example, a light-transmitting member formed of a thermoplastic resin such as a polyarylate resin, a thermosetting resin such as a silicone resin, or an ultraviolet-curing resin such as an epoxy resin can be used. By using the optical element, it becomes possible to shape and homogenize the light emitted from the VCSEL 105, thereby emitting light having a desired light distribution.

[0072] Fig. 9 is a diagram showing a VCSEL module 100' to which a second frame 510 is added. Fig. 9(a) shows a top view, and Fig. 9(b) is a cross-sectional view taken along line BB in Fig. 9(a).

[0073] The VCSEL module 100' has the same configuration as the VCSEL module 100, except that a relay electrode 512, a first bonding wire 513, and a second bonding wire 514 are arranged on the upper surface of the first FET 201 instead of the bonding wire 109. The wiring electrode 110a and the relay electrode 512 are connected by the first bonding wire 513, and the relay electrode 512 and the anode of the VCSEL 105 are connected by the second bonding wire 514.

[0074] The second frame 510 is a black resin member and is disposed on the upper part of the substrate 101 so as to cover the entire VCSEL module 100', except for a central opening 511 where the entire VCSEL 105 and a part of the relay electrode 512 are exposed. Covering the VCSEL module 100' with the second frame 510 improves environmental resistance and makes it suitable for long-term use. Light emitted from the VCSEL 105 is emitted to the outside through the opening 511. As in the example of FIG. 8, an optical element having a predetermined optical characteristic may be disposed so as to cover the opening 511.

[0075] 9, since the opening area of ​​the opening 511 is increased, it becomes possible to cover the VCSEL module 100′, excluding the VCSEL 105 and the second bonding wire 514, with the frame 510, and then mount the VCSEL 105 and connect it with the second bonding wire 514. This increases the degree of freedom in design.

[0076] According to the VCSEL module of this embodiment, it is possible to provide an improved VCSEL module in which the rise time is suppressed to 1 ns or less, even if the pulse width of the pulse current passed through the vertical-cavity surface-emitting laser (VCSEL), which serves as a light source and emits light perpendicular to the mounting surface, is short, and furthermore, the waveform is improved to approach a square wave.

[0077] According to one embodiment of the VCSEL module, the VCSEL module comprises a VCSEL, a first FET disposed below the VCSEL, and a second FET disposed below the first FET, wherein one of the first FET or the second FET is a switching element and the other is a current control element.

[0078] In the above VCSEL module, the VCSEL, the switching element, and the current control element form a four-stage stack structure. In the VCSEL included in the VCSEL module, current flows almost linearly from the anode on the top surface to the cathode on the bottom surface. Similarly, in the first and second FETs used as the switching element and the current control element, current also flows almost linearly from the drain electrode on the top surface to the source electrode on the bottom surface. Therefore, in the stack structure consisting of the VCSEL and the first and second FETs, current flows linearly from the top to the bottom. As a result, in this stack structure, the current path is linear and short, so inductance is minimized. In addition, since the stack structure has a current control element in the current path, the current does not continue to rise during the short period given by the pulse width.

[0079] The above VCSEL module may further include a capacitor that supplies a current to the VCSEL.

[0080] The above VCSEL module may further include a circuit board, and the gate electrode of the first FET and a wiring electrode of the circuit board may be connected via a solder ball, a stud bump, or a metal piece.

[0081] The above VCSEL module may further include a circuit board, and a wiring electrode of the circuit board connected to the gate electrode of the first FET may be thicker than other wiring electrodes formed on the circuit board.

[0082] In the above VCSEL module, by minimizing the inductance of the current path including the VCSEL, the rise time of the pulse current flowing through the VCSEL is suppressed to 1 ns or less, and the current control element flattens the top of the current waveform even during the short period given by the width of the pulse current. Therefore, in the above VCSEL module, the waveform of the pulse current flowing through the VCSEL is improved to be closer to a square wave.

[0083] FIG. 10 is a perspective view of a VCSEL module 150 according to the second embodiment, FIG. 11 is a perspective view of the VCSEL module 150 shown in FIG. 10 excluding the optical elements, FIG. 12 is a perspective view of the VCSEL module 150 shown in FIG. 10 excluding the optical elements and the frame, and FIG. 13 is a cross-sectional view of the VCSEL module 150 taken along line CC shown in FIG. 10 .

[0084] The VCSEL module 150 is a lead frame package having a first electrode 311, a second electrode 312, nine monitor control electrodes 313, a pair of dummy electrodes 314, a semiconductor device 315, a VCSEL 316, an optical element 317, a frame 318, and a plurality of bonding wires 319. In the VCSEL module 150, the second electrode 312, the semiconductor device 315, and the VCSEL 316 are arranged in a superimposed manner. The semiconductor device 315 has a rectangular planar shape, and has a first side 321, a second side 322, a third side 323, and a fourth side 324.

[0085] The first electrode 311, the second electrode 312, the nine monitoring control electrodes 313, and the pair of dummy electrodes 314 are each formed of a conductive material with high heat dissipation properties, such as aluminum and copper, and are arranged at a distance from each other. The number of electrodes is an example, and is not limited to the above. The first electrode 311 has a substantially rectangular planar shape extending in the longitudinal direction, and is arranged so that the longitudinal direction extends parallel to the extension direction of a first side 321 of the semiconductor device 315 having a rectangular planar shape. The first electrode 311 is electrically connected to the anode of the VCSEL 316 via a first terminal 31 arranged on the surface of the semiconductor device 315, via a plurality of bonding wires 319 arranged along the extension direction of the first side 321.

[0086] The second electrode 312 has a first protrusion 312a, a second protrusion 312b, and a third protrusion 312c disposed adjacent to a second side 322, a third side 323, and a fourth side 324 of the semiconductor device 315, respectively, on which the semiconductor device 315 is mounted. The second electrode 312 is electrically connected to the semiconductor device 315 via a plurality of bonding wires 319, one end of which is connected to the first protrusion 312a, the second protrusion 312b, and the third protrusion 312c. The second electrode 312 is thermally connected to the semiconductor device 315 via an adhesive member having high thermal conductivity, such as a resin material containing metal.

[0087] Of the nine monitor control electrodes 313, five monitor control electrodes 313 are arranged between the first protrusion 312a and the third protrusion 312c so as to extend along the second side 322 and the fourth side 324 of the semiconductor device 315. The remaining four monitor control electrodes 313 of the nine monitor control electrodes 313 are arranged between the second protrusion 312b and the third protrusion 312c so as to extend along the third side 323 and the fourth side 324 of the semiconductor device 315. Each of the nine monitor control electrodes 313 is electrically connected to the semiconductor device 315 via a bonding wire 319.

[0088] The pair of dummy electrodes 314 are disposed at both ends of the first electrode 311 in the longitudinal direction and spaced apart from the first electrode 311 .

[0089] The semiconductor device 315 has a first terminal 331, a second terminal 332, a third terminal 333, a fourth terminal 334, a fifth terminal 335, and nine monitoring and control terminals 336, and monitors and controls the driving current flowing between the anode and cathode of the VCSEL 316.

[0090] The first terminal 331 has a rectangular planar shape and is disposed on the surface of the semiconductor device 315 along the first side 321 facing the first electrode 311. The length of the side of the first terminal 331 along the first side 321 facing the first electrode 311 is preferably longer than the side along the first side 321 facing the first electrode 311 of the VCSEL 316. The number of wires from the anode terminal disposed on almost the entirety of at least one side of the VCSEL 316 can be maximized, and voltage drops due to wiring resistance are suppressed. In addition, the length of the side of the first terminal 331 perpendicular to the first side 321 facing the first electrode 311 is preferably shorter than the side along the first side 321 facing the first electrode 311 of the VCSEL 316. Since the path is shorter, voltage drops due to wiring resistance are suppressed. The length of the side of the first terminal 331 perpendicular to the first side 321 facing the first electrode 311 is determined according to the sizes of the semiconductor device 315 and the VCSEL 316, and may be longer than or the same as the side along the first side 321 facing the first electrode 311. In a region close to the first side 321 of the first terminal 331, a plurality of bonding wires 319 electrically connecting the first electrode 311 and the first terminal 331 are arranged along the extension direction of the first side 321. In a region away from the first side 321 of the first terminal 331, a plurality of bonding wires 319 electrically connecting the first electrode 311 and the anode of the VCSEL 316 are arranged along the extension direction of the first side 321.

[0091] The second terminal 332 has a rectangular planar shape and is disposed in the center of the surface of the semiconductor device 315. The VCSEL 316 is mounted on the second terminal 332, and the second terminal 332 and the cathode of the VCSEL 316 are electrically connected to each other.

[0092] Each of the third terminal 333 and the fourth terminal 334 has a rectangular planar shape whose longitudinal direction extends to a second side 322 and a third side 323 perpendicular to the first side 321, and is disposed on the surface of the semiconductor device 315 along the second side 322 and the third side 323. In the third terminal 333, a plurality of bonding wires 319 electrically connecting the first protrusion 312a and the third terminal 333 are disposed along the extension direction of the second side 322. In the fourth terminal 334, a plurality of bonding wires 319 electrically connecting the second protrusion 312b and the fourth terminal 334 are disposed along the extension direction of the third side 323.

[0093] The fifth terminal 335 has a rectangular planar shape, and is disposed near the center of the fourth side 324. A bonding wire 319 that electrically connects the third protrusion 312c and the fifth terminal 335 is disposed on the fifth terminal 335.

[0094] Each of the nine monitor control terminals 336 has a rectangular planar shape, and is disposed near the second side 322, the third side 323, and the fourth side 324. Bonding wires 319 are disposed on each of the nine monitor control terminals 336 to electrically connect the nine monitor control electrodes 313 to each other.

[0095] The semiconductor device 315 can be said to be a single-sided wiring board capable of complex circuit configuration, and has a high degree of freedom in wiring design. The high degree of freedom in wiring design means that the width of the wiring is 1 μm or more, 5 μm or more, or 10 μm or more, and may be narrower than 50 μm or less, 100 μm or less, or 200 μm, and the pitch of the wiring is 1 μm or more, 5 μm or more, or 10 μm or more, and 50 μm or less, 100 μm or less, or 200 μm or less. In addition, for example, the first terminal 331, the second terminal 332, the third terminal 333, the fourth terminal 334, the fifth terminal 335, and the nine monitor control terminals 336 can be easily arranged at suitable positions on each side of the semiconductor device 315. At this time, it is easy to arrange the first electrode 311, the second electrode 312, the monitoring control electrode 313, and the dummy electrode 314 near the respective terminals so that the wire length is the shortest, and since the wire length between each terminal and each electrode can be minimized, the risk of the bonding wire 319 being broken is reduced. In addition, since the arrangement of each electrode is easy, a lead frame with a low degree of freedom in wiring design can be used. Here, the low degree of freedom in wiring design means, for example, that the width of the wiring is 200 μm or more, or 300 μm or more, and the pitch of the wiring is 200 μm or more. The lead frame may be made of, for example, a metal material such as copper, or may be made of a single or single-layer metal material, and the surface layer may be plated with gold, silver, or the like over the entire circumference.

[0096] In the VCSEL 316, multiple emitters that emit laser light are arranged in an array at equal intervals on the surface. The VCSEL 316 has, for example, 364 (26 x 14) emitters, and the 364 emitters are arranged at a pitch of 0.0385 mm. The VCSEL 316 has an anode arranged on the surface and a cathode arranged on the back surface, and emits light in response to a current being supplied between the anode and the cathode.

[0097] The optical element 317 is a light-transmitting member formed of, for example, a thermoplastic resin such as polyarylate resin, a thermosetting resin such as silicone resin, or an ultraviolet-curing resin such as epoxy resin. At least one of the front and back surfaces of the optical element 317 is formed with a diffusing surface that is textured or the like to diffuse the light emitted from the VCSEL 316. The optical element 317 shapes and homogenizes the light emitted from the VCSEL 316, thereby emitting light having a desired light distribution. The optical element 317 is preferably made of a material that transmits the wavelength of the light emitted from the VCSEL 316 so that the light emission efficiency of the VCSEL module 150 does not decrease. The transmittance of the optical element 317 is preferably 90% or more, and more preferably 95% or more. 。

[0098] FIG. 14 is a perspective view of the frame 318.

[0099] The frame 318 is a black resin member, and has a first wall portion 341, a second wall portion 342, a third wall portion 343, a fourth wall portion 344, a support surface 345, a first convex portion 346, and a second convex portion 347. The frame 318 is arranged so as to cover the surfaces of the first electrode 311 and the second electrode 312, a part of the first terminal 331, and the third terminal 333 and the fourth terminal 334. The bottom surfaces of the first electrode 311, the second electrode 312, the monitor control electrode 313, and the dummy electrode 314 are not covered by the frame 318. The bottom surface of the frame 318 is flush with the bottom surfaces of the first electrode 311, the second electrode 312, the monitor control electrode 313, and the dummy electrode 314. The bottom surfaces of the first electrode 311, the second electrode 312, the monitor control electrode 313 and the dummy electrode 314 can be in surface contact with, for example, a heat sink (not shown), and therefore can be said to have a large heat dissipation path.

[0100] The first wall portion 341, the second wall portion 342, the third wall portion 343, and the fourth wall portion 344 extend parallel to the first side 321, the second side 322, the third side 323, and the fourth side 24 of the semiconductor device 315, respectively. The support surface 345 is surrounded by the first wall portion 341, the second wall portion 342, the third wall portion 343, and the fourth wall portion 344, and has a rectangular opening portion 348 formed in the center through which the VCSEL 316 is visible.

[0101] The first convex portion 346 is disposed at the center of the inner wall of the second wall portion 342 so as to protrude in the direction of the third wall portion 343 facing the second wall portion 342. The second convex portion 347 is disposed at the center of the inner wall of the third wall portion 343 so as to protrude in the direction of the second wall portion 342 facing the third wall portion 343. Each of the first convex portion 346 and the second convex portion 347 is disposed so as to face an end portion of the optical element 317.

[0102] FIG. 15 is a circuit diagram of a VCSEL module 150.

[0103] The semiconductor device 315 further includes a current control element 351, a switching element 352, and a monitoring and control circuit 353. The semiconductor device 315 controls the current control element 351 and the switching element 352 that are connected in series to the VCSEL 316, and the monitoring and control circuit 353 monitors the current flowing through the VCSEL 316, thereby monitoring and controlling the light emission of the VCSEL 316.

[0104] The current control element 351 and the switching element 352 are n-type metal-oxide-semiconductor field effect transistors (MOSFETs). The current control element 351 and the switching element 352 are connected to a second terminal 332, a third terminal 333, and a fourth terminal 334 via the VCSEL 316. The current control element 351 controls the amount of drive current, and the switching element 352 is a drive element that controls switching the drive current on and off.

[0105] A gate of the current control element 351 is connected to one of the monitor control electrodes 313 via one of the monitor control terminals 336. A source of the current control element 351 is connected to a drain of the switching element 352, and a drain of the current control element 351 is connected to a cathode of the VCSEL 316 via a second terminal 332. A gate of the switching element 352 is connected to a monitor control circuit 353, and a source of the switching element 352 is connected to a second electrode via a third terminal 333 and a fourth terminal 334.

[0106] The current control element 351 controls the amount of drive current flowing between the anode (also referred to as the VCSEL first terminal) and cathode (also referred to as the VCSEL second terminal) of the VCSEL 316 and between the source and drain of the current control element 351 based on a current setting signal applied to the monitor control electrode 313.

[0107] The switching element 352 is turned on and off based on a periodic signal generated by the monitoring control circuit 353, thereby turning on and off the drive current flowing between the anode and cathode of the VCSEL 316 and between the source and drain of the switching element 352 at a predetermined period.

[0108] The monitoring control circuit 353 has a current driving circuit 354, a temperature monitoring circuit 355, a current monitoring circuit 356, and a light amount monitoring circuit 357. The current driving circuit 354 generates a periodic signal based on a signal input from the monitoring control electrode 313 via the monitoring control terminal 336, and applies the generated periodic signal to the gate of the switching element 352. The monitoring control circuit 353 is supplied with a power supply voltage from the monitoring control terminal 336, and is connected to the second electrode 312 via the fifth terminal 335, thereby being grounded.

[0109] The temperature monitoring circuit 355 has a thermistor and measures the temperature of the VCSEL 316 arranged on the surface of the semiconductor device 315, and when the temperature measured by the thermistor exceeds a predetermined threshold temperature, outputs an alarm signal from the monitoring control electrode 313 via the monitoring control terminal 336. The light intensity monitoring circuit 357 receives a light intensity signal indicating the amount of light emitted from the VCSEL 316 from a photoelectric conversion element (not shown), and when the amount of light corresponding to the input light intensity signal falls outside a predetermined light intensity range, outputs an alarm signal from the monitoring control electrode 313 via the monitoring control terminal 336. In the VCSEL module 150, the monitoring control circuit 353 does not necessarily have to include all of the current drive circuit 354, the temperature monitoring circuit 355, the current monitoring circuit 356, and the light intensity monitoring circuit 357, but it is preferable that the monitoring control circuit 353 has at least one of them.

[0110] FIG. 16 is a diagram illustrating a schematic connection relationship between the second electrode 312, the semiconductor device 315, and the VCSEL 316. As shown in FIG.

[0111] The semiconductor device 315 further includes a silicon substrate 360, a first wiring layer 361, a second wiring layer 362, a third wiring layer 363, a fourth wiring layer 364, and an insulating layer 365. A p-type semiconductor doped with boron or the like, an n-type semiconductor doped with phosphorus or the like, and the like are formed on the surface of the silicon substrate 360. The n-type semiconductor and the p-type semiconductor formed on the surface of the silicon substrate 360 ​​form semiconductor elements included in the current control element 351, the switching element 352, and the monitoring control circuit 353, respectively.

[0112] Each of the first wiring layer 361 to the fourth wiring layer 364 has a plurality of wiring layers formed of a conductive member such as aluminum, and an interlayer connection portion, also called a via, that connects the plurality of wiring layers. The first wiring layer 361 electrically connects between the second terminal 332 and the current control element 351, and the second wiring layer 362 electrically connects between the current control element 351 and the switching element 352. The third wiring layer 363 electrically connects between the third terminal 333 and the switching element 352, and the fourth wiring layer 364 electrically connects between the fourth terminal 334 and the switching element 352. The insulating layer 365 is a silicon oxide film, and insulates between the first wiring layer 361 to the fourth wiring layer 364. In FIG. 16, insulating layer 365 is depicted as being thicker than silicon substrate 360, but this is for the purpose of explaining the layer structure. In reality, insulating layer 365 is a thin film having a thickness of several thousand angstroms, while silicon substrate 360 ​​has a thick structure having a thickness of 200 μm.

[0113] Fig. 17 is a flow chart showing a method for manufacturing the VCSEL module 150. Fig. 18 is a plan view corresponding to the electrode preparation step shown in Fig. 17, Fig. 19 is a plan view corresponding to the semiconductor device mounting step shown in Fig. 17, and Fig. 20 is a plan view corresponding to the light-emitting element mounting step shown in Fig. 17. Fig. 21 is a plan view corresponding to the wire bonding step shown in Fig. 17, and Fig. 22 is a plan view corresponding to the frame formation step shown in Fig. 17. Figs. 17 to 22 show a manufacturing method for manufacturing a single VCSEL module 150, but a plurality of VCSEL modules 150 may be simultaneously manufactured by a manufacturing method similar to the manufacturing method described with reference to Figs. 17 to 22, and then separated into individual modules.

[0114] First, as shown in Fig. 18, in an electrode preparation step, a first electrode 311, a second electrode 312, a plurality of monitoring control electrodes 313, and a pair of dummy electrodes 314 are arranged at predetermined positions spaced apart from each other (S101). In Fig. 18, the outline of a frame 318 to be added in a frame formation step is indicated by a dotted line.

[0115] 19, in a semiconductor device mounting process, the semiconductor device 315 is mounted on the second electrode 312 (S102). The semiconductor device 315 is mounted on the second electrode 312 by adhering it to the surface of the second electrode 312 via a conductive adhesive member having high thermal conductivity, such as a resin material containing metal.

[0116] 20, in a light emitting element mounting process, the VCSEL 316 is mounted on a second terminal 332 arranged on the surface of the semiconductor device 315 (S103). The cathode of the VCSEL 316 is attached to the surface of the second terminal 332 via a conductive adhesive member such as gold-tin solder, thereby being electrically connected to the second terminal 332. The VCSEL 316 is arranged to overlap the second electrode 312 and the semiconductor device 315.

[0117] 21, in a wire bonding process, an electrical connection is made between an electrode such as the first electrode 311 and a terminal such as the first terminal 331, and between the first terminal 331 and the anode of the VCSEL 316 by a bonding wire 319 (S104). By electrically connecting an electrode such as the first electrode 311 and a terminal such as the first terminal 331, and between the first terminal 331 and the anode of the VCSEL 316 by the bonding wire 319, an electrode electrically connectable to an external device is electrically connected to the semiconductor device 315 and the VCSEL 316.

[0118] 22, in a frame forming process, frame 318 is formed so as to cover the surfaces of first electrode 311 and second electrode 312, a part of first terminal 331, third terminal 333, and fourth terminal 334 (S105). Frame 318 is formed by injecting a raw material of frame 318 into a mold having a shape corresponding to the shape of frame 318, and then heating and solidifying the raw material of frame 318.

[0119] Next, in an optical element mounting process, the optical element 317 is mounted on the support surface 345 of the frame 318 (S106), completing the VCSEL module 150. The optical element 317 is mounted on the support surface 345 by adhering it to the support surface 345 via an adhesive made of a resin material such as silicone resin.

[0120] In the VCSEL module 150, the VCSEL 316 is disposed so as to overlap the semiconductor device 315 which is a drive device for driving the VCSEL 316, so that the semiconductor device 315 and the VCSEL 316 are integrated and can be made compact. Furthermore, in the VCSEL module 150, the VCSEL 316, the semiconductor device 315 which drives (switches) the VCSEL 316, and the second electrode 312 which grounds the semiconductor device 315 have a structure in which the VCSEL 316 is stacked in three stages (a three-stage stack structure), so that further miniaturization is possible.

[0121] In the VCSEL module 150, heat radiated from the VCSEL 316 during light emission is dissipated to the second electrode 312 made of a material with high thermal conductivity via the semiconductor device 315, so that the VCSEL module 150 has good heat dissipation properties. As shown by the arrows in FIG. 16, heat radiated from the VCSEL 316 is dissipated to the second electrode 312 via the second terminal 332, the first wiring layer 361, the insulating layer 365, and the silicon substrate 360 ​​on which the current control element 351, the switching element 352, and the like are formed. The silicon substrate 360, which is the main component, has a high thermal conductivity of 160 W / mK, so that good heat dissipation can be realized. In addition, as described above, the thermal conductivity of the insulating layer 365 is lower than that of the silicon substrate 360, but the insulating layer 365 is thin at several thousand Å, so there is no effect on heat dissipation.

[0122] In the VCSEL module 150, the first electrode 311 and the first terminal 331 are connected by a plurality of bonding wires 319. For example, when the VCSEL 316 is mounted on the first terminal 331, the VCSEL 316 is disposed at a position spaced apart from the upper end of the first side 321 of the semiconductor device 315 so as not to protrude from the first side 321, and the length of the bonding wires 319 is increased by the distance of the space. Also, the bonding wires 319 connecting the VCSEL 316 and the first electrode 311 are spaced apart in a direction away from the VCSEL module 1506 at the upper end of the first side so as not to touch the upper end of the first side of the semiconductor device 315, and the wires are increased by the distance of the space. On the other hand, in the VCSEL module 150, the bonding wire 319 can be disposed in the vicinity of the first side 321 of the first terminal 331, and therefore the voltage drop due to the resistance of the wiring between the first electrode 311 and the first terminal 331 is suppressed in the VCSEL module 150 compared to when the VCSEL 316 is mounted on the first terminal 331. For example, the wire from the VCSEL 316 to the first electrode 311 is separated in a direction away from the VCSEL module 1506 at the upper end of the first side so as not to contact the upper end of the first side of the semiconductor device 315, and therefore the length of the bonding wire 319 is increased by the distance of separation. On the other hand, in the VCSEL module 150, the bonding wire 319 can be directly connected to the first terminal 331 located at a position lower than the VCSEL 316 by the height of the light emitting element, and the VCSEL module 150 can be connected to the first electrode 1 by the above-mentioned wire path via the first terminal 331 which has a large area, width, and low wiring resistance, so that the VCSEL module 150 suppresses the voltage drop due to the wiring resistance between the first electrode 311 and the anode and also reduces the wiring inductance, compared to when the VCSEL 316 and the first electrode 311 are connected by the bonding wire 319. Also, in the VCSEL module 150, the second electrode 312 is connected to each of the third terminal 333 and the fourth terminal 334 by a plurality of bonding wires 319, so that the voltage rise due to the wiring resistance between the grounded second electrode 312 and the semiconductor device 315 is suppressed.

[0123] In the VCSEL module 150, the first terminal 331 is disposed along the first side 321 facing the first electrode 311, the second terminal 332 is disposed in the center of the surface of the semiconductor device 315, and the third terminal 333 and the fourth terminal 334 are disposed along the second side 322 and the third side 323. In the VCSEL module 150, the first terminal 331, the second terminal 332, the third terminal 333 and the fourth terminal 334 are disposed at a distance from each other, thereby reducing the possibility that the driving currents flowing between the first terminal 331, the second terminal 332, the third terminal 333 and the fourth terminal 334 will interfere with each other and cause noise in the driving current.

[0124] In VCSEL module 150, multiple monitor control terminals 336 connected to monitor control circuit 353 are arranged along fourth side 324, which reduces the risk of noise being generated due to interference of the drive current with signals input / output from monitor control circuit 353. Furthermore, monitor control electrodes 313 connected to each of multiple monitor control terminals 336 are arranged along fourth side 324, which further reduces the risk of noise being generated due to interference of the drive current with signals input / output from monitor control circuit 353.

[0125] In the VCSEL module 150, the surfaces of the first electrode 311 and the second electrode 312, a part of the first terminal 331, and the third terminal 333 and the fourth terminal 334 are covered by a resin frame 318 that is arranged after the wire bonding process. Since the wire bonding process is performed on the VCSEL module 150 before arranging the frame 318 that functions as a frame material, it is possible to reduce the size of the VCSEL module 150 without ensuring a separation distance in the wire bonding process.

[0126] In the VCSEL module 150, the second electrode 312 and the semiconductor device 315 are fixed by the frame 318, so that the adhesive strength between the second electrode 312 and the semiconductor device 315 is reinforced by the frame 318, and it is possible to prevent the semiconductor device 315 from peeling off from the second electrode 312.

[0127] In the VCSEL module 150, the optical element 317 is supported by a support surface 345 that is surrounded by a first wall portion 341, a second wall portion 342, a third wall portion 343, and a fourth wall portion 344, and has an opening portion 348 formed in the center through which the VCSEL 316 is visible. In the VCSEL module 150, since the optical element 317 is supported by the support surface 345, it is possible to minimize the size of the optical element 317, which has high manufacturing costs, and therefore it is possible to reduce the manufacturing cost of the VCSEL module 150.

[0128] In the VCSEL module 150, the frame 318 has a pair of first and second convex portions 346 and 347 arranged to sandwich the optical element 317, so that the position of the optical element 317 can be easily determined when manufacturing the VCSEL module 150.

[0129] Fig. 23 is a diagram for explaining the flow of current in VCSEL module 150. Fig. 23(a) is a plan view of VCSEL module 150 excluding parts other than the base of frame 318, Fig. 23(b) is a cross-sectional view of VCSEL module 150 taken along line DD in Fig. 23(a), and Fig. 23(c) is a cross-sectional view of VCSEL module 150 taken along line EE in Fig. 23(a). In Figs. 23(a) to (c), the thickness direction of VCSEL module 150 is the +Z direction, the upward direction in Fig. 23(a) is the +Y direction, and the leftward direction in Fig. 23(a) is the +X direction.

[0130] As shown by arrows F3 and F4 in FIG. 23(b), the current flowing in from the first electrode 311 flows into the first terminal 331 of the semiconductor device 315 via the bonding wire 319 (from the +Z direction to the +X direction). Next, as shown by arrows F5 and F6, the current flows from the first terminal 331 into the anode of the VCSEL 316 (disposed on the front surface of the VCSEL 105) via the bonding wire 319 (from the +Z direction to the +X direction). Next, as shown by arrow F7, the current flowing in the anode of the VCSEL 316 flows into the semiconductor device 315 from the cathode of the VCSEL 316 (disposed on the back surface of the VCSEL 105) (-Z direction). Furthermore, the current flowing out from the semiconductor device 315 returns to the second electrode 312 and turns around in the direction of arrow F8 (-X direction).

[0131] As shown by arrows F9 and F10 in FIG. 23(c), the current flowing into the semiconductor device 315 flows from the third terminal 333 to the second electrode 312 through the bonding wire 319 via the current control element 351 and the switching element 352 formed in the semiconductor device 315 (from the -Y direction to the -Z direction), and as shown by arrows F11 and F12, flows from the fourth terminal 334 of the semiconductor device 315 to the second electrode 312 through the bonding wire 319 (from the +Y direction to the -Z direction). The current loops of the arrows F9 and F10 and the arrows F11 and F12 have symmetrical shapes. Looking at the whole, as shown in FIG. 23(a), current loops are formed from the left side of the figure around the lower side (arrow F1 direction) and around the upper side (arrow F2 direction). As a result, in the VCSEL module 150, in combination with the stack structure, small current loops are formed three-dimensionally in the X direction, Y direction, and Z direction at the same time, making it possible to reduce the overall inductance.

[0132] In the VCSEL module 150, the VCSEL 316, the semiconductor device 315, and the second electrode are stacked in three stages in the Z direction, which makes it possible to shorten the current path flowing out from the VCSEL 316. Also, the current loop can be made small. Furthermore, the VCSEL 316 and the semiconductor device 315 are connected by metals rather than by bonding wires, which makes it possible to reduce inductance and improves high-frequency switching characteristics. Furthermore, the current flowing out from the semiconductor device 315 is divided equally not in one direction but in two directions, up and down (±Y directions) in the figure, which makes it possible to ensure a current path with even lower inductance.

[0133] In addition, since the current flows out of the VCSEL 316 in a direction perpendicular to the direction of the current path (+X direction) flowing into the anode of the VCSEL 316 (-Z direction and / or ±Y direction), it is possible to ensure a current path with low inductance.

Claims

1. A VCSEL having a VCSEL first terminal and a VCSEL second terminal; a semiconductor device having a rectangular flat plate shape including a first side surface, a second side surface and a third side surface perpendicular to the first side surface, a fourth side surface opposite to the first side surface, an upper surface, and a lower surface, the semiconductor device being disposed under the VCSEL and including a VCSEL switching element formed therein and electrically connected to the VCSEL second terminal; a first electrode made of metal and disposed along the first side surface; a second electrode made of metal and disposed under the semiconductor device; The semiconductor device includes: a first terminal disposed on a side along the first side surface and connected to the first electrode and the first terminal of the VCSEL; a second terminal disposed at a center of the upper surface and connected to the second terminal of the VCSEL; a third terminal disposed on a side along the second side surface and connected to the second electrode; VCSEL module further comprising:

2. the semiconductor device further includes a fourth terminal connected to the second electrode, the fourth terminal is disposed at an end of the top surface along the other of the second side surface or the third side surface on which the third terminal is disposed, 2. The VCSEL module according to claim 1, wherein a current flowing from the second terminal of the VCSEL into the semiconductor device is divided by the third terminal and the fourth terminal into left and right sides of the semiconductor device and flows to the second electrode.

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