Semiconductor device, power supply management circuit, and electronic device

Abstract

To provide a semiconductor device capable of achieving low power consumption for a system.SOLUTION: A semiconductor device 100 is used together with a processor 4. An A / D converter 120 is constituted to be correctable. A logic circuit 130 regularly gives a correction trigger to the A / D converter 120 by a counting operation using an output of an oscillator 110.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to a semiconductor device including an A / D converter. [Background technology]

[0002] In various electronic devices, A / D converters are used to convert analog signals representing the electrical states of internal circuits or the physical states of the electronic device into digital signals for digital signal processing.

[0003] 1 is a block diagram of a semiconductor device 10 equipped with an A / D converter. The semiconductor device 10 is mounted on an electronic device 2 together with a processor 4. The semiconductor device 10 includes an A / D converter 12, a logic circuit 14, and an interface circuit 16. The A / D converter 12 converts an analog signal A1, which is input from the outside or generated inside the semiconductor device 10, into a digital signal D1. The logic circuit 14 processes the digital signal D1. Data D2 obtained as a result of the processing is stored in a register and can be accessed by the processor 4 via the interface circuit 16.

[0004] In applications requiring high resolution from the A / D converter 12, the offset amount caused by temperature changes significantly affects the conversion result. Therefore, upon receiving a calibration instruction from the processor 4, the logic circuit 14 instructs the A / D converter 12 to execute a calibration operation.

[0005] For example, the processor 4 monitors the temperature, and if an unacceptable temperature fluctuation occurs, outputs a calibration instruction to the semiconductor device 10. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2014-230012 A Summary of the Invention [Problem to be solved by the invention]

[0007] In the circuit system of Figure 1, the processor 4 must constantly monitor the temperature regardless of the operating state of the electronic device 2. Therefore, the processor 4 cannot be stopped (sleep, suspend, standby), which is one of the factors that hinders low power consumption.

[0008] The present invention has been made in view of the above problems, and an exemplary purpose of an embodiment of the present invention is to provide a semiconductor device capable of reducing the power consumption of a system. [Means for solving the problem]

[0009] One embodiment of the present invention relates to a semiconductor device for use with a processor, the semiconductor device including an oscillator, a calibrated A / D converter, and a logic circuit that periodically triggers calibration of the A / D converter by a counting operation using an output of the oscillator.

[0010] Another aspect of the present invention is a power supply management circuit. The power supply management circuit includes a power supply circuit that receives a voltage from a battery and generates a power supply voltage to be supplied to a processor, and a digital circuit that converts a current flowing through the battery into a digital value and calibrates the digital value. composition The measurement device is equipped with an A / D converter that is connected to a real-time clock that operates constantly, and a logic circuit that performs a counting operation using the output of the real-time clock, triggering the A / D converter to perform A / D conversion in a first period and triggering the A / D converter to perform calibration in a second period that is longer than the first period.

[0011] Any combination of the above components or mutual substitution of the components or expressions of the present invention between methods, devices, systems, etc. are also valid as aspects of the present invention. Effect of the Invention

[0012] According to the present invention, power consumption can be reduced. [Brief description of the drawings]

[0013] [Figure 1] FIG. 1 is a block diagram of a semiconductor device including an A / D converter. [Diagram 2] 1 is a block diagram of an electronic device including a semiconductor device according to an embodiment. [Diagram 3] 3 is a time chart illustrating the operation of the semiconductor device of FIG. 2. [Figure 4] FIG. 2 is a block diagram of a power management circuit. [Diagram 5] FIG. 11 is a block diagram of an electronic device including a semiconductor device according to a first modification. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] (Outline of the embodiment) An embodiment disclosed in this specification relates to a semiconductor device. The semiconductor device is used together with a processor. The semiconductor device includes an oscillator that constantly oscillates, an A / D converter that is configured to be calibrated, and a logic circuit that periodically triggers calibration of the A / D converter by a counting operation using the output of the oscillator.

[0015] According to this embodiment, the semiconductor device itself uses an oscillator built in to periodically calibrate the A / D converter, eliminating the need for the processor to determine calibration conditions. This makes it possible to stop the processor when processing is not required, thereby reducing power consumption.

[0016] The logic circuit may receive a timing signal with a predetermined cycle based on the output of the oscillator, and trigger the A / D converter to perform A / D conversion in response to the timing signal, and may also trigger the A / D converter to perform calibration every time the timing signal is counted a predetermined number. By managing the A / D conversion operation and calibration based on a common signal, the circuit configuration can be simplified.

[0017] The predetermined number may be externally set, which allows the frequency of calibration to be optimized depending on the application of the semiconductor device.

[0018] The semiconductor device may further include an RTC (Real Time Clock) circuit. The timing signal may be generated by the RTC circuit. Since the RTC circuit operates continuously and consumes very little power, the generation of a periodic calibration trigger is a suitable use of the output of the RTC circuit.

[0019] The semiconductor device may be connected to a battery of a device in which the semiconductor device is incorporated, and the A / D converter may convert the battery current into a digital value. The semiconductor device may integrate the digital value. This makes it possible to detect the remaining charge of the battery.

[0020] The semiconductor device may further include a power supply circuit that supplies a power supply voltage to the processor. The power supply circuit may stop supplying the power supply voltage when the processor is in a stopped state.

[0021] The A / D converter may be of the ΔΣ type.

[0022] (Embodiment) The present invention will be described below based on preferred embodiments with reference to the drawings. The same or equivalent components, parts, and processes shown in each drawing are given the same reference numerals, and duplicated descriptions are omitted as appropriate. In addition, the embodiments are illustrative rather than limiting the invention, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

[0023] In this specification, "a state in which component A is connected to component B" includes cases in which component A and component B are physically connected directly, and cases in which component A and component B are indirectly connected via other components that do not substantially affect the electrical connection state between them or impair the function or effect achieved by their combination. Similarly, "a state in which component C is provided between component A and component B" includes cases in which component A and component C, or component B and component C, are directly connected, as well as cases in which component C is indirectly connected via other components that do not substantially affect the electrical connection state between them or impair the function or effect achieved by their combination.

[0024] 2 is a block diagram of an electronic device 2 including a semiconductor device 100 according to an embodiment. In addition to the semiconductor device 100, the electronic device 2 includes a processor 4 and a battery 6. The type of the electronic device 2 is not limited, but examples include devices that require low power consumption, such as a smartphone, a tablet terminal, a wearable terminal, an e-book, and a fire alarm.

[0025] The semiconductor device 100 includes an oscillator 110, an A / D converter 120, a logic circuit 130, and an interface circuit 140, which are integrated on a single semiconductor substrate. BAT The battery 6 is always supplied with power as a power source. The battery 6 may be either a primary battery or a secondary battery.

[0026] The oscillator 110 constantly oscillates to generate a clock signal CK. The A / D converter 120 converts an analog signal A1 input from the outside into a digital signal D1. The A / D converter 120 may receive an internal signal of the semiconductor device 10 as an input.

[0027] The logic circuit 14 processes the digital signal D1. Data D2 obtained as a result of the processing is stored in a register and is accessible to the processor 4 via the interface circuit 140.

[0028] The A / D converter 120 is configured to be calibrated. For example, in a calibration mode, the input of the A / D converter 120 is fixed, and the output at that time is obtained as an offset. If the A / D converter 120 has a differential input, the two inputs are shorted, and the output at that time is obtained. The calibration method of the A / D converter may be selected according to the system of the A / D converter.

[0029] The logic circuit 130 counts the output CK of the oscillator 110 at a fixed time interval (calibration period T CAL ) to periodically trigger calibration to the A / D converter 120. Also, the calibration period (referred to as the second period) is shorter than the sampling period T S In (the first period), the sampling signal SMP is asserted, and an instruction to perform A / D conversion is given to the A / D converter 120.

[0030] Preferably, the semiconductor device 100 includes an RTC circuit 112 to provide a clock function and a calendar function. The RTC circuit 112 continuously updates the current time and date based on a clock signal CK. The time data and date data are accessible to the processor 4 via the interface circuit 140.

[0031] The RTC circuit 112 can generate a signal (called a timing signal) TM that is asserted every second. The logic circuit 130 can generate a sampling period and a calibration period using the timing signal TM. For example, the sampling period can be the period of the timing signal TM (i.e., 1 second). The calibration period can be a predetermined number N times the period of the timing signal TM. N is preferably a parameter that can be set externally. In this case, the calibration signal CAL can be calibrated by a counter that counts the timing signal TM.

[0032] The above is the configuration of the semiconductor device 100. Next, the operation of the semiconductor device 100 will be described. Fig. 3 is a time chart for explaining the operation of the semiconductor device 100 of Fig. 2. The A / D converter 120 isS The A / D converter 120 converts the analog signal A1 into a digital value in response to a sampling signal SMP that is asserted every predetermined calibration period T CAL In response to a calibration signal CAL asserted every 10 ms, the calibration mode is set and a digital value required for calibration is output.

[0033] The above is the operation of the semiconductor device 100. According to this semiconductor device 100, the oscillator 110 built into the semiconductor device 100 itself is used to periodically calibrate the A / D converter 120, eliminating the need for an external processor 4 to determine calibration conditions (for example, temperature monitoring). Therefore, in a situation where processing by the processor 4 is not required, such as when the electronic device 2A is not operating, it is possible to stop the processor 4, thereby reducing power consumption.

[0034] The logic circuit 130 may generate the calibration signal CAL at all times, regardless of whether the processor 4 is stopped or not. In this case, there is an advantage that it is not necessary to incorporate a process or circuit for determining the calibration condition on the processor 4 side.

[0035] Next, applications of the semiconductor device 100 will be described. The architecture of the semiconductor device 100 can be suitably used for a power management circuit. Fig. 4 is a block diagram of a power management circuit 200. The power management circuit 200 is built into an electronic device 2A together with a processor 4 and a battery 6.

[0036] The power supply management circuit 200 is an integrated circuit (IC) that performs management related to the power supply in the electronic device 2A.

[0037] The power management circuit 200 includes a power supply circuit 210 in addition to the circuit blocks (110, 112, 120, 130, 140) similar to those of the semiconductor device 100 described above. The power supply circuit 210 includes a DC / DC converter and a linear regulator, and is connected to a battery voltage V BAT The power supply voltage V DDGenerates the power supply voltage V DD is supplied to the processor 4 from a voltage output terminal (VOUT).

[0038] The power management circuit 200 may include a plurality of power supply circuits that supply power voltages to loads other than the processor 4, but these are not shown in the figure as they are not related to the present invention.

[0039] The power supply management circuit 200 has a function of detecting the remaining charge of the battery (fuel gauge). BAT The power supply management circuit 200 detects the amount of charge flowing out of the battery 6 based on the coulomb counting method.

[0040] The A / D converter 120 is used to detect the current of the battery 6. A sense resistor Rs is connected in series with the battery 6. The sense resistor Rs detects the battery current I BAT Voltage drop V proportional to SNS A voltage drop V SNS The A / D converter 120 detects the voltage drop V SNS is converted into a digital value D1. The A / D converter 120 is, for example, a ΔΣ type.

[0041] The logic circuit 130 includes a coulomb counter circuit 132 that accumulates a digital value D1 indicating the amount of current, and generates a coulomb count value CC. The coulomb count value CC is accessible from the processor 4. The coulomb counter circuit 132 can be configured with an accumulator including a memory and an adder.

[0042] The input stage of the A / D converter 120 has a small voltage drop V SNS A sense amplifier may be provided to amplify the signal.

[0043] When the battery 6 is a secondary battery, the power management circuit 200 further integrates a charging circuit.

[0044] The above is the configuration of the power management circuit 200. By adopting the architecture of the semiconductor device 100, the power management circuit 200 itself can periodically calibrate the A / D converter 120, so that when the electronic device 2A is in a stopped state, the processor 4 can be stopped and power consumption can be reduced.

[0045] In addition, when the processor 4 is in a stopped state, the power supply management circuit 200 DD In other words, the operation of the power supply circuit 210 can be stopped, so that the power consumption of the power management circuit 200 can be further reduced.

[0046] The present invention has been described above based on an embodiment. This embodiment is merely an example, and it will be understood by those skilled in the art that various modifications are possible in the combination of each component and each processing step, and that such modifications are also within the scope of the present invention. Such modifications will be described below.

[0047] (First Modification) 5 is a block diagram of an electronic device including a semiconductor device according to a first modification. In the first modification, the calibration signal CAL (internal calibration signal CAL INT The generation of the calibration trigger (external calibration signal CAL) may be performed only when the processor 4 is in a sleep state. While the processor 4 is awake, the processor 4 determines whether the calibration conditions are met, and when the calibration conditions are met, the processor 4 generates a calibration trigger (external calibration signal CAL EXT ) is given.

[0048] External calibration signal CAL EXT is input to the A / D converter 120 via the interface circuit 140. The A / D converter 120 receives an external calibration signal CAL EXT and the internal calibration signal CAL INT Alternatively, the external calibration signal CAL EXTIt may be input to the logic circuit 130 via the interface circuit 140, and the logic circuit 130 may give a calibration instruction to the A / D converter 120.

[0049] In many applications, the processor 4 can know various parameters (operating conditions) other than time, such as temperature. Therefore, the processor 4 can set the timing at which the A / D converter 120 should be calibrated in consideration of parameters other than time. As a result, compared with the case where the calibration timing is defined only based on the internal calibration signal CAL INT more appropriate calibration can be performed.

[0050] (Second Modification Example) The calibration period T already described CAL and the sampling period T S are merely examples, and may be determined according to the monitoring target of the A / D converter and the use of the semiconductor device 100.

[0051] The sampling period T S may be M seconds (M < N). In this case, the sampling signal SMP can also be configured by a counter that counts the timing signal asserted every second.

[0052] When the calibration period T CAL is 60 seconds (1 minute), the timing signal asserted every minute provided by the RTC circuit 112 may be used as the calibration signal CAL. Also, when the calibration period T CAL is N minutes, the timing signal asserted every minute may be counted. When monitoring a quantity that changes gradually such as temperature, the sampling period T S may be N minutes.

[0053] (Third Modification Example) The application of the semiconductor device 100 is not limited to a power management IC. For example, the A / D converter 120 can receive the output of various sensing devices such as a temperature sensor as an input.

[0054] The present invention has been described using specific terms based on the embodiments, but the embodiments merely illustrate the principles and applications of the present invention, and many modifications and changes in arrangement are permitted to the embodiments without departing from the spirit of the present invention as defined in the claims. [Explanation of symbols]

[0055] 100 Semiconductor device 110 Oscillator 112 RTC circuit 120 A / D Converter 130 Logic Circuits 140 Interface Circuit 2 Electronic equipment 4 processors 6 Battery 200 Power management circuit 210 Power supply circuit

Claims

1. A semiconductor device for use with a processor, comprising: An oscillator, An A / D converter configured to be calibratable; a logic circuit that provides an internal calibration signal as a trigger for periodic calibration to the A / D converter, regardless of an instruction from the processor, by a counting operation using an output of the oscillator; A semiconductor device comprising:

2. 2. The semiconductor device according to claim 1, wherein the logic circuit receives a timing signal having a predetermined cycle based on the output of the oscillator, triggers the A / D converter to perform A / D conversion in response to the timing signal, and generates the internal calibration signal each time the timing signal having the predetermined cycle is counted a predetermined number, thereby triggering the A / D converter to perform the periodic calibration.

3. 3. The semiconductor device according to claim 2, wherein the predetermined number is settable.

4. 4. The semiconductor device according to claim 2, further comprising an RTC (Real Time Clock) circuit, the timing signal being generated by the RTC circuit.

5. the semiconductor device is connected to a battery of an equipment in which the semiconductor device is incorporated, and the A / D converter is capable of converting a current of the battery into a digital value; 5. The semiconductor device according to claim 1, wherein the semiconductor device accumulates the digital value.

6. 6. The semiconductor device according to claim 1, further comprising a power supply circuit for supplying a power supply voltage to the processor.

7. 7. The semiconductor device according to claim 6, wherein the power supply circuit stops supplying the power supply voltage when the processor is in a stopped state.

8. the logic circuit provides the internal calibration signal to the A / D converter while the processor is stopped; 8. The semiconductor device according to claim 1, wherein an external calibration signal is applied from said processor to said A / D converter during an operation of said processor.

9. 9. The semiconductor device according to claim 1, wherein the A / D converter is a ΔΣ type.

10. 10. The semiconductor device according to claim 1, wherein the semiconductor device is monolithically integrated on a single semiconductor substrate.

11. a power supply circuit that receives a voltage from a battery and generates a power supply voltage to be supplied to the processor; an A / D converter that converts the current flowing through the battery into a digital value and is configured to be calibrated; A constantly operating RTC (Real Time Clock) circuit; a logic circuit which performs a counting operation using an output of the RTC circuit, and based on the counting operation regardless of an instruction from the processor, triggers the A / D converter to perform A / D conversion repeatedly in a first period, and also triggers the A / D converter to perform periodic calibration repeatedly in a second period longer than the first period; A power management circuit comprising:

12. 12. The power management circuit according to claim 11, further comprising a coulomb counter circuit that integrates an output of the A / D converter.

13. the logic circuit provides the internal calibration signal, which utilizes an output of the RTC circuit, to the A / D converter while the processor is stopped; 13. The power management circuit according to claim 11, wherein an external calibration signal from the processor is applied to the A / D converter during operation of the processor.

14. An electronic device comprising the power management circuit according to any one of claims 11 to 13.

Images