Method for manufacturing electronic package structure

Abstract

To provide a method of manufacturing an electronic package structure.SOLUTION: In a method of manufacturing an electronic package, multiple first groove parts are formed at a circuit structure, second groove parts are formed in the respective first groove parts, and the circuit structure is formed by multiple circuit layers 110. A width of the second groove part is smaller than a width of the first groove part. Thus, the circuit layer 110 has an annular surface 113 and a recessed part 114 located on the annular surface 113. When a shield layer covers an enclosed body 130 located in the circuit layer 110, a space 114a of the recessed part 114 is exposed to avoid a situation that a portion to be removed (a removed portion) remains in the electronic package structure 100 to form burrs when the removed portion of the shield layer is removed.SELECTED DRAWING: Figure 6

Description

[Technical field]

[0001] The present invention relates to an electronic package structure. Made The present invention relates to a manufacturing method, more particularly to an electronic package structure that can avoid the generation of burrs. Made It relates to a manufacturing method. [Background technology]

[0002] A conventional electronic packaging structure 200 includes a circuit layer 210, an electronic element 220 (e.g., a chip) disposed on the circuit layer 210, and an encapsulant 230 (see FIG. 8) that seals the electronic element 220. To prevent the electronic element 220 from receiving electromagnetic interference, the electronic packaging structure 200 is disposed on a carrier 300, and a shielding layer 240 is formed on the outside of the electronic packaging structure 200. The shielding layer 240 includes a cover portion 241 that covers the electronic packaging structure 200 and a portion to be removed 242 that is connected to the cover portion 241. Next, the carrier 300 and the portion to be removed 242 are removed (see FIG. 9). Summary of the Invention [Problem to be solved by the invention]

[0003] However, when removing the portion to be removed 242, the portion to be removed 242 remains on the cover portion 241, and the cover portion 241 generates burrs 243, which affects the yield of the electronic package structure 200.

[0004] Therefore, the present inventors believed that the above-mentioned drawbacks could be improved, and as a result of extensive research, they came to propose the present invention, which effectively improves the above-mentioned problems through rational design.

[0005] The present invention has been made in view of the above, and an object of the present invention is to provide an electronic package structure that solves the problem of a portion of a shielding layer to be removed remaining in the electronic package structure and forming a burr, thereby increasing the yield of the electronic package structure. Made The present invention aims to provide a manufacturing method thereof. [Means for solving the problem]

[0007] above In order to achieve the above object, a manufacturing method of an electronic package structure according to one aspect of the present invention includes the steps of: placing a plurality of electronic elements (120) on a second bonding surface (11b) of a circuit structure (11); sealing the electronic elements with an encapsulation layer (13) so that the encapsulation layer covers the second bonding surface; placing the encapsulation layer on a first carrier (10) to expose a first bonding surface (11a) of the circuit structure; and forming a plurality of first groove portions (A) on the first bonding surface of the circuit structure along a cutting line (L). forming a second groove portion (B) in each of the first groove portions, the circuit configuration being a plurality of circuit layers (110) having a first conductive surface (111) and a second conductive surface (112), the sealing layer being a plurality of encapsulants (130), the circuit layers forming an electronic package semi-finished product (100') including the electronic element disposed on the second conductive surface and the encapsulants sealing the electronic element, the second width (W2) of the second groove portion being smaller than the first width (W1) of the first groove portion, the circuit layer having an annular surface (113) and a recess (114) located on the annular surface; placing the electronic package semi-finished product on a second carrier (20) and orienting the circuit layer of the electronic package semi-finished product toward a surface (21) of the second carrier to expose the encapsulant, the annular surface of the circuit layer, the recess, and the surface of the second carrier; forming a shield layer (14) having a portion to be removed (14a) and a first shielding portion (141), the portion to be removed covering the surface of the second carrier and the first shielding portion covering the encapsulant, and the shield layer exposing a space (114a) of the recess; and removing the second carrier and the portion to be removed, forming the electronic package semi-finished product into an electronic package structure (100), and forming the shield layer into a shield cover (140) covering the electronic package structure, the shield cover having the first shielding portion, and the shield cover exposing the space of the recess. The recess has a first surface (114b) and a second surface (114c), the first surface is connected to the first conductive surface of the circuit layer, and after removing the second carrier and the portion to be removed, the shield cover has a second shielding portion (142), which covers the first surface.

[0008] Preferably, the second width of the second groove portion is smaller than the first width of the first groove portion, and the circuit layer has the annular surface and the recess located on the annular surface, so that when the shielding layer covers the encapsulant, the space of the recess is exposed, and when the portion of the shielding layer to be removed is removed, the portion to be removed remains in the electronic package structure to avoid forming a burr. Effect of the Invention

[0009] According to the present invention, the problem of the portion of the shielding layer to be removed remaining in the electronic package structure and forming burrs is solved, and the yield of the electronic package structure is increased.

[0010] Other objects, configurations and effects of the present invention will become apparent from the following detailed description of the preferred embodiments of the present invention. [Brief description of the drawings]

[0011] [Figure 1] 1A to 1C are cross-sectional views illustrating a method for manufacturing an electronic package structure according to an embodiment of the present invention. [Diagram 2] 1A to 1C are cross-sectional views illustrating a method for manufacturing an electronic package structure according to an embodiment of the present invention. [Diagram 3] 1A to 1C are cross-sectional views illustrating a method for manufacturing an electronic package structure according to an embodiment of the present invention. [Figure 4] 1A to 1C are cross-sectional views illustrating a method for manufacturing an electronic package structure according to an embodiment of the present invention. [Diagram 5] 1A to 1C are cross-sectional views illustrating a method for manufacturing an electronic package structure according to an embodiment of the present invention. [Figure 6] 1 is a cross-sectional view showing an electronic package structure according to an embodiment of the present invention; [Figure 7] 1 is a cross-sectional view showing an electronic package structure according to another embodiment of the present invention; [Figure 8] 1 is a cross-sectional view showing a conventional electronic package structure. [Figure 9] 1 is a cross-sectional view showing a conventional electronic package structure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] Hereinafter, an electronic package structure and a manufacturing method thereof according to an embodiment of the present invention will be described with reference to the drawings. However, the present invention is not limited to this, and various modifications are possible within the scope of the description. The technical scope of the present invention also includes embodiments obtained by appropriately combining the technical means disclosed in the different embodiments.

[0013] First, a method for manufacturing an electronic package structure according to the present invention will be described with reference to FIGS.

[0014] The method for manufacturing an electronic packaging structure according to the present invention is used to form the electronic packaging structure 100 .

[0015] As shown in FIG. 1, a plurality of electronic elements 120 are placed on the second bonding surface 11b of the circuit configuration 11, and then the electronic elements 120 are sealed by the encapsulation layer 13, and the encapsulation layer 13 covers the second bonding surface 11b. The electronic elements 120 are selected from chips, but the present invention is not limited thereto. The circuit configuration 11 is selected from redistribution circuit configurations, and the circuit configuration 11 includes a first dielectric layer 11c, a second dielectric layer 11d, and at least one circuit 11e, and the circuit 11e is located between the first dielectric layer 11c and the second dielectric layer 11d. The materials of the first dielectric layer 11c and the second dielectric layer 11d are selected from insulating materials such as polyimide (PI). Then, the encapsulation layer 13 is placed on the first carrier 10, and the first bonding surface 11a of the circuit configuration 11 is exposed. The first bonding surface 11a and the second bonding surface 11b are different surfaces of the circuit configuration 11.

[0016] A plurality of first grooves A are formed on the first bonding surface 11a of the circuit configuration 11 along the cutting lines L (see FIG. 2). In this embodiment, the first grooves A are formed on the first dielectric layer 11c. The method for forming the first grooves A is selected from methods such as laser cutting and cutter cutting, but the present invention is not limited thereto.

[0017] As shown in FIG. 2 and FIG. 3, a second groove B is formed in each first groove A, the circuit configuration 11 is a plurality of circuit layers 110, and the sealing layer 13 is a plurality of encapsulants 130. The method of forming the second groove B is selected from methods such as laser cutting and cutter cutting, but the present invention is not limited thereto. Each circuit layer 110 has a first conductive surface 111 and a second conductive surface 112, the first conductive surface 111 and the second conductive surface 112 are different surfaces of the circuit layer 110, and the electronic element 120 is installed on the second conductive surface 112. The second width W2 of the second groove B is smaller than the first width W1 of the first groove A, and the circuit layer 110 has an annular surface 113 and a recess 114. The annular surface 113 is located between the first conductive surface 111 and the second conductive surface 112, and the recess 114 is located on the annular surface 113. The recess 114 has a space 114a, a first surface 114b, and a second surface 114c, with the first surface 114b connected to the first conductive surface 111 of the circuit layer 110 and the second surface 114c connected to the annular surface 113 and the first surface 114b.

[0018] Then, after forming the second groove portion B, the circuit layer 110 forms an electronic package semi-finished product 100' with the electronic element 120 placed on the second conductive surface 112 and the encapsulant 130 sealing the electronic element 120 (see FIG. 3). Then, as shown in FIG. 4, the electronic package semi-finished product 100' is placed on the second carrier 20, and the circuit layer 100 faces the surface 21 of the second carrier 20 to expose the encapsulant 130, the annular surface 113 of the circuit layer 110, the recess 114, and the surface 21 of the second carrier 20.

[0019] As shown in Figures 4 and 5, after the semi-finished electronic package 100' is placed on the second carrier 20, a shielding layer 14 is formed, which covers the encapsulant 130 and the surface 21 of the second carrier 20, but exposes the space 114a of the recess 114. The shielding layer 14 has a portion to be removed 14a and a first shielding portion 141, where the portion to be removed 14a covers the surface 21 of the second carrier 20, and the first shielding portion 141 covers the encapsulant 130. In this embodiment, the first shielding portion 141 covers the annular surface 113 of the circuit layer 110, and exposes the space 114a of the recess 114. The thickness D of the portion to be removed 14a gradually decreases toward the recess 114. The method of forming the shield layer 14 is selected from methods such as sputtering, spray coating, and evaporation, and the material of the shield layer 14 is selected from shield materials such as metals, alloys, and compounds, but the present invention is not limited thereto. In this embodiment, the shield layer 14 further has a second shielding portion 142, and when the first shielding portion 141 is formed, the second shielding portion 142 is simultaneously formed on the first surface 114b of the recess 114, and the second shielding portion 142 covers the first surface 114b. Due to the shielding of the second surface 114c of the recess 114, the second thickness D2 of the second shielding portion 142 is thinner than the first thickness D1 of the first shielding portion 141.

[0020] Next, in this embodiment, the end 14b of the portion to be removed 14a is connected to the second shielding portion 142, and the end 14b is located in the space 114a of the recess 114 (see FIG. 5). Preferably, the fourth thickness D4 of the end 14b is not thicker than the second thickness D2 of the second shielding portion 142.

[0021] 5, in this embodiment, the shield layer 14 further includes a third shielding portion 143, and when the first shielding portion 141 and the second shielding portion 142 are formed, the third shielding portion 143 is simultaneously formed on the second surface 114c of the recess 114, and the third shielding portion 143 covers the second surface 114c. Preferably, both sides of the third shielding portion 143 are connected to the first shielding portion 141 and the second shielding portion 142, respectively, and a third thickness D3 of the third shielding portion 143 is thinner than the first thickness D1 of the first shielding portion 141 due to the shielding of the second surface 114c of the recess 114.

[0022] Subsequently, after forming the shield layer 14, the second carrier 20 and the portion to be removed 14a are removed, the plurality of electronic package semi-finished products 100' are made into the plurality of electronic package structures 100, and the shield layer 14 is made into the plurality of shield covers 140 covering the electronic package structures 100 (see FIGS. 5 and 6). In this embodiment, after removing the second carrier 20 and the portion to be removed 14a, the shield cover 140 has a first shielding portion 141 covering the encapsulant 130 and the annular surface 113, a second shielding portion 142 covering the first surface 114b, and a third shielding portion 143 covering the second surface 114c, and the shield cover 140 exposes the space 114a of the recess 114.

[0023] 5 and 6, the thickness D of the portion to be removed 14a gradually decreases toward the recess 114, and the structural strength of the connection point 14c where the end 14b is connected to the second shielding portion 142 is lower than that of the portion to be removed 14a located outside the recess 114. Therefore, when removing the second carrier 20 and the portion to be removed 14a, the portion to be removed 14a cuts the second shielding portion 142 from the connection point 14c, thereby avoiding a situation where the portion to be removed 14a remains in the second shielding portion 142.

[0024] In a different embodiment, the second surface 114c of the recess 114 is shielded to prevent the formation of the second shielding portion 142 and the third shielding portion 143 on the first surface 114b and the second surface 114c (see FIG. 7). When removing the second carrier 20 and the portion to be removed 14a, the shield cover 140 exposes the space 114a of the recess 114, thereby preventing the portion to be removed 14a from remaining in the electronic package structure 100.

[0025] As described above, the present invention is not limited to the above-described embodiment, and can be embodied in various forms without departing from the spirit and scope of the present invention. [Explanation of symbols]

[0026] 10 First Career 11 Circuit configuration 11a 1st joint surface 11b Second joint surface 11c First dielectric layer 11d Second dielectric layer 11e Circuit 13 Sealing layer 14 Shielding Layer 14a Part to be removed 14b End 14c Connection point 20 Second Career 21 Surface 100' Electronic packaging semi-finished products 100 Electronic Package Structure 110 circuit layer 111 1st conductive plane 112 2nd conductive plane 113 Annular Surface 114 Recess 114a Space 114b 1st page 114c 2nd side 120 Electronic Components 130 Inclusion bodies 140 Shield cover 141 1st shielding part 142 Second shielding part 143 Third shielding part 200 Electronic Package Structure 210 circuit layer 220 Electronic Devices 230 Inclusion bodies 240 Shielding Layer 241 Cover part 242 Section to be removed 243 Bali 300 Careers A First Groove B 2nd groove D Thickness D1 First thickness D2 Second thickness D3 Third thickness D4 Fourth thickness L cutting line W1 First width W2 Second width

Claims

1. 1. A method for manufacturing an electronic packaging structure, comprising: placing a plurality of electronic elements (120) on the second bonding surface (11b) of the circuit configuration (11); sealing said electronic elements and covering said second bonding surface with an encapsulation layer (13); placing the encapsulation layer on a first carrier (10) and exposing a first bonding surface (11a) of the circuit configuration; forming a plurality of first grooves (A) on the first bonding surface of the circuit configuration along a cutting line (L); forming a second groove (B) in each of the first grooves, the circuit configuration being a plurality of circuit layers (110) having a first conductive surface (111) and a second conductive surface (112), the sealing layer being a plurality of encapsulants (130), each of the circuit layers constituting an electronic package semi-finished product (100') with each of the electronic elements disposed on the second conductive surface and each of the encapsulants sealing the electronic elements, a second width (W2) of the second groove being smaller than the first width (W1) of each of the first grooves, the circuit layer having an annular surface (113) and a recess (114) located on the annular surface; placing the electronic package blank on a second carrier (20) with the circuit layer of the electronic package blank facing a surface (21) of the second carrier to expose the encapsulant, the annular surface of the circuit layer, the recess, and the surface of the second carrier; forming a shield layer (14) having a portion to be removed (14a) and a first shielding portion (141), the portion to be removed covering the surface of the second carrier, the first shielding portion covering the encapsulant, and the shield layer exposing a space (114a) of the recess; removing the second carrier and the portion to be removed, forming the semi-finished electronic package product into an electronic package structure (100), forming the shielding layer into a shielding cover (140) that covers the electronic package structure, the shielding cover having the first shielding portion, and the shielding cover exposing the space of the recess; The method for manufacturing an electronic package structure, characterized in that the recess has a first surface (114b) and a second surface (114c), the first surface is connected to the first conductive surface of the circuit layer, and after removing the second carrier and the portion to be removed, the shield cover has a second shielding portion (142), and the second shielding portion covers the first surface.

2. 2. The method of claim 1, wherein the first shielding portion has a first thickness (D1), the second shielding portion has a second thickness (D2), and the second thickness is thinner than the first thickness.

3. 3. The method for manufacturing an electronic package structure as described in claim 2, characterized in that an end of the portion to be removed is connected to the second shielding portion, the end is located in the space of the recess, and a fourth thickness (D4) of the end is not thicker than the second thickness of the second shielding portion.

4. The method for manufacturing an electronic package structure according to claim 3 , wherein the thickness of the portion to be removed decreases in a direction toward the recess.

5. 2. The method for manufacturing an electronic package structure according to claim 1, characterized in that the second surface of the recess is connected to the annular surface, and after removing the second carrier and the portion to be removed, the shielding cover has a third shielding portion (143), and the third shielding portion covers the second surface.

6. A method for manufacturing an electronic package structure as described in claim 5, characterized in that the first shielding portion has a first length (D1), the third shielding portion has a third thickness (D3), and the third thickness is thinner than the first thickness.

7. The method of claim 5 , wherein both sides of the third shielding portion are connected to the first shielding portion and the second shielding portion, respectively.

8. 8. The method of claim 7, wherein the first shielding portion covers the annular surface and is connected to the third shielding portion.

9. The method for manufacturing an electronic package structure according to claim 1 , wherein the thickness of the portion to be removed decreases in a direction toward the recess.

10. 2. The method of claim 1, wherein the circuit configuration comprises a first dielectric layer (11c), a second dielectric layer (11d), and at least one circuit (11e), the circuit being located between the first dielectric layer and the second dielectric layer, and the first grooves being formed in the first dielectric layer.

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