Circuit board and electronic device
Patent Information
- Application Number
- JP2023531919
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2021-06-29
- Filing Date
- 2022-06-27
- Publication Date
- 2025-03-05
- Estimated Expiration
- 2042-06-27
Smart Images

Figure 0007640694000001 
Figure 0007640694000002 
Figure 0007640694000003
Abstract
Description
[Technical field]
[0001] The present disclosure relates to a wiring board and an electronic device. [Background technology]
[0002] Communication devices used in information and communication systems are becoming more and more compatible with high frequencies. Wiring boards used in communication devices also reduce signal (high frequency signal) transmission loss and noise, for example, by using the following configuration.
[0003] In the wiring board described in Patent Document 1, a first ground and a second ground are located on the upper surface, which is the first surface, of an insulating substrate, with a signal wiring therebetween. A lower ground is located on the lower surface, which is the second surface, of the insulating substrate, and the lower ground faces the signal wiring, the first ground, and the second ground with the insulating substrate therebetween. A first via is located inside the insulating substrate, electrically connecting the first ground and the lower ground. A second via is located inside the insulating substrate, electrically connecting the second ground and the lower ground. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] Japan Patent Publication No. 2000-340700 Summary of the Invention
[0005] A wiring board according to the present disclosure comprises an insulating substrate having a first surface, a second surface opposite to the first surface, and a third surface connected to each of the first surface and the second surface, a signal wiring located on the first surface and extending in a first direction, a first ground located on the first surface across the signal wiring, a first ground located farther from the third surface than the signal wiring, and a second ground located closer to the third surface than the signal wiring, a lower ground located on at least one of the second surface and an interior of the insulating substrate, a via conductor located inside the insulating substrate and electrically connecting the first ground and the lower ground, and a side metal layer located on the third surface, When viewed from above, no via conductor is disposed between the signal wiring and the side metal layer; The side metal layer electrically connects the second ground and the lower ground.
[0006] The electronic device according to the present disclosure comprises the wiring board, an electronic component mounted on the wiring board, a bonding material located on the second surface of the insulating substrate, and a mounting board bonded to the wiring board via the bonding material. [Brief description of the drawings]
[0007] [Figure 1] 1 is a schematic plan view of an electronic device according to a first embodiment. [Diagram 2] 2 is a schematic side view of the electronic device shown in FIG. 1 as viewed from a second direction. [Diagram 3] 1 is a schematic plan view of a wiring board according to a first embodiment. [Figure 4] 4 is a schematic side view of the wiring board shown in FIG. 3 as viewed from a second direction. [Diagram 5] FIG. 4 is a schematic cross-sectional view taken along line VV in FIG. [Figure 6] 4 is a schematic bottom view of the wiring board shown in FIG. 3. [Figure 7] 11 is a schematic partial side view of a wiring board according to another aspect of the first embodiment, as viewed from a second direction. FIG. [Figure 8] FIG. 6 is a schematic cross-sectional view of a wiring board according to a second embodiment, which corresponds to FIG. [Figure 9]FIG. 7 is a schematic cross-sectional view of a wiring board according to another aspect of the second embodiment, and corresponds to FIG. [Figure 10] 13 is a schematic partial side view of a wiring board according to another aspect of the second embodiment, as viewed from a second direction. FIG. [Figure 11] FIG. 6 is a schematic cross-sectional view of a wiring board according to a third embodiment, which corresponds to FIG. [Figure 12] FIG. 10 is a schematic cross-sectional view of a wiring board according to another aspect of the third embodiment, and corresponds to FIG. [Figure 13] FIG. 10 is a schematic cross-sectional view of a wiring board according to another aspect of the third embodiment, and corresponds to FIG. [Figure 14] FIG. 10 is a schematic cross-sectional view of a wiring board according to another aspect of the third embodiment, and corresponds to FIG. [Figure 15] 14 is a schematic enlarged side view of the wiring board shown in FIG. 13. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0008] Hereinafter, the wiring board and electronic device according to the embodiment of the present disclosure will be described in detail with reference to the drawings. However, for the convenience of explanation, each of the drawings referred to below shows only the components necessary for explaining the embodiment in a simplified manner. Therefore, the wiring board and electronic device according to the embodiment of the present disclosure may include any components not shown in each of the drawings referred to. In addition, the dimensions of the components in each drawing do not need to faithfully represent the actual dimensions of the components and the dimensional ratios of each member.
[0009] In this disclosure, the first direction is the left-right direction in the plan view shown in FIG. 1. The second direction is the up-down direction in the plan view shown in FIG. 1, in other words, the direction perpendicular to the first direction on the first surface. The third direction is the thickness direction of the insulating substrate, and the direction perpendicular to the first and second directions. The third direction is the up-down direction in the side view. In the side view and cross-sectional view of this disclosure, the first surface of the insulating substrate is located on the upper side, and the second surface of the insulating substrate is located on the lower side. In the drawings of this disclosure, "LB" indicates the first direction, "WB" indicates the second direction, "TB" indicates the third direction, "U" indicates the upper side, and "D" indicates the lower side. In the drawings of this disclosure, in addition to hatching the cross-sectional portion, dots are applied to the surface of the conductor portion.
[0010] [Embodiment 1] A first embodiment of the present disclosure will be described with reference to Figs. 1 to 6. Fig. 1 is a schematic plan view of an electronic device according to the first embodiment. Fig. 2 is a schematic side view of the electronic device shown in Fig. 1 as viewed from a second direction. Fig. 3 is a schematic plan view of a wiring board according to the first embodiment. Fig. 4 is a schematic side view of the wiring board shown in Fig. 3 as viewed from a second direction. Fig. 5 is a schematic cross-sectional view taken along line VV in Fig. 3. Fig. 6 is a schematic bottom view of the wiring board shown in Fig. 3.
[0011] (Overview of electronic device 100) The electronic device 100 according to the first embodiment shown in FIGS. 1 and 2 is used in an optical transceiver (not shown). The electronic device 100 includes a wiring board 1, an electronic component 5 mounted on the wiring board 1, a bonding material 7 located on the second surface of an insulating substrate, and a mounting substrate 6 bonded to the wiring board 1 via the bonding material 7. In the present disclosure, the electronic component 5 may be, for example, a laser diode that converts an electrical signal into an optical signal. Although not shown, the optical transceiver may include an optical fiber that transmits an optical signal, and a lens located between the laser diode and an incident end of the optical fiber. The lens emits the optical signal converted by the laser diode toward the incident end of the optical fiber. The mounting substrate 6 may be an insulating substrate made of ceramics, resin, or the like. The electronic device 100 may be used in communication devices other than an optical transceiver.
[0012] (Configuration of wiring board 1) As shown in the examples of FIGS. 3 to 6, the wiring board 1 may include a rectangular insulating substrate 11. The insulating substrate 11 may be made of ceramics such as an aluminum oxide sintered body (alumina ceramics), an aluminum nitride sintered body, a mullite sintered body, or a glass ceramic sintered body. The insulating substrate 11 may be made of one or more insulating layers. The insulating substrate 11 may have a first surface 11u, a second surface 11d located opposite to the first surface 11u, and a third surface 11s connected to the first surface 11u and the second surface 11d. In each of the drawings, an example is shown in which the angle between the first surface 11u and the third surface 11s of the insulating substrate 11 is 90 degrees, and the angle between the second surface 11d and the third surface 11s of the insulating substrate 11 is 90 degrees, but this is not limited thereto. Note that the side surface other than the third surface 11s (the other surface connected to the first surface 11u and the second surface 11d) is not particularly limited.
[0013] Signal wiring 12 for transmitting a signal (high frequency signal) for driving electronic component 5 may be located on first surface 11u of insulating substrate 11. Signal wiring 12 may be made of a metal material including, for example, Ti (titanium), Pt (platinum), and Au (gold). Signal wiring 12 may extend in a first direction on first surface 11u of insulating substrate 11. Signal wiring 12 may be disposed from the vicinity of one end of insulating substrate 11 in the first direction to the vicinity of the other end. Signal wiring 12 may be bent in plan view. As shown in the example of the side view of FIG. 2, since third surface 11s is rectangular with the long side in the first direction, it can be said that signal wiring 12 extends in a direction along third surface 11s.
[0014] The signal wiring 12 may be located near the third surface 11s with respect to the center position 11c in the second direction of the insulating substrate 11. In other words, the signal wiring 12 may be biased toward the third surface 11s with respect to the center position 11c in the second direction of the insulating substrate 11. The bias ratio of the signal wiring 12 with respect to the center position 11c in the second direction of the insulating substrate 11 may be 25% or more. The bias ratio of the signal wiring 12 refers to the ratio of the amount of bias of the center position of the signal wiring 12 with respect to the center position 11c in the second direction of the insulating substrate 11 to half the length of the insulating substrate 11 in the second direction. When the signal wiring 12 is located near the third surface 11s with respect to the center position 11c in the second direction of the insulating substrate 11, the signal wiring 12 is located near the side metal layer 17. With this configuration, the transmission loss of the signal transmitted by the signal wiring 12 can be further reduced. Furthermore, on first surface 11u, a laser diode, which is electronic component 5, can be mounted at or near the center in the second direction of wiring board 1. Therefore, when electronic device 100 is used in, for example, an optical transceiver, the positional deviation in the second direction between the lens of the optical transceiver and wiring board 1 can be reduced, thereby enabling the optical transceiver to be made more compact.
[0015] A first ground 13 and a second ground 14 that define a reference potential may be located on the first surface 11u of the insulating substrate 11 with the signal wiring 12 between them. The first ground 13 may be located farther from the third surface 11s of the insulating substrate 11 than the signal wiring 12. The second ground 14 may be located closer to the third surface 11s of the insulating substrate 11 than the signal wiring 12. One end of the second ground 14 is connected to the first ground 13. The first ground 13 and the second ground 14 may each be made of a metal material including, for example, Ti (titanium), Pt (platinum), or Au (gold). The insulating substrate 11 may be exposed in a portion between the signal wiring 12 and the first ground 13 on the first surface 11u of the insulating substrate 11. The insulating substrate 11 may be exposed in a portion between the signal wiring 12 and the second ground 14 on the first surface 11u of the insulating substrate 11.
[0016] The first ground 13 and the signal wiring 12 may be insulated by the insulating substrate 11. The distance between the first ground 13 and the signal wiring 12 does not have to be constant along the signal wiring 12. In addition, the second ground 14 and the signal wiring 12 are insulated by the insulating substrate 11. The distance between the second ground 14 and the signal wiring 12 does not have to be constant along the signal wiring 12.
[0017] A lower ground 15 that defines a reference potential may be located on the second surface 11d of the insulating substrate 11. The lower ground 15 may face the signal wiring 12, the first ground 13, and the second ground 14, with the insulating substrate 11 sandwiched between the lower ground 15 and the signal wiring 12. In other words, when the wiring board 1 is seen through in a plan view, the lower ground 15 may overlap the signal wiring 12, the first ground 13, and the second ground 14. The lower ground 15 may be made of a metal material including, for example, Ti (titanium), Pt (platinum), Au (gold), etc. The lower ground 15 and the signal wiring 12 may be insulated by the insulating substrate 11.
[0018] 5, via conductors 16 electrically connecting the first ground 13 and the lower ground 15 may be located inside the insulating substrate 11. The via conductors 16 may be metal powder metallization containing tungsten (W), molybdenum (Mo), manganese (Mn), silver (Ag), copper (Cu), or the like. The via conductors 16 are formed by filling a via conductor metallization paste by screen printing, pressing, or the like into through holes formed in a ceramic green sheet by a processing method such as punching or laser processing, and firing the resulting paste together with a molded body formed by laminating one or more ceramic green sheets.
[0019] A plurality of via conductors 16 may be provided. In the example shown in FIG. 5, the upper end of each via conductor 16 may be connected to the first ground 13, and the lower end of each via conductor 16 may be connected to the lower ground 15. The plurality of via conductors 16 may be arranged at equal intervals along the signal wiring 12. The plurality of via conductors 16 may be arranged at unequal intervals. When the wiring board 1 is seen through in a plan view, the distance between each via conductor 16 and the signal wiring 12 may be the same or different. When a plurality of via conductors 16 are arranged, the shielding property of the signal wiring 12 can be improved by the plurality of via conductors 16. Furthermore, when a plurality of via conductors 16 are arranged along the signal wiring 12, the shielding property of the signal wiring 12 can be further improved. Therefore, according to the first embodiment of the present disclosure, the transmission loss of the signal transmitted by the signal wiring 12 can be further reduced.
[0020] A side metal layer 17 electrically connecting the second ground 14 and the lower ground 15 may be located on the third surface 11s of the insulating substrate 11. The side metal layer 17 may be made of a metal material such as Ti (titanium). The upper edge of the side metal layer 17 may be connected to the edge of the second ground 14 (the edge on the third surface 11s side). The upper edge of the side metal layer 17 may overlap the edge of the second ground 14. In the example shown in FIG. 1, the lower edge of the side metal layer 17 may be connected to the edge of the lower ground 15 (the edge on the third surface 11s side). The lower edge of the side metal layer 17 may overlap the edge of the lower ground 15.
[0021] When side metal layer 17 electrically connects second ground 14 and lower ground 15, the shielding performance of signal wiring 12 can be improved compared to a case where a via conductor that electrically connects second ground 14 and lower ground 15 is provided inside insulating substrate 11. Therefore, the transmission loss and noise of the signal (high frequency signal) transmitted by signal wiring 12 can be sufficiently reduced. Also, the length of insulating substrate 11 in the second direction can be shortened compared to a case where a via conductor that electrically connects second ground 14 and lower ground 15 is provided inside insulating substrate 11. Therefore, the size of wiring board 1, in other words, the size of electronic device 100 can be reduced.
[0022] 2 and 4, the side metal layer 17 may be disposed over the entire third surface 11s of the insulating substrate 11 so as to extend along the entire area of the signal wiring 12, and may be connected to the second ground 14 and the lower ground 15. The side metal layer 17 may be disposed over a partial area of the third surface 11s of the insulating substrate 11 so as to extend along at least half the area (half the length) of the signal wiring 12, and may be connected to the second ground 14 and the lower ground 15.
[0023] The wettability of the third surface 11s of the insulating substrate 11 with respect to the bonding material 7 that bonds the insulating substrate 11 to the mounting substrate 6 may be lower than the wettability of the second surface 11d of the insulating substrate 11 with respect to the bonding material 7. Examples of the insulating substrate 11 include ceramics such as aluminum oxide (Al2O3)-based sintered body, aluminum nitride (AlN)-based sintered body, silicon carbide (SiC)-based sintered body, glass ceramics, and silicon nitride (Si3N4)-based sintered body, and insulating materials such as epoxy resin, polyimide resin, and polyimide siloxane resin. Examples of the bonding material 7 include solder material (e.g., gold-tin, etc.) and brazing material. The wettability of the third surface 11s of the insulating substrate 11 with respect to the bonding material 7 refers to the ease with which the bonding material 7 spreads in the side metal layer 17 located on the third surface 11s of the insulating substrate 11. The wettability of the second surface 11d of the insulating substrate 11 with respect to the bonding material 7 refers to the ease with which the bonding material 7 spreads over the lower ground 15 located on the second surface 11d of the insulating substrate 11.
[0024] In the case where the wettability of the third surface 11s of the insulating substrate 11 with respect to the bonding material 7 is lower than the wettability of the second surface 11d of the insulating substrate 11 with respect to the bonding material 7, it is possible to reduce the creeping up of the bonding material 7 to the side metal layer 17 and the second ground 14 when the insulating substrate 11 is bonded to the mounting substrate 6. Therefore, when the insulating substrate 11 is bonded to the mounting substrate 6, it is possible to reduce the thermal expansion difference between both ends of the insulating substrate 11 in the second direction, thereby reducing the occurrence of cracks, chips, etc. of the insulating substrate 11. In addition, it is possible to reduce the lifting up of one side of the insulating substrate 11 in the second direction when the insulating substrate 11 is bonded to the mounting substrate 6. Then, when the electronic device 100 (wiring board 1) is used in, for example, an optical transceiver, it is possible to reduce the inclination, etc. of the electronic device 100 with respect to the installation position of the electronic device 100, thereby improving the reliability of the optical transceiver.
[0025] Here, the signal wiring 12, the first ground 13, and the second ground 14 form a coplanar line. The signal wiring 12 and the lower ground 15 form a microstrip line. The first ground 13 is electrically connected to the lower ground 15 by a via conductor 16 and is kept at the same potential as the lower ground 15. The second ground 14 is electrically connected to the lower ground 15 by a side metal layer 17 and is kept at the same potential as the lower ground 15.
[0026] (Manufacturing process of wiring board 1).
[0027] When the insulating substrate 11 is made of an aluminum nitride sintered body, for example, a slurry is produced by adding and mixing a suitable organic binder and solvent to raw material powder such as aluminum nitride (AlN), erbium oxide (Er2O3), and yttrium oxide (Y2O3). This slurry is formed into a sheet shape by a doctor blade method, a calendar roll method, or the like to produce a ceramic green sheet. Then, the ceramic green sheet is subjected to a suitable punching process, and one or more ceramic green sheets are laminated to produce a molded body. The molded body is fired at a high temperature (about 1800°C) to produce a sintered body that is the basis of multiple insulating substrates 11. Then, the surface of the sintered body is polished, and the sintered body is cut into individual pieces (sliced), and multiple insulating substrates 11 are extracted from the sintered body.
[0028] The via conductors 16 are metal powder metallizations containing tungsten (W), molybdenum (Mo), manganese (Mn), silver (Ag), copper (Cu), or the like. The via conductors 16 are formed by filling through holes formed in a ceramic green sheet by a processing method such as punching or laser processing with a conductive paste for via conductors by a screen printing method, a press-in method, or the like, and firing the conductive paste together with a molded body formed by laminating one or more ceramic green sheets. The signal wiring 12, the first ground 13, and the second ground 14 are metal layers containing titanium (Ti), platinum (Pt), gold (Au), or the like, and are formed on the first surface 11u (upper surface) of the sintered body whose surface has been polished by a thin film formation method such as a vapor deposition method, an ion plating method, or a sputtering method. The lower ground 15 is a metal layer containing titanium (Ti), platinum (Pt), gold (Au), etc., and is formed on the second face 11d (lower face) of the sintered body, the surface of which has been polished, by a thin film formation method such as vapor deposition, ion plating, or sputtering.
[0029] The side metal layer 17 is a metal layer containing, for example, titanium (Ti) or the like, and is formed on the third surface 11s of the individualized insulating substrate 11 by a thin film formation method such as a vapor deposition method, an ion plating method, or a sputtering method. The side metal layer 17 may be a metal layer having the same configuration as the signal wiring 12, the first ground 13, the second ground 14, and the lower ground 15, or may be a metal layer having a different configuration. For example, when the lower ground 15 is a metal layer of Ti / Pt / Au and the side metal layer 17 is a metal layer of Ti, the wettability of the third surface 11s of the insulating substrate 11 to the bonding material 7 can be made lower than the wettability of the second surface 11d of the insulating substrate 11.
[0030] According to embodiment 1 of the present disclosure, by using electronic device 100 (wiring board 1) in, for example, an optical transceiver, it is possible to realize an optical transceiver that transmits good optical signals while miniaturizing the optical transceiver, and to improve the reliability of the optical transceiver.
[0031] [Other aspects of embodiment 1] Another aspect of the first embodiment will be described with reference to FIG.
[0032] FIG. 7 is a schematic partial side view of a wiring board according to another aspect of the first embodiment, as viewed from a second direction.
[0033] (Configuration of wiring board 1A) 7, in wiring board 1A according to another aspect of embodiment 1, side metal layer 17 may be configured, for example, in a mesh-like or perforated shape, and may have a plurality of openings 17a. The mesh-like shape includes a mesh shape, a lattice shape, a honeycomb shape, and the like. The opening ratio of side metal layer 17 may be 80% or less.
[0034] In addition, when the side metal layer 17 has a plurality of openings 17a, it is possible to reduce the creeping up of the bonding material 7 to the side metal layer 17 and the second ground 14 when the insulating substrate 11 is bonded to the mounting substrate 6. Therefore, according to another aspect of the first embodiment, it is possible to reduce the thermal expansion difference between both ends of the insulating substrate 11 in the second direction when the insulating substrate 11 is bonded to the mounting substrate 6, thereby reducing the occurrence of cracks, chips, and the like of the insulating substrate 11. In addition, according to another aspect of the first embodiment, it is possible to reduce the lifting up of one side of the insulating substrate 11 in the second direction when the lower ground 15 is bonded to the mounting substrate 6. In addition, according to another aspect of the first embodiment, when the electronic device 100 (wiring board 1A) is used in, for example, an optical transceiver, it is possible to reduce the inclination of the electronic device 100 with respect to the installation position of the electronic device 100, thereby improving the reliability of the optical transceiver.
[0035] In addition, according to other aspects of the first embodiment, the same effects as those of the first embodiment described above are achieved.
[0036] [Embodiment 2] The second embodiment will be described with reference to Fig. 8 and Fig. 9. Fig. 8 is a schematic cross-sectional view of a wiring board according to the second embodiment. Fig. 9 is a schematic cross-sectional view of a wiring board according to another aspect of the second embodiment.
[0037] (Configuration of wiring board 2) 8 and 9, wiring board 2 according to embodiment 2 has the same configuration as wiring board 1 according to embodiment 1, except for some configuration. Among the configurations of wiring board 2, configurations that differ from wiring board 1 according to embodiment 1 will be described. For ease of explanation, components having the same functions as the components described in embodiment 1 are denoted by the same reference numerals.
[0038] As shown in FIG. 8 and FIG. 9, wiring board 2 includes first lower ground 25 as the lower ground. First lower ground 25 is an example of the lower ground. In wiring board 2 according to the second embodiment, instead of lower ground 15 being located on second surface 11d of insulating substrate 11, first lower ground 25 may be located inside insulating substrate 11. First lower ground 25 may sandwich a part of insulating substrate 11 between first lower ground 25 and signal wiring 12. Also, first lower ground 25 may face signal wiring 12, first ground 13, and second ground 14 with a part of insulating substrate 11 sandwiched therebetween. In other words, when wiring board 1 is seen through a plan view, first lower ground 25 may overlap signal wiring 12, first ground 13, and second ground 14. First lower ground 25 and signal wiring 12 may be insulated by insulating substrate 11. As shown in FIGS. 8 and 9, the first lower ground 25 and the side surface metal layer 17 may be connected to the third surface 11s of the insulating substrate 11.
[0039] The first lower ground 25 may be located closer to the first surface 11u than the second surface 11d of the insulating substrate 11. In other words, the distance between the first lower ground 25 and the first surface 11u of the insulating substrate 11 may be shorter than 50% of the thickness dimension of the insulating substrate 11. When the first lower ground 25 is located closer to the first surface 11u than the second surface 11d of the insulating substrate 11, the first lower ground 25 is located closer to the signal wiring 12. With this configuration, it is possible to further reduce the transmission loss of the signal transmitted by the signal wiring 12, and to improve the heat dissipation of the electronic component 5 (see FIG. 1) mounted on the wiring board 2. When the wiring board 2 is used in, for example, an optical transceiver, it is possible to transmit a good optical signal and improve the reliability of the optical transceiver.
[0040] The via conductor 16 may electrically connect the first ground 13 and the first lower ground 25. When there are multiple via conductors 16, the upper end of each via conductor 16 may be connected to the first ground 13, and the lower end of each via conductor 16 may be connected to the first lower ground 25.
[0041] As in the example shown in Fig. 8, each via conductor 16 may penetrate first lower ground 25 along the third direction. In this case, a lower end of each via conductor 16 may be exposed from second surface 11d of insulating substrate 11. Also, as in the example shown in Fig. 9, each via conductor 16 does not have to penetrate first lower ground 25 along the third direction.
[0042] The side metal layer 17 may electrically connect the second ground 14 and the first lower ground 25. The upper edge of the side metal layer 17 is connected to the edge of the second ground 14 (the edge closer to the third surface 11s). The upper edge of the side metal layer 17 may overlap the edge of the second ground 14. The side metal layer 17 may be connected to the edge of the first lower ground 25 exposed on the third surface 11s, as in the examples shown in Figures 8 and 9. The end of the first lower ground 25 may be exposed in a strip shape on the third surface 11s along the first direction and connected to the side metal layer 17 in a strip shape.
[0043] Here, the signal wiring 12, the first ground 13, and the second ground 14 form a coplanar line. The signal wiring 12 and the first lower ground 25 form a microstrip line. The first ground 13 is electrically connected to the first lower ground 25 by the via conductor 16 and is kept at the same potential as the first lower ground 25. The second ground 14 is electrically connected to the first lower ground 25 by the side metal layer 17 and is kept at the same potential as the first lower ground 25.
[0044] Signal wiring 12, first ground 13, second ground 14, via conductor 16, and side metal layer 17 are produced using the same materials and methods as in the manufacturing process for wiring board 1 of the first embodiment.
[0045] Moreover, first lower ground 25 of wiring board 2 in embodiment 2 is a metal powder metallization containing tungsten (W), molybdenum (Mo), manganese (Mn), silver (Ag), copper (Cu), etc. First lower ground 25 is formed, for example, by printing and applying a metallization paste for first lower ground 25 to a ceramic green sheet by a printing method such as screen printing, and firing the metallization paste together with a molded body formed by laminating a plurality of ceramic green sheets.
[0046] In addition, according to the second embodiment, the same effects as those of the first embodiment described above are achieved.
[0047] [Another aspect of embodiment 2] Another aspect of the second embodiment will be described with reference to Fig. 10. Fig. 10 is a schematic partial side view of a wiring board according to another aspect of the second embodiment, viewed from a second direction.
[0048] As shown in the example of FIG. 10, in a wiring board 2A according to another aspect of the second embodiment, the side metal layer 17 may be divided into a first side metal layer 17u located on the first surface 11u side (upper side) of the third surface 11s of the insulating substrate 11, and a second side metal layer 17d located on the second surface 11d side (lower side) of the third surface 11s of the insulating substrate 11. The division point of the side metal layer 17 is a contact point or a tangent line between the first lower ground 25 and the side metal layer 17. The second side metal layer 17d may be configured in a mesh-like or perforated shape, for example, and may have a plurality of openings 17a. The aperture ratio of the second side metal layer 17d may be 80% or less. When the side metal layer 17 has a plurality of openings 17a, it is possible to reduce the creeping up of the bonding material 7 to the side metal layer 17 and the second ground 14 when the insulating substrate 11 is bonded to the mounting substrate 6. Therefore, according to another aspect of the second embodiment, when insulating substrate 11 is bonded to mounting substrate 6, the difference in thermal expansion between both ends of insulating substrate 11 in the second direction can be reduced, thereby reducing the occurrence of cracks, chips, and the like in insulating substrate 11. Also, according to another aspect of the second embodiment, when lower ground 15 is bonded to mounting substrate 6, the lifting up of one side of insulating substrate 11 in the second direction can be reduced. And, according to another aspect of the second embodiment, when electronic device 100 (wiring board 2A) is used in, for example, an optical transceiver, the inclination, etc. of electronic device 100 with respect to the installation position of electronic device 100 can be reduced, thereby improving the reliability of the optical transceiver.
[0049] In addition, according to other aspects of the second embodiment, the same effects as those of the second embodiment described above are achieved.
[0050] [Embodiment 3] The third embodiment will be described with reference to Fig. 11 and Fig. 12. Fig. 11 is a schematic cross-sectional view of a wiring board according to the third embodiment. Fig. 12 is a schematic cross-sectional view of a wiring board according to another aspect of the third embodiment.
[0051] (Configuration of wiring board 3) 11 and 12, wiring board 3 according to embodiment 3 has the same configuration as wiring board 2 according to embodiment 2, except for some configuration. Among the configurations of wiring board 3, those configurations that differ from wiring board 2 will be described. For ease of explanation, the same reference numerals will be used to denote components having the same functions as the components described in embodiment 2.
[0052] As shown in FIG. 11 and FIG. 12, the wiring board 3 includes a first lower ground 25 and a second lower ground 35 as the lower ground. The second lower ground 35 is an example of the lower ground. In the wiring board 3, in addition to the first lower ground 25 being located inside the insulating substrate 11, the second lower ground 35 may be located on the second surface 11d of the insulating substrate 11. A part of the insulating substrate 11 is sandwiched between the signal wiring 12 and the first lower ground 25, and a part of the insulating substrate 11 is sandwiched between the first lower ground 25 and the second lower ground 35. The second lower ground 35 may face the signal wiring 12, the first ground 13, and the second ground 14, with the insulating substrate 11 sandwiched between the second lower ground 35 and the signal wiring 12. In other words, when the wiring board 1 is seen through in a plan view, the second lower ground 35 may overlap the signal wiring 12, the first ground 13, the second ground 14, and the first lower ground 25. Second lower ground 35 and first lower ground 25 may be insulated from each other by insulating substrate 11. Therefore, according to the third embodiment, the ground of wiring board 3 can be strengthened, and the transmission loss of the signal transmitted by signal wiring 12 can be further reduced.
[0053] As shown in the example of Fig. 11, each via conductor 16 may penetrate the insulating substrate 11 in the third direction. In this case, each via conductor 16 may be connected to the first lower ground 25, and the lower end of each via conductor 16 may be connected to the second lower ground 35. Also, as shown in Fig. 12, each via conductor 16 does not have to penetrate the insulating substrate 11 in the third direction. In this case, each via conductor 16 is connected to the first lower ground 25, and the lower end of each via conductor 16 does not have to be connected to the second lower ground 35.
[0054] The side metal layer 17 may be located on the third surface 11s of the insulating substrate 11. The side metal layer 17 may electrically connect the second ground 14, the first lower ground 25, and the second lower ground 35. The upper edge of the side metal layer 17 is connected to the edge of the second ground 14 (the edge closer to the third surface 11s). The side metal layer 17 may be connected to the edge of the first lower ground 25 exposed on the third surface 11s, as in the example shown in FIG. 11 and FIG. 12. The lower edge of the side metal layer 17 may be connected to the edge of the second lower ground 35 (the edge closer to the third surface 11s). The lower edge of the side metal layer 17 may overlap the edge of the second lower ground 35.
[0055] The wettability of the third surface 11s of the insulating substrate 11 with the bonding material 7 that bonds the insulating substrate 11 to the mounting substrate 6 may be lower than the wettability of the second surface 11d of the insulating substrate 11 with the bonding material 7. In this case, when the insulating substrate 11 is bonded to the mounting substrate 6, the creeping up of the bonding material 7 to the side metal layer 17 and the second ground 14 can be reduced. Therefore, when the insulating substrate 11 is bonded to the mounting substrate 6, the thermal expansion difference between both ends of the insulating substrate 11 in the second direction can be reduced, and the occurrence of cracks, chips, etc. of the insulating substrate 11 can be reduced. In addition, when the insulating substrate 11 is bonded to the mounting substrate 6, the lifting up of one side of the insulating substrate 11 in the second direction can be reduced. Then, when the electronic device 100 (wiring board 3) is used in, for example, an optical transceiver, the inclination of the electronic device 100 with respect to the installation position of the electronic device 100 can be reduced, and the reliability of the optical transceiver can be improved. Furthermore, when side metal layer 17 has the same configuration as side metal layer 17 of wiring board 1A according to other aspects of embodiment 1, the same effects as those of the other aspects of embodiment 1 are achieved. In embodiment 3 of the present disclosure, the wettability of second surface 11d of insulating substrate 11 with respect to bonding material 7 refers to the ease with which bonding material 7 spreads in wet contact at second lower ground 35 located on second surface 11d of insulating substrate 11. Furthermore, side metal layer 17 may have the same configuration as side metal layer 17 of wiring board 1A according to other aspects of embodiment 1.
[0056] Here, the second lower ground 35 is a metal layer containing titanium (Ti), platinum (Pt), gold (Au), etc., and is formed on the second face (lower face) of the sintered body, the surface of which has been polished, by a thin film formation method such as vapor deposition, ion plating, or sputtering.
[0057] In addition, according to the third embodiment, the same effects as those of the second embodiment described above are achieved.
[0058] [Other aspects of embodiment 3] Another aspect of the third embodiment will be described with reference to Fig. 13 to Fig. 15. Fig. 13 is a schematic cross-sectional view of a wiring board according to another aspect of the third embodiment, and corresponds to Fig. 5. Fig. 14 is a schematic cross-sectional view of a wiring board according to another aspect of the third embodiment. Fig. 15 is a schematic enlarged side view of the wiring board shown in Fig. 13.
[0059] (Configuration of wiring board 3A) 13 to 15, wiring board 3A according to another aspect of embodiment 3 has the same configuration as wiring board 3 according to embodiment 3, except for some configuration. Among the configurations of wiring board 3A according to another aspect of embodiment 3, configurations that differ from wiring board 3 according to embodiment 3 will be described. For ease of explanation, the same reference numerals are used for components having the same functions as the components described in embodiment 3.
[0060] In the example shown in Figs. 13 to 15, the side metal layer 17 may be located only on the upper part of the third surface 11s of the insulating substrate 11. The upper edge of the side metal layer 17 may be connected to the edge of the second ground 14 (the edge closer to the third surface 11s). The upper edge of the side metal layer 17 may overlap the edge of the second ground 14. The side metal layer 17 may be connected to the edge of the first lower ground 25 exposed on the third surface 11s as in the example shown in Figs. 13 to 15. Also, the lower end of the side metal layer 17 may be separated from the edge of the second lower ground 35 (the edge closer to the third surface 11s) as in the example shown in Figs. 13 to 15. The insulating substrate 11 may be exposed on a part (lower part) of the third surface 11s.
[0061] As shown in the example of Fig. 13, each via conductor 16 may penetrate insulating substrate 11 along the third direction. Also, as shown in the example of Fig. 14, each via conductor 16 does not have to penetrate insulating substrate 11 along the third direction.
[0062] In the case where the lower end of the side metal layer 17 is separated from the edge of the second lower ground 35 and the insulating substrate 11 is exposed from a part of the third surface 11s, the insulating substrate 11 has low wettability, so that it is possible to reduce the creeping up of the bonding material 7 to the side metal layer 17 and the second ground 14 when the insulating substrate 11 is bonded to the mounting substrate 6. Therefore, according to another aspect of the third embodiment, when the insulating substrate 11 is bonded to the mounting substrate 6, it is possible to reduce the thermal expansion difference between both ends of the insulating substrate 11 in the second direction, thereby reducing the occurrence of cracks, chips, and the like of the insulating substrate 11. Furthermore, according to this modification, it is possible to reduce the lifting up of one side of the insulating substrate 11 in the second direction when the insulating substrate 11 is bonded to the mounting substrate 6. And, according to another aspect of the third embodiment of the present disclosure, when the electronic device 100 (wiring board 3A) is used in, for example, an optical transceiver, it is possible to reduce the inclination, etc. of the electronic device 100 with respect to the installation position of the electronic device 100, thereby improving the reliability of the optical transceiver.
[0063] In addition, according to other aspects of the third embodiment, the same effects as those of the third embodiment described above can be achieved.
[0064] The invention according to the present disclosure has been described above based on the drawings and examples. However, the invention according to the present disclosure is not limited to the above-mentioned embodiments. In other words, the invention according to the present disclosure can be modified in various ways within the scope of the present disclosure, and the embodiments obtained by appropriately combining the technical means disclosed in the different embodiments are also included in the technical scope of the invention according to the present disclosure. In other words, it should be noted that a person skilled in the art can easily make various modifications or corrections based on the present disclosure. It should also be noted that these modifications or corrections are included in the scope of the present disclosure. [Explanation of symbols]
[0065] 100 Electronic equipment 1. Wiring board (wiring board according to embodiment 1 of the present disclosure) 5. Electronic Components 6 Mounting board 7 Bonding material 11 Insulating substrate 11u 1st page 11d 2nd side 11s 3rd page 11c Center position 12 Signal wiring 13. First Ground 14. Second Ground 15 Lower Ground 16 Via conductor 17 Side metal layer 17a aperture 1A Wiring board (wiring board according to another aspect of embodiment 1 of the present disclosure) 17u 1st side metal layer 17d 2nd side metal layer 2. Wiring Board (Wiring Board According to the Second Embodiment of the Present Disclosure) 25 1st Lower Ground 3. Wiring Board (Wiring Board According to the Third Embodiment of the Present Disclosure) 35 Second Lower Ground 3A Wiring board (wiring board according to another aspect of embodiment 3 of the present disclosure)
Claims
1. an insulating substrate having a first surface, a second surface opposite to the first surface, and a third surface connected to each of the first surface and the second surface; signal wiring located on the first surface and extending in a first direction; a first ground located on the first surface with the signal wiring therebetween, the first ground being located farther from the third surface than the signal wiring, and a second ground being located closer to the third surface than the signal wiring; a lower ground located on at least one of the second surface and an interior of the insulating substrate; a via conductor located inside the insulating substrate and electrically connecting the first ground and the lower ground; a side metal layer located on the third surface; When viewed from above, no via conductor is disposed between the signal wiring and the side metal layer; The side metal layer electrically connects the second ground and the lower ground.
2. The wiring board is a wiring board for mounting electronic components, The first ground has an area larger than that of the second ground in a plan view, The wiring board according to claim 1 , wherein the electronic component is mounted on the first ground.
3. A wiring board as described in claim 1, wherein the distance between the signal wiring and the third surface is shorter than the distance between a center position in a second direction perpendicular to the first direction in the insulating substrate and the third surface.
4. The wiring board according to claim 1 , wherein the via conductor is a plurality of conductors, the plurality of via conductors being arranged along the signal wiring.
5. A wiring board as described in claim 1, having a third ground connecting the second ground and the first ground.
6. A fourth surface opposite the third surface, The wiring board according to claim 1 , wherein a metal layer electrically connecting a first ground and a lower ground is not located on the fourth surface.
7. the lower ground includes a first lower ground located inside the insulating substrate and closer to the first surface than to the second surface; The wiring board according to claim 1 , wherein a portion of the insulating substrate is sandwiched between the first lower ground and the signal wiring.
8. As the lower ground, a first lower ground is located inside the insulating substrate; The wiring board of claim 1 , further comprising: a second lower ground located on the second surface.
9. The lower ground includes a first lower ground located inside the insulating substrate, The wiring board according to claim 1 , wherein an end portion of the first lower ground is exposed in a strip shape on the third surface along the first direction and is connected to the side metal layer in a strip shape.
10. The wiring board according to claim 8 , wherein the side metal layer is spaced apart from the second lower ground, and the insulating substrate is exposed at a portion of the third surface.
11. The wettability of the third surface with respect to a bonding material that bonds the insulating substrate to a mounting substrate is The wiring board according to claim 1 , wherein the second surface has a lower wettability than the first surface.
12. The wiring board according to claim 1 , wherein the side metal layer has a plurality of openings.
13. A wiring board according to any one of claims 1 to 8; an electronic component mounted on the wiring board; a bonding material located on the second surface of the insulating substrate; a mounting board joined to the wiring board via the bonding material.
Citation Information
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