Pulse Power Supply

Abstract

A pulse power supply device is provided that is equipped with an arbitrary waveform voltage generating unit that can obtain a negative voltage gradient without using a current source. [Solution] The pulse power supply of the present invention generates pulses of an arbitrary waveform having a plurality of predetermined voltage gradients by superimposing a constant DC voltage and a broken-line waveform voltage. The broken-line waveform voltage has a broken-line waveform voltage in which a plurality of linear waveform voltages that change over time at a plurality of predetermined voltage change rates dV / dt from a ground potential are connected. The pulse power supply generates this broken-line waveform voltage by inverter control, generates an arbitrary waveform voltage by superimposing the DC voltage and the broken-line waveform voltage, and generates a pulse waveform from the arbitrary waveform voltage, thereby generating a pulse with an arbitrary voltage gradient without using a current source.

Description

[Technical field]

[0001] The present invention relates to a pulse power supply device that generates a pulse output including an arbitrary waveform in which the voltage changes with a predetermined slope. [Background technology]

[0002] The pulse output generated by the pulse power supply device is used for plasma processing such as film formation processing, etching processing, etc., and can be applied to various industrial devices other than plasma processing. For example, in the etching processing of semiconductor devices, a negative voltage with respect to ground is applied to a substrate in order to generate a substantially uniform negative voltage over the entire surface of the substrate when a conductor is plasma processed.

[0003] In plasma etching and deposition processes, it is known to use a pulsed bias waveform that comprises a broad negative pulse during the etching phase and a short positive pulse during the discharge phase.

[0004] It is known to apply a bias with a pulsed waveform to compensate for the ion deposition effect on the dielectric substrate during the etching or deposition phase. The pulsed waveform consists of a negative voltage gradient that decreases to compensate for the rise in the substrate potential during the etching or deposition phase, and a positive voltage pulse to attract electrons to maintain the charge bias during the discharge phase. Configurations that generate a negative voltage gradient by incorporating ion current compensation, such as a current source, in a switched mode power supply are known (Patent Document 1, Patent Document 2). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Patent No. 7214046 [Patent Document 2] Patent No. 6181792 Summary of the Invention [Problem to be solved by the invention]

[0006] In order to supply an ion current that maintains the substrate voltage at a constant voltage, it is necessary to set a predetermined negative voltage gradient. In the conventional pulse power supply device described above, since the negative voltage gradient and the ion current are related by a predetermined function, an ion current compensation current source such as a current source is used to realize the negative voltage gradient.

[0007] However, a current source with a high resistance has a problem that the time constant of the circuit constituting the current source becomes large due to the influence of distributed capacitance, and the high-speed response is low. This problem of high-speed response becomes more pronounced at high pulse frequencies.

[0008] In addition to the problem of high-speed response described above, there are other points to consider when using a current source. In general, a current source is affected by internal resistance and temperature fluctuations, so temperature compensation and feedback compensation are required, which increases the cost of the components of the pulse power supply device. As described above, a pulse power supply device that outputs high-frequency pulses using a current source has problems such as high-speed response and cost due to the use of the current source.

[0009] An object of the present invention is to solve the above-mentioned problems of the conventional art and to provide a pulse power supply device equipped with an arbitrary waveform voltage generating unit that can obtain a negative voltage gradient without using a current source. [Means for solving the problem]

[0010] The pulse power supply of the present invention generates pulses of an arbitrary waveform having a plurality of predetermined voltage gradients by superimposing a constant DC voltage and a broken-line waveform voltage. The broken-line waveform voltage has a broken-line waveform voltage in which a plurality of linear waveform voltages that change over time from a ground potential at a plurality of predetermined voltage change rates dV / dt are connected. The pulse power supply of the present invention generates this broken-line waveform voltage by inverter control, generates an arbitrary waveform voltage by superimposing the DC voltage and the broken-line waveform voltage, and generates a pulse waveform from the arbitrary waveform voltage, thereby generating a pulse with an arbitrary voltage gradient without using a current source.

[0011] The pulse power supply device of the present invention includes a first DC power supply that generates a first voltage of a DC voltage, an arbitrary waveform voltage generating unit that generates a voltage of an arbitrary waveform by using a plurality of linear waveforms connecting two voltages, and a switch unit that generates a pulse waveform by switching between a ground potential and the arbitrary waveform voltage, and outputs a pulse by repeating the pulse waveform at a predetermined period.

[0012] The switch section supplies the load with a pulse-period current that alternates between an application phase in which a periodic pulse is applied to the load side and a discharge phase in which the charge accumulated on the load side is discharged by a switching operation.

[0013] The arbitrary waveform voltage generating unit generates a broken-line waveform voltage in which a plurality of straight-line waveform voltages having different voltage change rates dV / dt are connected with a ground potential as a starting point by inverter control, and generates an arbitrary waveform voltage by superimposing the generated broken-line waveform voltage on a first voltage of the first DC power supply.

[0014] The arbitrary waveform voltage is the output voltage of a pulse output during the application phase of the pulse period of the switch section, with the voltage at the start of the application phase being a first voltage, and the voltage at the end of the application phase being a voltage obtained by biasing the first voltage to the terminal voltage of the broken line waveform voltage.

[0015] The arbitrary waveform voltage generating unit includes a second DC power supply, an inverter circuit that converts a DC voltage of the second DC power supply into an AC voltage, a rectifier circuit that converts the AC voltage of the inverter circuit into a DC voltage, and a voltage superposition circuit that superimposes the output of the first DC power supply and the output of the rectifier circuit.

[0016] In inverter control, which performs DC / AC voltage conversion, (a) Time duration of the application phase, (b) The inflection point where the broken-line waveform voltage switches to a linear waveform voltage, and (c1) The voltage change rate dV / dt of each linear waveform voltage of the broken-line waveform voltage, or (c2) Voltage at the inflection point is adjusted to generate an arbitrary waveform voltage.

[0017] By adjusting the time width (Ton) of the application phase of the output pulse period T, the time width of the pulse output is adjusted.

[0018] An inflection point is a point where multiple linear waveform voltages that form a broken-line waveform voltage are connected, and the linear waveform voltages before and after the inflection point have different voltage change rates dV / dt. Since adjacent linear waveforms are connected to each other, an inflection point can be identified by the time between the inflection points, the starting voltage of the application phase, and the voltage change rate dV / dt of each linear waveform voltage.

[0019] In addition, the end voltages at the connection points of adjacent linear waveform voltages before and after the inflection point are the same, and the inflection point can be identified by the end voltage at one end once the starting voltage of the application phase is identified.

[0020] As described in the Problems section, there is a demand for generating a substantially uniform negative voltage over the entire surface of the substrate, but during the application phase, the power supply output Vout or the output current Iout is not necessarily constant and may vary depending on the load state, etc. Therefore, in order to supply an ion current that maintains the substrate voltage at a constant voltage, it is necessary to set a predetermined negative voltage gradient according to the power supply output Vout or the output current Iout.

[0021] In response to such problems, the present invention forms an arbitrary waveform voltage by connecting a plurality of linear waveform voltages having different voltage change rates dV / dt to form a broken line waveform voltage, and supplies an output to a load based on this arbitrary waveform voltage, thereby maintaining the power supply output Vout or output current Iout at a constant value and applying a substantially uniform negative voltage across the entire surface of the substrate.

[0022] The rectifier circuit rectifies the output of the inverter circuit to generate a broken-line waveform voltage, and the voltage superposition circuit superposes the first voltage of the output of the first DC power supply and the broken-line waveform voltage of the output of the rectifier circuit to generate an arbitrary waveform voltage in which a plurality of linear waveform voltages having different voltage change rates dV / dt are switched and connected at an inflection point with the first voltage of the first DC power supply as a starting point voltage.

[0023] The control unit further includes a control section for controlling the inverter circuit, and performs inverter control based on predetermined control values. The control section includes control values ​​for determining the following values ​​as control parameters in inverter control: (a) Time duration of the application phase, (b) The time between inflection points at which the broken-line waveform voltage is switched to the linear waveform voltage, and (c1) The voltage change rate dV / dt of each linear waveform voltage, or (c2) Voltage at the inflection point

[0024] When the change in the load over time can be predicted, the control parameters can be estimated or measured in advance to obtain them, and the control parameters or control values ​​based on the control parameters can be stored in a storage means or the like, so that the control parameters can be read out as necessary to control the inverter. The control unit controls the inverter based on the control values ​​for these control parameters, and generates a broken-line waveform voltage formed by connecting a plurality of linear waveform voltages.

[0025] The broken-line waveform voltage can be set based on the control value in a number of different setting modes.

[0026] (Setting 1) The control unit sets the control value of the voltage change rate dV / dt as the slope of the linear waveform voltage at each point when the time between the inflection points reaches the control value of the time between the inflection points, and sequentially switches the linear waveform voltage from one broken line waveform voltage to another to generate a broken line waveform voltage.

[0027] (Setting 2) At each point in time when the time between the inflection points reaches the control value of the time between the inflection points, the control unit sets the slope of the linear waveform voltage to a slope determined based on the control values ​​of the voltage of the inflection points at that point and the next point in time and the control value of the time between the inflection points, and sequentially switches between the broken line waveform voltages to generate a broken line waveform voltage.

[0028] (Setting 3) At each point when the time between the inflection points reaches the control value of the time between the inflection points, the control unit determines a voltage fluctuation by comparing the control value of the voltage of the inflection point at that point with the detection value of the output voltage at that point, and when a voltage fluctuation is determined, the control unit sets a slope determined based on the detection value of the output voltage at that point and the control value of the voltage of the inflection point at the next point as the slope of the linear waveform voltage, and sequentially switches between the broken line waveform voltages to generate a broken line waveform voltage.

[0029] The voltage superposition circuit superposes the broken-line waveform voltage rectified by the rectification circuit and the first voltage of the first DC power supply to generate an arbitrary waveform voltage.

[0030] The broken-line waveform voltage output from the rectifier circuit exhibits a voltage waveform in which multiple linear-waveform voltages, whose voltage changes linearly over time, are connected together, but the voltage at the start of the application phase is the ground potential, and the voltage changes over time from the ground potential. The arbitrary waveform voltage is formed by superimposing a first voltage on the broken-line waveform voltage, and is composed of a linear-waveform voltage that changes linearly over time at a predetermined voltage change rate dV / dt with the first voltage as the start voltage, and another linear-waveform voltage with a different voltage change rate dV / dt that is switched at the inflection point. By controlling the voltage change rate dV / dt of each connected linear-waveform voltage in response to changes in the power supply output Vout or the output current Iout due to changes in the load state or the like, the power supply output Vout or the output current Iout is kept constant, and an ion current that maintains the substrate voltage at a constant voltage is supplied.

[0031] The switch section synchronizes the start of pulse generation in the switch section with the start of output from the arbitrary waveform voltage generator section, and generates a pulse waveform by switching between 0V, which is the ground potential, and the arbitrary waveform voltage generated by the arbitrary waveform voltage generator section. The generated pulse waveform has a first section where the potential is the ground potential, and a second section of a broken line waveform voltage formed by connecting multiple linear waveform voltages that change linearly over time from the first voltage at a predetermined voltage change rate dV / dt. There is a potential difference of the first voltage between 0V in the first section and the first voltage at the start of the second section.

[0032] The voltage at the start point of the arbitrary waveform voltage is determined by the first voltage of the first DC power supply, and the voltage at the end point of the arbitrary waveform voltage is determined by the voltage change rate dV / dt of the broken-line waveform voltage and the time width of the second section of the broken-line waveform voltage.

[0033] The switch unit generates a pulse waveform from the arbitrary waveform voltage as one pulse, and outputs a periodic pulse by repeating this pulse waveform at a predetermined period. The time width of one pulse is the sum of the time width of the first section and the time width of the second section, and is determined according to the pulse period.

[0034] In the case of a negative polarity arbitrary waveform voltage, the switch unit outputs a periodic pulse having a voltage waveform consisting of two voltage sections: a first section of 0 V and a second section of an arbitrary waveform voltage that changes over time from the negative first voltage to a broken line waveform voltage.

[0035] In the arbitrary waveform voltage generating section of the present invention, the voltage superimposing circuit can be arranged in a number of different positions.

[0036] (First form): The voltage superposition circuit of the first embodiment is disposed in a rectifier circuit. As an example, there is a configuration in which one output terminal of the rectifier circuit is connected to an output terminal of the first DC power source.

[0037] (Second form): In the second embodiment, a transformer is provided between the inverter circuit and the rectifier circuit, the voltage superposition circuit is disposed in the transformer, and the output terminal of the first DC power source is connected to one end of the secondary side of the transformer. Effect of the Invention

[0038] As described above, according to the pulse power supply device of the present invention, a high-speed response can be obtained by providing an arbitrary waveform voltage generating section that can obtain a predetermined voltage gradient without using a current source. [Brief description of the drawings]

[0039] [Figure 1] 1 is a diagram for explaining a schematic configuration of a pulse power supply device according to the present invention; [Diagram 2] 4 is a timing chart for explaining an example of the operation of the pulse power supply device of the present invention. [Figure 3A] FIG. 4 is a diagram for explaining an example of a waveform of a broken-line waveform voltage. [Figure 3B] FIG. 4 is a diagram for explaining an example of a waveform of a broken-line waveform voltage. [Figure 4] 10 is a flowchart illustrating a first setting example of a broken-line waveform voltage. [Diagram 5] 11 is a flowchart illustrating a second setting example of a broken-line waveform voltage. [Figure 6A] FIG. 4 is a diagram for explaining an example of operation of the pulse power supply device of the present invention in a discharge phase. [Figure 6B] FIG. 4 is a diagram for explaining an example of operation of the pulse power supply device of the present invention in a discharge phase. [Figure 7A] FIG. 4 is a diagram for explaining an example of operation of the pulse power supply device of the present invention in an application phase. [Figure 7B] FIG. 4 is a diagram for explaining an example of operation of the pulse power supply device of the present invention in an application phase. [Figure 8] FIG. 2 is a schematic diagram of a first configuration example of an arbitrary waveform voltage generating section of the present invention. [Figure 9] 4 is a timing chart of a first example configuration of an arbitrary waveform voltage generating unit of the present invention. [Figure 10] FIG. 4 is a schematic diagram of a second configuration example of an arbitrary waveform voltage generating section of the present invention. [Figure 11]5 is a timing chart of a second example configuration of the arbitrary waveform voltage generating unit of the present invention. [Figure 12A] FIG. 2 is a diagram for explaining a configuration example of a voltage superposition circuit according to the present invention; [Figure 12B] FIG. 2 is a diagram for explaining a configuration example of a voltage superposition circuit according to the present invention; [Figure 13] FIG. 2 is a diagram for explaining a smoothing circuit of the present invention. [Figure 14] FIG. 2 is a diagram for explaining a first embodiment including a smoothing circuit of the present invention. [Figure 15] FIG. 4 is a diagram for explaining a second embodiment including a smoothing circuit of the present invention. [Figure 16A] FIG. 4 is a diagram showing an example of a waveform of a smoothing circuit according to the present invention. [Figure 16B] FIG. 4 is a diagram showing an example of a waveform of a smoothing circuit according to the present invention. [Figure 17] FIG. 2 is a diagram for explaining an example of a plasma load as a load of the pulse power supply device of the present invention. [Figure 18] 4A to 4C are diagrams illustrating an example of a switch drive signal, a power supply output Vout, and an output current Iout. [Figure 19] FIG. 13 is a diagram showing the wafer voltage Vsh, the power supply output Vout, and the ion current Ip. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0040] (1) Schematic configuration and operation example of the pulse power supply device of the present invention Hereinafter, a schematic configuration and an example of operation of a pulse power supply device of the present invention will be described with reference to FIGS.

[0041] The pulse power supply device 1 includes a power supply unit 10, a switch unit 13, and a control unit 15. The power supply unit 10 includes a first DC power supply 11 that generates a first voltage that is a constant voltage as a first power supply, and an arbitrary waveform voltage generating unit 12 that generates an arbitrary waveform voltage as a second power supply.

[0042] The arbitrary waveform voltage generating unit 12 generates a broken-line waveform voltage Vline consisting of a plurality of linear waveform voltages each of which changes at a predetermined voltage change rate dV / dt starting from the ground potential, and by superimposing the first voltage of the first DC power supply 11 on this broken-line waveform voltage Vline, it generates an arbitrary waveform voltage whose voltage changes at a predetermined voltage change rate dV / dt starting from the first voltage, and outputs a pulse of the arbitrary waveform voltage output Vopt.

[0043] The switch unit 13 supplies a current to the load by alternately repeating a discharge phase in which the charge accumulated on the load side is discharged by switching operation and an application phase in which a periodic pulse is applied to the load side. The switch unit 13 includes a pulse switch unit 13a for outputting a pulse of the arbitrary waveform voltage output Vopt to the load in the application phase, and a discharge circuit 13b for discharging the charge accumulated in the load. The switching operations of the pulse switch unit 13a and the discharge circuit 13b are controlled by the control unit 15.

[0044] In the application phase, switch unit 13 applies the arbitrary waveform voltage generated by arbitrary waveform voltage generating unit 12 to the load as one pulse waveform of a periodic pulse. In the discharge phase, the charge accumulated on the load side is discharged and the output of switch unit 13 becomes 0 V, so that the output of switch unit 13 at the start of the application phase changes from 0 V to the first voltage. The pulse output output from switch unit 13 is supplied to load 21 as a power supply output.

[0045] The pulse power supply device 1 may be configured to include a smoothing circuit. The smoothing circuit may be configured in a first form in which the smoothing circuit is connected to the output terminal of the arbitrary waveform voltage generating unit 12, or in a second form in which the smoothing circuit is connected to the output terminal of the pulse switch unit 13a of the switch unit 13. The smoothing circuit of the first form suppresses noise contained in the output of the arbitrary waveform voltage generating unit. The smoothing circuit of the second form suppresses voltage oscillations of overshoot and undershoot that occur in the switch unit 13 due to voltage changes between the discharge phase and the application phase. Note that the smoothing circuit is not shown in FIG. 1.

[0046] The control unit 15 controls the arbitrary waveform voltage generating unit 12 and the switch unit 13. At this time, the output control of the arbitrary waveform voltage output Vopt of the arbitrary waveform voltage generating unit 12 and the pulse control of the switch unit 13 are performed in synchronization.

[0047] 2 is a timing chart for explaining an example of the operation of the pulse power supply device of the present invention. The power supply unit 10 includes a first power supply, which is a first DC power supply 11, and a second power supply, which is an arbitrary waveform voltage generating unit 12. The first DC power supply 11 of the first power supply generates a first voltage V1, which is a constant voltage. The arbitrary waveform voltage generating unit 12 of the second power supply generates a broken line waveform voltage Vline, which changes at a predetermined voltage change rate dV / dt starting from the ground potential, and generates a trapezoidal waveform voltage by superimposing the first voltage V1 on this broken line waveform voltage Vline.

[0048] The arbitrary waveform voltage generating unit 12 generates a broken-line waveform voltage Vline based on a control signal from the control unit 15, and generates an arbitrary waveform voltage by superimposing the generated broken-line waveform voltage Vline on a first voltage V1, and outputs it as an arbitrary waveform voltage output Vopt.

[0049] The control signal of the arbitrary waveform voltage generating unit 12 has the same output pulse period T as the switch control signal that controls the switch unit 13, and is synchronized with the switch control signal. The generation of the broken-line waveform voltage Vline by the control signal of the arbitrary waveform voltage generating unit 12 and the start of the pulse application phase by the switch control signal occur at the same time A. Furthermore, the end of the broken-line waveform voltage Vline by the control signal of the arbitrary waveform voltage generating unit 12 and the end of the pulse application phase and the start of the discharge phase by the switch control signal occur at the same time B.

[0050] Here, when the duty ratio with respect to the output pulse period T (=Ton+Toff) is Ton / T, the on time and the application phase time of the control signal of the arbitrary waveform voltage generating unit 12 are the same Ton, and the off time and the discharge phase time of the control signal of the arbitrary waveform voltage generating unit 12 are the same Toff.

[0051] The broken-line waveform voltage Vline changes from 0V at the start of the application phase at a predetermined voltage change rate dV / dt for each of the linear waveform voltages, and at the end of the application phase, becomes a voltage ΔV determined by the product (Ton×dV / dt) of the voltage change rate dV / dt and Ton. The arbitrary waveform voltage output Vopt changes from the first voltage V1 at the start of the application phase at a predetermined voltage change rate dV / dt, and at the end of the application phase, becomes a voltage (V1+ΔV) obtained by superimposing a voltage ΔV on the first voltage V1.

[0052] Because ΔV is the product (Ton×dV / dt) of the voltage change rate dV / dt and Ton, the voltages ΔV and (V1+ΔV) depend on the voltage change rate dV / dt and Ton, or the duty ratio of the periodic pulse. Therefore, when the voltage change rate dV / dt, Ton, or the duty ratio of the periodic pulse is changed, the voltages ΔV and (V1+ΔV) will have different values.

[0053] The smoothing circuit of the first type suppresses noise components contained in the arbitrary waveform voltage output Vopt, and the smoothing circuit of the second type suppresses voltage oscillations of overshoot and undershoot contained in the switch output of the switch unit 13. The power output of the pulse power supply 1 is supplied to a load 21.

[0054] 2A shows the voltage V1 of the first DC power supply 11, FIG. 2B shows a control signal controlling the inverter provided in the arbitrary waveform voltage generating unit 12, FIG. 2C shows the broken line waveform voltage Vline, FIG. 2D shows the arbitrary waveform voltage output Vopt, FIG. 2E shows the control signal SWA controlling the pulse switch unit of the switch unit 13, FIG. 2F shows the output Vsw of the switch unit 13, and FIG. 2G shows the power supply output Vout.

[0055] The broken-line waveform voltage Vline in Fig. 2C is formed based on the inverter control signal at Ton in the output pulse period T shown in Fig. 2B, but is not formed at Toff in the output pulse period T. The arbitrary waveform voltage output Vopt shown in Fig. 2D is formed by superimposing the voltage V1 of the first DC power supply 11 shown in Fig. 2A and the broken-line waveform voltage Vline shown in Fig. 2C.

[0056] The broken-line waveform voltage Vline shown in Fig. 2C and the arbitrary waveform voltage output Vopt shown in Fig. 2D include inflection points, a start point P0, an inflection point P1, an inflection point P2, and an end point P3, and a plurality of straight-line waveform voltages connecting these inflection points. Note that, although a total of four inflection points, including the start point P0 and the end point P3, are shown in the figure, the number of inflection points can be any number of points, including at least three points, including the start point, intermediate point, and end point.

[0057] Due to the superposition of voltage V1 and broken-line waveform voltage Vline, the voltage at start point P0 of the arbitrary waveform voltage output Vopt becomes V1, and the voltage at end point P3 becomes V3. The voltage V3 at end point P3 becomes a voltage that corresponds to the voltage changes of the multiple linear waveform voltages, and the voltage difference ΔV between the start point and end point of the broken-line waveform voltage Vline becomes (V1-V3).

[0058] The control signal of the switch SWA in FIG. 2E is synchronized with the control signal of the inverter in FIG. 2B. The control signal SWA controls the on / off of the pulse switch unit 13a, and the control signal of the switch SWB controls the on / off of the discharge circuit 13b.

[0059] In Fig. 2F, the section marked with Ph_dis represents the discharge phase, and the section marked with Ph_app represents the application phase. In the discharge phase, the switch SWA of the pulse switch section 13a is in the OFF state, and the switch SWB of the discharge circuit 13b is in the ON state. On the other hand, in the application phase, the switch SWA of the pulse switch section 13a is in the ON state, and the switch SWB of the discharge circuit 13b is in the OFF state.

[0060] The switch SWA of the pulse switch section 13a switches from the discharge phase to the application phase by switching from the off state to the on state, and outputs the arbitrary waveform voltage output Vopt as a pulse output during the application phase Ton.

[0061] The switch SWB of the discharge circuit 13b switches from the OFF state to the ON state, thereby switching from the application phase to the discharge phase, discharging the charge accumulated in the load during Toff of the discharge phase to ground, and setting the voltage of the arbitrary waveform voltage output Vopt to 0 V.

[0062] Although both FIG. 2F and FIG. 2F show output waveforms, FIG. 2F shows the output waveform of the pulse switch section, and FIG. 2G shows the output waveform of the power supply after the output of the pulse switch section has been smoothed.

[0063] (Example of a broken line voltage waveform) An example of the waveform of the broken-line waveform voltage will be described using Figures 3A and 3B. Here, an example of the waveform of the broken-line waveform voltage having two inflection points P1 and P2 between the start point P0 and the end point P3 is shown, but the number of inflection points can be any number. In Figures 3A and 3B, the straight-line waveform voltage shown by the dashed line indicates a waveform that connects the start point P0 and the end point P3 with a single straight line.

[0064] In the waveform example of the bent-line waveform voltage shown in Fig. 3A, the voltage V1 at the inflection point P1 is low and the voltage V2 at the inflection point P2 is high, compared to the linear waveform voltage shown by the dashed line. In this waveform example, the voltage change rate dV / dt of the linear waveform voltage connecting the start point P0 and the inflection point P1 is expressed as V1 / T1, the voltage change rate dV / dt of the linear waveform voltage connecting the inflection point P1 and the inflection point P2 is expressed as (V2-V1) / T2, and the voltage change rate dV / dt of the linear waveform voltage connecting the inflection point P2 and the end point P3 is expressed as (V3-V2) / T3. Note that T1 is the time width between the start point P0 and the inflection point P1, T2 is the time width between the inflection point P1 and the inflection point P2, and T3 is the time width between the inflection point P2 and the end point P3.

[0065] 3B, the voltage V1 at the inflection point P1 is higher and the voltage V2 at the inflection point P2 is lower than the straight line waveform voltage shown by the dashed line. In this waveform example, the voltage change rate dV / dt of the straight line waveform voltage connecting the start point P0 and the inflection point P1 is expressed as V1 / T1, the voltage change rate dV / dt of the straight line waveform voltage connecting the inflection point P1 and the inflection point P2 is expressed as (V2-V1) / T2, and the voltage change rate dV / dt of the straight line waveform voltage connecting the inflection point P2 and the end point P3 is expressed as (V3-V2) / T2.

[0066] (Setting of broken line waveform voltage) The manner in which the control unit sets the broken-line waveform voltage will be described with reference to Figures 4 and 5. In the following, a case is shown in which, in a pulse period in which one pulse is generated, an application phase in which a periodic pulse is applied to the load side by switching operation and a discharge phase in which the charge accumulated on the load side is discharged, and the current generated by repeating this pulse period is supplied to the load.

[0067] When generating a broken-line waveform voltage in inverter control, the control unit sets the following control values ​​as control parameters. (a) Time duration T of the application phase, (b) The time Tk between the inflection points at which the broken-line waveform voltage is switched to the linear waveform voltage, and (c1) The voltage change rate dV / dt of each linear waveform voltage, or (c2) Voltage at the inflection point

[0068] (Setting 1) A first setting example of the broken-line waveform voltage will be described with reference to Fig. 4. In this setting example 1, when the time width T of the application phase and the time Tk between the inflection points are set among the above-mentioned control values ​​and the inflection points are determined, the voltage change rate dV / dt of each linear waveform voltage constituting the broken-line waveform voltage is set. In the flowchart of Fig. 4, the steps are indicated by the symbols S1 to S7.

[0069] As control values ​​for determining the inflection points, the time width T of the application phase, the time Tk between the inflection points, and the voltage change rate dV / dt of the linear waveform voltage are determined and stored in advance. These control values ​​can be readably stored in any storage device.

[0070] First, the voltage change rate dV / dt of the linear waveform voltage at the beginning of the application phase, which has been set as an initial value, is read out (S1), the voltage change rate dV / dt of the initial linear waveform voltage is set, and a linear waveform voltage is generated with this voltage change rate dV / dt (S2).

[0071] Thereafter, based on whether the elapsed time from when the linear waveform voltage started to be output has reached the time Tk between the inflection points, it is determined whether the inflection point has been reached (S3). When the inflection point has been reached, the voltage change rate dV / dt of the next linear waveform voltage is read (S4), and the voltage change rate dV / dt of the read linear waveform voltage is modified (S5).

[0072] It is determined whether the inflection point is the end point of the broken line waveform voltage, and if it is not the end point, steps S3 to S5 are repeated (S6). If the inflection point is the end point in S6, one application phase ends, and after the discharge phase, a pulse period in which one pulse is formed ends, and steps S1 to S6 are repeated in the next pulse period (S7).

[0073] (Setting 2) The above-mentioned setting mode 1 is an example in which a voltage change rate dV / dt of a preset linear waveform voltage is used, but in setting mode 2, a broken-line waveform voltage may be set using a voltage at an inflection point instead of the voltage change rate dV / dt. In this case, the voltage change rate dV / dt of the first linear waveform voltage is obtained by dividing the voltage difference (V1-V0) between the voltage V0 at the start point P0 of the broken-line waveform voltage and the voltage V1 at the inflection point P1 by the time width T1, the voltage change rate dV / dt of the next linear waveform voltage is obtained by dividing the voltage difference (V2-V1) between the voltage V1 at the inflection point P1 and the voltage V2 at the inflection point P2 by the time width T2, and the linear waveform voltages of the other sections are similarly obtained.

[0074] (Setting 3) A third setting example of the broken-line waveform voltage will be described with reference to Fig. 5. In this second setting example, the voltage change rate dV / dt of each linear waveform voltage is set when the time width T of the application phase and the time Tk between the inflection points are set, the inflection points are determined, and the output voltage Vk at each inflection point is determined. In the flowchart of Fig. 5, the steps are indicated by the symbols S11 to S21.

[0075] First, the voltage change rate dV / dt of the linear waveform voltage at the beginning of the application phase is calculated. This voltage change rate dV / dt is calculated by dividing the voltage difference (V1-V0) between the voltage V0 at the starting point P0 and the voltage V1 at the first bending point P1 by the time duration T1 (S11). The calculated voltage change rate dV / dt is set as the initial value (S12).

[0076] At the inflection point Pk after the time width of the linear waveform voltage has elapsed (S13), the output voltage Vk set at the inflection point Pk is read out (S14), and the output voltage Vo at that point is detected (S15). The detected output voltage Vo is compared with the read output voltage Vk, and it is determined whether the detected output voltage Vo is equal to or smaller than the set output voltage V k For example, the output voltage Vo and the output voltage V k This can be done based on whether or not the difference between the voltage and the reference voltage exceeds a preset threshold value. If it is determined that there is no fluctuation in the voltage, steps S13 to S15 are repeated (S16).

[0077] If it is determined that there is a voltage fluctuation, the voltage Vk+1 of the next inflection point Pk+1 is read (S17), and the voltage difference (Vk+1-Vo) between the output voltage Vo and the read voltage Vk+1 of the inflection point Pk+1 is divided by the time width T1 to calculate the voltage change rate dV / dt by ((Vk+1)-Vo) / T1 (S18), and the voltage change rate dV / dt is updated (S19). Then, the steps of S13 to S19 are repeated until the end point of the broken line waveform voltage (S20), and after one application phase ends and the pulse period in which one pulse is formed after the discharge phase ends, the steps of S11 to S20 are repeated in the next pulse period (S21).

[0078] (Example of discharge phase operation) Figure 6 is a diagram for explaining an example of operation in the discharge phase, and Figures 6A and 6B respectively show the operating state at the point in time when the power supply output Vout rises from V2 to 0 V, and the operating state when the power supply output Vout becomes 0 V, during the discharge phase Ph_dis in Figure 2F.

[0079] The discharge phase Ph_dis1 in Fig. 6A is the time when the switch SWA of the pulse switch unit 13a is switched to the OFF state and the switch SWB of the discharge circuit 13b is switched to the ON state. This time corresponds to the section indicated by Dis1 in Fig. 2F. In this Dis1, the power supply output Vout rises from V2 to 0V, and the output current Iout is a steep discharge current that decreases toward 0A. The current Ir in the application phase corresponds to the ion current Ip in the case of a plasma load.

[0080] In the discharge phase Ph_dis2 in Fig. 6B, the switch SWA of the pulse switch unit 13a is in the OFF state, and the switch SWB of the discharge circuit 13b is in the ON state. This state corresponds to the section indicated by Dis2 in Fig. 2. In this Dis2, the power supply output Vout is 0V, and the output current Iout is 0A.

[0081] (Example of application phase operation) Figure 7 is a diagram for explaining an example of operation in the application phase, and Figures 7A and 7B respectively show the operating state at the point in time when the power supply output Vout falls from 0V to V1, and the operating state when the power supply output Vout changes from V1 to V2, during the application phase Ph_app in Figure 2F.

[0082] The application phase Ph_app1 in Fig. 7A is the time when the switch SWA of the pulse switch unit 13a is switched to the ON state and the switch SWB of the discharge circuit 13b is switched to the OFF state. This time corresponds to the time indicated by App1 in Fig. 2F. At this time App1, the power supply output Vout falls from 0V to V1, and a current Iq flows toward the load. The voltage change at the time App1 is determined by the time constant of the circuit connected downstream of the switch unit.

[0083] In the application phase Ph_app2 in FIG. 7B, the switch SWA of the pulse switch unit 13a is in the ON state, and the switch SWB of the discharge circuit 13b is in the OFF state. This state corresponds to the section indicated by App2 in FIG. 2F. In this App2, the power output Vout changes from V1 at the voltage change rate dV / dt, and at the end point of App2, the power output Vout becomes V2. In the case of a plasma load, a constant current Ir equivalent to the ion current Ip determined based on the voltage change rate dV / dt flows in the output current Iout. An example of the current Ir and the current Iq is shown in FIG. 18.

[0084] (2) Arbitrary waveform voltage generator The arbitrary waveform voltage generating unit 12 of the present invention includes an inverter circuit that converts a DC voltage into an AC voltage, a rectifier circuit that converts the AC voltage of the inverter circuit into a DC voltage, and a voltage superposition circuit that generates a trapezoidal waveform voltage by superimposing the output of the DC power supply of the first power supply and the broken line waveform voltage Vline output via the rectifier circuit, and outputs it as an arbitrary waveform voltage output Vopt.

[0085] The arbitrary waveform voltage generating section of the present invention can be configured in a plurality of forms in which the voltage superimposing circuit that superimposes the output of the DC power supply and the broken line waveform voltage Vline is disposed at different positions in the circuit of the arbitrary waveform voltage generating section.

[0086] Hereinafter, a first configuration example and a second configuration example of the arbitrary waveform voltage generating section of the present invention will be described with reference to Fig. 8 to Fig. 11. Fig. 8 and Fig. 9 are diagrams for explaining the first configuration example of the arbitrary waveform voltage generating section, and Fig. 10 and Fig. 11 are diagrams for explaining the second configuration example of the arbitrary waveform voltage generating section. Also, Fig. 12 is a diagram for explaining a configuration example of a voltage superposition circuit.

[0087] (a) First example of the arbitrary waveform voltage generator FIG. 8 shows a schematic configuration of a first example of the arbitrary waveform voltage generating section of the present invention, and FIG. 9 shows a timing chart of the first example of the arbitrary waveform voltage generating section of the present invention.

[0088] The arbitrary waveform voltage generating section 12A of the first configuration example includes a second DC power supply 12a, an inverter circuit 12b, a transformer 12c, and a rectifier circuit 12d, and the voltage superposition circuit 12e is provided within the rectifier circuit 12d.

[0089] The second DC power supply 12a may be an AC / DC power supply that converts AC to DC and outputs a DC voltage, or may be a normal DC power supply. The AC (alternating current) source may be either an external power supply or an internal power supply. The inverter circuit 12b converts the input DC voltage into an AC voltage, and adjusts and outputs the voltage value of the converted AC voltage. The transformer 12c converts the amplitude of the AC voltage from the inverter circuit 12b based on a transformation ratio determined by a predetermined winding ratio. The rectifier circuit 12d rectifies the AC voltage of the transformer 12c and converts it into a DC voltage.

[0090] The inverter circuit 12b is inverter-controlled based on a control command output from the control unit 15. The control command of the control unit 15 may be generated based on a feedback signal of the voltage and / or current output from the arbitrary waveform voltage generating unit, or may be generated based on an external signal from an external device (not shown).

[0091] The inverter circuit 12b is driven at a high frequency of, for example, several hundred kHz to several tens of MHz. The inverter circuit 12b may be a single-transistor flyback inverter using one switching element, a two-transistor half-bridge inverter using two switching elements, or a four-transistor full-bridge inverter using four switching elements.

[0092] The voltage superposition circuit 12e is incorporated in the rectifier circuit 12d, and superimposes the first voltage V1 of the first DC power supply 11 on the rectified output of the rectifier circuit 12d. FIG. 12A shows a configuration example of the voltage superposition circuit 12e incorporated in the rectifier circuit 12d. Here, a circuit example configured of a diode bridge is shown as the rectifier circuit 12d. In the circuit configuration example of FIG. 12A, the output end of the voltage superposition circuit 12e is connected to one output end of the rectifier circuit 12d, and the rectified output on which the first voltage V1 is superimposed is output as an arbitrary waveform voltage output.

[0093] Figure 9 shows a case where PWM control is used for inverter control. Inverter control is performed during the on-time Ton based on the duty ratio within the output pulse period T, and resumes after the off-time Toff has elapsed. PWM control controls the pulse width for each inverter period Tinv (=1 / f_inv) determined by the drive frequency f_inv. The output voltage is adjusted by gradually increasing or decreasing the pulse width to raise or lower the peak value of the output voltage.

[0094] When generating the broken-line waveform voltage Vline and the voltage gradient waveforms of the arbitrary waveform voltage output Vopt by inverter control, in consideration of the responsiveness when a smoothing circuit is connected downstream of the arbitrary waveform voltage generating unit 12, the drive frequency f_inv of the PWM control that performs the inverter control needs to be higher than the output pulse frequency f_pulse, and preferably is at least five times higher.

[0095] The transformer 12c adjusts the peak value of the inverter output of the inverter circuit 12b based on a transformation ratio determined by a winding ratio, and outputs the adjusted value to the rectifier circuit 12d. The rectifier circuit 12d rectifies the inverter output and outputs a broken-line waveform voltage whose voltage changes at a predetermined voltage change rate dV / dt. The broken-line waveform voltage is output during an on-time Ton, and is not output during an off-time Toff. The voltage superimposition circuit 12e generates a superimposed output by superimposing a first voltage V1 on the rectified output of the rectifier circuit 12d.

[0096] (b) Second example of the arbitrary waveform voltage generator FIG. 10 shows a schematic configuration of the second example of the arbitrary waveform voltage generating section of the present invention, and FIG. 11 shows a timing chart of the second example of the arbitrary waveform voltage generating section of the present invention.

[0097] The arbitrary waveform voltage generating section 12B of the second configuration example includes a second DC power supply 12a, an inverter circuit 12b, a transformer 12c, and a rectifier circuit 12d, and includes a voltage superposition circuit 12e in the transformer 12c.

[0098] The arbitrary waveform voltage generating unit 12B of the second configuration example includes a second DC power supply 12a, an inverter circuit 12b, a transformer 12c, and a rectifier circuit 12d, similar to the arbitrary waveform voltage generating unit 12A of the first configuration example, but differs in that a voltage superposition circuit 12e is incorporated into the transformer 12c. Here, the description of the second DC power supply 12a, the inverter circuit 12b, the transformer 12c, and the rectifier circuit 12d will be omitted, and only the voltage superposition circuit 12e will be described.

[0099] The voltage superimposing circuit 12e is configured to be incorporated in the transformer 12c, and superimposes the first voltage V1 of the first DC power supply 11 on the inverter output of the inverter circuit 12b. Fig. 12B shows an example of the configuration of the voltage superimposing circuit 12e.

[0100] In the circuit configuration example of FIG. 12B, the first DC power supply 11 is connected to one output terminal on the secondary side of the transformer 12c, so that the first voltage V1 is superimposed on the inverter output voltage converted by the transformer 12c.

[0101] Fig. 11, like Fig. 9, shows a case where PWM control is used for inverter control. Inverter control is performed during an on-time Ton based on a duty ratio within the output pulse period T, and is resumed after an off-time Toff has elapsed. PWM control controls the pulse width for each inverter period Tinv determined by the drive frequency f_inv. The output voltage is adjusted by gradually increasing or decreasing the pulse width to raise or lower the peak value of the output voltage.

[0102] As in the first configuration example, when generating the broken-line waveform voltage Vline and the voltage gradient waveforms of the arbitrary waveform voltage output Vopt by inverter control, in consideration of the responsiveness when a smoothing circuit is connected downstream of the arbitrary waveform voltage generating unit 12, the drive frequency f_inv of the PWM control that performs the inverter control needs to be higher than the output pulse frequency f_pulse, and preferably is at least five times higher.

[0103] The transformer 12c adjusts the peak value of the inverter output of the inverter circuit 12b based on a transformation ratio.

[0104] The voltage superposition circuit 12e generates a transformer output by superposing the first voltage V1 on the inverter output voltage-converted by the transformer 12c, and outputs the transformer output to the rectification circuit 12d. The rectification circuit 12d rectifies the inverter output and outputs a broken line waveform voltage whose voltage changes at a predetermined voltage change rate dV / dt. The broken line waveform voltage is output during the on-time Ton, and is not output during the off-time Toff.

[0105] (3) Smoothing circuit 13 shows an example of the configuration of the smoothing circuit 14. The smoothing circuit 14 is configured as an LC circuit of an inductor Lp connected in series and a capacitor Cp connected in parallel. Note that this smoothing circuit 14 is just an example, and the invention is not limited to this LC circuit.

[0106] The smoothing circuit of the pulse power supply 1 of the present invention can be configured in a first form in which the smoothing circuit is connected to the output terminal of the arbitrary waveform voltage generating unit 12, and in a second form in which the smoothing circuit is connected to the output terminal of the pulse switch unit 13a of the switch unit 13. The smoothing circuit of the first form suppresses noise contained in the arbitrary waveform voltage output. The smoothing circuit of the second form suppresses voltage oscillations of overshoot and undershoot that occur in the switch unit 13 with the voltage change between the discharge phase and the application phase.

[0107] (a) First example of the smoothing circuit The smoothing circuit 14A of the first embodiment will be described with reference to Fig. 14. Note that Fig. 14 shows a configuration example of an arbitrary waveform voltage generating section 12A that performs voltage superposition in a rectifier circuit 12d.

[0108] The smoothing circuit 14A is connected between the output terminal of the rectifier circuit 12d of the arbitrary waveform voltage generating unit 12A and the input terminal of the switch unit 13, and suppresses high-frequency noise components contained in the arbitrary waveform voltage output generated by the rectifier circuit, etc. In this circuit configuration, even if the switch SWA of the pulse switch unit 13a in the switch unit 13 is switched to the off state, the voltage charged in the capacitor in the smoothing circuit 14A does not drop to the voltage of the V1 power supply. Therefore, in the first form, a discharge circuit 17 is connected to discharge the voltage charged in the capacitor in the smoothing circuit 14A.

[0109] (b) Second example of the smoothing circuit The smoothing circuit 14B of the second embodiment will be described with reference to Figures 15 and 16. Figure 15 shows a configuration example of an arbitrary waveform voltage generating unit 12A that performs voltage superposition in a rectifier circuit 12d, and Figure 16 shows an example of a waveform of the smoothing circuit 14B.

[0110] The smoothing circuit 14B of the second embodiment is connected between the pulse switch section 13a and the discharge circuit 13b in the switch section 13. Due to the switching operation performed in the pulse switch section 13a of the switch section 13, the voltage is abruptly switched from V2 to the first voltage V1 during discharging, and also from the ground potential of 0V to the first voltage V1. This voltage change causes an overshoot or undershoot in the output waveform.

[0111] When the switch SWA of the pulse switch section 13a is in the on state, the capacitor of the smoothing circuit 14B is charged. After that, when the switch SWA of the pulse switch section 13a is switched to the off state, the voltage charged in the capacitor of the smoothing circuit 14B is discharged because the discharge circuit 13b is switched to the on state. As a result, during the discharge phase and the application phase, when the pulse switch section 13a switches between the on state and the off state, voltage oscillations such as overshoot and undershoot caused by voltage changes are suppressed, the voltage value of the power supply output is settled at a predetermined time constant, and a power supply output Vout with suppressed fluctuations is output.

[0112] Fig. 16 shows an example of a waveform of the smoothing circuit 14B. Fig. 16A shows a case where the constants of the inductor Lf and the capacitor Cf are small, and Fig. 16B shows a case where the constants of the inductor Lf and the capacitor Cf are large.

[0113] By selecting small constants for the inductor Lf and the capacitor Cf, the time constant of the LC circuit is set to a small value, and this allows the voltage rise time to be shortened. If the time constant of the LC circuit is large, the voltage rise time t2 becomes long, making it necessary to set the discharge time long, which affects the setting of the high-frequency output pulse frequency f_pulse. It is desirable that the voltage rise time t1 be shorter than, for example, 10% of the pulse period.

[0114] (4) Example of plasma load An example of the load of the pulse power supply device of the present invention will be described with reference to Fig. 17. In the case of a plasma load, the plasma load in the plasma chamber 2 is represented by capacitors Cw, Cp, and an ion current Ip. Capacitor Cw is the inherent capacitance of components of the plasma chamber such as a substrate, and Cp is the variable capacitance of a sheath capacitance and a stray capacitance.

[0115] In the plasma chamber 2, the ion current Ip supplied to the substrate placed in the chamber is required to be constant, thereby maintaining the wafer voltage Vsh of the substrate at a constant voltage.

[0116] The pulse power supply device of the present invention supplies a constant ion current Ip as described above, and supplies power to the load in the plasma chamber 2 for maintaining the substrate wafer voltage Vsh at a constant voltage.

[0117] The pulse power supply device of the present invention feeds back the power supply output Vout and / or the output current Iout detected by the detector 16 to the control unit 15, generates a control value for keeping the power supply output Vout or the output current Iout at a constant value, and controls the switch SWA of the pulse switch unit 13a and the switch SWB of the discharge circuit 13b.

[0118] FIG. 18 shows an example of a drive signal for driving a switch, a power supply output Vout, and an output current Iout, and FIG. 19 shows a wafer voltage Vsh, a power supply output Vout, and an ion current Ip.

[0119] When switching from the discharge phase to the application phase, the power supply output Vout changes from 0V, which is the ground potential, to V1 with the time constant of the smoothing circuit 14B, and a current Iq flows for a time tq. After the time tq has elapsed, the power supply output Vout changes with a voltage change rate dV / dt, and the current Iq is maintained at a constant current.

[0120] At the end of the application phase, the power supply output Vout becomes voltage V2. This voltage V2 is a voltage value determined by the voltage change rate dV / dt and the time width of the application phase. The time width of the gradient section of the application phase corresponds to the on-time Ton of the output pulse period T. [Industrial Applicability]

[0121] The pulse power supply device of the present invention can be applied to a load requiring a constant voltage pulse output, in addition to being applied to plasma processing. [Explanation of symbols]

[0122] 1 Pulse power supply 2. Plasma chamber 10 Power supply section 12, 12A, 12B Arbitrary waveform voltage generator 12b Inverter circuit 12c transformer 12d rectifier circuit 12e Voltage superposition circuit 13 Switch section 13a Pulse switch section 13b Discharge circuit 14,14A,14B smoothing circuit 15 Control section 16 Detectors 17 Discharge circuit 21 Load Cf, Cp, Cw capacitors Iout Output current Ip Ion current Lf,Lp inductor P0 Start point P1, P2, Pk bending points P3 End point Ph_dis Discharge phase Ph_add Application phase SWA,SWB Switch T Output pulse period Tinv Inverter period Toff Off time Ton On time Vopt Arbitrary waveform voltage output Vk Output voltage Vline Linear waveform voltage Vo output voltage Vout Power output Vsh Wafer voltage dV / dt Voltage change rate f_inv Drive frequency f_pulse Output pulse frequency ΔV Voltage difference

Claims

1. a first DC power supply generating a first voltage of a DC voltage; an arbitrary waveform voltage generating unit that generates an arbitrary waveform voltage by using a plurality of linear waveforms connecting two voltages; a switch unit that generates a pulse waveform by switching between a ground potential and the arbitrary waveform voltage and outputs a pulse by repeating the pulse waveform at a predetermined cycle; Equipped with the arbitrary waveform voltage is an output voltage during an application phase of the pulse; the application phase is composed of a first application section in which the voltage falls from the ground potential to the first voltage, and a second application section from the first voltage to a second voltage that is a voltage obtained by biasing the first voltage to a terminal voltage of a broken line waveform voltage, The arbitrary waveform voltage generating unit includes: By controlling the inverter, a broken line waveform voltage is generated in which a plurality of straight line waveform voltages having different voltage change rates dV / dt are connected with a ground potential as a starting point; generating an arbitrary waveform voltage by superimposing the broken-line waveform voltage in the second application section and the first voltage; Pulse power supply.

2. The arbitrary waveform voltage generating unit includes: A second DC power source; an inverter circuit for converting a DC voltage of the second DC power source into an AC voltage; a rectifier circuit for converting the AC voltage of the inverter circuit into a DC voltage; a voltage superposition circuit that superposes an output of the first DC power source and an output of the rectifier circuit; Equipped with The inverter circuit adjusts, in the DC-AC voltage conversion, a time width of the application phase, an inflection point at which the broken-line waveform voltage is switched to a linear waveform voltage, a voltage change rate dV / dt of each linear waveform voltage, or a voltage at the inflection point; the rectifier circuit rectifies the output of the inverter circuit to generate a broken-line waveform voltage; the voltage superposition circuit superposes the first voltage of the output of the first DC power supply and the broken-line waveform voltage of the output of the rectifier circuit, and generates an arbitrary waveform voltage in which a plurality of linear waveform voltages having different voltage change rates dV / dt are switched and connected at the inflection point, with the first voltage of the first DC power supply being a starting point voltage.

2. The pulse power supply of claim 1.

3. A control unit that controls the inverter circuit, The control unit includes a control value that determines a time width of the application phase, a time between inflection points for switching the linear waveform voltage of the broken-line waveform voltage, and a voltage change rate dV / dt of each linear waveform voltage, or a voltage at the inflection point, and performs inverter control based on the control value to generate a broken-line waveform voltage formed by connecting a plurality of linear waveform voltages.

3. A pulse power supply as claimed in claim 2.

4. A control unit that controls the inverter circuit, the control unit feeds back the power supply output Vout and / or the output current Iout, and determines a control value for a time width of the application phase, a time and a voltage of a bending point at which the broken-line waveform voltage is switched to a linear waveform voltage, and a duty ratio that determines each linear waveform voltage, so that the power supply output Vout or the output current Iout is kept constant; performing inverter control based on the control value to generate a broken-line waveform voltage formed by connecting a plurality of straight-line waveform voltages; 3. A pulse power supply as claimed in claim 2.

5. the voltage superposition circuit is provided in the rectification circuit, An output terminal of the first DC power source is connected to one output terminal of the rectifier circuit.

3. A pulse power supply as claimed in claim 2.

6. a transformer is provided between the inverter circuit and the rectifier circuit; the voltage superposition circuit is provided in the transformer, An output terminal of the first DC power source is connected to one end of the secondary side of the transformer.

3. A pulse power supply as claimed in claim 2.

7. the control unit sets the control value of the voltage change rate dV / dt as a slope of the linear waveform voltage at each time point when the time between the inflection points reaches a control value of the time between the inflection points, and sequentially switches the linear waveform voltage of the broken-line waveform voltage to generate a broken-line waveform voltage.

4. The pulse power supply of claim 3.

8. the control unit, at each time point when the time between the inflection points reaches the control value of the time between the inflection points, sets a slope determined based on the control values ​​of the voltage of the inflection points at that time point and the next time point and the control value of the time between the inflection points as a slope of the linear waveform voltage, and sequentially switches the linear waveform voltage of the broken-line waveform voltage to generate a broken-line waveform voltage.

4. The pulse power supply of claim 3.

9. The control unit, at each time point when the time between the inflection points reaches the control value of the time between the inflection points, determines a voltage fluctuation by comparing the control value of the voltage of the inflection point at that time point with the detection value of the output voltage at that time point, When determining the voltage fluctuation, a slope determined based on the detected value of the output voltage at the time and a control value of the voltage at the inflection point at the next time is set as a slope of the linear waveform voltage, and the linear waveform voltage of the broken line waveform voltage is sequentially switched to generate a broken line waveform voltage.

4. The pulse power supply of claim 3.

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