Semiconductor device, matching circuit, and filter circuit

By utilizing a silicon oxide dielectric film with a specific ring structure ratio in semiconductor devices, high Q characteristics are achieved, addressing the challenge of dielectric loss and enhancing the performance of matching and filter circuits.

JP7647933B2Active Publication Date: 2025-03-18MURATA MFG CO LTD
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Patent Information

Application Number
JP2023566208
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2021-12-08
Filing Date
2022-11-22
Publication Date
2025-03-18
Estimated Expiration
2042-11-22

AI Technical Summary

Technical Problem

Existing semiconductor devices, such as capacitors used in matching and filter circuits, struggle to achieve high Q values due to insufficient research on suitable dielectric films.

Method used

A semiconductor device is developed with a dielectric film made of silicon oxide, where the ratio of three-membered ring structures to four-membered ring structures is 0.46 or less, enhancing the Q characteristics.

Benefits of technology

The semiconductor device achieves high Q characteristics, effectively improving the performance of matching and filter circuits by reducing dielectric loss.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

A capacitor 1 of one embodiment of this semiconductor device comprises: a substrate 10; a first electrode layer 22 provided on the substrate 10; a dielectric film 23 provided on the first electrode layer 22; a second electrode layer 24 provided on the dielectric film 23; a protection layer 26 covering the first electrode layer 22 and the second electrode layer 24; and an external electrode 27 penetrating the protection layer 26. The dielectric film 23 comprises silicon oxide, and the ratio of a 3-membered ring structure to a 4-membered ring structure of silicon oxide contained in the dielectric film 23 is 0.46 or less.
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Description

[Technical field]

[0001] The present invention relates to a semiconductor device, and further to a matching circuit and a filter circuit including the semiconductor device. [Background technology]

[0002] A typical capacitor element used in semiconductor integrated circuits is, for example, a metal insulator metal (MIM) capacitor, which has a parallel plate structure in which an insulator is sandwiched between a lower electrode and an upper electrode.

[0003] Patent Document 1 discloses an electronic component including a circuit element formed on a substrate, at least one pair of terminal electrodes connected to the circuit element and arranged opposite each other on at least one surface, and a support body formed to protrude beyond the at least one pair of terminal electrodes and provided in an area of ​​the at least one surface that does not overlap with the circuit element in a plan view.

[0004] Figures 1 to 4 of Patent Document 1 show, as an example of an electronic component, a capacitor 1 in which a lower electrode 3 (circuit element), a dielectric layer 4 (circuit element), a first electrode 5a (circuit element), a first electrode 5b (circuit element), a first protective layer 6 (protective layer), a second electrode 7 (circuit element), a second protective layer 8 (protective layer), terminal electrodes 9a, 9b, and supports 10a, 10b are laminated in this order on a substrate 2 having a planar rectangular shape. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2012-15333 A (Patent No. 5445357 A) Summary of the Invention [Problem to be solved by the invention]

[0006] In Patent Document 1, the following film materials are listed as the material of the dielectric layer 4: PbTiO3, Pb(Zr,Ti)O3 (PZT), PbNb2O3, Pb(Mg,Nb)O3 (PMN), BaTiO3, (Ba,Sr)TiO3 (BST), CaTiO3, ZrO2, HfO2, TiO2, Ta2O6, Bi4Ti4O 12 It is described that high dielectric ceramic materials such as SrBi2Ta2O9, Al2O3, Si3N4, and SiO2 are used.

[0007] When a semiconductor device such as the capacitor 1 described in Patent Document 1 is used as a capacitor in a matching circuit or the like, a high Q value, which is the reciprocal of the dielectric loss, is required. However, dielectric films suitable for increasing the Q value of semiconductor devices have not been fully studied.

[0008] The present invention has been made to solve the above problems, and has an object to provide a semiconductor device having a high Q characteristic. Another object of the present invention is to provide a matching circuit and a filter circuit including the semiconductor device. [Means for solving the problem]

[0009] The semiconductor device of the present invention comprises a substrate, a first electrode layer provided on the substrate, a dielectric film provided on the first electrode layer, a second electrode layer provided on the dielectric film, a protective layer covering the first electrode layer and the second electrode layer, and an external electrode penetrating the protective layer, wherein the dielectric film is made of silicon oxide, and the ratio of three-membered ring structures to four-membered ring structures of the silicon oxide contained in the dielectric film is 0.46 or less.

[0010] A matching circuit of the present invention includes the semiconductor device of the present invention.

[0011] A filter circuit according to the present invention includes the semiconductor device according to the present invention. Effect of the Invention

[0012] According to the present invention, it is possible to provide a semiconductor device having a high Q characteristic. Furthermore, according to the present invention, it is possible to provide a matching circuit and a filter circuit including the semiconductor device. [Brief description of the drawings]

[0013] [Figure 1] FIG. 1 is a cross-sectional view illustrating an example of a capacitor according to a first embodiment of the present invention. [Diagram 2] FIG. 2 is a plan view illustrating an example of the capacitor according to the first embodiment of the present invention. [Diagram 3] FIG. 3 is a schematic diagram showing an example of a silicon oxide structure. [Figure 4] FIG. 4 shows an example of a Raman spectrum of silicon oxide. [Diagram 5] FIG. 5 is a graph showing the relationship between the ratio of three-membered rings / four-membered rings of silicon oxide contained in a dielectric film and the Q value of a capacitor having a capacitance of 0.2 pF. [Figure 6A] FIG. 6A is a schematic cross-sectional view illustrating an example of a step of forming an insulating film. [Figure 6B] FIG. 6B is a schematic cross-sectional view for explaining an example of a step of forming the first electrode layer. [Figure 6C] FIG. 6C is a schematic cross-sectional view for explaining an example of a step of forming a dielectric film. [Figure 6D] FIG. 6D is a schematic cross-sectional view for explaining an example of a step of forming a second electrode layer. [Figure 6E] FIG. 6E is a schematic cross-sectional view illustrating an example of a step of forming a moisture-resistant film. [Figure 6F] FIG. 6F is a schematic cross-sectional view for explaining an example of a step of forming a protective layer. [Figure 6G] FIG. 6G is a schematic cross-sectional view for explaining an example of a step of forming a seed layer. [Figure 6H] FIG. 6H is a schematic cross-sectional view for illustrating an example of a step of forming the first plating layer and the second plating layer. [Figure 6I] FIG. 6I is a schematic cross-sectional view for illustrating an example of a step of removing a portion of the seed layer. [Figure 6J] FIG. 6J is a schematic cross-sectional view for explaining an example of a step of forming a photosensitive resin film. [Figure 6K] FIG. 6K is a schematic cross-sectional view for explaining an example of a step of forming the first resin body and the second resin body. [Figure 7] FIG. 7 is a cross-sectional view illustrating an example of a capacitor according to a second embodiment of the present invention. [Figure 8] FIG. 8 is an explanatory diagram illustrating an example of a matching circuit. [Figure 9] FIG. 9 is an explanatory diagram illustrating an example of a filter circuit. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] The semiconductor device of the present invention will now be described. However, the present invention is not limited to the following configurations, and can be appropriately modified and applied within the scope of the present invention. Note that the present invention also includes a combination of two or more of the individual preferred configurations of the present invention described below.

[0015] The following embodiments are merely examples, and it goes without saying that partial replacement or combination of the configurations shown in the different embodiments is possible. In the second and subsequent embodiments, the description of the matters common to the first embodiment will be omitted, and only the differences will be described. In particular, the same effects and advantages due to the same configuration will not be mentioned one by one for each embodiment.

[0016] In the following description, unless otherwise specified, each embodiment is simply referred to as the "semiconductor device of the present invention." The shape and arrangement of each component of the semiconductor device of the present invention are not limited to the examples shown in the drawings.

[0017] In the following, a capacitor will be described as an example of one embodiment of the semiconductor device of the present invention. The semiconductor device of the present invention may be a capacitor itself (i.e., a capacitor element) or a device including a capacitor.

[0018] [First embodiment] In the capacitor according to the first embodiment of the present invention, the external electrodes include a first external electrode connected to the first electrode layer and a second external electrode connected to the second electrode layer.

[0019] Fig. 1 is a cross-sectional view showing an example of a capacitor according to a first embodiment of the present invention. Fig. 2 is a plan view showing an example of a capacitor according to a first embodiment of the present invention. Fig. 1 is a cross-sectional view taken along line II of the capacitor shown in Fig. 2.

[0020] In this specification, the length direction, width direction, and thickness direction of a capacitor (semiconductor device) are defined as the directions indicated by arrows L, W, and T, respectively, as shown in Figures 1 and 2. Here, the length direction L, width direction W, and thickness direction T are perpendicular to each other.

[0021] 1 and 2 includes a substrate 10, an insulating film 21 provided on the substrate 10, a first electrode layer 22 provided on the insulating film 21, a dielectric film 23 provided on the first electrode layer 22, a second electrode layer 24 provided on the dielectric film 23, a moisture-resistant film 25 provided on the dielectric film 23 and the second electrode layer 24, a protective layer 26 provided on the moisture-resistant film 25, and an external electrode 27 penetrating the protective layer 26. The external electrode 27 includes a first external electrode 27A connected to the first electrode layer 22 and a second external electrode 27B connected to the second electrode layer 24. The first external electrode 27A penetrates the protective layer 26, the moisture-resistant film 25, and the dielectric film 23, and the second external electrode 27B penetrates the protective layer 26 and the moisture-resistant film 25.

[0022] The substrate 10 is not particularly limited, but is preferably a semiconductor substrate such as a silicon substrate or a gallium arsenide substrate, or an insulating substrate such as glass or alumina.

[0023] The insulating film 21 is provided so as to cover the entirety of one main surface of the substrate 10. The insulating film 21 may be provided so as to cover a portion of the one main surface of the substrate 10, but needs to be provided in a region that is larger than the first electrode layer 22 and overlaps the entirety of the first electrode layer 22. When the substrate 10 is an insulating substrate such as glass or alumina, the insulating film 21 does not need to be provided.

[0024] The material constituting the insulating film 21 is not particularly limited, but preferable examples include SiO2, SiN, Al2O3, HfO2, Ta2O5, and ZrO2.

[0025] The first electrode layer 22 is provided at a position away from the edge of the substrate 10. In other words, the edge of the first electrode layer 22 is located inside the edge of the substrate 10.

[0026] The material constituting the first electrode layer 22 is not particularly limited, but is preferably Cu, Ag, Au, Al, Ni, Cr or Ti, or an alloy containing at least one of these metals.

[0027] The dielectric film 23 is provided so as to cover the first electrode layer 22 except for the opening. In Fig. 1, an end of the dielectric film 23 is also provided on the surface of the insulating film 21 from the end of the first electrode layer 22 to the end of the substrate 10. The end of the dielectric film 23 does not have to be provided to the end of the substrate 10.

[0028] The dielectric film 23 is made of silicon oxide. Specifically, the ratio of three-membered ring structures to four-membered ring structures of the silicon oxide contained in the dielectric film 23 is 0.46 or less.

[0029] The thickness of the dielectric film 23 is not particularly limited, but is adjusted according to the desired capacitance value. For example, when used at a capacitance of 3 pF or less, the thickness of the dielectric film 23 is preferably 0.2 μm or more, and more preferably 0.22 μm or more. On the other hand, the thickness of the dielectric film 23 is preferably 5 μm or less, and more preferably 4 μm or less.

[0030] The second electrode layer 24 is provided opposite the first electrode layer 22 with the dielectric film 23 interposed therebetween.

[0031] The material constituting the second electrode layer 24 is not particularly limited, but is preferably Cu, Ag, Au, Al, Ni, Cr or Ti, or an alloy containing at least one of these metals.

[0032] The moisture-resistant film 25 is provided so as to cover the dielectric film 23 and the second electrode layer 24 except for the opening. The provision of the moisture-resistant film 25 enhances the moisture resistance of the capacitor element, particularly the dielectric film 23. The moisture-resistant film 25 does not necessarily have to be provided.

[0033] The material constituting the moisture-resistant film 25 is not particularly limited, but preferably includes moisture-resistant materials such as SiO2 and SiN. Among them, by using SiO2, which has a dielectric constant about half that of SiN, as the material of the moisture-resistant film 25, the electric field leaking to the moisture-resistant film 25 or the protective layer 26 located outside the region where the end of the second electrode layer 24 and the first electrode layer 22 facing each other across the dielectric film 23 are overlapped can be reduced to about half that in the case of SiN. Therefore, it is possible to suppress the electric field leaking to materials with large dielectric loss such as the protective layer 26 located outside the moisture-resistant film 25, and therefore it is possible to suppress a decrease in the Q value of the capacitor 1.

[0034] The protective layer 26 has openings at positions overlapping the openings of the dielectric film 23 and the moisture-resistant film 25 (openings overlapping the first electrode layer 22) and at a position overlapping the opening of the moisture-resistant film 25 (openings overlapping the second electrode layer 24). By providing the protective layer 26, the capacitor element, in particular the dielectric film 23, is protected from moisture.

[0035] The material constituting the protective layer 26 is not particularly limited, but preferable examples include resin materials such as polyimide resin and resin in solder resist.

[0036] The material constituting the external electrode 27 is not particularly limited, but preferably includes Cu, Ni, Ag, Au, Al, etc. The external electrode 27 may have a single-layer structure or a multi-layer structure. The outermost surface of the external electrode 27 is preferably made of Au or Sn.

[0037] When the first external electrode 27A has a multi-layer structure, the first external electrode 27A may have, in order from the substrate 10 side, a seed layer 28a, a first plating layer 28b, and a second plating layer 28c, as shown in FIG.

[0038] The seed layer 28a of the first external electrode 27A may be, for example, a laminate (Ti / Cu) of a conductive layer made of titanium (Ti) and a conductive layer made of copper (Cu).

[0039] An example of a material for the first plating layer 28b of the first external electrode 27A is nickel (Ni).

[0040] Examples of materials for the second plating layer 28c of the first external electrode 27A include gold (Au) and tin (Sn).

[0041] When the second external electrode 27B has a multi-layer structure, the second external electrode 27B may have, in order from the substrate 10 side, a seed layer 28a, a first plating layer 28b, and a second plating layer 28c, as shown in FIG.

[0042] The seed layer 28a of the second external electrode 27B may be, for example, a laminate (Ti / Cu) of a conductive layer made of titanium (Ti) and a conductive layer made of copper (Cu).

[0043] An example of a material for the first plating layer 28b of the second external electrode 27B is nickel (Ni).

[0044] Examples of materials for the second plating layer 28c of the second external electrode 27B include gold (Au) and tin (Sn).

[0045] The constituent materials of the first external electrode 27A and the second external electrode 27B may be the same as or different from each other.

[0046] 1 and 2, a first resin body 31 may be provided between the first external electrode 27A and the second external electrode 27B in a plan view from the thickness direction T. The first resin body 31 is provided on the surface of the protective layer 26, for example.

[0047] As shown in FIG. 1, the tip of the first resin body 31 is preferably located higher than the tips of the first external electrode 27A and the second external electrode 27B in the thickness direction T. In this case, when the capacitor 1 is mounted on the wiring board, the first resin body 31 comes into contact with the wiring board (e.g., the upper surface, land, solder, etc. of the wiring board) before the first external electrode 27A and the second external electrode 27B. Therefore, a load is applied to the first resin body 31, and the load applied to the first external electrode 27A and the second external electrode 27B is suppressed. As a result, the load is prevented from being transmitted to the capacitor element via the first external electrode 27A and the second external electrode 27B, and therefore damage to the capacitor element, particularly damage to the dielectric film 23, is suppressed.

[0048] The first resin body 31 preferably contains at least one resin selected from the group consisting of a resin in a solder resist, a polyimide resin, a polyimide amide resin, and an epoxy resin. The first resin body 31 is preferably a cured product of a photosensitive resin.

[0049] The first resin body 31 may include a first wall portion 31a provided on the first external electrode 27A side and a second wall portion 31b provided on the second external electrode 27B side and separated from the first wall portion 31a. In a plan view as shown in Fig. 2, the first wall portion 31a and the second wall portion 31b are preferably provided in parallel.

[0050] The first wall 31a may have an opening communicating with a space separating the first wall 31a and the second wall 31b. Similarly, the second wall 31b may have an opening communicating with a space separating the first wall 31a and the second wall 31b.

[0051] 1 and 2, a second resin body 32 may be provided between an end of the substrate 10 and the first external electrode 27A, and between an end of the substrate 10 and the second external electrode 27B, in a plan view from the thickness direction T. The second resin body 32 is provided, for example, on the surface of the protective layer 26. The second resin body 32 may also be provided outside the protective layer 26, in which case it may be provided on the substrate 10.

[0052] 1, it is preferable that the tip of the second resin body 32 is located higher than the tips of the first external electrode 27A and the second external electrode 27B in the thickness direction T. In this case, for example, when mounting the capacitor 1 on a wiring board, the load can be distributed more widely by the second resin body 32, so that the load applied to the capacitor element, in particular, the dielectric film 23, is sufficiently suppressed.

[0053] 1, the tip of the second resin body 32 is preferably located lower than the tip of the first resin body 31 in the thickness direction T. In this case, for example, when the capacitor 1 is mounted on a wiring board, the capacitor 1 can be stably held on the wiring board by the first resin body 31.

[0054] The second resin body 32 preferably contains at least one resin selected from the group consisting of a resin in a solder resist, a polyimide resin, a polyimide amide resin, and an epoxy resin. The second resin body 32 is preferably a cured product of a photosensitive resin.

[0055] The resin contained in the first resin body 31 and the resin contained in the second resin body 32 may be the same as or different from each other.

[0056] As shown in Figure 2, the second resin body 32 preferably has a first outer peripheral portion 32a provided along the end of the substrate 10 between the end of the substrate 10 and the first external electrode 27A when viewed in a plane from the thickness direction T, and a second outer peripheral portion 32b provided along the end of the substrate 10 between the end of the substrate 10 and the second external electrode 27B.

[0057] The first wall portion 31a and the first outer peripheral portion 32a are preferably connected to each other, and the second wall portion 31b and the second outer peripheral portion 32b are preferably connected to each other.

[0058] The semiconductor device of the present invention is characterized in that the dielectric film is made of silicon oxide, and the ratio of three-membered ring structures to four-membered ring structures of the silicon oxide contained in the dielectric film (hereinafter also referred to as the three-membered ring / four-membered ring ratio) is 0.46 or less.

[0059] FIG. 3 is a schematic diagram showing an example of a silicon oxide structure.

[0060] The silicon oxide contained in the dielectric film has an amorphous structure. An amorphous structure is a disordered structure with no periodicity. As shown in Figure 3, in large regions, it has a ring structure with no periodicity, but in small regions, it is formed in a state where periodic ring structures called three-membered rings, four-membered rings, and multi-membered rings are mixed.

[0061] FIG. 4 shows an example of a Raman spectrum of silicon oxide.

[0062] The proportion of the membered ring structure of silicon oxide contained in the dielectric film can be obtained by measuring a Raman spectrum, separating the waveform, and looking at the peaks due to each membered ring structure, as shown in FIG.

[0063] Specifically, by measuring silicon oxide using a laser micro-Raman spectroscopy (laser wavelength 532 nm), -1 Nearby and 608cm -1These peaks are assigned to four-membered ring structures and three-membered ring structures, respectively, and the ratio of three-membered rings / four-membered rings can be calculated from the ratio of peak intensities.

[0064] In the silicon oxide contained in the dielectric film, when the ratio of three-membered ring structures is high, the dielectric loss of the dielectric film in the high frequency range of 1 to 10 GHz is high, whereas when the ratio of four-membered ring structures is high, the dielectric loss of the dielectric film is low.

[0065] FIG. 5 is a graph showing the relationship between the ratio of three-membered rings / four-membered rings of silicon oxide contained in a dielectric film and the Q value of a capacitor having a capacitance of 0.2 pF.

[0066] The ratio of three-membered rings to four-membered rings during film formation at room temperature using a facing RF sputtering device with a SiO2 target was 0.56. The relative values ​​normalized with the Q value at this time set to 1 are shown in Figure 5.

[0067] As shown in Figure 5, it can be seen that the Q value improves when the ratio of 3-membered rings / 4-membered rings of the silicon oxide contained in the dielectric film is 0.46 or less, and the Q value improves significantly when it is less than 0.44. Furthermore, the Q value is almost maximized when the ratio of 3-membered rings / 4-membered rings of the silicon oxide contained in the dielectric film is 0.41 or less.

[0068] For these reasons, the ratio of three-membered ring structures to four-membered ring structures in the silicon oxide contained in the dielectric film is preferably less than 0.44, and more preferably 0.41 or less.

[0069] The lower limit of the ratio of the three-membered ring structure to the four-membered ring structure of the silicon oxide contained in the dielectric film is not particularly limited, but is, for example, 0.30 or more.

[0070] When the semiconductor device of the present invention includes a moisture-resistant film, the moisture-resistant film is preferably made of silicon oxide, and the ratio of three-membered ring structures to four-membered ring structures of the silicon oxide contained in the moisture-resistant film is preferably 0.46 or less.

[0071] By forming the moisture-resistant film from silicon oxide, which has a small dielectric loss like the dielectric film, it is possible to further suppress the decrease in the Q value caused by the electric field leaking into the moisture-resistant film or the like.

[0072] The ratio of three-membered ring structures to four-membered ring structures in the silicon oxide contained in the moisture-resistant film is preferably less than 0.44, and more preferably 0.41 or less.

[0073] The lower limit of the ratio of the three-membered ring structure to the four-membered ring structure of the silicon oxide contained in the moisture-resistant film is not particularly limited, but is, for example, 0.30 or more.

[0074] 1 is manufactured, for example, by the following method: Figures 6A to 6K are schematic cross-sectional views illustrating an example of a method for manufacturing the capacitor according to the first embodiment of the present invention.

[0075] <Formation of insulating film> FIG. 6A is a schematic cross-sectional view illustrating an example of a step of forming an insulating film.

[0076] As shown in FIG. 6A, an insulating film 21 is formed on the substrate 10 by, for example, thermal oxidation, sputtering, or chemical vapor deposition.

[0077] <Formation of the first electrode layer> FIG. 6B is a schematic cross-sectional view for explaining an example of a step of forming the first electrode layer.

[0078] A conductive layer made of the constituent material of the first electrode layer 22 is formed on the surface of the insulating film 21 opposite the substrate 10, for example, by a sputtering method. The conductive layer is then patterned by a combination of photolithography and etching to form the first electrode layer 22 as shown in Fig. 6B. More specifically, the first electrode layer 22 is formed up to a position away from the end of the substrate 10.

[0079] <Formation of dielectric film> FIG. 6C is a schematic cross-sectional view for explaining an example of a step of forming a dielectric film.

[0080] A layer made of the constituent material of the dielectric film 23 is formed so as to cover the first electrode layer 22, for example, by sputtering or chemical vapor deposition. In order to reduce the ratio of 3-membered rings / 4-membered rings in the silicon oxide contained in the dielectric film 23, it is effective to reduce the partial pressure of hydrogen elements in the gas during film formation. Since a gas containing hydrogen is used in the chemical vapor deposition method, a silicon oxide containing less hydrogen elements can be formed by a sputtering method that does not use a gas containing hydrogen elements. In both the sputtering method and the chemical vapor deposition method, the moisture taken into the film can be reduced by lowering the pressure in the film formation chamber before film formation (just before introducing gas) as much as possible, or by reducing degassing from inside the device caused by the temperature rise due to film formation. If necessary, degassing of the inside of the film may be performed by performing a heat treatment at 300° C. or more and 650° C. or less after the film formation. Thereafter, the layer is patterned by, for example, a combination of photolithography and etching, to form the dielectric film 23 as shown in FIG. 6C. More specifically, the dielectric film 23 is formed so as to have an opening that exposes a portion of the first electrode layer 22 .

[0081] <Formation of the second electrode layer> FIG. 6D is a schematic cross-sectional view for explaining an example of a step of forming a second electrode layer.

[0082] A conductive layer made of the constituent material of the second electrode layer 24 is formed, for example, by sputtering, on the surface of the structure shown in Fig. 6C opposite the substrate 10. The conductive layer is then patterned, for example, by a combination of photolithography and etching, to form the second electrode layer 24 as shown in Fig. 6D. More specifically, the second electrode layer 24 is formed so as to face the first electrode layer 22 with the dielectric film 23 interposed therebetween.

[0083] <Formation of moisture-resistant film> FIG. 6E is a schematic cross-sectional view illustrating an example of a step of forming a moisture-resistant film.

[0084] A layer made of a constituent material of the moisture-resistant film 25 is formed on the surface of the structure shown in FIG. 6D opposite to the substrate 10, for example, by chemical vapor deposition. To reduce the ratio of three-membered rings / four-membered rings of silicon oxide contained in the moisture-resistant film 25, a sputtering method may be used as in the dielectric film 23. Then, this layer is patterned, for example, by a combination of photolithography and etching, to form the moisture-resistant film 25 as shown in FIG. 6E. More specifically, the moisture-resistant film 25 is formed so that openings are provided at positions overlapping the openings of the dielectric film 23 for exposing a part of the first electrode layer 22 and at positions for exposing a part of the second electrode layer 24.

[0085] <Formation of protective layer> FIG. 6F is a schematic cross-sectional view for explaining an example of a step of forming a protective layer.

[0086] A layer made of the material of the protective layer 26 is formed on the surface of the structure shown in FIG. 6E opposite to the substrate 10, for example, by spin coating. Thereafter, the layer is patterned, for example, by photolithography alone if the material of the protective layer 26 is photosensitive, or by a combination of photolithography and etching if the material of the protective layer 26 is non-photosensitive, to form the protective layer 26 as shown in FIG. 6F. More specifically, the protective layer 26 is formed so that openings are provided at positions overlapping the openings of the dielectric film 23 and the moisture-resistant film 25 for exposing a part of the first electrode layer 22 and at positions overlapping the openings of the moisture-resistant film 25 for exposing a part of the second electrode layer 24.

[0087] <Formation of external electrodes> Fig. 6G is a schematic cross-sectional view for explaining an example of a step of forming a seed layer, Fig. 6H is a schematic cross-sectional view for explaining an example of a step of forming a first plating layer and a second plating layer, and Fig. 6I is a schematic cross-sectional view for explaining an example of a step of removing a part of the seed layer.

[0088] As shown in FIG. 6G, a seed layer 28a is formed on the surface opposite to the substrate 10 of the structure shown in FIG. 6F. Then, a first plating layer 28b and a second plating layer 28c are sequentially formed as shown in FIG. 6H by combining plating and photolithography. After that, as shown in FIG. 6I, a part of the seed layer 28a is removed by, for example, an etching method. As a result, a first external electrode 27A and a second external electrode 27B are formed as the external electrodes 27 as shown in FIG. 6I. More specifically, the first external electrode 27A is formed so as to be connected to the first electrode layer 22 through openings provided in the dielectric film 23, the moisture-resistant film 25, and the protective layer 26, respectively. In addition, the second external electrode 27B is formed so as to be connected to the second electrode layer 24 through openings provided in the moisture-resistant film 25 and the protective layer 26, respectively.

[0089] <Formation of First Resin Body and Second Resin Body> Fig. 6J is a schematic cross-sectional view for explaining an example of a step of forming a photosensitive resin film, and Fig. 6K is a schematic cross-sectional view for explaining an example of a step of forming a first resin body and a second resin body.

[0090] As shown in Fig. 6J, a photosensitive resin film 35 is formed so as to cover the protective layer 26 and the external electrodes 27. Then, the photosensitive resin film 35 is patterned by photolithography to form a first resin body 31 and a second resin body 32 as shown in Fig. 6K.

[0091] In this manner, the capacitor 1 shown in FIG. 1 is manufactured.

[0092] The above describes the case of manufacturing one capacitor element, but multiple capacitor elements may be manufactured simultaneously by forming multiple capacitor elements on the same substrate 10 and then cutting the substrate 10 into individual pieces by dicing or the like.

[0093] [Second embodiment] The capacitor according to the second embodiment of the present invention further includes a third electrode layer provided on the dielectric film and spaced apart from the second electrode layer, and the external electrodes include a first external electrode connected to the third electrode layer and a second external electrode connected to the second electrode layer.

[0094] FIG. 7 is a cross-sectional view illustrating an example of a capacitor according to a second embodiment of the present invention.

[0095] 7 includes a substrate 10, an insulating film 21 provided on the substrate 10, a first electrode layer 22 provided on the insulating film 21, a dielectric film 23 provided on the first electrode layer 22, a second electrode layer 24 provided on the dielectric film 23, a third electrode layer 29 provided on the dielectric film 23 and spaced apart from the second electrode layer 24, a moisture-resistant film 25 provided on the dielectric film 23, the second electrode layer 24, and the third electrode layer 29, a protective layer 26 provided on the moisture-resistant film 25, and an external electrode 27 penetrating the protective layer 26. The external electrode 27 includes a second external electrode 27B connected to the second electrode layer 24 and a first external electrode 27A connected to the third electrode layer 29. The first external electrode 27A penetrates the protective layer 26 and the moisture-resistant film 25, and the second external electrode 27B penetrates the protective layer 26 and the moisture-resistant film 25.

[0096] In the configuration of capacitor 1 shown in FIG. 1, a capacitor is formed on the left side, whereas in the configuration of capacitor 2 shown in FIG. 7, capacitors are formed on the left and right sides. In the configuration shown in FIG. 7, the portion where first external electrode 27A is connected to first electrode layer 22 in the configuration shown in FIG. 1 is simply replaced with a configuration in which first electrode layer 22, dielectric film 23, and third electrode layer 29 are provided in this order. Therefore, the configuration shown in FIG. 7 does not require additional element formation space compared to the configuration shown in FIG. 1. Therefore, a capacitor with a low capacitance can be fabricated while maintaining the same element area. Such a structure is effective when it is impossible to form a dielectric film with a certain thickness or more.

[0097] [Other embodiments] The semiconductor device of the present invention is not limited to the above-described embodiment, and various applications and modifications can be made within the scope of the present invention with respect to the configuration and manufacturing conditions of the semiconductor device such as a capacitor.

[0098] The semiconductor device of the present invention has a high Q characteristic and is therefore suitable for use as a capacitor in a matching circuit or a filter circuit. A matching circuit or a filter circuit including the semiconductor device of the present invention also constitutes the present invention.

[0099] FIG. 8 is an explanatory diagram illustrating an example of a matching circuit.

[0100] For example, the power consumption of the entire circuit can be reduced by using the semiconductor device of the present invention for the capacitor C of the matching circuit shown in Fig. 8. For example, when the power consumption is 100% when the ratio of the three-membered ring structure to the four-membered ring structure of the silicon oxide contained in the dielectric film is 0.56, the power consumption is reduced to 91% when the ratio of the three-membered ring structure to the four-membered ring structure of the silicon oxide contained in the dielectric film is 0.41.

[0101] FIG. 9 is an explanatory diagram illustrating an example of a filter circuit.

[0102] For example, the power consumption of the entire circuit can be reduced by using the semiconductor device of the present invention for the capacitor C1 of the filter circuit shown in Fig. 9. For example, when the power consumption is 100% when the ratio of the three-membered ring structure to the four-membered ring structure of the silicon oxide contained in the dielectric film is 0.56, the power consumption is reduced to 96% when the ratio of the three-membered ring structure to the four-membered ring structure of the silicon oxide contained in the dielectric film is 0.41. [Explanation of symbols]

[0103] 1, 2 Capacitor (semiconductor device) 10 Substrate 21 Insulating film 22 1st electrode layer 23 Dielectric Film 24 Second electrode layer 25 Moisture-resistant film 26 Protective layer 27 External electrode 27A 1st external electrode 27B 2nd external electrode 28a Seed layer 28b First plating layer 28c Second plating layer 29 Third electrode layer 31 First resin body 31a 1st wall 31b 2nd wall part 32 Second resin body 32a 1st outer periphery 32b 2nd outer periphery 35 Photosensitive resin film

Claims

1. A substrate; A first electrode layer provided on the substrate; a dielectric film provided on the first electrode layer; a second electrode layer provided on the dielectric film; a protective layer covering the first electrode layer and the second electrode layer; an external electrode penetrating the protective layer; Equipped with the dielectric film is made of silicon oxide, a ratio of three-membered ring structures to four-membered ring structures of the silicon oxide contained in the dielectric film is 0.46 or less.

2. 2. The semiconductor device according to claim 1, wherein a ratio of three-membered ring structures to four-membered ring structures of said silicon oxide contained in said dielectric film is less than 0.

44.

3. 2. The semiconductor device according to claim 1, wherein a ratio of three-membered ring structures to four-membered ring structures of said silicon oxide contained in said dielectric film is 0.41 or less.

4. a moisture-resistant film provided on the dielectric film and the second electrode layer, The semiconductor device according to claim 1 , wherein the protective layer is provided on the moisture-resistant film.

5. the moisture-resistant film is made of silicon oxide, 5. The semiconductor device according to claim 4, wherein a ratio of three-membered ring structures to four-membered ring structures of said silicon oxide contained in said moisture-resistant film is 0.46 or less.

6. 6. The semiconductor device according to claim 5, wherein a ratio of three-membered ring structures to four-membered ring structures of said silicon oxide contained in said moisture-resistant film is less than 0.

44.

7. 6. The semiconductor device according to claim 5, wherein a ratio of three-membered ring structures to four-membered ring structures of said silicon oxide contained in said moisture-resistant film is 0.41 or less.

8. 8. The semiconductor device according to claim 1, wherein the external electrodes include a first external electrode connected to the first electrode layer and a second external electrode connected to the second electrode layer.

9. a third electrode layer provided on the dielectric film and spaced apart from the second electrode layer; 8. The semiconductor device according to claim 1, wherein the external electrodes include a first external electrode connected to the third electrode layer and a second external electrode connected to the second electrode layer.

10. A matching circuit comprising the semiconductor device according to any one of claims 1 to 7.

11. A filter circuit comprising the semiconductor device according to any one of claims 1 to 7.

Citation Information

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