Semiconductor device and method for manufacturing the same

JP7651559B2Active Publication Date: 2025-03-26KANEKA CORP
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Patent Information

Application Number
JP2022514066
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-04-06
Filing Date
2021-04-05
Publication Date
2025-03-26
Estimated Expiration
2041-04-05

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Benefits of technology

【0009】 本発明によれば、スクリーン印刷法を用いて形成したマスクを用いてパターニングを行っても、パターン化された半導体層または電極層に空隙(かすれ)が形成されることを低減することができる。

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Abstract

Provided is a semiconductor element capable of reducing the formation of voids (blurring) in a patterned semiconductor layer or electrode layer even when patterning is performed using a mask formed using a screen printing method. In the semiconductor element, a patterned semiconductor layer 25 or an electrode layer 28 is formed on a substrate. The semiconductor layer 25 or the electrode layer 28 has an elongated shape, and includes a strip-shaped first pattern 25A or 28A extending in the longitudinal direction (Y direction) and a strip-shaped second pattern 25B or 28B intersecting in the longitudinal direction, in which the angle on the acute angle side, among the angles formed by 90% of the second pattern 25B or 28B with respect to the first pattern 25A or 28A, is less than 90 degrees.
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Description

[Technical field]

[0001] The present invention relates to a semiconductor device and a method for manufacturing a semiconductor device. [Background technology]

[0002] There is a semiconductor element in which a patterned semiconductor layer or electrode layer is formed on a substrate. Patent Document 1 describes a technique for forming a patterned electrode layer by a screen printing method. Screen printing is a method in which a printing material filled in the pattern openings of a printing plate is transferred to a substrate by moving a squeegee. A mesh is formed in the pattern openings of the printing plate by lattice-shaped wires.

[0003] Furthermore, as a method for patterning a semiconductor layer or an electrode layer, there is also a wet etching method using a mask such as a patterned resist, etc. The mask such as a patterned resist may also be formed by a screen printing method. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2014-57031 A [Patent Document 2] International Publication No. 2011 / 149067 Summary of the Invention [Problem to be solved by the invention]

[0005] In the mask formation method using the screen printing method, voids (faint spots) may be formed in the resist pattern that extends intersecting the printing direction (squeegee movement direction), which results in voids (faint spots) being formed in the semiconductor layer or electrode layer pattern.

[0006] The present invention aims to provide a semiconductor element and a method for manufacturing a semiconductor element, which can reduce the formation of voids (smudges) in a patterned semiconductor layer or electrode layer, even when patterning is performed using a mask formed by screen printing. [Means for solving the problem]

[0007] The semiconductor element of the present invention is a semiconductor element having a patterned semiconductor layer or electrode layer formed on a substrate, the semiconductor layer or the electrode layer having an elongated shape and including a band-shaped first pattern extending in the longitudinal direction and a band-shaped second pattern intersecting the longitudinal direction, and the acute angle of the angle that 90% of the second pattern makes with the first pattern is less than 90 degrees.

[0008] The method for manufacturing a semiconductor element according to the present invention is a method for manufacturing a semiconductor element in which a patterned semiconductor layer or electrode layer is formed on a substrate, and includes a semiconductor layer material film or electrode layer material film formation step of forming a semiconductor layer material film or an electrode layer material film on the substrate, a mask formation step of forming a patterned mask on the semiconductor layer material film or the electrode layer material film by using a screen printing method, and a semiconductor layer or electrode layer formation step of forming the patterned semiconductor layer or electrode layer by removing a portion of the semiconductor layer material film or the electrode layer material film by using a wet etching method using the mask, wherein the acute angle of the angle that the printing direction makes with respect to the lattice-like wires that form the mesh in the pattern openings of the printing plate is 20 degrees or more and 40 degrees or less. Effect of the Invention

[0009] According to the present invention, even when patterning is performed using a mask formed by screen printing, it is possible to reduce the formation of voids (faint spots) in a patterned semiconductor layer or electrode layer. [Brief description of the drawings]

[0010] [Figure 1] FIG. 2 is a diagram showing the solar cell according to the embodiment as viewed from the back surface side. [Diagram 2] 2 is a cross-sectional view of the solar cell shown in FIG. 1 taken along line II-II. [Figure 3A] 3A to 3C are diagrams illustrating a first semiconductor layer material film formation step in the method for manufacturing a solar cell according to the present embodiment. [Figure 3B] 5A to 5C are diagrams illustrating a mask formation step in the method for manufacturing a solar cell according to the present embodiment. [Figure 3C] 5A to 5C are diagrams illustrating a first semiconductor layer forming step in the method for manufacturing a solar cell according to the embodiment. [Figure 3D] 5A to 5C are diagrams illustrating a first semiconductor layer forming step in the method for manufacturing a solar cell according to the embodiment. [Figure 3E] 4A to 4C are diagrams illustrating a second semiconductor layer material film forming step in the method for manufacturing a solar cell according to the embodiment. [Figure 3F] 5 is a diagram showing a second semiconductor layer forming step (a mask forming step is omitted) in the method for manufacturing a solar cell according to the present embodiment. FIG. [Figure 3G] 3A to 3C are diagrams illustrating a transparent electrode layer material film forming step in the manufacturing method for the solar cell according to the present embodiment. [Figure 3H] 4 is a diagram showing a transparent electrode layer forming step (a mask forming step is omitted) in the solar cell manufacturing method according to the present embodiment. FIG. [Figure 3I] 3A to 3C are diagrams illustrating a metal electrode layer forming step in the manufacturing method for the solar cell according to the embodiment. [Figure 4] 1A to 1C are diagrams for explaining problems in forming a mask using a screen printing method. [Diagram 5] FIG. 1 is a diagram for explaining a screen printing method. [Figure 6A] 1A to 1C are diagrams for explaining problems in forming a mask using a screen printing method. [Figure 6B] 1A to 1C are diagrams for explaining problems in forming a mask using a screen printing method. [Figure 7A]FIG. 2 is a diagram for explaining an example of a pattern shape of a semiconductor layer or an electrode layer according to the first embodiment. [Figure 7B] FIG. 2 is a diagram for explaining an example of a pattern shape of a semiconductor layer or an electrode layer according to the first embodiment. [Figure 7C] FIG. 2 is a diagram for explaining an example of a pattern shape of a semiconductor layer or an electrode layer according to the first embodiment. [Figure 7D] FIG. 2 is a diagram for explaining an example of a pattern shape of a semiconductor layer or an electrode layer according to the first embodiment. [Figure 8] FIG. 11 is a diagram for explaining a screen printing method according to a second embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings. In each drawing, the same or corresponding parts are denoted by the same reference numerals. For convenience, hatching and reference numerals may be omitted, in which case other drawings shall be referred to.

[0012] (First embodiment) Fig. 1 is a view of the solar cell according to this embodiment as viewed from the back surface side. The solar cell (semiconductor element) 1 shown in Fig. 1 is a back surface electrode type (also called a back contact type or back junction type) solar cell. The solar cell 1 includes a semiconductor substrate 11 having two main surfaces, and the main surface of the semiconductor substrate 11 has a first region 7 and a second region 8.

[0013] The first region 7 has a so-called comb shape and includes a plurality of finger portions 7f corresponding to the teeth of the comb and busbar portions 7b corresponding to supports for the teeth of the comb. The busbar portions 7b extend in a first direction (X direction) along one side of the semiconductor substrate 11, and the finger portions 7f extend from the busbar portions 7b in a second direction (Y direction) intersecting the first direction.

[0014] Similarly, the second region 8 has a so-called comb shape and has a plurality of finger portions 8f corresponding to the teeth of the comb and busbar portions 8b corresponding to supports for the teeth of the comb. The busbar portions 8b extend in a first direction (X direction) along one side portion of the semiconductor substrate 11 that faces the other side portion, and the finger portions 8f extend in a second direction (Y direction) from the busbar portions 8b.

[0015] The finger portions 7f and 8f are strip-shaped extending in the second direction (Y direction) and are alternately provided in the first direction (X direction). The first region 7 and the second region 8 may be formed in a stripe pattern.

[0016] Fig. 2 is a cross-sectional view of the solar cell in Fig. 1 taken along line II-II. As shown in Fig. 2, the solar cell 1 includes an optical adjustment layer 15 laminated on the light-receiving surface side, which is the light-receiving principal surface (one principal surface) of the principal surfaces of the semiconductor substrate 11. The solar cell 1 also includes a first-conductivity-type semiconductor layer 25 and a first electrode layer 27 laminated in order on a portion (mainly, the first region 7) of the back surface side, which is the principal surface (other principal surface) of the principal surfaces of the semiconductor substrate 11 opposite the light-receiving surface. The solar cell 1 also includes a second-conductivity-type semiconductor layer 35 and a second electrode layer 37 laminated in order on another portion (mainly, the second region 8) of the back surface side of the semiconductor substrate 11.

[0017] The semiconductor substrate 11 is formed of a crystalline silicon material such as single crystal silicon or polycrystalline silicon. The semiconductor substrate 11 is, for example, an n-type semiconductor substrate in which a crystalline silicon material is doped with an n-type dopant. The semiconductor substrate 11 may be, for example, a p-type semiconductor substrate in which a crystalline silicon material is doped with a p-type dopant. An example of the n-type dopant is phosphorus (P). An example of the p-type dopant is boron (B). The semiconductor substrate 11 functions as a photoelectric conversion substrate that absorbs incident light from the light-receiving surface side and generates photocarriers (electrons and holes).

[0018] The optical adjustment layer 15 is formed on the light-receiving surface side of the semiconductor substrate 11. The optical adjustment layer 15 functions as an anti-reflection layer that prevents reflection of incident light, and also functions as a protective layer that protects the light-receiving surface side of the semiconductor substrate 11. The optical adjustment layer 15 is formed of an insulating material, for example, silicon oxide (SiO), silicon nitride (SiN), or a composite thereof such as silicon oxynitride (SiON).

[0019] The first conductive type semiconductor layer 25 is formed in the first region 7 on the back surface side of the semiconductor substrate 11. The first conductive type semiconductor layer 25 is formed of, for example, an amorphous silicon material. The first conductive type semiconductor layer 25 is, for example, a p-type semiconductor layer in which an amorphous silicon material is doped with a p-type dopant (for example, the above-mentioned boron (B)).

[0020] The second conductive type semiconductor layer 35 is formed in the second region 8 on the back surface side of the semiconductor substrate 11. The second conductive type semiconductor layer 35 is formed of, for example, an amorphous silicon material. The second conductive type semiconductor layer 35 is, for example, an n-type semiconductor layer in which an amorphous silicon material is doped with an n-type dopant (for example, the above-mentioned phosphorus (P)). Alternatively, the first conductive type semiconductor layer 25 may be an n-type semiconductor layer, and the second conductive type semiconductor layer 35 may be a p-type semiconductor layer.

[0021] The first conductive type semiconductor layer 25 and the second conductive type semiconductor layer 35 are strip-shaped extending in the second direction (Y direction) and are arranged alternately in the first direction (X direction). A part of the second conductive type semiconductor layer 35 may overlap a part of the adjacent first conductive type semiconductor layer 25 (not shown).

[0022] A passivation layer may be formed between the semiconductor substrate 11 and the optical adjustment layer 15. In addition, a passivation layer may be formed between the semiconductor substrate 11 and the first conductive type semiconductor layer 25, and between the semiconductor substrate 11 and the second conductive type semiconductor layer 35. The passivation layer is made of, for example, an intrinsic (i-type) amorphous silicon material. The passivation layer suppresses recombination of carriers generated in the semiconductor substrate 11, and increases the carrier collection efficiency.

[0023] The first electrode layer 27 corresponds to the first conductive type semiconductor layer 25, specifically, is formed on the first conductive type semiconductor layer 25 in a first region 7 on the back surface side of the semiconductor substrate 11. The second electrode layer 37 corresponds to the second conductive type semiconductor layer 35, specifically, is formed on the second conductive type semiconductor layer 35 in a second region 8 on the back surface side of the semiconductor substrate 11. The first electrode layer 27 has a first transparent electrode layer 28 and a first metal electrode layer 29 stacked in this order on the first conductive type semiconductor layer 25. The second electrode layer 37 has a second transparent electrode layer 38 and a second metal electrode layer 39 stacked in this order on the second conductive type semiconductor layer 35.

[0024] The first transparent electrode layer 28 and the second transparent electrode layer 38 are made of a transparent conductive material, such as ITO (Indium Tin Oxide: a composite oxide of indium oxide and tin oxide).

[0025] The first metal electrode layer 29 and the second metal electrode layer 39 are formed from a conductive paste material containing a metal powder such as silver.

[0026] The first electrode layer 27 and the second electrode layer 37, i.e., the first transparent electrode layer 28, the second transparent electrode layer 38, the first metal electrode layer 29 and the second metal electrode layer 39, are in the form of strips extending in the second direction (Y direction) and are arranged alternately in the first direction (X direction). The first transparent electrode layer 28 and the second transparent electrode layer 38 are separated from each other, and the first metal electrode layer 29 and the second metal electrode layer 39 are also separated from each other.

[0027] (Solar Cell Manufacturing Method) Next, a method for manufacturing a solar cell according to the present embodiment will be described with reference to Figs. 3A to 3I. Fig. 3A is a diagram showing a first semiconductor layer material film forming step in the method for manufacturing a solar cell according to the present embodiment, Fig. 3B is a diagram showing a mask forming step in the method for manufacturing a solar cell according to the present embodiment, and Figs. 3C and 3D are diagrams showing a first semiconductor layer forming step in the method for manufacturing a solar cell according to the present embodiment. Fig. 3E is a diagram showing a second semiconductor layer material film forming step in the method for manufacturing a solar cell according to the present embodiment, and Fig. 3F is a diagram showing a second semiconductor layer forming step (mask forming step is omitted) in the method for manufacturing a solar cell according to the present embodiment. Fig. 3G is a diagram showing a transparent electrode layer material film forming step in the method for manufacturing a solar cell according to the present embodiment, and Fig. 3H is a diagram showing a transparent electrode layer forming step (mask forming step is omitted) in the method for manufacturing a solar cell according to the present embodiment. Fig. 3I is a diagram showing a metal electrode layer forming step in the method for manufacturing a solar cell according to the present embodiment. Figs. 3A to 3I show the back side of the semiconductor substrate 11, and the front side of the semiconductor substrate 11 is omitted.

[0028] First, as shown in FIG. 3A, a first conductive type semiconductor layer material film 25Z is laminated (deposited) on the entire back surface side of the semiconductor substrate 11 by using, for example, a CVD method or a PVD method (first semiconductor layer material film forming step).

[0029] Next, as shown in Figures 3B to 3D, on the back surface side of the semiconductor substrate 11, the first conductive type semiconductor layer material film 25Z in the second region 8 is removed to form a patterned first conductive type semiconductor layer 25 in the first region 7.

[0030] 3B, on the rear surface side of the semiconductor substrate 11, a patterned mask 90 is formed on the first conductive type semiconductor layer material film 25Z in the first region 7 by using a screen printing method (mask formation process). Examples of the material for the mask include a photosensitive or non-photosensitive organic resist material.

[0031] 3C, the first conductive type semiconductor layer material film 25Z (i.e., a part of the first conductive type semiconductor layer material film 25Z) in the second region 8 is removed by wet etching using a mask 90, thereby forming a patterned first conductive type semiconductor layer 25 in the first region 7 (first semiconductor layer formation step). Examples of the etching solution for the p-type semiconductor film include an acidic solution such as a mixture of ozone dissolved in hydrofluoric acid or a mixture of hydrofluoric acid and nitric acid, and examples of the etching solution for the n-type semiconductor film include an alkaline solution such as an aqueous solution of potassium hydroxide. Thereafter, the mask 90 is peeled off, as shown in FIG. 3D.

[0032] Next, as shown in FIG. 3E, a second conductive type semiconductor layer material film 35Z is laminated (deposited) on the entire back surface side of the semiconductor substrate 11 by, for example, CVD or PVD (second semiconductor layer material film forming step).

[0033] Next, as shown in FIG. 3F, on the rear surface side of the semiconductor substrate 11, the second conductive type semiconductor layer material film 35Z in the first region 7 is removed to form a patterned second conductive type semiconductor layer 35 in the second region 8.

[0034] For example, similarly to the above, on the rear surface side of the semiconductor substrate 11, a patterned mask 90 is formed on the second conductive type semiconductor layer material film 35Z in the second region 8 by using a screen printing method (mask formation step).

[0035] Thereafter, the second conductive type semiconductor layer material film 35Z (i.e., a portion of the second conductive type semiconductor layer material film 35Z) in the first region 7 is removed using a wet etching method using a mask 90, thereby forming a patterned second conductive type semiconductor layer 35 in the second region 8 (second semiconductor layer formation process). Thereafter, the mask 90 is peeled off.

[0036] In the above-mentioned first semiconductor layer material film forming step or second semiconductor layer material film forming step, an optical adjustment layer 15 may be formed on the entire light-receiving surface side of the semiconductor substrate 11 (not shown).

[0037] 3G, a transparent electrode layer material film 28Z is formed on and across the first conductive type semiconductor layer 25 and the second conductive type semiconductor layer 35 (transparent electrode layer material film forming process). The transparent electrode layer material film 28Z can be formed by, for example, a CVD method or a PVD method.

[0038] Next, as shown in FIG. 3H, the transparent electrode layer material film 28Z at the boundary between the first region 7 and the second region 8 on the back side of the semiconductor substrate 11 is removed to form a patterned first transparent electrode layer 28 in the first region 7, and a patterned second transparent electrode layer 38 in the second region 8.

[0039] For example, as described above, on the back surface side of the semiconductor substrate 11, a patterned mask 90 is formed on the transparent electrode layer material film 28Z in the first region 7 and on the transparent electrode layer material film 28Z in the second region 8 using a screen printing method (mask formation process).

[0040] Thereafter, the transparent electrode layer material film 28Z (i.e., a part of the transparent electrode layer material film 28Z) at the boundary between the first region 7 and the second region 8 is removed by wet etching using a mask 90, thereby forming a patterned first transparent electrode layer 28 in the first region 7 and a patterned second transparent electrode layer 38 in the second region 8 (transparent electrode layer forming step). An example of an etching solution for the transparent electrode layer material film is an acidic solution such as hydrochloric acid (HCl).

[0041] 3I, on the back surface side of the semiconductor substrate 11, a first metal electrode layer 29 is formed on the first transparent electrode layer 28, and a second metal electrode layer 39 is formed on the second transparent electrode layer 38 (metal electrode layer forming process). The first metal electrode layer 29 and the second metal electrode layer 39 are formed by a printing method, a coating method, or the like. Through the above steps, the back electrode type solar cell 1 of this embodiment is completed.

[0042] 4, the first conductive type semiconductor layer 25 and the first transparent electrode layer 28 may have an elongated pattern, and may have a first strip-shaped pattern 25A, 28A extending in the longitudinal direction (Y direction) and a second strip-shaped pattern 25B, 28B extending in the lateral direction (X direction) intersecting the longitudinal direction. In this case, in the mask formation step using the screen printing method, a mask 90 is formed that is patterned in an elongated shape and has a first strip-shaped pattern 90A extending in the longitudinal direction (Y direction) and a second strip-shaped pattern 90B extending in the lateral direction (X direction) intersecting the longitudinal direction.

[0043] 5, in the screen printing method, a printing material filled in pattern openings 81 of a printing plate is transferred to a substrate by moving a squeegee 83. A mesh is formed in the pattern openings 81 of the printing plate by lattice-like wires.

[0044] In general, in screen printing, the longitudinal direction of the elongated mask 90, i.e., the main belt-like first pattern 90A, is parallel to the printing direction (movement direction of the squeegee 83) D1, as shown in Fig. 4. Also, as shown in Fig. 5, it is preferable to tilt the printing direction (movement direction of the squeegee 83) by about 11 degrees with respect to the lattice-like wires that form the mesh in the pattern openings 81 of the printing plate.

[0045] In this case, as shown in Fig. 4, a void V1 (faint printing) may occur in a band-shaped second pattern 90B extending in the short direction (X direction) of the mask 90. ​​In particular, the void V1 (faint printing) occurs on the original side of the printing direction of the second pattern 90B. When a void (faint printing) occurs in the mask 90, a void also occurs in the first conductive type semiconductor layer 25 or the first transparent electrode layer 28 during patterning of the first conductive type semiconductor layer 25 or the first transparent electrode layer 28. The occurrence of a void (faint printing) in the mask 90 by the screen printing method is considered as follows.

[0046] As shown in Fig. 6A, in a band-shaped first pattern 90A extending in the longitudinal direction (Y direction) of the mask 90, the number of meshes in the printing direction in the pattern openings 81 of the printing plate is large, and the ejected printing material is sufficiently smoothed. On the other hand, as shown in Fig. 6B, in a band-shaped second pattern 90B extending in the lateral direction (X direction) of the mask 90, the number of meshes in the printing direction in the pattern openings 81 of the printing plate is small, and the ejected printing material is not sufficiently smoothed. This phenomenon becomes more pronounced the more the printing plate is used.

[0047] In regard to this point, the inventor of the present application devised a method of increasing the number of meshes in the printing direction of the pattern openings 81 of the printing plate in the band-shaped second pattern 90B extending in the short direction (X direction) of the mask 90. ​​Specifically, the band-shaped second pattern 90B intersecting the longitudinal direction (Y direction) of the mask 90 is formed so as not to be perpendicular to the printing direction (movement direction of the squeegee 83) D1.

[0048] Therefore, in this embodiment, the pattern of the first conductive type semiconductor layer 25 and the pattern of the first transparent electrode layer 28 are The pattern has an elongated shape and includes a first strip-shaped pattern 25A, 28A extending in the longitudinal direction (Y direction) and a second strip-shaped pattern 25B, 28B intersecting the longitudinal direction, The second patterns 25B, 28B form an angle (acute angle side) of less than 90 degrees, preferably 20 degrees or more and 40 degrees or less, with respect to the first patterns 25A, 28A.

[0049] This allows the band-like second patterns 90B intersecting the longitudinal direction (Y direction) of the mask 90 to be formed so as not to be perpendicular to the printing direction (movement direction of the squeegee 83), thereby reducing the occurrence of voids (faint printing) in the mask 90. ​​Therefore, even if patterning is performed using the mask 90 formed by screen printing, it is possible to reduce the occurrence of voids (faint printing) in the patterned first conductive type semiconductor layer 25 and first transparent electrode layer 28.

[0050] For example, as shown in FIG. 7A, the second patterns 25B, 28B in the pattern of the first conductive type semiconductor layer 25 and the pattern of the first transparent electrode layer 28 are arc-shaped convex in the longitudinal direction (Y direction). In this case, the tangent of the arc of the second patterns 25B, 28B gradually changes in a range greater than 0 degrees and smaller than 90 degrees with respect to the linear first patterns 25A, 28A. Note that the second patterns 25B, 28B are at 90 degrees with respect to the first patterns 25A, 28A at one point that is the tip of the convex of the second patterns 25B, 28B. In this regard, it is sufficient that 90% of the second patterns 25B, 28B, preferably 95% of the second patterns, and more preferably 98% of the second patterns 25B, 28B form an angle of less than 90 degrees (acute angle side) with respect to the first patterns 25A, 28A.

[0051] 7B, the second patterns 25B, 28B in the pattern of the first conductive type semiconductor layer 25 and the pattern of the first transparent electrode layer 28 have a pointed shape that is convex in the longitudinal direction (Y direction). In this case, the second patterns 25B, 28B form an angle (acute angle side) of less than 90 degrees with the first patterns 25A, 28A. Furthermore, it is preferable that the second patterns 25B, 28B form an angle (acute angle side) of 20 degrees or more and 40 degrees or less with the first patterns 25A, 28A.

[0052] 7C, the second patterns 25B, 28B in the pattern of the first conductive type semiconductor layer 25 and the pattern of the first transparent electrode layer 28 have an inverted pointed shape that is concave in the longitudinal direction (Y direction). In this case, the second patterns 25B, 28B form an angle (acute angle side) of less than 90 degrees with respect to the first patterns 25A, 28A. Furthermore, it is preferable that the second patterns 25B, 28B form an angle (acute angle side) of 20 degrees or more and 40 degrees or less with respect to the first patterns 25A, 28A.

[0053] Alternatively, as shown in FIG. 7D, the second patterns 25B, 28B in the pattern of the first conductive type semiconductor layer 25 and the pattern of the first transparent electrode layer 28 are corrugated in the longitudinal direction (Y direction). For example, in a sine wave, the inclination is maximum at the inflection point between the peak and the valley. As a result, the inclination of the waveform of the second patterns 25B, 28B gradually changes in a range greater than 0 degrees and smaller than 90 degrees with respect to the linear first patterns 25A, 28A. Note that in FIG. 7D, the second patterns 25B, 28B are at 90 degrees with respect to the first patterns 25A, 28A at one point that is the tip of the peak and the valley of the second patterns 25B, 28B. In this regard, it is sufficient that 90% of the second patterns 25B, 28B, preferably 95% of the second patterns, and more preferably 98% of the second patterns 25B, 28B form an angle of less than 90 degrees (acute angle side) with respect to the first patterns 25A, 28A.

[0054] Similarly, as shown in FIG. 4, the second conductive type semiconductor layer 35 and the second transparent electrode layer 38 may have elongated patterns, and may have strip-shaped first patterns 35A, 38A extending in the longitudinal direction (Y direction) and strip-shaped second patterns 35B, 38B extending in the lateral direction (X direction) intersecting the longitudinal direction.

[0055] In this case as well, voids V1 (faint printing) may occur in the band-shaped second patterns 90B extending in the short side direction (X direction) of the mask 90. ​​If voids V1 (faint printing) occur in the mask 90, voids will also occur in the second conductive type semiconductor layer 35 or the second transparent electrode layer 38 during patterning of the second conductive type semiconductor layer 35 or the second transparent electrode layer 38.

[0056] In this regard, the band-shaped second patterns 90B intersecting the longitudinal direction (Y direction) of the mask 90 are formed so as not to be perpendicular to the printing direction (the direction in which the squeegee 83 moves).

[0057] Therefore, in this embodiment, the pattern of the second conductive type semiconductor layer 35 and the pattern of the second transparent electrode layer 38 are The pattern has an elongated shape and includes first strip-shaped patterns 35A, 38A extending in the longitudinal direction (Y direction) and second strip-shaped patterns 35B, 38B intersecting the longitudinal direction, The second patterns 35B, 38B form an angle (acute angle side) of less than 90 degrees, preferably 20 degrees or more and 40 degrees or less, with respect to the first patterns 35A, 38A.

[0058] This allows the band-like second patterns 90B extending in the longitudinal direction (Y direction) of the mask 90 to be formed so as not to intersect at right angles with the printing direction (movement direction of the squeegee 83), thereby reducing the occurrence of voids (faint printing) in the mask 90. ​​Therefore, even if patterning is performed using the mask 90 formed by screen printing, it is possible to reduce the occurrence of voids (faint printing) in the patterned second conductive type semiconductor layer 35 and second transparent electrode layer 38.

[0059] For example, as shown in FIG. 7A, the second patterns 35B, 38B in the pattern of the second conductive type semiconductor layer 35 and the pattern of the second transparent electrode layer 38 are arc-shaped convex in the longitudinal direction (Y direction). In this case, the tangent of the arc of the second patterns 35B, 38B gradually changes in a range greater than 0 degrees and smaller than 90 degrees with respect to the linear first patterns 35A, 38A. Note that the second patterns 35B, 38B are at 90 degrees with respect to the first patterns 35A, 38A at one point that is the tip of the convex of the second patterns 35B, 38B. In this regard, it is sufficient that 90% of the second patterns 35B, 38B, preferably 95% of the second patterns, and more preferably 98% of the second patterns 35B, 38B form an angle of less than 90 degrees (acute angle side) with respect to the first patterns 35A, 38A.

[0060] 7B, the second patterns 35B, 38B in the pattern of the second conductive type semiconductor layer 35 and the pattern of the second transparent electrode layer 38 have a pointed shape that is convex in the longitudinal direction (Y direction). In this case, the second patterns 35B, 38B form an angle (acute angle side) of less than 90 degrees with the first patterns 35A, 38A. Furthermore, it is preferable that the second patterns 35B, 38B form an angle (acute angle side) of 20 degrees or more and 40 degrees or less with the first patterns 35A, 38A.

[0061] 7C, the second patterns 35B, 38B in the pattern of the second conductive type semiconductor layer 35 and the pattern of the second transparent electrode layer 38 have an inverted pointed shape that is concave in the longitudinal direction (Y direction). In this case, the second patterns 35B, 38B form an angle (acute angle side) of less than 90 degrees with the first patterns 35A, 38A. Furthermore, it is preferable that the second patterns 35B, 38B form an angle (acute angle side) of 20 degrees or more and 40 degrees or less with the first patterns 35A, 38A.

[0062] Alternatively, as shown in FIG. 7D, the second patterns 35B, 38B in the pattern of the second conductive type semiconductor layer 35 and the pattern of the second transparent electrode layer 38 are wavy shapes that are uneven in the longitudinal direction (Y direction). For example, in a sine wave, the inclination is maximum at the inflection point between the peak and the valley. As a result, the inclination of the waveform of the second patterns 35B, 38B gradually changes in a range greater than 0 degrees and smaller than 90 degrees with respect to the linear first patterns 35A, 38A. Note that in FIG. 7D, the second patterns 35B, 38B are at 90 degrees with respect to the first patterns 35A, 38A at one point that is the tip of the peak and the valley of the second patterns 35B, 38B. In this regard, it is sufficient that 90% of the second patterns 35B, 38B, preferably 95% of the second patterns, and more preferably 98% of the second patterns 35B, 38B form an angle of less than 90 degrees (acute angle side) with respect to the first patterns 35A, 38A.

[0063] Second embodiment In the first embodiment, the pattern shape of the mask 90, i.e., the pattern shapes of the semiconductor layer and the electrode layer, are changed in order to suppress the occurrence of gaps (fainting) in the mask 90 during screen printing. In the second embodiment, instead, the angle of the printing plate is changed.

[0064] As shown in FIG. The semiconductor layers 25, 35 and the transparent electrode layers 28, 38 are elongated patterns having strip-shaped first patterns 25A, 35A, 28A, 38A extending in the longitudinal direction (Y direction) and strip-shaped second patterns 25B, 35B, 28B, 38B extending in the lateral direction (X direction) intersecting the longitudinal direction, A mask 90 having a long pattern is formed, the mask 90 having a strip-shaped first pattern 90A extending in the longitudinal direction (Y direction) and a strip-shaped second pattern 90B extending in the lateral direction (X direction) intersecting the longitudinal direction. Even in this case, it has been found that the occurrence of gaps (faint printing) in the mask 90 can be reduced by changing the printing direction D1 (the direction of movement of the squeegee 83) with respect to the lattice-like wires that form the mesh in the pattern openings 81 of the printing plate, as shown in Figure 8.

[0065] Therefore, in this embodiment, in the resist formation process using a screen printing method, as shown in Figure 8, the printing direction D1 (the direction in which the squeegee 83 moves) is set to 20 degrees or more and 40 degrees or less, preferably 22 degrees or more and 35 degrees or less, and more preferably 25 degrees (the acute angle of the two angles) relative to the lattice-like wires that form the mesh in the pattern opening portion 81 of the printing plate.

[0066] This can reduce the occurrence of voids (faint printing) in the mask 90. ​​Therefore, even if patterning is performed using the mask 90 formed by the screen printing method, it is possible to reduce the occurrence of voids (faint printing) in the patterned semiconductor layers 25, 35 and transparent electrode layers 28, 38.

[0067] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications and variations are possible. For example, in the above-described embodiment, a heterojunction solar cell and a manufacturing method thereof are illustrated as shown in FIG. 2, but the features of the present invention are not limited to heterojunction solar cells and can be applied to various solar cells such as homojunction solar cells and manufacturing methods thereof.

[0068] In the above-described embodiment, the solar cell has a crystalline silicon substrate, but the solar cell is not limited to this. For example, the solar cell may have a gallium arsenide (GaAs) substrate.

[0069] Furthermore, in the above-described embodiment, the solar cell and the manufacturing method thereof are exemplified. However, the features of the present invention are not limited thereto, and the present invention is applicable to various semiconductor elements including a patterned semiconductor layer or electrode layer and the manufacturing methods thereof. [Explanation of symbols]

[0070] 1. Solar cell (semiconductor element) 7 First area 7b, 8b Busbar section 7f,8f Finger section 8 Second area 11 Semiconductor substrate (substrate) 15 Optical adjustment layer 25 First conductive type semiconductor layer 25A, 28A First Pattern 25B, 28B second pattern 25Z First conductive type semiconductor layer material film 27 First electrode layer 28 First transparent electrode layer (electrode layer) 28Z Transparent electrode layer material film 29 First metal electrode layer 35 Second conductive type semiconductor layer 35A, 38A First Pattern 35B, 38B 2nd pattern 35Z Second conductive type semiconductor layer material film 37 Second electrode layer 38 Second transparent electrode layer (electrode layer) 39 Second metal electrode layer 81 Printing plate pattern opening 83 Squeegee 90 Mask 90A 1st pattern 90B 2nd pattern D1 Print direction V1 Void (faint print)

Claims

1. A semiconductor device having a patterned semiconductor layer or electrode layer formed on a substrate, the semiconductor layer or the electrode layer has a busbar portion and a plurality of finger portions extending from the busbar portion and intersecting the busbar portion, Each of the plurality of finger portions has an elongated shape and includes a band-shaped first pattern extending in a longitudinal direction and a band-shaped second pattern intersecting the longitudinal direction, an acute angle of 90% of the second pattern relative to the first pattern is less than 90 degrees; Semiconductor element.

2. The semiconductor element according to claim 1 , wherein the second pattern is an arc shape that is convex in the longitudinal direction, a pointed shape that is convex in the longitudinal direction, an inverted pointed shape that is concave in the longitudinal direction, or a wavy shape that is uneven in the longitudinal direction.

3. The semiconductor device according to claim 1 , wherein the semiconductor device is a back electrode type solar cell.

4. One end of the first pattern in the longitudinal direction is connected to the busbar portion, The second pattern is located at the other end of the first pattern in the longitudinal direction. The semiconductor element according to any one of claims 1 to 3.

Citation Information

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