PolySi film preparation method based on vertical double-layer hot wire array thermal field design

Abstract

The invention discloses a poly-Si film preparation method based on a vertical double-layer hot wire array thermal field design, which changes the surface temperature of a hot wire and the range of a cracking high-temperature region by adjusting the interlayer spacing of a double-layer hot wire array and the current of the double-layer hot wire, expands the cracking time and the cracking space of silane, promotes secondary cracking of the silane, and improves the yield of the poly-Si film. Components and concentration distribution of a silane cracking intermediate product reaching the surface of the substrate can be effectively controlled, and the ratio of SiH / SiH2 active groups is increased; and depositing the poly-Si thin film under the vacuum of 0.5 Pa-5. 0Pa, the substrate temperature of 200-560 DEG C and the deposition time of 10-60 minutes, after deposition is finished, raising the substrate temperature to 200-650 DEG C, and carrying out vacuum annealing on the grown poly-Si thin film to obtain the high-crystallization-rate poly-Si thin film. According to the method, the poly-Si thin film is grown by using a vertical double-layer hot wire array thermal field design, a high-temperature hot wire silane cracking technology and a vacuum annealing technology, and the crystallization quality of the poly-Si thin film can be obviously improved.

Description

Technical Field

[0001] The invention relates to the technical field of thin film preparation, and in particular to a poly-Si thin film preparation method based on a vertical double-layer hot wire array thermal field design. Background Art

[0002] Due to the mass production of tunneling oxide passivated contact cells (TOPCon cells), cell recombination losses have become a current research hotspot. In order to ensure efficient and selective transmission of photogenerated carriers, it is necessary to improve the passivation performance of the cell back surface, and at the same time, to increase the crystallization rate of the poly-Si film in order to increase the carrier concentration and mobility.

[0003] The existing TOPCon battery poly-Si film is mainly prepared by the following two methods, but both have defects: 1. Plasma enhanced chemical vapor deposition (PECVD): Because silane contains a large number of free radicals, cations, and anions under the action of plasma, and the working reaction gas pressure is relatively high, groups with different charges are prone to agglomeration and generate dust.

[0004] 2. Low-pressure chemical vapor deposition (LPCVD): The thermal field distribution of low-pressure chemical vapor deposition is difficult to design. The degree of cracking in some areas is inconsistent, and the concentration of intermediate products fluctuates greatly, resulting in an increase in the defect concentration of the poly-Si film. The cracking source is far away from the center of the quartz tube (the silicon wafer at the center), and the active groups are prone to agglomeration during transmission. There is silicon microparticle dust in the reaction chamber, which directly affects the uniformity and stability of the poly-Si film. Summary of the invention

[0005] The purpose of the present invention is to provide a poly-Si film preparation method based on a vertical double-layer hot wire array thermal field design to solve the above technical problems.

[0006] To achieve the above purpose, the technical solution provided by the present invention is: The poly-Si film preparation method based on vertical double-layer hot wire array thermal field design includes the following steps: (1) Substrate pretreatment: pretreatment of single crystal silicon substrate; (2) Thin film deposition: Using vertical double-layer hot wire array thermal field design and high-temperature hot wire silane cracking technology, poly-Si thin films are deposited and grown on single crystal silicon substrates; (3) Annealing: Use vacuum annealing technology to anneal the grown poly-Si film.

[0007] In some embodiments, there are three ways to arrange the first layer of hot wires and the second layer of hot wire arrays, namely, a vertical double-layer head-to-head parallel alignment of hot wire arrays, a vertical double-layer head-to-foot parallel alignment of hot wire arrays, and a vertical double-layer staggered hot wire array, so as to achieve thermal cracking of silane using a vertical double-layer hot wire array thermal field.

[0008] In some embodiments, each of the double-layer hot wires has an independent power supply, and the hot wire surface temperature and the range of the high-temperature cracking area are adjusted by independently controlling the hot wire current of each layer, adjusting the component ratio and concentration distribution of the silane cracking intermediate product, and improving the SiH / SiH 2 Active group ratio.

[0009] In some embodiments, the method of using a vertical double-layer hot wire array thermal field design and a high-temperature hot wire silane cracking technology to deposit and grow a poly-Si film on a single crystal silicon substrate includes: The single crystal silicon substrate is heated to 200-560°C and SiH 4 and H 2 Mixed gas, controlled SiH 4 / H 2 The gas flow ratio is 1:3-1:9, the gate valve is adjusted to make the vacuum degree of the growth chamber 0.5Pa-5.0Pa, the hot wire power supplies are turned on respectively, the current of the first layer of hot wires is adjusted to make the surface temperature of the first layer of hot wires 1700-1950°C, and then the current of the second layer of hot wires is adjusted to make the surface temperature of the second layer of hot wires 1750-2250°C, and the surface temperature of the second layer of hot wires is always greater than the surface temperature of the first layer of hot wires, the silane thermal decomposition active groups are deposited on the surface of the single crystal silicon substrate, and a poly-Si film with a thickness of 20-100nm is grown when the temperature of the single crystal silicon substrate is 200-560°C and the deposition time is 10-60min.

[0010] In some embodiments, the step of annealing the grown poly-Si film using a vacuum annealing technique includes: Stop the SiH 4 and H 2 The gas is removed, the power supply of the hot wire is turned off, the temperature of the single crystal silicon substrate on which the poly-Si film has been formed is raised to 200-650°C, and the grown poly-Si film is vacuum annealed for 10-60 minutes.

[0011] In some embodiments, the pre-processing of the single crystal silicon substrate includes: The cleaned and dried single crystal silicon substrate was placed on the sample holder of the hot wire chemical vapor deposition growth chamber, and the vacuum dry pump and molecular pump were turned on in sequence to make the vacuum degree of the growth chamber reach 1.0×10 -3 Pa, heat the single crystal silicon substrate to 150°C, and degas the single crystal silicon substrate for half an hour.

[0012] In some embodiments, by controlling SiH 4 and H 2 The flow rate and ratio are adjusted, the vacuum pressure in the growth chamber is adjusted, and the cracking time and cracking space of silane are controlled by adjusting the temperature and spacing of the first and second layers of hot wires, so as to achieve the control of the active group components and concentration of the substrate, and deposit the film under a reasonable temperature system. The deposited film is subjected to vacuum annealing, thereby improving the crystallization rate of the poly-Si film.

[0013] Compared with the prior art, the present invention has the following beneficial effects: The poly-Si film preparation method based on the vertical double-layer hot wire array thermal field design provided in the embodiment of the present application uses a vertical double-layer distributed hot wire array to thermally crack silane to prepare a high crystallization rate poly-Si film. After multiple cracking of silane, the proportion and energy of active group components reaching the substrate surface are better controlled. Combined with the vacuum annealing treatment of the grown film, the crystallization rate of the poly-Si film is significantly improved, which has good application prospects for the development of photovoltaic cells and optoelectronic devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The drawings described herein are used to provide further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute improper limitations on the present invention.

[0015] Figure 1 Schematic diagram of the vertical double-layer distributed hot wire array layout and silane thermal decomposition of the growth chamber of the present invention.

[0016] Figure 2 A schematic diagram of the structure of the first layer of hot wires is shown.

[0017] Figure 3 A schematic diagram of the structure of the second layer of hot wire is shown.

[0018] Figure 4 A schematic three-dimensional diagram of a first distribution of the first layer of hot wires and the second layer of hot wires (aligned head to head and in parallel) is shown.

[0019] Figure 5 A left view showing a first arrangement of first and second layer hot wires (aligned in parallel head to head).

[0020] Figure 6 A schematic three-dimensional diagram of a second distribution of the first layer of hot wires and the second layer of hot wires (aligned head to toe in parallel) is shown.

[0021] Figure 7 A left view showing a second arrangement of the first and second layers of hot wires (aligned head to toe in parallel).

[0022] Figure 8 A three-dimensional schematic diagram of the third distribution (double-layer misalignment) of the first layer of hot wires and the second layer of hot wires is shown.

[0023] Fig. 9 A left view showing the third distribution of the first layer of hot wires and the second layer of hot wires (double layer offset). DETAILED DESCRIPTION

[0024] This section will describe in detail the specific embodiments of the present invention. The preferred embodiments of the present invention are shown in the accompanying drawings. The purpose of the accompanying drawings is to supplement the description of the text part of the specification with graphics, so that people can intuitively and vividly understand each technical feature and the overall technical solution of the present invention, but it cannot be understood as a limitation on the scope of protection of the present invention.

[0025] See also Figures 1 to 9 As shown, the embodiment of the present application provides a poly-Si film preparation method based on a vertical double-layer hot wire array thermal field design, comprising the following steps: (1) Substrate pretreatment: Pretreatment of single crystal silicon substrate.

[0026] For example, the pretreatment includes: placing the cleaned and dried single crystal silicon substrate on the sample rack of the hot wire chemical vapor deposition growth chamber, turning on the vacuum dry pump and molecular pump in turn, and making the vacuum degree of the growth chamber reach 1.0×10 -3 Pa, heat the single crystal silicon substrate to 150°C, and degas the single crystal silicon substrate for half an hour.

[0027] (2) Thin film deposition: Poly-Si thin films are deposited and grown on single crystal silicon substrates using a vertical double-layer hot wire array thermal field design and high-temperature hot wire silane cracking technology.

[0028] As an example, a vertical double-layer hot wire array is composed of a first layer of hot wires and a second layer of hot wires, and specifically has the following three distribution modes.

[0029] For example, Figure 4 and Figure 5 The first layer of hot wires and the second layer of hot wires are shown in a first distribution (aligned head to head and in parallel), and the first layer of hot wires and the second layer of hot wires constitute a first vertical double-layer hot wire array (i.e., a vertical double-layer hot wire array aligned head to head and in parallel). Figure 4 The hot wire on the left side of the middle is the first layer of hot wire.

[0030] For example, Figure 6 and Figure 7 The second distribution of the first layer of hot wires and the second layer of hot wires (aligned head to foot and in parallel) is shown, and the first layer of hot wires and the second layer of hot wires constitute a second vertical double-layer hot wire array (i.e., a vertical double-layer hot wire array aligned head to foot and in parallel). Figure 6 The hot wire on the left side of the middle is the first layer of hot wire.

[0031] For example, Figure 8 and Fig. 9 The third distribution of the first layer of hot wires and the second layer of hot wires (double-layer misalignment) is shown. The first layer of hot wires and the second layer of hot wires constitute a third vertical double-layer hot wire array (i.e., a vertical double-layer misaligned hot wire array). Figure 8 The hot wire on the left side of the middle is the first layer of hot wire.

[0032] Therefore, there are three ways to arrange the first layer of hot wires and the second layer of hot wire arrays, namely, a vertical double-layer head-to-head parallel aligned hot wire array, a vertical double-layer head-to-foot parallel aligned hot wire array and a vertical double-layer staggered hot wire array.

[0033] It should be understood that the vertical double-layer hot wire arrays of the three distributions mentioned above can all achieve thermal cracking of silane using the vertical double-layer hot wire array thermal field. Compared with the existing hot wire chemical vapor deposition (CVD) with only a single-layer wire array, it has the following advantages: 1. The temperature uniformity of the double-layer hot wire mapped to the substrate surface is improved; 2. The probability of silane colliding with the hot wire increases, and the cracking efficiency of silane will increase; 3. By adjusting the hot wire array spacing, the high-temperature zone range can be adjusted, the polymerization of active groups after cracking can be reduced, and the energy of active groups reaching the substrate surface can also be increased; 4. The hot wire surface temperature (hot wire current) can be adjusted to control the components of active groups after silane cracking.

[0034] In some embodiments, each of the double-layer hot wires has an independent power supply, and the hot wire surface temperature and the range of the high-temperature cracking area are adjusted by independently controlling the hot wire current of each layer, adjusting the component ratio and concentration distribution of the silane cracking intermediate product, and improving the SiH / SiH 2 Active group ratio.

[0035] Preferably, using Figure 8 and Fig. 9 The vertical double-layer staggered hot wire array shown is used to achieve thermal cracking of silane using the vertical double-layer staggered distributed hot wire array thermal field.

[0036] Specifically, step (2) includes: The single crystal silicon substrate is heated to 200-560°C and SiH 4 and H 2 Mixed gas, controlled SiH 4 / H 2The gas flow ratio is 1:3-1:9, the gate valve is adjusted to make the vacuum degree of the growth chamber 0.5Pa-5.0Pa, the hot wire power supplies are turned on respectively, the current of the first layer of hot wires is adjusted to make the surface temperature of the first layer of hot wires 1700-1950°C, and then the current of the second layer of hot wires is adjusted to make the surface temperature of the second layer of hot wires 1750-2250°C, and the surface temperature of the second layer of hot wires is always greater than the surface temperature of the first layer of hot wires, the silane thermal decomposition active groups are deposited on the surface of the single crystal silicon substrate, and a poly-Si film with a thickness of 20-100nm is grown when the temperature of the single crystal silicon substrate is 200-560°C and the deposition time is 10-60min.

[0037] Therefore, by controlling the current of the first layer of hot wire and the current of the second layer of hot wire, the surface temperature of the first layer of hot wire is 1700-1950°C, and the surface temperature of the second layer of hot wire is 1750-2250°C. After silane enters the reaction chamber, it encounters the high-temperature hot wire and begins to crack. By adjusting the current of the first layer of hot wire, the current of the second layer of hot wire and the distance between the first layer of hot wire and the second layer of hot wire, the amount of silane cracking intermediates (such as SiH 3 、SiH 2 , SiH and other free radicals) component ratio and concentration distribution, when the substrate temperature is 200-560℃ and the deposition time is 10-60min, a poly-Si film with a thickness of 20-100nm is obtained. This method uses a vertical double-layer distributed hot wire array to improve the silane cracking efficiency, control the component ratio and concentration of the active groups reaching the substrate surface, prepare a poly-Si film with a thickness of 20-100nm under a reasonable temperature system, and improve the film crystallization quality through vacuum annealing.

[0038] As an example, in this step, by controlling SiH 4 and H 2 The flow rate and ratio are adjusted, the vacuum pressure in the growth chamber is adjusted, and the cracking time and cracking space of silane are controlled by adjusting the temperature and spacing of the first and second layers of hot wires, so as to achieve the control of the active group components and concentration of the substrate, and deposit the film under a reasonable temperature system. The deposited film is subjected to vacuum annealing, thereby improving the crystallization rate of the poly-Si film.

[0039] (3) Annealing: Using vacuum annealing technology, anneal the grown poly-Si film. Specifically, step (3) includes: Stop the SiH 4 and H 2 The gas is removed, the power supply of the hot wire is turned off, the temperature of the single crystal silicon substrate on which the poly-Si film has been formed is raised to 200-650°C, and the grown poly-Si film is vacuum annealed for 10-60 minutes.

[0040] In summary, the embodiment of the present application adopts the vertical double-layer hot wire array thermal field design, high-temperature hot wire silane cracking technology and vacuum annealing technology to realize the preparation of high crystallization rate poly-Si thin film, which has good application prospects for the development of photovoltaic cells and optoelectronic devices. Specifically, by adjusting the double-layer hot wire array interlayer spacing and the double-layer hot wire current to change the hot wire surface temperature and the cracking high temperature zone range, the silane cracking time and cracking space are expanded, the secondary cracking of silane is promoted, and the silane cracking intermediate products (such as SiH 3 、SiH 2 , SiH and other free radicals) components and concentration distribution, improve SiH / SiH 2 Active group ratio; depositing a poly-Si film at a substrate temperature of 200-560°C and a deposition time of 10-60 min. After the deposition, raising the substrate temperature to 200-650°C, vacuum annealing the grown poly-Si film for 10-60 min to obtain a poly-Si film with a high crystallization rate.

[0041] Under the premise that no conflict occurs, those skilled in the art may freely combine and superimpose the above-mentioned additional technical features.

[0042] The above description is only a preferred implementation mode of the present invention. Any technical solution that achieves the purpose of the present invention by substantially the same means belongs to the protection scope of the present invention.

Claims

1. A poly-Si thin film preparation method based on a vertical double-layer hot wire array thermal field design, characterized in that: The following steps are involved: (1) Substrate pretreatment: pretreatment of single crystal silicon substrate; (2) Thin film deposition: Using vertical double-layer hot wire array thermal field design and high-temperature hot wire silane cracking technology, poly-Si thin films are deposited and grown on single crystal silicon substrates; (3) Annealing: Use vacuum annealing technology to anneal the grown poly-Si film.

2. The poly-Si thin film preparation method based on vertical double-layer hot wire array thermal field design according to claim 1, characterized in that: There are three ways to arrange the first layer of hot wires and the second layer of hot wire arrays, namely, a vertical double-layer head-to-head parallel alignment of hot wire arrays, a vertical double-layer head-to-foot parallel alignment of hot wire arrays and a vertical double-layer staggered hot wire array, so as to realize thermal cracking of silane using the vertical double-layer hot wire array thermal field.

3. The poly-Si film preparation method based on vertical double-layer hot wire array thermal field design according to claim 2, characterized in that: Each double-layer hot wire has an independent power supply. By independently controlling the hot wire current of each layer, the surface temperature of the hot wire and the range of the high-temperature cracking area can be adjusted, the component ratio and concentration distribution of the intermediate products of silane cracking can be adjusted, and the ratio of SiH / SiH2 active groups can be increased.

4. The poly-Si thin film preparation method based on vertical double-layer hot wire array thermal field design according to claim 1, characterized in that: The method uses a vertical double-layer hot wire array thermal field design and a high-temperature hot wire silane cracking technology to deposit and grow a poly-Si film on a single crystal silicon substrate, including: The temperature of the single crystal silicon substrate is raised to 200-560°C, and a mixed gas of SiH4 and H2 is introduced, and the flow ratio of SiH4 / H2 gas is controlled to be 1:3-1:

9. The gate valve is adjusted to make the vacuum degree of the growth chamber 0.5Pa-5.0Pa, and the hot wire power supply is turned on respectively. The current of the first layer of hot wire is adjusted to make the surface temperature of the first layer of hot wire 1700-1950°C, and then the current of the second layer of hot wire is adjusted to make the surface temperature of the second layer of hot wire 1750-2250°C, and the surface temperature of the second layer of hot wire is always greater than the surface temperature of the first layer of hot wire. The silane thermal decomposition active groups are deposited on the surface of the single crystal silicon substrate, and a poly-Si film with a thickness of 20-100nm is grown when the temperature of the single crystal silicon substrate is 200-560°C and the deposition time is 10-60min.

5. The poly-Si film preparation method based on vertical double-layer hot wire array thermal field design according to claim 4, characterized in that: The vacuum annealing technique is used to anneal the grown poly-Si film, including: Stop the introduction of SiH4 and H2 gases, turn off the power supply of the hot wire, raise the temperature of the single crystal silicon substrate on which the poly-Si film has been formed to 200-650°C, and perform vacuum annealing on the grown poly-Si film for 10-60 minutes.

6. The poly-Si film preparation method based on vertical double-layer hot wire array thermal field design according to claim 5, characterized in that: The pre-processing of the single crystal silicon substrate comprises: The cleaned and dried single crystal silicon substrate was placed on the sample holder of the hot wire chemical vapor deposition growth chamber, and the vacuum dry pump and molecular pump were turned on in sequence to make the vacuum degree of the growth chamber reach 1.0×10 -3 Pa, heat the single crystal silicon substrate to 150°C, and degas the single crystal silicon substrate for half an hour.

7. The method for preparing a poly-Si thin film based on a vertical double-layer hot wire array thermal field design according to claim 4, characterized in that: By controlling the flow and ratio of SiH4 and H2, adjusting the vacuum pressure of the growth chamber, and adjusting the temperature and spacing of the first and second layers of hot wires, the cracking time and cracking space of silane are controlled, the active group components and concentration of the substrate are controlled, and the film is deposited under a reasonable temperature system. The deposited film is subjected to vacuum annealing, thereby improving the crystallization rate of the poly-Si film.

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