Display device

Abstract

To provide a novel display device in which a light emitting element is turned on by triangular waves.SOLUTION: Provided is a method for driving a display device having a first pixel, a second pixel, a first wiring, a second wiring, and a third wiring. The first wiring is electrically connected to the first pixel and the second pixel. The second wiring is electrically connected to the first pixel, and the third wiring is electrically connected to the second pixel. The first pixel receives first display data via the second wiring, and the second pixel receives second display data via the third wiring. The first pixel or the second pixel starts emitting light at a different time. At a first time, the first pixel reaches the maximum luminance corresponding to the first display data, and the second pixel reaches the maximum luminance corresponding to the second display data. As a result of receiving a reset signal through the first wiring, the first pixel and the second pixel are initialized at a second time so as to turn off the light.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] One embodiment of the present invention relates to a display device and a method for driving the display device.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field of one aspect of the present invention relates to a product, a method, or a manufacturing method. , machine, manufacture, or composition of matter In particular, one embodiment of the present invention is a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, The present invention relates to a method for driving these devices and a method for manufacturing these devices.

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. An example of such a device is a semiconductor element such as a transistor or a diode. In another example, a circuit having a semiconductor element is a semiconductor device. As another example, a device including a circuit having a semiconductor element is a semiconductor device. do. [Background technology]

[0004] Electronic devices equipped with display devices are becoming more and more common. There is a demand for display devices that can display more information. In order to display the amount of information, multiple light sources with different hues are turned on in sequence to display the information. Driving methods such as the field sequential method have been proposed. In the Shal method, a pixel is illuminated in sequence with different hues of light, so the display The amount of information can be increased.

[0005] Patent Document 1 discloses a method for controlling the turning on and off of a light source having a plurality of hues in a backlight. PWM (Pulse Width Modulation) drive using a triangular wave as the driving method has been disclosed.

[0006] Large display devices such as TVs, signage devices, head-mounted displays, etc. In the case of wearable electronic devices, a display device using a small LED as a light-emitting element is disclosed in Patent Document 2. It has been disclosed. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] JP 2006-209053 A [Patent Document 2] U.S. Patent Publication No. 2017 / 0179092 Summary of the Invention [Problem to be solved by the invention]

[0008] A display device that has a liquid crystal element that displays using a single light source and three color filters. It is difficult to display black without turning off the backlight, so it is difficult to increase the contrast. In the field sequential method, one pixel is different. Since the light of different hues is turned on in sequence, there is no need for sub-pixels, and the pixel size can be made small. This is suitable for high definition because it can reduce the amount of power consumed, but it consumes a lot of power because it turns on and off lights of multiple hues. There is a problem with increasing power consumption.

[0009] In addition, head-mounted displays and other devices are worn on the body, so they need to be lightweight and consume less power. For example, if power consumption increases, the head-mounted display In the case of the Ray, the battery needs to be large, and the load of the electronic device is large. When a head-mounted display is attached to the body, it places a large burden on the user's body. There is a problem.

[0010] In view of the above problems, an object of one embodiment of the present invention is to provide a display device having a novel structure. Another object of one embodiment of the present invention is to provide a method for driving a novel display device. Another embodiment of the present invention provides a method for driving a display device that reduces power consumption. Another object of one embodiment of the present invention is to provide a display device that improves the contrast of the display. It is an object of the present invention to provide a method for driving the device.

[0011] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter will be self-evident from the description, drawings, claims, etc. Other issues can be extracted from the drawings, claims, etc.

[0012] Note that the problems of one embodiment of the present invention are not limited to the problems listed above. However, this does not preclude the existence of other problems. The other problems are described below. Problems not mentioned in this section are problems that a person skilled in the art would be able to solve by reading the specification or can be derived from drawings and other descriptions, and can be appropriately extracted from these descriptions. In addition, one aspect of the present invention is to achieve at least one of the above-listed objects and / or other objects. This is to solve one problem. [Means for solving the problem]

[0013] One aspect of the present invention is a liquid crystal display device including a first pixel, a second pixel, a first wiring, a second wiring, and a third wiring. A method for driving a display device having a line. The first line is connected to a first pixel and the second pixel. The second wiring is electrically connected to the first pixel, and the third wiring is The first pixel is electrically connected to the second pixel. The first pixel is connected to the second pixel through the second wiring. The first pixel receives second display data through a third wiring, and the second pixel receives second display data through a third wiring. The first pixel or the second pixel starts emitting light at a different time. At time, the first pixel reaches a maximum brightness corresponding to the first display data and the second pixel Then, the maximum brightness corresponding to the second display data is reached. A reset signal is applied to the first wiring. The first pixel and the second pixel are initialized at the second time and turned off. A method for driving a display device.

[0014] One aspect of the present invention is a display having a plurality of pixels, a first wiring, a second wiring, and a third wiring. The pixel includes a light-emitting element and first to third transistors. The first transistor has a first gate and a second gate. In the semiconductor device, the first gate is electrically connected to the first wiring, and the second gate is electrically connected to the second wiring. and one of the source and drain is connected to the gate of the second transistor and the gate of the third transistor. The second transistor is electrically connected to one of the source and drain of the first transistor. Either the source or the drain is electrically connected to one of the electrodes of the light-emitting element. The transistor has a gate electrically connected to the third wiring. By this, the threshold voltage of the first transistor is determined according to the first potential of the display data. A triangular wave is applied to the second wiring, and the first transistor is turned on in response to the potential of the triangular wave. When the first transistor is turned on, a second potential is applied to the gate of the second transistor through the first transistor. The light emission luminance of the light emitting element is controlled according to the second potential. By applying a start signal, the third transistor is turned on and the second transistor is turned off. The light-emitting element goes off, and the potential of the triangular wave becomes the smallest in synchronization with the reset signal. This is a method for driving a display device.

[0015] One aspect of the present invention is a display having a plurality of pixels, a first wiring, a second wiring, and a third wiring. The pixel includes a light emitting element, a first transistor, and a second transistor. The first wiring is electrically connected to one of the electrodes of the light-emitting element. The transistor has a source or a drain electrically connected to the other electrode of the light-emitting element, and The port is electrically connected to the second wiring and one of the source and drain of the second transistor. The gate of the second transistor is electrically connected to the third wiring. By applying display data to the first transistor, a current flows in accordance with the potential of the display data. The magnitude of the current that flows through the first wiring is determined by applying a triangular wave to the first wiring. The amount of current that the transistor supplies to the light-emitting element is determined, and the light-emitting element's The luminance of the light emitted is controlled by applying a reset signal to the third wiring. The first transistor is turned on, the second transistor is turned off, and the third transistor is turned on in synchronization with the reset signal. This is a method of driving a display device in which the potential of the square wave is minimized and the light-emitting element is turned off.

[0016] One embodiment of the present invention is a display device having a plurality of pixels and first to sixth wirings. The element includes a light-emitting element, first to fourth transistors, a first capacitor, and a second capacitor. Display data is applied to the first wiring. Scanning signals are applied to the second wiring. The third wire is given a reset signal. The fourth wire is given a triangular wave. The fifth wire is given a A potential higher than the display data is applied to the sixth wiring. The gate of the fourth transistor is electrically connected to the second wiring. One of the source and the drain of the fourth transistor is electrically connected to the first wiring. The gate of the first transistor is electrically connected to a fourth wiring. The other of the source and drain of the first transistor is connected to the back gate of the first transistor and The gate of the third transistor is electrically connected to one of the electrodes of the third capacitor. The fifth wiring is electrically connected to the other electrode of the first capacitor and the first The first transistor is electrically connected to one of the source and drain of the second transistor. The other of the source or drain of the second transistor is connected to the source or drain of the third transistor. The first capacitor element is electrically connected to the gate of the first transistor and one of the electrodes of the second capacitor element. The other of the source and the drain of the third transistor is electrically connected to a sixth wiring. One of the source and drain of the second transistor is electrically connected to one of the electrodes of the light emitting element. It is a display device.

[0017] One embodiment of the present invention is a display device having a plurality of pixels and first to fifth wirings. The element includes a light-emitting element, first to third transistors, and a first capacitor. A triangular wave is applied to the first line. A scanning signal is applied to the second line. A reset signal is applied to the third line. A display signal is applied to the fourth wiring. Display data is applied to the fifth wiring. The gate of the third transistor is electrically connected to the second wiring. One of the source and drain of the third transistor is electrically connected to the fourth wiring. The other of the source and the drain of the third transistor is connected to the first transistor. a gate of the second transistor, one of the source and the drain of the second transistor, and a first capacitance element The gate of the second transistor is electrically connected to the third wiring and one of the electrodes of the first transistor. The other of the source and the drain of the second transistor is electrically connected to the fifth wiring. One of the source and drain of the first transistor is electrically connected to the electrode of the light-emitting element. The other electrode of the light-emitting element is electrically connected to the first wiring. It is a display device.

[0018] In each of the above configurations, the light emitting device is preferably an LED.

[0019] In each of the above configurations, the display device is preferably one in which the light emitting element is an OLED.

[0020] In each of the above structures, any one of the transistors included in the display device has a metal layer in a semiconductor layer. Displays having oxides are preferred. Effect of the Invention

[0021] One embodiment of the present invention can provide a display device having a novel structure. According to one embodiment of the present invention, a novel method for driving a display device can be provided. It is possible to provide a method for driving a display device that reduces power consumption. It is possible to provide a method for driving a display device that improves the contrast of the display.

[0022] Note that the effects of one embodiment of the present invention are not limited to the effects listed above. However, this does not preclude the existence of other effects. Other effects may be affected by this item, as described below. The effects not mentioned in this section are obvious to those skilled in the art. can be derived from drawings and other descriptions, and can be appropriately extracted from these descriptions. In addition, one aspect of the present invention has at least one of the above-listed effects and / or other effects. Therefore, one aspect of the present invention is, in some cases, In some cases, it may not have the effects described above. [Brief description of the drawings]

[0023] [Figure 1] 1A is a circuit diagram illustrating a pixel, and FIG. 1B is a timing chart illustrating the operation of the display device. [Diagram 2] 1A is a block diagram illustrating a display device, and FIG. 1B is a timing chart illustrating the operation of the display device. [Diagram 3] 1A is a block diagram illustrating a display device, and FIG. 1B is a timing chart illustrating the operation of the display device. [Figure 4] 1A is a circuit diagram illustrating a pixel, and FIG. 1B is a timing chart illustrating the operation of the display device. [Diagram 5] 1A is a block diagram illustrating a display device, and FIG. 1B is a timing chart illustrating the operation of the display device. [Figure 6] 1A is a block diagram illustrating a display device, and FIG. 1B is a timing chart illustrating the operation of the display device. [Figure 7] FIG. [Figure 8] FIG. [Figure 9] 1A to 1C illustrate a method for manufacturing a display device. [Figure 10] 1A to 1C illustrate a method for manufacturing a display device. [Figure 11] 1A to 1C illustrate a method for manufacturing a display device. [Figure 12] 1A to 1C are diagrams illustrating transistors. [Figure 13] 1A to 1C are diagrams illustrating transistors. [Figure 14] 1A to 1C are diagrams illustrating transistors. [Figure 15] 1A to 1C are diagrams illustrating transistors. [Figure 16] FIG. 1 illustrates an information processing device. [Figure 17] FIG. 1 illustrates an information processing device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0024] Hereinafter, the embodiments will be described with reference to the drawings. The present invention may be embodied in various different forms without departing from its spirit and scope. It will be readily understood by those skilled in the art that various modifications and changes may be made to the embodiments and details of the present invention. The invention should not be construed as being limited to the description of the following embodiments.

[0025] Also, in the drawings, the size, layer thickness, or area are exaggerated for clarity. Therefore, the scale is not necessarily limited to that shown in the drawings. The drawings are merely schematic illustrations and are not limited to the shapes or values ​​shown in the drawings.

[0026] In addition, the ordinal numbers "first," "second," and "third" used in this specification refer to the components of the It should be noted that this is added to avoid confusion and is not intended to limit the numbers.

[0027] In addition, in this specification, the words "above" and "below" indicating the position of the components are used. The positional relationship is used for convenience in describing the drawings. The relationship changes depending on the direction in which each component is depicted. The terms are not limited to those given above, and can be rephrased appropriately depending on the situation.

[0028] In this specification, a transistor includes a gate, a drain, and a source. The drain terminal is a diode that has at least three terminals. A transistor is placed between the drain electrode and the source (source terminal, source region or source electrode). A channel forming region is provided between the source and the drain through the channel forming region. In this specification and the like, the channel forming region is a region in which a current can flow. This refers to the area through which electric current mainly flows.

[0029] In addition, the functions of the source and drain may differ depending on whether transistors of different polarities are used or the circuit In operation, when the direction of the current changes, the positions may be reversed. In the specification, the terms source and drain may be used interchangeably. do.

[0030] In addition, in this specification, "electrically connected" means "something that has some kind of electrical effect." This includes cases where the device is connected via a "device having some electrical function." "of" is not subject to any particular restrictions as long as it enables the transmission and reception of electrical signals between connected objects. For example, "something that has an electrical effect" includes electrodes, wiring, and transistors. These devices have various functions such as switching elements, resistor elements, inductors, capacitors, etc. This includes elements such as:

[0031] In addition, in this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, this also includes cases where the angle is between 85° and 95°.

[0032] In addition, in this specification and the like, the terms "film" and "layer" are interchangeable. For example, the term "conductive layer" can be changed to the term "conductive film." Or, for example, the term "insulating film" may be changed to "insulating layer." In some cases, it may be possible to change the term to

[0033] In this specification and the like, unless otherwise specified, the off-state current refers to the current that occurs when a transistor is off. This refers to the drain current when the device is in a non-conducting state (also called a cut-off state). Unless otherwise specified, for n-channel transistors, V is the voltage between the gate and source When gs is lower than the threshold voltage Vth, the gate and This refers to a state in which the voltage Vgs between the n-channel transistors is higher than the threshold voltage Vth. The off-state current of a transistor is the voltage between the gate and source, Vgs, that is, the threshold voltage, Vt This may refer to the drain current when it is lower than h.

[0034] The off-state current of a transistor may depend on Vgs. The off-state current of a transistor is I or less when the Vgs value is I or less. The off-state current of a transistor is the off-state current at a given Vgs. state, off state at Vgs within a given range, or a sufficiently reduced off current is obtained. The term may refer to the off-state current at Vgs applied to the device, etc.

[0035] As an example, when the threshold voltage Vth is 0.5V and Vgs is 0.5V, The current is 1×10 -9 A, and the drain current at Vgs of 0.1 V is 1×10 -1 3 A, and the drain current at Vgs -0.5 V is 1×10 -19 A and Vg The drain current at s = -0.8 V is 1 × 10 -22 A n-channel transistor The drain current of the transistor is as follows when Vgs is -0.5V: , or 1×10 when Vgs is in the range of −0.5V to −0.8V -19 A or below Therefore, the off-state current of the transistor is 1×10 -19 It may be said that it is below A. The drain current of the transistor is 1×10 -22 Because there exists a Vgs below A , the off-state current of the transistor is 1×10 -22 It may be said that it is below A.

[0036] In this specification, the off-state current of a transistor having a channel width W is expressed as It is sometimes expressed as the current value that flows per watt. Also, for a given channel width (for example, 1 μm), In the latter case, the unit of the off-state current is current / length. It may be expressed in units with an element (e.g., A / μm).

[0037] The off-state current of a transistor may depend on temperature. Unless otherwise specified, the off-state current is measured at room temperature, 60℃, 85℃, 95℃, or 125℃. Or, the reliability of the semiconductor device including the transistor may be insufficient. or the temperature at which a semiconductor device or the like including the transistor is used (for example, The off-state current at any one of temperatures between 5°C and 35°C may be used. The off-state current of the transistor is I or less at room temperature, 60°C, 85°C, 95°C, 125°C, and the The temperature at which the reliability of a semiconductor device including a transistor is guaranteed, or the temperature at which the transistor The temperature at which the semiconductor device or the like containing the above is used (for example, any one of 5°C to 35°C) ), there exists a value of Vgs at which the off-state current of the transistor is I or less. There is a match.

[0038] The off-state current of a transistor may depend on the voltage Vds between the drain and source In this specification, unless otherwise specified, the off-state current is measured when Vds is 0.1 V, 0.8 V, 1V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, or It may represent the off-state current at 20 V. In the case of a semiconductor device that includes the transistor, the reliability of the device is guaranteed. The off-state current of a transistor may be expressed as the off-state current at the Vds used in the I or less means that Vds is 0.1V, 0.8V, 1V, 1.2V, 1.8V, 2.5 V, 3V, 3.3V, 10V, 12V, 16V, 20V, the semiconductor device that contains the transistor Vds that guarantees the reliability of semiconductor devices, etc., or semiconductor devices including the transistor Vds used in the above, Vgs where the off-current of the transistor is I or less It may refer to the presence of a value.

[0039] In the above description of the off-state current, the drain may be read as the source. The current may also refer to the current through the source when the transistor is in the off state.

[0040] In this specification and the like, the term "leak current" may be used to mean the same thing as the "off current." In this specification, the off-state current refers to, for example, the current flowing when a transistor is in an off state. , may refer to the current flowing between the source and drain.

[0041] Voltage refers to the potential difference between two points, and potential refers to the electrostatic field at a certain point. This refers to the electrostatic energy (electrical potential energy) possessed by a unit charge in a particle. Generally, the potential difference between a potential at a certain point and a reference potential (for example, ground potential) This is simply called potential or voltage, and potential and voltage are often used synonymously. Therefore, in this specification, unless otherwise specified, potential may be read as voltage. In this specification, voltage may be read as potential.

[0042] (Embodiment 1) In this embodiment, a novel driving method of a novel display device in which a light emitting element is turned on by a triangular wave is described. The method will be described with reference to FIGS.

[0043] First, the display device will be described. The display device includes a display panel, a source driver, and The display panel includes a gate driver and a plurality of pixels. The source driver or gate driver is formed on the same substrate as the pixel. Either the switch driver or the gate driver, or both, are components separate from the display panel. In the following, the display device is referred to as the display panel. Sometimes I explain it in other words.

[0044] As an example, the display device includes a first pixel, a second pixel, and first to fifth wirings. The fourth to third wirings are electrically connected to the first pixel and the second pixel. The first wiring is electrically connected to the first pixel, and the fifth wiring is electrically connected to the second pixel. Note that a scan signal is applied to the first to third wirings that function as scan lines. The scanning signal has a function of writing data to the pixels, a function of controlling lighting, a function of resetting, etc. be.

[0045] The first pixel is provided with the first display data through the fourth wiring, and the second pixel is provided with the first display data through the fourth wiring. The second display data is applied through the fifth wiring. The first pixel and the second pixel emit light at different times. At a second time point that is earlier than the first time point, the first pixel starts to display a pixel corresponding to the first display data. the first pixel reaches a maximum luminance corresponding to the second display data, and the second pixel reaches a maximum luminance corresponding to the second display data. The present invention relates to a method for driving a display device.

[0046] That is, the display data given to the pixel is held in the pixel, and then the signal given to the pixel is In accordance with the signal, the light emitting element of the pixel is turned on. It is preferable that the pixels are connected to wirings to which the same scanning signal is applied. The signal is preferably a triangular wave. The triangular wave may be generated using an integrating circuit. Alternatively, the triangular wave may be generated using a digital-to-analog conversion circuit. When the digital-to-analog converter is used, the circuit size can be made smaller than that of the digital-to-analog converter. The triangular wave may be a signal with a linear slope or an exponentially increasing signal. If the triangle wave is an exponentially increasing signal, it will be illuminated compared to a triangle wave with a linear slope. The period is shortened, and the maximum brightness corresponding to the display data reaches a larger maximum brightness. A method for driving the device.

[0047] The display device includes a plurality of pixels, a first pixel, a second pixel, a third pixel, a fourth pixel, a fourth pixel, a fifth pixel, a sixth pixel, a sixth pixel, a sixth pixel, a seventh pixel, a eighth ... The pixel includes a light emitting element, a second wiring, a third wiring, and a fourth wiring. The first transistor has a first gate and a second gate. In addition, either the first gate or the second gate is a first transistor. One corresponds to the gate of the first transistor, and the other corresponds to the backgate of the first transistor.

[0048] The first transistor has a first gate electrically connected to the first wiring and a second gate is electrically connected to a fourth wiring through a fourth transistor, and one of the source and drain The first transistor is connected to the gate of the second transistor and the second transistor is connected to one of the source and drain of the third transistor. The second transistor has a source and a drain that are electrically connected to a light-emitting element. The gate of the third transistor is electrically connected to one of the electrodes of the third wiring. The gate of the fourth transistor is electrically connected to the second wiring. .

[0049] As a first step, the display data is fed to the fourth wire to generate the first bit of the display data. The threshold voltage of the first transistor is determined according to the potential of the second wiring. The signal can write display data to the pixel. The display data may be stored in the first capacitance element and a second capacitance element. In the following description, the first potential and the first display data are the same. do.

[0050] In the second step, a triangular wave is applied to the first wiring, and the first transistor is turned on in response to the potential of the triangular wave. When the first transistor is turned on, the second transistor A second potential is applied to the gate, and the light emission luminance is controlled in accordance with the second potential. It is preferable that the signal applied to the first wiring is held in the second holding capacitor. can control the lighting of pixels.

[0051] In the third step, a reset signal is applied to the third wiring to turn on the third transistor. The second transistor is turned on, and the second potential held in the second holding capacitor is discharged. The transistor is turned off and the light emitting element is turned off. Synchronized with the reset signal, a triangular wave This is a driving method of a display device in which the potential of the pixel becomes the smallest.

[0052] The brightness of a light-emitting element as perceived by the human eye can be expressed as the average brightness per unit time. The average luminance is calculated by the number of times that the light emitting element is turned off by the reset signal and then turned on by the next reset signal. It is determined by the amount of light emitted by the light emitting element during the period until the light emitting element is turned off. The second potential causes the light emitting element to start to emit light, and the light emitting element is turned off by the reset signal. The period in this case is defined as a lighting period, and the next second potential is applied after the light emitting element is turned off. The period until the light emitting element starts to light is called the off period. A signal that resets the display of the pixel can be used.

[0053] When the first potential, which is the display data, is small, the threshold voltage of the first transistor is small. When the first potential is large, it is preferable that the threshold voltage of the first transistor is large. In other words, when the first potential is small and a triangular wave is applied to the first transistor, As the potential of the triangular wave increases, the second potential increases quickly, and the light emitting element lights up quickly. In addition, since the light emitting element starts to light up earlier, the average luminance of the light emitting element is increased. The maximum luminance during the period when the light emitting element is turned on also becomes larger.

[0054] The luminance of the light emitting element with respect to the first potential of the display data applied to the pixel is averaged. However, the light emitting element is turned on just before it is turned off by the third transistor. The maximum brightness corresponds to the displayed data, so the maximum brightness remains as an afterimage to the human eye. This is because when low-gradation display data is displayed, the gradation perceived by the average luminance is low, but This is because the momentary maximum brightness remains as an afterimage to the human eye, making it easier to recognize colors. For example, For example, when expressing the blue of the sea illuminated by moonlight, the blue can be captured as an afterimage even at low gradations. This has the effect of making the image more visible.

[0055] In addition, the second potential of the pixel is initialized by the third transistor, and the light emitting element is turned off. Then, the display device can obtain the effect of black insertion. This is one of the operation methods, which allows the control to operate by providing a period when the display data is turned on and a period when it is turned off. This is a driving method that expands the last ratio. In other words, the contrast is improved by the effect of black insertion, In addition, the momentary maximum brightness remains as an afterimage, improving the visibility of the displayed content. By having such a configuration, the lighting period can be shortened, and power consumption can be reduced. Furthermore, during the lighting period, the charging voltage of the second potential is controlled by a triangular wave, and the brightness that generates a large amount of heat is reduced. Therefore, the above-mentioned driving method of the display device can reduce the period during which the power consumption is large. This allows for reduced power consumption and reduced heat generation.

[0056] The triangular wave applied to the gate of the first transistor through the first wiring is It should be noted that the signal is simultaneously applied to all pixels of the display device. The triangular wave may be applied to all pixels of the display device. Thus, at the first time, each pixel has a maximum pixel size corresponding to the size of the given display data. By reaching the luminance, the display of the display area can be updated simultaneously. The light emitting elements are initialized and turned off. This allows a so-called frame sequential driving to be realized. For example, , the display data of the p-th frame and the p-1-th frame are displayed simultaneously in the display area. This can suppress the decrease in visibility that occurs when the pixel size is increased. p is a positive natural number.

[0057] The light emitting element is preferably an LED. The LED is formed on the display panel. Alternatively, the LED may be bonded as a component. The display device driving method of the present embodiment is a method for driving a display device in which the light emitting element is an LED or an OLED. However, the same effect can be obtained.

[0058] The light emitting element of the pixel may be formed on the display panel or may be mounted as a component. For example, the LED may be bonded to the pixel as a component.

[0059] Next, a pixel included in the display device will be described in detail with reference to FIG.

[0060] The display device includes a pixel 10, a wiring G1, a wiring G2, a wiring G3, a wiring S1, a wiring V0, and a wiring c om, wiring Ano, and wiring Cath. The first wiring is The first wiring corresponds to the wiring G3 electrically connected to the first pixel, and the second wiring corresponds to the wiring G4 electrically connected to the first pixel. The first wiring corresponds to the wiring G1, and the third wiring corresponds to the wiring G2 electrically connected to the first pixel. The pixel 10 includes a transistor 14 and a pixel circuit 10P. 17, transistor 11, transistor 12, transistor 13, capacitance element 15, capacitance element The transistor 11 has a back gate.

[0061] The gate of the transistor 14 is electrically connected to the wiring G1. The source or drain of the transistor 14 is electrically connected to the wiring S1. The other of the drains is connected to the back gate of the transistor 11 and one of the electrodes of the capacitor 15. The gate of the transistor 11 is electrically connected to the wiring G3. The wiring V0 is connected to the other electrode of the capacitor 15 and the source or drain of the transistor 11. The other of the source and drain of the transistor 11 is electrically connected to One of the source and drain of the transistor 13, the gate of the transistor 12, and the capacitance element The gate of the transistor 13 is electrically connected to one of the electrodes of the wiring G2 and the The other of the source and drain of the transistor 13 is electrically connected to the wiring Com. One of the source and drain of the transistor 12 is electrically connected to the electrode of the light emitting element 17. The other of the source and drain of the transistor 12 is electrically connected to a wiring C. ath and the other electrode of the capacitor element 16 are electrically connected. The other end is electrically connected to the wiring Ano.

[0062] In FIG. 1A, transistors 12, 13, and 14 are Although the transistors 12, 13, and 14 each have a back gate, One or more of the transistors 14 may have no back gate. Note that the transistor includes an oxide semiconductor film that is highly purified and in which formation of oxygen vacancies is suppressed. The off-state current of the transistor can be reduced. The signal retention time can be extended. This reduces the frequency of refresh operations, resulting in reduced power consumption. The transistor including the oxide semiconductor film has an effect of reducing power consumption. A detailed explanation will be given in the sixth embodiment.

[0063] A potential higher than the maximum potential of the second potential applied to the capacitor 16 is applied to the wiring V0. A low voltage potential for initializing the second potential held in the capacitance element 16 is connected to the wiring Com. The low potential is set to a current value at which the light emitting element does not emit light. In other words, a potential that turns off the transistor 12 is applied. The anode terminal is connected to the other electrode of the light-emitting element (hereinafter, the anode terminal). The potential obtained is preferably greater than the largest potential of the second potentials. th is connected to one of the electrodes of the light-emitting element (hereinafter, the cathode terminal) via a transistor 12. Therefore, the potential applied to the wiring Cath is the potential when the second potential is initialized. Smaller is preferable.

[0064] 1B is a timing chart illustrating the operation of the pixel 10. A scanning signal is applied to the pixel 10 connected to the wiring G1. A reset signal is applied to pixel 10 via wiring G2. A triangular wave TW is applied to pixel 10 connected to line S1 via line G3. A first potential is applied to the pixel 1 through the wiring S1. The first potential is called display data D1. It can be replaced.

[0065] At time T0, a reset signal is applied to the wiring G2. A reset signal is applied via the wiring G2. The transistor 13 is turned on. The second potential held in the capacitance element 16 is initialized, and the light-emitting element is turned off. Then, the triangular wave TW applied to the wiring G3 is initialized and the charging of the second potential is stopped. Then, the transistor 11 is turned off, and the operation of charging the capacitor 16 with the second potential is stopped. do.

[0066] At time T1, the wiring G1 is selected by a scanning signal applied to the wiring G1. The transistor 14 is turned on, and the display data D1 provided to the wiring S1 is The display data D1 provided to the capacitance element 15 is input to the transistor 11. and controls the threshold voltage of transistor 11.

[0067] At time T2, the scanning signal applied to the line G1 is in a non-selected state. The transistor 14 is turned off, and the display data D1 applied to the capacitance element 15 is held. .

[0068] At time T3, the reset signal applied to the wiring G2 is released, and the transistor 13 The reset signal may be released at time T2.

[0069] At time T3, the reset signal is released to apply a triangular wave TW to the wiring G3. However, since the threshold value of the transistor 11 is controlled by the display data D1, Then, charging of the second potential begins in response to the display data D1. When charging begins, the transistor 12 supplies current to the light emitting element, and the light emitting element begins to light up. FIG. 1B shows an example in which the light emitting element is turned on during the hatched period. In addition, it is preferable that the light emission intensity of the light emitting element increases in accordance with the change in the triangular wave TW. In addition, it is preferable that the period during which the triangular wave TW is applied to the pixel 10 is shorter than one frame. I wish.

[0070] FIG. 2A is a block diagram illustrating the display device 20. The display device 20 has a display area The display area 21 includes a pixel region, a source driver 22, and a gate driver 23. The pixel array includes pixels 10(1,1) to 10(m,n). As an example, in FIG. 2(A), The pixels 10(i, j) to 10(i+1, j+1) are shown. m and n are positive integers. where i is an integer between 1 and m, and j is an integer between 1 and n.

[0071] As an example, the connection between pixel 10(i, j) and the wiring will be described. is connected to the gate driver 23 via the wiring G1(j), the wiring G2(j), or the wiring G3(j). The pixel 10(i, j) is electrically connected to the source driver via the line S1(i). 22.

[0072] FIG. 2B is a timing chart illustrating the operation of the display device 20. As for detailed operations, the explanation of FIG. 1B can be referred to, and therefore the explanation is omitted.

[0073] At time T10, a reset signal is applied to the wiring G2(j), and the pixels 10(i,j) and The held potential of pixel 10(i+1,j) is initialized, and the light-emitting element is turned off. The triangular wave TW given to G3(j) is initialized.

[0074] At time T11, the wiring G1(j) is selected by a scanning signal applied to the wiring G1(j). The display data D1 is applied to the wiring S1(i), and the wiring S1(i+1) is provided with display data D2.

[0075] Furthermore, at time T11, a reset signal is applied to the wiring G2(j+1), and the pixel 10( The held potentials of pixels 10(i,j+1) and 10(i+1,j+1) are initialized, and the light-emitting elements are turned off. In addition, the triangular wave TW applied to the wiring G3(j+1) is initialized.

[0076] At time T12, the scanning signal applied to the line G1(j) is in a non-selected state. Thus, the pixel 10(i,j) holds the display data D1, and the pixel 10(i+1,j) holds the display data D2. The display data D2 is held.

[0077] Furthermore, at time T12, the wiring G1(j+1) is turned on by a scanning signal applied to the wiring G1(j+1). The line S1(i) is supplied with display data D3, and the line S1(i) is selected. Display data D4 is provided to line S1(i+1).

[0078] At time T13, the reset signal applied to the wiring G2(j) is released. In 13, a triangular wave TW is applied to the wiring G3(j) by releasing the reset signal. The threshold value of the transistor 11 is controlled by the display data D1 or the display data D2. Therefore, the lighting start time of pixel 10(i,j) or pixel 10(i+1,j) is different. By display data D1 or display data D2, pixel 10(i,j) or pixel 10(i+ 1,j) have different lighting periods and emission intensities.

[0079] At time T13, the scanning signal applied to the wiring G1(j+1) is in a non-selected state. Therefore, the display data D3 is held in the pixel 10(i, j+1), and the pixel 10( i+1, j+1) holds display data D4.

[0080] In the timing chart shown in FIG. 2(B), the hatched areas with different lighting periods Each lighting period is given to the pixel 10(i,j) by display data D1 or varies depending on the magnitude of the potential of the display data D2 applied to the pixel 10(i+1, j). This provides an example.

[0081] At time T14, the reset signal applied to the wiring G2(j+1) is released. At time T14, the reset signal is released and a triangular wave TW is applied to the wiring G3(j+1). After that, the same processing is repeated, so the explanation is omitted.

[0082] In the timing chart shown in FIG. 2B, the wiring G1(j) or the wiring G1(j+1) In response to the scanning signal applied to each of the wirings G3(j) and G3(j+1), A triangular wave TW is given. Since the lighting period differs depending on the selected row, the lighting time of the light-emitting element Therefore, the concentration of power consumption due to the lighting of the light emitting element can be dispersed. do.

[0083] FIG. 3A is a block diagram illustrating a display device 20A. The display device 20 differs from the display device 20 in that it includes a light driver 23 a and a triangular wave generating circuit 24 .

[0084] As an example, the connection between pixel 10(i, j) and the wiring will be described. is electrically connected to the gate driver 23a via the wiring G1(j), and the pixel 10(i , j+1) is electrically connected to the gate driver 23a via the wiring G1(j+1). The pixel 10(i, j) and the pixel 10(i, j+1) are connected to the source via the wiring S1(i). The input / output terminals 22 are electrically connected to the source driver 22 .

[0085] The wiring G2 is electrically connected to a pixel group included in the display area 21, and simultaneously A reset signal can be applied at any time to turn off the light emitting element. and a triangular wave TW can be applied to all pixels at the same time.

[0086] A start pulse SP is also given to the gate driver 23a, and the triangular wave generating circuit 2 A start pulse SP and an output signal OUT of the gate driver 23a are applied to the input terminal 4. The triangular wave generating circuit 24 uses the start pulse SP and the output signal OUT to generate a triangular wave for the pixel. It is possible to generate a reset signal to be given to the group and a triangular wave TW.

[0087] FIG. 3B is a timing chart illustrating an example of the operation of the display device 20A. In FIG. 3(B), the wirings G1(1) to G1(n) are used for explanation. The pixels to be processed are pixels 10(i,j) through 10(i+1,j) from the pixel group. The detailed operation of the pixel 10 will be described with reference to FIG. Therefore, explanation will be omitted.

[0088] At time T20, the triangular wave generating circuit 24 can provide a reset signal to the wiring G2. Therefore, the pixel group is initialized at the same time, and the light emitting elements are turned off. The wave generating circuit 24 can initialize the triangular wave TW to be applied to the wiring G3. The line G1(1) is selected by the scanning signal applied to G1(1). In FIG. 3A, pixels 10(i,1) to 10(i+1,1) (not shown) are On the other hand, the display data D1 is applied to the wiring S1(i), and the display data D2 is applied to the wiring S1(i+1). Data D2 is given.

[0089] At time T21, the scanning signal applied to the line G1(1) is in a non-selected state. Thus, the pixel 10(i,1) holds the display data D1, and the pixel 10(i+1,1) The display data D2 is held in the display data buffer 144 .

[0090] At time T22, the wiring G1(j) is selected by a scanning signal applied to the wiring G1(j). The display data D3 is applied to the wiring S1(i), and the wiring S1(i+ 1) is given display data D4.

[0091] At time T23, the scanning signal applied to the wiring G1(j) is in a non-selected state. Thus, the pixel 10(i,j) holds the display data D3, and the pixel 10(i+1,j) holds the display data D4. In this case, display data D4 is held.

[0092] At time T23, the line G1(j+1) is turned on by the scanning signal applied to the line G1( j+1) is selected. Display data D5 is applied to the wiring S1(i), and Display data D6 is provided to the line S1(i+1).

[0093] At time T24, the scanning signal applied to the wiring G1(j+1) is in a non-selected state. Therefore, the pixel 10(i, j+1) holds the display data D5, and the pixel 10(i+1 , j+1), and display data D6 is held.

[0094] At time T25, the wiring G1(n) is selected by a scanning signal applied to the wiring G1(n). The display data D7 is applied to the wiring S1(i), and the wiring S1(i+ 1) is given display data D8.

[0095] At time T26, the scanning signal applied to the wiring G1(n) is in a non-selected state. Thus, the pixel 10(i,n) holds the display data D7, and the pixel 10(i+1,n) holds the display data D8. display data D8 is held.

[0096] At time T26, the reset signal applied to the wiring G2 is released. When the reset signal is released, a triangular wave TW is applied to the wiring G3. The threshold value of the transistor 11 of each pixel is controlled by the display data D8. As an example, in FIG. 3B, pixel 10(i,j), pixel 10(i+1,j), or The fact that the lighting start times of the pixels 10(i, j+1) are different means that the lighting periods are different. The area is indicated by the hatched area.

[0097] That is, the pixel 10 ( i,j), or pixel 10(i+1,j), or pixel 10(i,j+1), Similarly, other pixels are turned on and off according to the display data given to each pixel. The start times, lighting durations, and light intensities are different.

[0098] In the timing chart shown in FIG. 3B, after display data is provided to the pixel group, The triangular wave generating circuit 24 simultaneously applies a triangular wave TW to the pixel group. The pixel group has different lighting start times depending on the given display data, but each pixel At the same time, the light emitting element of the element has a maximum brightness. A reset signal is then given to the pixel group, and the display data is initialized. The display device has a time when the light is turned off and a time when the light emitting element has a maximum brightness. Since the display can be updated on the display area 21, when updating the display using scanning lines, The display data of the updated frame and the display data of the old frame are displayed simultaneously. It is possible to suppress the decrease in visibility due to the above.

[0099] In other words, the pixels of the pixel group are initialized by the reset signal. The light emitting element is turned off while the reset signal is given. Therefore, the reset signal has the effect of inserting black. In other words, in the driving method using the triangular wave TW, the contrast is improved by the effect of black insertion. The momentary maximum brightness remains as an afterimage, improving the visibility of the displayed content. By having a time interval, the lighting period is reduced, and during the lighting period, the power is controlled by the triangular wave TW. By reducing the period of high brightness that generates high power consumption and heat, power consumption and heat generation can be reduced. This can be done.

[0100] The structures and methods described in this embodiment mode may be appropriately combined with the structures and methods described in other embodiment modes. They can be used in combination.

[0101] (Embodiment 2) In this embodiment mode, a structure different from that of the pixel and the display device in the first embodiment mode will be described with reference to FIG. This will be explained with reference to FIG.

[0102] FIG. 4A shows a detailed description of a pixel 10A which is different from that shown in FIG.

[0103] The display device includes a pixel 10A, a line G1, a line G2, a line G3A, a line S1, a line Com, The pixel 10A includes a light emitting element 35, a transistor 31, and a wiring Cath. The semiconductor memory device includes a capacitor 32, a transistor 33, and a capacitor .

[0104] The gate of the transistor 33 is electrically connected to the wiring G1. The source or drain of the transistor 33 is electrically connected to the wiring S1. The other of the two terminals is the gate of the transistor 31, the source or drain of the transistor 32. One of the electrodes of the transistor 32 is electrically connected to one of the electrodes of the capacitor 34. The gate of the transistor 32 is electrically connected to the wiring G2. The other end is electrically connected to the wiring Com. The source or drain of the transistor 12 is electrically connected to one of the electrodes of the light emitting element 35. The other of the drains is electrically connected to the wiring Cath and the other of the electrodes of the capacitance element 34. The other electrode of the light emitting element 35 is electrically connected to the wiring G3A.

[0105] In FIG. 4A, transistors 31, 32, and 33 are Each of the transistors 31, 32, and 33 may have a back gate. One or more of the transistors 33 may have a back gate.

[0106] A low-voltage line Com is connected to the wiring Com for initializing the display data D1 held in the capacitance element 34. The low potential is set to a current value at which the light emitting element does not emit light. In other words, a potential that turns off the transistor 31 is applied. is connected to the anode terminal of the light emitting element and a triangular wave TW is applied. The light emitting element is connected to the cathode terminal via a resistor 31. It is preferable that the potential to be applied is smaller than the potential when the display data D1 is initialized.

[0107] A scanning signal is applied to the pixel 10A connected to the wiring G1 via the wiring G1. A reset signal is applied to the pixel 10A connected to the line G2 via the line G2. The pixel 10A connected to the light emitting element 3A is connected to the anode terminal of the light emitting element 3A via the wiring G3A. The pixel 10 connected to the wiring S1 receives display data D1 via the wiring S1. Given.

[0108] The pixel 10A shown in FIG. 4A is configured such that a triangular wave TW is applied to the anode terminal of the light-emitting element 35. This is what differs from the pixel 10 shown in FIG.

[0109] FIG. 4B is a timing chart illustrating an example of the operation of the pixel 10A.

[0110] At time T30, a reset signal is applied to the wiring G2. A reset signal is applied to the transistor 32 via the wiring G2, and the light-emitting element is turned off. is turned on, and the potential held in the capacitance element 34 is initialized. At 30, the triangular wave TW applied to the line G3A is initialized.

[0111] At time T31, the reset signal applied to the wiring G2 is released, and the transistor 3 2 is turned off. Furthermore, at time T31, the scanning signal applied to the wiring G1 The wiring G1 is selected. The transistor 33 is turned on, and the line S1 is supplied with The display data D1 to be displayed is applied to the capacitive element 34. D1 is provided to the gate of transistor 31.

[0112] At time T32, the scanning signal applied to the line G1 is in a non-selected state. The transistor 33 is turned off, and the display data D1 applied to the capacitance element 34 is held. Next, it is preferable that a triangular wave TW is applied to the wiring G3A. The first potential is applied to the light emitting element, and the light emitting element starts to emit light. The potential of the triangular wave TW applied to the anode terminal of the light element is the threshold voltage of the light emitting element in the display data D1. When the voltage LVth becomes greater than the added potential DL1, the light emitting element starts to emit light.

[0113] FIG. 4B shows an example in which the light emitting element is turned on during the hatched period. It is preferable that the light emission intensity of the light emitting element increases in accordance with the change in the triangular wave TW. In addition, it is preferable that the period during which the triangular wave TW is applied to the pixel 10A is shorter than one frame. It is nice.

[0114] FIG. 5A is a block diagram illustrating the display device 20B. The display region 21 includes a source driver 22 and a gate driver 23b. The pixel array 10A includes pixels 10A(1,1) to 10A(m,n). In A), pixels 10A(i, j) to 10A(i+1, j+1) are shown. n is a positive integer, i is an integer greater than or equal to 1 and less than or equal to m, and j is an integer greater than or equal to 1 and less than or equal to n.

[0115] As an example, the connection between the pixel 10A(i, j) and the wiring will be described. The gate driver G1(j), G2(j), or G3A(j) is connected to the gate driver G2(j) via the wiring G1(j), the wiring G2(j), or the wiring G3A(j). The pixel 10A(i, j) is electrically connected to the source 23b via the wiring S1(i). The switch 22 is electrically connected to the switch driver 22 .

[0116] FIG. 5B is a timing chart illustrating an example of the operation of the display device. The detailed operation of A can be seen in the explanation of FIG. 4(B), so the explanation will be omitted. do.

[0117] At time T40, a reset signal is applied to the wiring G2(j), and the pixel 10A(i,j), The held potential of the pixel 10A(i+1,j) is initialized, and the light-emitting element is turned off. The triangular wave TW applied to the wiring G3A(j) is initialized.

[0118] At time T41, the reset signal applied to the wiring G2(j) is released. At time T41, the wiring G1(j) is selected by a scanning signal applied to the wiring G1(j). The display data D1 is applied to the wiring S1(i), and the wiring S1(i+1) is provided with display data D2.

[0119] Furthermore, at time T41, a reset signal is applied to the wiring G2(j+1), and the pixel 10A The held potentials of pixels 10A(i,j) and 10A(i+1,j) are initialized, and the light-emitting elements are turned off. In addition, the triangular wave TW given to the wiring G3A(j+1) is initialized.

[0120] At time T42, the scanning signal applied to the wiring G1(j) is in a non-selected state. As a result, the pixel 10A(i,j) holds the display data D1, and the pixel 10A(i+1,j ) holds display data D2.

[0121] Next, it is preferable that a triangular wave TW is applied to the wiring G3A(j). (i,j) applies a current corresponding to the display data D1 to the light emitting element, and the light emitting element starts to light up However, the potential of the triangular wave TW applied to the anode terminal of the light-emitting element corresponds to the display data D1. When the potential exceeds the potential DL1 obtained by adding the threshold voltage LVth of the element, the light-emitting element starts to light up. Similarly, the pixel 10A(i+1,j) applies a current corresponding to the display data D2 to the light emitting element. The light emitting element starts to light up.

[0122] At time T43, the scanning signal applied to the wiring G1(j+1) is in a non-selected state. Therefore, the pixel 10A(i,j+1) holds the display data D3, and the pixel 10A(i +1, j+1) holds display data D4.

[0123] Next, it is preferable that a triangular wave TW is applied to the wiring G3A(j+1). 0A(i,j+1) is a current corresponding to the display data D3 that is applied to the light emitting element, causing the light emitting element to light up. However, the potential of the triangular wave TW applied to the anode terminal of the light-emitting element is changed to the display data D When the potential exceeds DL3, which is the sum of LVth and the threshold voltage of the light-emitting element, the light-emitting element turns on. Similarly, the pixel 10A(i+1, j+1) emits a current according to the display data D4. The light emitting element starts to light up. After that, the same process is repeated. The explanation will be omitted.

[0124] In the timing chart shown in FIG. 5B, the wiring G1(j) or the wiring G1(j+1) For each scanning signal applied to the wiring G3A(j), or the wiring G3A A triangular wave TW is applied to row (j+1). The lighting period differs depending on the row selected, so the light emission The lighting time of the elements is distributed. Therefore, the concentration of power consumption due to lighting of the light emitting elements is dispersed. It is possible.

[0125] FIG. 6A is a block diagram illustrating a display device 20C. The region 21, the source driver 22, the gate driver 23c, and the gate driver 23d are included. The display area 21 includes pixels 10A(1,1) to 10A(m,n). As an example, in FIG. 6A, pixels 10A(i, j) to 10A(i+1, j+ 1), where m and n are positive integers, i is an integer between 1 and m, and j is an integer between 1 and n. The following integers:

[0126] As an example, the connection between the pixel 10A(i, j) and the wiring will be described. The pixel electrode 23c is electrically connected to the gate driver 23c via the wiring G1(j). The element 10A(i, j) is connected to the gate driver 10A(i, j) via the wiring G2A(k) or the wiring G3A(k). The pixel 10A(i,j) is electrically connected to a pixel in an adjacent row, e.g. The pixel 10A(i, j+1) and the wiring G2A(k) and the wiring G3A(k) can be shared. In FIG. 6A, the pixel connected to the wiring G1(j) and the wiring G1(j+1) is This shows an example in which the wiring G2A(k) and the wiring G3A(k) are shared. The reason why the wiring G3A(k) and the wiring G3A(k) can be shared is that the wiring G3A(k) is connected to the adjacent wiring G1. The pixels connected to the multiple wirings G1 are not limited to the wirings G2A(k), The wiring G3A(k) can be shared.

[0127] A reset signal is applied to the wire G2A(k), and a triangular wave is applied to the wire G3A(k). The pixel 10A(i, j) and the pixel 10A(i, j+1) are connected to the wiring S1(i ) and is electrically connected to the source driver 22. Note that k is a positive integer between 1 and j. An integer.

[0128] FIG. 6B is a timing chart illustrating an example of the operation of the display device 20C. For detailed operation of the element 10A, the explanation of FIG. 4(B) can be referred to. Omitted.

[0129] At time T50, a reset signal is applied to the wiring G2A(k), and the pixel 10A(i,j) , and the held potential of pixel 10A(i+1,j) is initialized, and the light-emitting element is turned off. , the triangular wave TW applied to the wiring G3A(j) is initialized.

[0130] At time T51, the reset signal applied to the wiring G2A(k) is released. At time T51, the wiring G1(j) is selected by a scanning signal applied to the wiring G1(j). The display data D1 is applied to the wiring S1(i), and the wiring S1(i +1) is given display data D2.

[0131] At time T52, the scanning signal applied to the line G1(j) is in a non-selected state. As a result, the pixel 10A(i,j) holds the display data D1, and the pixel 10A(i+1,j ) holds display data D2.

[0132] At time T52, the wiring G1(j+1) is turned on by a scanning signal applied to the wiring G1(j+1) ) is selected. Display data D3 is applied to the wiring S1(i), and the wiring S1( i+1) is given display data D4.

[0133] Furthermore, at time T53, the scanning signal given to the wiring G1(j+1) is in a non-selected state. Therefore, the pixel 10A(i, j+1) holds the display data D3, and the pixel 1 Display data D4 is held in 0A(i+1,j+1).

[0134] At time T54, it is preferable that a triangular wave TW is applied to the wiring G3A(k). The element 10A(i,j) supplies a current corresponding to the display data D1 to the light-emitting element, and the light-emitting element lights up. The potential of the triangular wave TW applied to the anode terminal of the light-emitting element is displayed as the display data D1 When the potential exceeds a potential DL1 obtained by adding the threshold voltage LVth of the light-emitting element to the potential DL1, the light-emitting element starts to light up. Similarly, the pixel 10A(i+1, j), the pixel 10A(i, j+1), the pixel 10A( i+1, j+1) correspond to display data D2, display data D3, and display data D4, respectively. The current thus determined is applied to the light emitting element, causing the light emitting element to start lighting up.

[0135] In the timing chart shown in FIG. 5B, the wiring G1(j) or the wiring G1(j+1) A triangular wave TW is applied to each wiring G3A(k) for each scanning signal applied to By reducing the number of wirings, the cost of the gate driver 23d can be reduced. In addition, since the lighting period differs depending on the selected rows, the lighting time of the light-emitting elements is dispersed. Therefore, it is possible to disperse the power consumption caused by turning on the light emitting elements.

[0136] The structures and methods described in this embodiment mode may be appropriately combined with the structures and methods described in other embodiment modes. They can be used in combination.

[0137] (Embodiment 3) In this embodiment, an example of the display device exemplified in the previous embodiment will be described in detail. do.

[0138] <Configuration example> FIG. 7A shows a top view of a display device 700. The display device 700 is provided with a sealant 712. The first substrate 701 and the second substrate 705 are bonded together. In the region sealed by the second substrate 705 and the sealant 712, the first substrate 701 A pixel section 702, a source driver circuit section 704, and a gate driver circuit section 706 are provided on the substrate. The pixel portion 702 is provided with a plurality of display elements.

[0139] In addition, an FPC 716 (FP C: Flexible printed circuit) is connected to the FPC terminal 7 The FPC terminal portion 708 and the signal line 710 are connected by the FPC 716. Through the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 Various signals are supplied to each of these.

[0140] A plurality of gate driver circuit sections 706 may be provided. The path portion 706 and the source driver circuit portion 704 are separately formed on a semiconductor substrate or the like. The IC chip may be in the form of a packaged IC chip. The IC chip may be mounted on the first substrate 70. It can be mounted on FPC716 or FPC716.

[0141] The pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 have The structure of the transistor is not particularly limited. , polycrystalline semiconductors, microcrystalline semiconductors, amorphous semiconductors, etc., are used alone or in combination. The semiconductor material may be, for example, silicon or germanium. In addition, silicon germanium, silicon carbide, gallium arsenide, oxide semiconductors Compound semiconductors such as nitride semiconductors and organic semiconductors can be used.

[0142] When using an organic semiconductor as the semiconductor layer, low molecular weight organic materials with aromatic rings or π electron sharing Conductive polymers such as rubrene, tetracene, and pentacene can be used. , perylene diimide, tetracyanoquinodimethane, polythiophene, polyacetylene, Polyparaphenylenevinylene and the like can be used.

[0143] The transistor used in this embodiment is made of a highly purified oxide film in which the formation of oxygen vacancies is suppressed. It is preferable that the transistor has a semiconductor film. The off-state current of the transistor can be reduced. This allows the retention time of electrical signals such as signals to be extended, thereby reducing the frequency of refresh operations. This has the effect of reducing power consumption.

[0144] In addition, the transistor used in this embodiment has a relatively high field-effect mobility. For example, a transistor capable of such high speed operation can be used for a display device. By using this in a device, the switching transistor in the pixel section and the driver circuit section In other words, the transistors can be formed on the same substrate as the silicon wafer. It is also possible to adopt a configuration that does not use the driver circuit, and the number of components in the semiconductor device can be reduced. In addition, by using transistors that can be driven at high speed in the pixel area, high quality images can be obtained. Images can be provided.

[0145] A display device 700A shown in FIG. 7B is a display device having a flexible resin instead of the first substrate 701. A display device having an adhesive layer 743 and capable of being used as a flexible display. Here is an example.

[0146] In the display device 700A, the pixel section 702 is not rectangular, but has arc-shaped corners. As shown in a region P1 in FIG. 7B, the pixel section 702 and a part of the resin layer 743 The pair of gate driver circuit sections 706 are connected to the pixel section 70. The gate driver circuit section 706 is provided on both sides of the pixel section 702. , the recess is provided along a circular arc-shaped contour.

[0147] The resin layer 743 has a protruding shape at the portion where the FPC terminal portion 708 is provided. In addition, a part of the resin layer 743 including the FPC terminal portion 708 is disposed on the back side in the region P2 in FIG. By folding back a part of the resin layer 743, the FPC 716 can be attached to the pixel section 7 With the display device 700A placed on the back side of the display device 02, the display device 700A can be mounted on the electrical device. This makes it possible to reduce the space required for electronic devices.

[0148] An IC 717 is mounted on an FPC 716 connected to the display device 700A. The IC 717 has a function as, for example, a source driver circuit. The source driver circuit section 704 in 00A includes a protection circuit, a buffer circuit, a demultiplexer, The configuration may include at least one of a crosstalk circuit, etc.

[0149] The display device 700B shown in FIG. 7C can be suitably used in electronic devices having a large screen. For example, a television device, a monitor device, a personal computer, Computers (including notebook and desktop computers), tablet devices, digital signage, etc. It can be suitably used for the following:

[0150] The display device 700B includes a plurality of source driver ICs 721 and a pair of gate driver circuits. The sensor 722 has a first section 722.

[0151] The source driver ICs 721 are each attached to an FPC 723. In addition, the FPCs 723 are each connected to the substrate 701 at one terminal and to the printed circuit board 72 at the other terminal. 4. By bending the FPC 723, the printed circuit board 724 is It can be mounted on the back side of the pixel section 702 in an electric device, thereby saving space in the electronic device. It is possible to achieve this.

[0152] On the other hand, the gate driver circuit section 722 is formed on the substrate 701. It is possible to realize electronic devices with narrow frames.

[0153] With this configuration, a large-sized and high-resolution display device can be realized. Surface size is 30 inches or more, 40 inches or more, 50 inches or more, or 60 inches or more diagonally The same can be applied to display devices with extremely high resolution such as 4K2K or 8K4K. A high-resolution display device can be realized.

[0154] <Cross-section configuration example 1> FIG. 8 is a cross-sectional view taken along the dashed line QR shown in FIG.

[0155] The display device shown in FIG. 8 includes a lead wiring section 711, a pixel section 702, and a source driver circuit. The wiring portion 711 includes the signal line 71. The pixel portion 702 includes a transistor 750 and a capacitor 790. The driver circuit section 704 includes a transistor 752 .

[0156] The capacitor 790 shown in FIG. 8 has the same first gate electrode as the transistor 750. The lower electrode is formed by processing a film, and the semiconductor layer is formed by processing the same metal oxide. and an upper electrode, the upper electrode being connected to the source and drain regions of the transistor 750. The resistance is reduced in the same manner as in the case of the transistor 75. A part of the insulating film that functions as the first gate insulating layer of the capacitance element 0 is provided. 790 is a laminated structure in which an insulating film that functions as a dielectric film is sandwiched between a pair of electrodes. In addition, the upper electrode is processed with the same film as the source and drain electrodes of the transistor. The resulting wiring is connected.

[0157] In addition, a planarization layer is formed on the transistor 750, the transistor 752, and the capacitor 790. The insulating layer 770 has a function of preventing the insulating layer 77 from being damaged. The conductive layers 772 and 774 provided on the conductive layer 770 can be planarized. The conductive layer 772 and the conductive layer 774 are located on the same plane, and the conductive layer 772 and the conductive layer 774 are located on the same plane. Since the surface is flat, the conductive layer 772, the conductive layer 774, and the light-emitting element 782 can be easily bonded to each other. The device can be electrically connected to the

[0158] Here, the light emitting element 782 will be described. As an example, the light emitting element 782 may be a plurality of different It is preferable that the light emitting element 78 can emit light of a different color. Alternatively, a light-shielding layer may be provided on the second substrate 705 side. The viewing angle can be limited by providing a light-shielding layer. A light-shielding layer and a colored layer may be provided on the plate 705 side. By providing a light-shielding layer and a colored layer on the side, a light-emitting element 782 that emits white light can be used. This can be done.

[0159] A transistor 750 included in the pixel portion 702 and a transistor 751 included in the source driver circuit portion 704 A transistor having a different structure from the transistor 752 may be used. For example, A top-gate transistor is applied to one side and a bottom-gate transistor is applied to the other side. The gate driver circuit section 706 may also be configured using a source driver. This is similar to the driver circuit section 704.

[0160] The signal line 710 is the same as the source and drain electrodes of the transistors 750 and 752. In this case, if a low-resistance material such as a material containing copper is used, the wiring This is preferable because it reduces signal delays caused by line resistance and enables display on a large screen.

[0161] The FPC terminal portion 708 includes wiring 760, a part of which functions as a connection electrode, and an anisotropic conductive film 78. The wiring 760 is connected to the FPC 710 via an anisotropic conductive film 780. In this example, the wiring 760 is electrically connected to a terminal of the transistor 750, The source electrode and drain electrode 752 are formed from the same conductive film.

[0162] The first substrate 701 and the second substrate 705 are, for example, a glass substrate or a plastic substrate. A flexible substrate such as a plastic substrate can be used for the first substrate 701. In the case of using a substrate having a thickness of 100 nm or less, water or hydrogen may be provided between the first substrate 701 and the transistor 750 or the like. It is preferable to provide an insulating layer having a barrier property against the above-mentioned.

[0163] Next, an example of a method for manufacturing the display device 700 shown in FIG. Each diagram in FIG. 11 is a schematic cross-sectional view of a display device 700 at each step of the manufacturing method. FIG.

[0164] The thin films (insulating films, semiconductor films, conductive films, etc.) constituting the display device are formed by sputtering. , Chemical Vapor Deposition (CVD) method, Vacuum evaporation, Pulsed Laser Deposit (PLD) ion) method, Atomic Layer Deposition (ALD) The CVD method can be plasma enhanced chemical vapor deposition (PECVD) or Alternatively, a thermal CVD method may be used. An example of the thermal CVD method is metal-organic chemical vapor deposition (MOCVD). Alternatively, a (etal Organic CVD) method may be used.

[0165] In addition, the thin films (insulating films, semiconductor films, conductive films, etc.) that make up the display device are formed by spin coating, de Dip, spray coating, inkjet, dispensing, screen printing, offset printing Printing methods, doctor knife, slit coat, roll coat, curtain coat, knife It can be formed using tools (equipment) such as a coat.

[0166] In addition, when processing the thin films that make up the display device, photolithography and other methods are used. Alternatively, the island-shaped thin film may be formed by a film forming method using a shielding mask. The thin film can be processed by nanoimprinting, sandblasting, lift-off, etc. As the photolithography method, for example, there are two methods as follows. A photosensitive resist material is applied onto the thin film to be processed, exposed through a photomask, and then developed. A resist mask is formed by etching the thin film. The other method is to remove the mask after forming a photosensitive thin film. Then, development is performed to process the thin film into a desired shape.

[0167] In the photolithography method, the light used for exposure is, for example, i-line (wavelength 365 nm), Uses g-rays (wavelength 436 nm), h-rays (wavelength 405 nm), or a mixture of these. In addition, ultraviolet light, KrF laser light, ArF laser light, etc. can be used. Also, exposure may be performed by immersion lithography. , even with extreme ultraviolet (EUV) or X-rays. Also, electron beams can be used instead of light for exposure. X-rays or electron beams are preferable because they allow extremely fine processing. If the exposure is performed by scanning a beam such as a photon beam, a photomask is not required. be.

[0168] There are three methods for etching thin films: dry etching, wet etching, and sandblasting. Methods such as the above can be used.

[0169] (Formation of transistors, etc.) First, the conductive layer 301, the conductive layer 303, and the conductive layer 305 are formed on a substrate 701. The conductive layer 301, the conductive layer 303, and the conductive layer 305 are formed by forming a resist mask after forming a conductive film. The conductive film is then etched, and the resist mask is then removed. .

[0170] Next, an insulating layer 3 is formed on the substrate 701, the conductive layer 301, the conductive layer 303, and the conductive layer 305. Form 11.

[0171] Next, the semiconductor layer 321, the semiconductor layer 323, and the semiconductor layer 325 are formed (FIG. 9(A) The semiconductor layers 321, 323, and 325 are formed by laser irradiation after the semiconductor film is formed. A resist mask is formed, and the semiconductor film is etched, and then the resist mask is removed. It can be formed by:

[0172] Next, the insulating layer 331, the conductive layer 341, the conductive layer 351, the insulating layer 333, the conductive layer 343, and The insulating layer 331 and the insulating film which will become the insulating layer 333, the conductive layer 341, and the conductive layer 353 are formed. A conductive film to be the conductive layer 343, a conductive film to be the conductive layer 351, and a conductive film to be the conductive layer 353 were formed. Then, a resist mask is formed, and the insulating film and the conductive film are etched. It can be formed by removing the

[0173] Subsequently, an insulating layer 361 and an insulating layer 363 are formed (FIG. 9(B)).

[0174] Next, openings are formed in the insulating layer 361 and the insulating layer 363, and the conductive layer 371 and the conductive layer 373 are a, a conductive layer 373b, a conductive layer 375, a conductive layer 377, and a wiring 760 are formed. 71, the conductive layer 373a, the conductive layer 373b, the conductive layer 375, the conductive layer 377, and the wiring 760. The conductive layer 302 can be formed by a method similar to that for the conductive layer 301 and the like.

[0175] Through the above steps, the signal line 710, the transistor 750, the capacitor element 790, and the transistor Then, the insulating layer 379 is formed. The reference numeral 9 functions as a protective film for the transistor 750 and the like.

[0176] Formation of Insulating Layer 770 Next, the insulating layer 770 is formed. By using a photosensitive material for the insulating layer 770, The opening can be formed by a lithography method or the like. After that, a part of the insulating film may be etched using a resist mask to form an opening. When an organic insulating material is used for the insulating layer 770, the flatness of the upper surface can be improved. preferable.

[0177] Alternatively, an inorganic insulating film may be used as the insulating layer 770. Silicon, silicon oxide, silicon oxynitride, silicon nitride oxide, aluminum oxide, nitride of inorganic insulating materials such as aluminum, aluminum oxide nitride, or aluminum oxide nitride The insulating layer 770 can be used as a single layer or a stacked layer. It acts as a protective layer for Sta 750 etc.

[0178] The insulating layer 770 may have a stacked structure of an inorganic insulating film and an organic insulating film.

[0179] Next, a part of the insulating layer 379 on the wiring 760 of the FPC terminal portion 708 is removed, and the wiring 76 Expose 0.

[0180] <Formation of Conductive Layer 772 and Conductive Layer 774> Next, a conductive layer 772 and a conductive layer 774 are formed over the insulating layer 770 (FIG. 10A). The conductive layer 772 is electrically connected to the transistor 750 through an opening in the insulating layer 770. The conductive layer 772 and the conductive layer 774 can be formed by the same method as the conductive layer 301. The conductive layer 772 and the conductive layer 774 are preferably made of a material that is reflective to visible light. For example, the conductive layer 772 and the conductive layer 774 may be made of an alloy of silver, palladium and copper (APC). Materials including titanium, aluminum, copper, etc. can be used.

[0181] Subsequently, conductive bumps 791 and 792 are formed on the conductive layers 772 and 774, respectively. The bumps 791 and 793 are formed using gold, silver, or the like. Metals such as tin, alloys containing these metals, anisotropic conductive films such as conductive resins, The bumps 791 and 793 may be made of, for example, gold. The bumps 791 and 793 can be formed by a printing method, a transfer method, or the like. A method such as a spraying method or a discharge method can be used.

[0182] <Arrangement of light-emitting element 782> Next, the light emitting element 782 is disposed on the bumps 791 and 793. The cathode electrode and the anode electrode of the light emitting element 782 are respectively connected to the bumps 791 and 79. The light emitting element 782 is disposed so as to be in contact with the bump 791, the bump 793, and the light emitting element 7 82, the conductive layer 772 and the conductive layer 774 are pressed together, and a conductive layer 772 and a conductive layer 774 are formed on the conductive layer 772 and the conductive layer 774. The light element 782 is fixed. At the same time, the conductive layer 772 and the conductive layer 774, and the light emitting element 782 are electrically connected (FIG. 11).

[0183] A pick-and-place device can be used to place the light emitting element 782. The light-emitting element 782 is arranged using the FSA (Fluidic Self Assembly) method. In the FSA method, a light emitting layer may be formed on the conductive layer 772 and in a region overlapping with the conductive layer 774. A concave insulating layer that fits the light element 782 is formed, and the light emitting element 782 is self-aligned in the concave portion in the liquid. Arrange them appropriately.

[0184] <Bonding of substrate 701 and substrate 705> Next, a bonding agent is applied to either or both of the substrates 701 and 705. The adhesive layer is formed so as to surround the area in which the pixels are arranged. For example, it can be formed by a screen printing method, a dispensing method, etc. The resin may be a curable resin or a UV-curable resin. Alternatively, a resin that hardens when heated may be used as the adhesive layer. A resin having both hardening and thermosetting properties may also be used.

[0185] Next, the substrate 701 and the substrate 705 are bonded together, and the adhesive layer is cured to form a sealing film 732. If the bonding is performed under a reduced pressure atmosphere, air bubbles may get mixed between the substrates 701 and 705. This is preferable because it can prevent the above-mentioned problem.

[0186] Next, an anisotropic conductive film 780 is provided on the wiring 760. By placing 716 and bonding it by heat, the wiring 760 and the FPC 716 are electrically connected. Can.

[0187] Through the above steps, the display device 700 can be formed (FIG. 8).

[0188] The structures and methods described in this embodiment mode may be appropriately combined with the structures and methods described in other embodiment modes. They can be used in combination.

[0189] (Embodiment 4) In this embodiment mode, a transistor that can be used in the display device shown in the previous embodiment mode is An example of the data will be described below.

[0190] The display device of one embodiment of the present invention includes a bottom-gate transistor or a top-gate transistor. The present invention can be implemented using various types of transistors, such as transistors having different shapes, such as transistors having different shapes. The semiconductor layer material and transistor structure can be easily replaced to suit the production line. It is possible.

[0191] <Bottom-gate transistor> FIG. 12(A1) shows a channel-protected transistor, which is a type of bottom-gate transistor. 12(A1) is a cross-sectional view of a transistor 1810 in the channel length direction. The transistor 1810 is formed on the substrate 1771. An electrode 1746 is provided on the insulating layer 1771 via an insulating layer 1772. The semiconductor layer 1742 is disposed between the edge layer 1726. The electrode 1746 functions as a gate electrode. The insulating layer 1726 can function as a gate insulating layer.

[0192] In addition, an insulating layer 1741 is provided over a channel formation region of the semiconductor layer 1742. Electrodes 1744a and 1744b are provided on the insulating layer 1726 in contact with a portion of the insulating layer 1742. The electrode 1744a can function as either a source electrode or a drain electrode. 1744b can function as the other of the source and drain electrodes. A portion of electrode 1744b is formed on insulating layer 1741.

[0193] The insulating layer 1741 can function as a channel protection layer. By providing the electrode 1744a and the electrode 1744b, the semiconductor layer 1 Therefore, when the electrodes 1744a and 1744b are formed, the electrodes 1744a and 1744b are prevented from being exposed. In addition, the channel formation region of the semiconductor layer 1742 can be prevented from being etched. According to one embodiment of the present invention, a transistor with favorable electrical characteristics can be provided.

[0194] The transistor 1810 includes an electrode 1744a, an electrode 1744b, and an insulating layer 1741. It has an insulating layer 1728 thereon, and an insulating layer 1729 on the insulating layer 1728 .

[0195] When an oxide semiconductor is used for the semiconductor layer 1742, the electrodes 1744a and 1744b At least the portion in contact with the semiconductor layer 1742 is provided with oxygen removed from a portion of the semiconductor layer 1742. In the semiconductor layer 1742, it is preferable to use a material that can generate oxygen vacancies. The region where oxygen vacancies occur increases in carrier concentration, and the region becomes n-type, and the n-type region (n + Therefore, the region can function as a source region or a drain region. When an oxide semiconductor is used for the semiconductor layer 1742, oxygen is removed from the semiconductor layer 1742. Examples of materials that can cause oxygen vacancies include tungsten and titanium. It can be done.

[0196] The source region and the drain region are formed in the semiconductor layer 1742, whereby the electrode 174 4a and the contact resistance between the electrode 1744b and the semiconductor layer 1742 can be reduced. The electrical characteristics of the transistor, such as field effect mobility and threshold voltage, are improved. It is possible.

[0197] When a semiconductor such as silicon is used for the semiconductor layer 1742, the semiconductor layer 1742 and the electrode 1 Between the semiconductor layer 1742 and the electrode 1744b, an n-type semiconductor or a p-type semiconductor is provided. It is preferable to provide a layer that functions as an n-type semiconductor or a p-type semiconductor. The layer may function as a source or drain region of a transistor.

[0198] The insulating layer 1729 has a function of preventing or reducing the diffusion of impurities from the outside into the transistor. It is preferable to form the insulating layer 1729 using a material having the function of insulating the insulating layer 1729 as necessary. It can also be omitted.

[0199] A transistor 1811 shown in FIG. 12A2 has a back gate electrode over an insulating layer 1729. The transistor 1723 differs from the transistor 1810 in that it has an electrode 1723 that can function as an 23 can be formed using the same materials and methods as the electrode 1746 .

[0200] In general, the back gate electrode is formed of a conductive layer, and the gate electrode and the back gate electrode form a semiconductor. The back gate electrode is disposed so as to sandwich the channel forming region of the gate electrode. The back gate electrode can be made to function in the same manner as the gate electrode. Alternatively, the potential may be a ground potential (GND potential) or an arbitrary potential. By changing the potential of the gate electrode independently of the potential of the gate electrode, the transistor can be The threshold voltage can be varied.

[0201] In addition, both the electrode 1746 and the electrode 1723 can function as a gate electrode. Therefore, the insulating layer 1726, the insulating layer 1728, and the insulating layer 1729 are each a gate. The electrode 1723 can function as a gate insulating layer. It may be provided between layers 1729 .

[0202] When one of the electrodes 1746 and 1723 is referred to as a "gate electrode," the other is referred to as a "gate electrode." For example, in the transistor 1811, the electrode 1723 is called a "back gate electrode." When the term "gate electrode" is used, the electrode 1746 is referred to as a "back gate electrode." When 23 is used as a "gate electrode", the transistor 1811 is a top-gate transistor. It can be considered as a kind of transistor. One of them may be referred to as a "first gate electrode" and the other as a "second gate electrode." .

[0203] By providing the electrode 1746 and the electrode 1723 with the semiconductor layer 1742 interposed therebetween, By setting the electrode 1746 and the electrode 1723 at the same potential, the carriers in the semiconductor layer 1742 Since the area in which the carriers flow becomes larger in the film thickness direction, the amount of carrier movement increases. As a result, the on-state current of the transistor 1811 increases and the field effect mobility increases. do.

[0204] Therefore, the transistor 1811 is a transistor having a large on-current relative to its area. That is, the occupancy rate of the transistor 1811 is According to one embodiment of the present invention, the area occupied by a transistor can be reduced. Therefore, according to one embodiment of the present invention, a highly integrated semiconductor device can be realized. It can be realized.

[0205] In addition, since the gate electrode and the back gate electrode are formed of a conductive layer, the outside of the transistor The function of preventing the electric field generated by the electrostatic discharge from acting on the semiconductor layer in which the channel is formed (especially the electrostatic discharge The back gate electrode is larger than the semiconductor layer. By forming the semiconductor layer in a thin layer and covering it with a back gate electrode, the electric field shielding function can be improved. do.

[0206] In addition, by forming the back gate electrode with a conductive film having a light shielding property, This prevents light from entering the semiconductor layer from the electrode side. This prevents degradation of electrical characteristics such as a shift in the threshold voltage of a transistor. do.

[0207] According to one embodiment of the present invention, a highly reliable transistor can be provided. As a result, a highly reliable semiconductor device can be realized.

[0208] FIG. 12B1 shows a channel protection transistor 1 having a different structure from that shown in FIG. 12A1. 1 is a cross-sectional view of the transistor 1820 in the channel length direction. 17.0, but the insulating layer 1741 covers the edge of the semiconductor layer 1742. In addition, a part of the insulating layer 1729 overlapping the semiconductor layer 1742 is selectively removed. In the opening formed by the above process, the semiconductor layer 1742 and the electrode 1744a are electrically connected to each other. In addition, a part of the insulating layer 1729 overlapping the semiconductor layer 1742 is selectively removed to form a In the other opening, the semiconductor layer 1742 and the electrode 1744b are electrically connected. The region of layer 1729 that overlaps the channel forming region can function as a channel protection layer.

[0209] A transistor 1821 shown in FIG. 12B2 has a back gate electrode over an insulating layer 1729. The transistor 1720 differs from the transistor 1820 in that it has an electrode 1723 that can function as a transistor.

[0210] By providing the insulating layer 1741, the insulating layer 1741 can prevent the formation of the electrodes 1744a and 1744b. Therefore, the semiconductor layer 1742 can be prevented from being exposed. This can prevent the semiconductor layer 1742 from becoming thin during the formation of b.

[0211] In addition, the transistors 1820 and 1821 are the transistors 1810 and The distance between the electrodes 1744a and 1746 and the distance between the electrodes 1744b and 1746 are smaller than those of the transistor 1811. 4b and electrode 1746. Therefore, the distance between electrode 1744a and electrode 1746 In addition, the parasitic capacitance between the electrodes 1744b and 1746 can be reduced. According to one aspect of the present invention, the parasitic capacitance occurring in the semiconductor device can be reduced. This makes it possible to realize a transistor with a high gate capacitance.

[0212] The transistor 1825 shown in FIG. 12C1 is a bottom-gate transistor. 18 is a cross-sectional view of a channel-etched transistor 1825 in the channel length direction. The transistor 1825 does not include the insulating layer 1741 and has an electrode 1744a and an electrode 1744b. Therefore, the semiconductor layer exposed when the electrodes 1744a and 1744b are formed is In some cases, a part of the insulating layer 1742 may be etched. The productivity of transistors can be improved.

[0213] A transistor 1826 shown in FIG. 12C2 has a back gate electrode over an insulating layer 1729. The transistor 1722 differs from the transistor 1825 in that it has an electrode 1723 that can function as a transistor.

[0214] 13(A1) to 13(C2) show transistors 1810, 1811, 1820, and 1 8 show cross-sectional views in the channel width direction of 821, 1825, and 1826, respectively.

[0215] In the structures shown in FIG. 13(B2) and FIG. 13(C2), the gate electrode and the back gate electrode The gate electrode and the back gate electrode are connected to each other, and the potential of the gate electrode and the back gate electrode are the same. 42 is sandwiched between the gate electrode and the back gate electrode.

[0216] The length of each of the gate electrode and the back gate electrode in the channel width direction is The length of the semiconductor layer 1742 in the channel width direction is longer than the length of the semiconductor layer 1742 in the channel width direction. The gate electrode or back gate is formed by sandwiching the edge layers 1726, 1741, 1728, and 1729. It is configured to be covered with electrodes.

[0217] With this structure, the semiconductor layer 1742 included in the transistor can be used as a gate electrode and It can be electrically surrounded by the electric field of the back gate electrode.

[0218] Like the transistor 1821 or the transistor 1826, the gate electrode and the back gate The electric field of the gate electrode electrically connects the semiconductor layer 1742 in which the channel formation region is to be formed. The device structure of the surrounding transistor is called the Surrounded channel (S-channel This can be called a nnel structure.

[0219] By adopting an S-channel structure, one or both of the gate electrode and the back gate electrode By this method, an electric field for inducing a channel can be effectively applied to the semiconductor layer 1742. This improves the current drive capability of the transistor and makes it possible to obtain high on-current characteristics. In addition, since it is possible to increase the on-current, it is possible to miniaturize transistors. In addition, the S-channel structure makes it possible to mechanically Strength can be increased.

[0220] <Top-gate transistor> The transistor 1842 illustrated in FIG. 14A1 is a top-gate transistor. The transistor 1842 is formed by forming an insulating layer 1729 and then connecting the electrodes 1744a and The transistor 1810 and the transistor 1820 are different in that the transistor 1810 and the transistor 1820 form an electrode 1744b. The electrodes 1744a and 1744b are formed on the insulating layers 1728 and 1729. It is electrically connected to the semiconductor layer 1742 in the opening.

[0221] In addition, a part of the insulating layer 1726 that does not overlap the electrode 1746 is removed, and the electrode 1746 and the remaining The insulating layer 1726 is used as a mask to introduce impurities 755 into the semiconductor layer 1742. Thus, an impurity region can be formed in a self-aligned manner in the semiconductor layer 1742. The transistor 1842 includes a region where the insulating layer 1726 extends beyond the edge of the electrode 1746. The region of the semiconductor layer 1742 into which the impurity 755 is introduced via the insulating layer 1726 is The impurity concentration is smaller than that of the region into which the impurity 755 is introduced without the insulating layer 1726. Therefore, the semiconductor layer 1742 has a light emitting diode (LDD) in a region that does not overlap with the electrode 1746. A partially doped drain region is formed.

[0222] The transistor 1843 shown in FIG. 14A2 is a transistor having an electrode 1723. The transistor 1843 is different from the transistor 1842. The electrode 1723 has a region overlapping with the semiconductor layer 1742 via the insulating layer 1772. The electrode 1723 can function as a back gate electrode.

[0223] In addition, the transistor 1844 shown in FIG. 14B1 and the transistor As in the case of the electrode 1745, the insulating layer 1726 in the area not overlapping with the electrode 1746 is entirely removed. In addition, the transistor 1846 shown in FIG. 14C1 and the transistor 1847 shown in FIG. The insulating layer 1726 may remain, as may the transistor 1847 .

[0224] After forming the electrode 1746, the transistors 1842 to 1847 are also The electrode 1746 is used as a mask to introduce impurities 755 into the semiconductor layer 1742, thereby forming a semiconductor An impurity region can be formed in a self-aligned manner in the conductor layer 1742. According to one aspect of the present invention, a transistor having good thermal characteristics can be realized. A highly integrated semiconductor device can be realized.

[0225] In FIG. 15(A1) to FIG. 15(C2), transistors 1842, 1843, 1844, 8 show cross-sectional views in the channel width direction of 845, 1846, and 1847, respectively.

[0226] The transistor 1843, the transistor 1845, and the transistor 1847 are The S-channel structure is as explained above. However, it is not limited to this. The transistor 1843, the transistor 1845, and the transistor 1847 are configured as an S-channel It is not necessary to use this structure.

[0227] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0228] (Embodiment 5) In this embodiment, a configuration of a data processing device according to one embodiment of the present invention will be described with reference to FIGS. The following explanation will be given with reference to the above.

[0229] 16 and 17 are diagrams illustrating the configuration of an information processing device according to an embodiment of the present invention. 6(A) is a block diagram of an information processing device, and FIG. 16(B) to FIG. 16(E) are diagrams showing the information processing device. 17(A) to 17(E) are perspective views for explaining the configuration of an information processing device. FIG.

[0230] <Information processing device> The information processing device 5200B described in this embodiment includes an arithmetic device 5210 and an input / output device 5220 (see FIG. 16(A)).

[0231] The arithmetic unit 5210 has a function of receiving operation information, and generates image information based on the operation information. It has the function of supplying

[0232] The input / output device 5220 includes a display unit 5230, an input unit 5240, a detection unit 5250, and a communication unit 5 290, having a function for supplying operation information and a function for receiving image information. The device 5220 has a function of providing detection information, a function of providing communication information, and a function of providing communication information. It has the function of

[0233] The input unit 5240 has a function of supplying operation information. For example, the input unit 5240 It supplies operation information based on the operation of the user of the processing device 5200B.

[0234] Specifically, keyboards, hardware buttons, pointing devices, touch sensors The input unit includes a sensor, an illumination sensor, an imaging device, a voice input device, an eye gaze input device, and a posture detection device. Can be used for 5240.

[0235] The display unit 5230 has a display panel and a function for displaying image information. A display device shown in the above embodiment can be used for the display portion 5230.

[0236] The detection unit 5250 has a function of supplying detection information. For example, It has the function of detecting the surrounding environment and providing the detected information.

[0237] Specifically, illuminance sensors, imaging devices, attitude detection devices, pressure sensors, human presence sensors, etc. It can be used in the knowledge unit 5250.

[0238] The communication unit 5290 has a function of receiving and supplying communication information. It has the function of connecting to other electronic devices or communication networks via wired or wired communication. It has functions such as wireless intranet communication, telephone communication, and short-range wireless communication.

[0239] <Configuration example 1 of information processing device> For example, a shape that conforms to a cylindrical pillar or the like can be applied to the display unit 5230 (see FIG. 1 (See 6(B)). It also has a function to change the display method according to the illuminance of the usage environment. It also has a function to detect the presence of people and change the display content. It can be installed on the pillars of buildings or buildings. Or it can display advertisements or information. Or it can be installed on the pillars of buildings or buildings. It can be used for digital signage, etc.

[0240] <Configuration example 2 of information processing device> For example, the function of generating image information based on the trajectory of a pointer used by a user is provided. (See FIG. 16(C)). Specifically, the diagonal length is 20 inches or more, preferably 40 inches. A display panel having a screen size of 55 inches or more, more preferably 55 inches or more, can be used. Multiple display panels can be arranged to form one display area. This allows for the use of multiple screens, for example, as an electronic whiteboard, It can be used for bulletin boards, electronic signs, etc.

[0241] <Configuration example 3 of information processing device> For example, it is possible to provide a function for changing the display method according to the illuminance of the usage environment (see Figure 16(D)). This makes it possible to reduce the power consumption of a smartwatch, for example. For example, the image can be scanned so that it can be used suitably even in an environment with strong external light, such as outdoors on a sunny day. It can be displayed on the smart watch.

[0242] <Configuration example 4 of information processing device> The display unit 5230 has, for example, a curved surface that curves gently along the side surface of the housing (see FIG. 16 Alternatively, the display unit 5230 may include a display panel, and the display panel may include, for example, a front This allows the display to be displayed not only on the front of a mobile phone, but also on the side and top. In addition, image information can be displayed on the sides and top.

[0243] <Configuration example 5 of information processing device> For example, it has a function to change the display method according to the illuminance of the usage environment (see Figure 17(A)). This can reduce the power consumption of the smartphone. The image can be captured on a smartphone so that it can be used effectively even in bright outdoor environments. It can be displayed on the

[0244] <Configuration Example 6 of Information Processing Device> For example, it has a function to change the display method according to the illuminance of the usage environment (see Figure 17(B)). This allows the unit to be used effectively even when exposed to strong outdoor light on a sunny day. Thus, the video can be displayed on a television system.

[0245] <Configuration Example 7 of Information Processing Device> For example, it has a function to change the display method according to the illuminance of the usage environment (see Figure 17(C)). This allows the device to be used effectively even in environments with strong external light, such as outdoors on a clear day. Thus, the image can be displayed on the tablet computer.

[0246] <Configuration Example 8 of Information Processing Device> For example, it is possible to provide a function for changing the display method according to the illuminance of the usage environment (see Figure 17(D)). This allows for optimal viewing even in environments with strong external light, such as outdoors on a clear day. Thus, the subject can be displayed on the digital camera.

[0247] <Configuration Example 9 of Information Processing Device> For example, it has a function to change the display method according to the illuminance of the usage environment (see Figure 17(E)). This allows the device to be used effectively even in environments with strong external light, such as outdoors on a clear day. Thus, the image can be displayed on a personal computer.

[0248] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0249] (Embodiment 6) In this embodiment, a metal that can be suitably used for a channel formation region of a transistor is The oxide will now be described.

[0250] The semiconductor material used in the transistor is preferably a material having an energy gap of 2 eV or more. Metal oxides having a polarization of at least 2.5 eV, more preferably at least 3 eV, can be used. A typical example is a metal oxide containing indium, such as the CAC-OS etc. can be used.

[0251] Metal oxides with a wider band gap and lower carrier density than silicon are used. Due to the low off-state current of the transistor, The accumulated charge can be retained for a long period of time.

[0252] The semiconductor layer may be, for example, indium, zinc, and M (aluminum, titanium, gallium, gel Al, yttrium, zirconium, lanthanum, cerium, tin, neodymium or hafnium The film may be a film represented by an In-M-Zn oxide containing metals such as tungsten and zinc.

[0253] When the metal oxide constituting the semiconductor layer is an In-M-Zn oxide, The atomic ratio of metal elements in the sputtering target used to deposit a film is In≧M It is preferable that Zn≧M is satisfied. The atomic ratios are In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In :M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2:4. 1, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5: The atomic ratio of the semiconductor layers to be formed is preferably 1:8 or the like. This includes a ±40% variation in the atomic ratio of metal elements contained in the ring target.

[0254] The semiconductor layer is a metal oxide film having a low carrier density. For example, Carrier density is 1×10 17 / cm 3 Less than or equal to 1×10 15 / cm 3 The following is further Preferably 1 x 10 13 / cm 3 Less than or equal to 1×10 11 / cm 3 Below, More preferably, 1×10 10 / cm 3 Less than 1 x 10 -9 / cm 3 More than a career Such metal oxides may be of high purity intrinsic or substantially intrinsic purity. The oxide semiconductor has a low density of defect states and is stable. It can be said that it is a metal oxide with unique properties.

[0255] In addition, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. An oxide semiconductor having an appropriate composition may be used depending on the characteristics of the semiconductor layer (e.g., the performance mobility, the threshold voltage, etc.). In order to obtain the required semiconductor characteristics of a transistor, the carrier density and impurity concentration of the semiconductor layer are adjusted. The degree of crystallization, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. must be appropriate. is preferred.

[0256] In the metal oxides that make up the semiconductor layer, silicon and carbon, which are group 14 elements, If it is included, oxygen vacancies will increase in the semiconductor layer, causing it to become n-type. The silicon and carbon concentrations in the layer (obtained by secondary ion mass spectrometry) were calculated by 2× 10 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following do.

[0257] In addition, alkali metals and alkaline earth metals generate carriers when combined with metal oxides. This may cause the off-state current of the transistor to increase. Concentrations of alkali metals or alkaline earth metals in the layer obtained by secondary ion mass spectrometry. Degrees, 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm 3 To the following:

[0258] In addition, if the metal oxide that makes up the semiconductor layer contains nitrogen, the electrons that act as carriers This increases the carrier density and makes it easier to become n-type. Transistors using this material tend to be normally-on. The nitrogen concentration obtained by secondary ion mass spectrometry is 5×1018 atoms / cm 3 below It is preferable to set

[0259] Oxide semiconductors are classified into single-crystal oxide semiconductors and non-single-crystal oxide semiconductors. As a single-crystal oxide semiconductor, CAAC-OS (c-axis-aligned crystal-like oxide semiconductor) stalline oxide semiconductor), polycrystalline oxide semiconductor, nc-OS(nanocrystalline oxide semiconductor r), pseudo-amorphous oxide semiconductor (a-like OS: amorphous-like Examples of semiconductors include amorphous oxide semiconductors, amorphous oxide semiconductors, and amorphous oxide semiconductors.

[0260] In addition, the semiconductor layer of the transistor disclosed in one embodiment of the present invention may include CAC-OS(Cl oud-Aligned Composite oxide semiconducto r) may also be used.

[0261] Note that the semiconductor layer of the transistor disclosed in one embodiment of the present invention is In addition, a non-single-crystal oxide semiconductor or a CAC-OS can be preferably used. As the OS, nc-OS or CAAC-OS can be preferably used.

[0262] Note that in one embodiment of the present invention, CAC-OS is used for a semiconductor layer of a transistor. By using CAC-OS, it is possible to provide a transistor with excellent electrical characteristics or high reliability. It can be granted.

[0263] The semiconductor layer is divided into a CAAC-OS region, a polycrystalline oxide semiconductor region, and an nc-OS region. a region of a pseudo-amorphous oxide semiconductor, and a region of an amorphous oxide semiconductor. The mixed film may be, for example, a film having two or more of the above-mentioned regions. The film may have a single layer structure including the above-mentioned regions, or a laminated structure.

[0264] The following describes a CAC (C This paper explains the configuration of the Multicloud Aligned Composite Operating System (MSO).

[0265] CAC-OS is a type of metal oxide in which the elements constituting the metal oxide are 0.5 nm to 10 nm in diameter. Preferably, the material is unevenly distributed in a size range of 1 nm to 2 nm or less, or in the vicinity thereof. In the following, in the case of metal oxides, one or more metal elements are unevenly distributed. The region having the metal element has a size of 0.5 nm to 10 nm, preferably 1 nm or more. A state where particles are mixed in sizes of 2 nm or less or close to that size is called a mosaic or patch state. .

[0266] The metal oxide preferably contains at least indium. In addition to these, aluminum, gallium, yttrium, zinc, etc. are preferably contained. Lithium, Copper, Vanadium, Beryllium, Boron, Silicon, Titanium, Iron, Nickel, Gel Manium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum Contains one or more of the following: tantalum, tungsten, or magnesium. It's fine.

[0267] For example, CAC-OS in In-Ga-Zn oxide (In- The Ga-Zn oxide may be specifically referred to as CAC-IGZO. (hereinafter referred to as InO X1 (X1 is a real number greater than 0) or indium zinc oxide In X2 Zinc Y2 O Z2 (X2, Y2, and Z2 are real numbers greater than 0) ) and gallium oxide (GaO X3 (X3 is a real number greater than 0). ), or gallium zinc oxide (Ga X4 Zinc Y4 O Z4 (X4, Y4, and Z4 are The material is separated into mosaics, and the mosaic is created. Zinc-like InO X1 , or In X2 Zinc Y2 O Z2 The structure in which the ions are uniformly distributed in the film (see below) (Also called cloud-like.)

[0268] In other words, CAC-OS is X3 The region where In is the main component and X2 Zinc Y2 O Z2 , or InO X1 A composite metal oxide having a structure in which a region in which In this specification, for example, the atomic ratio of In to the element M in the first region is The first region has an atomic ratio of In to the element M in the second region that is greater than the atomic ratio of In in the second region. The concentration of In is higher than in the region

[0269] Note that IGZO is a common name and refers to a compound made of In, Ga, Zn, and O. A typical example is InGaO3(ZnO). m1 (m1 is a natural number), or In (1 +x0) Ga (1-x0) O3(ZnO) m0 (-1≦x0≦1, m0 is an arbitrary number) Examples of such crystalline compounds include those that are

[0270] The crystalline compound has a single crystal structure, a polycrystalline structure, or a CAAC structure. The CAAC structure is a structure in which multiple IGZO nanocrystals have a c-axis orientation and are aligned in the ab plane. is a non-oriented connected crystal structure.

[0271] On the other hand, CAC-OS is a material structure of metal oxide. In a material composition containing a, Zn, and O, nanoparticles with Ga as the main component were observed in some areas. The regions where the In is mainly contained are observed as nanoparticles, and the regions where the In is mainly contained as nanoparticles are observed. Therefore, in the CAC-OS, the crystal structure is Construction is a secondary element.

[0272] Note that CAC-OS does not include a laminated structure of two or more films with different compositions. For example, a structure consisting of two layers, one containing In as the main component and the other containing Ga as the main component, Not at all.

[0273] In addition, GaO X3 The region where In is the main component and X2 Zinc Y2 O Z2 , or InO X1 but In some cases, a clear boundary between the region of the main component and the region of the main component may not be observed.

[0274] Instead of gallium, aluminum, yttrium, copper, vanadium, and beryllium are used. Aluminum, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium If one or more selected from the group consisting of uranium, sodium, etc. are included, CAC-OS will The region observed is a nanoparticle of the metal element as the main component, and the other region is a nanoparticle of In as the main component. The regions observed as particles are randomly distributed in a mosaic pattern. cormorant.

[0275] CAC-OS can be formed, for example, by a sputtering method without heating the substrate. In addition, when the CAC-OS is formed by a sputtering method, the following deposition gas is used: Any one selected from an inert gas (typically argon), oxygen gas, and nitrogen gas. In addition, the flow rate of oxygen gas relative to the total flow rate of deposition gas during deposition may be The lower the ratio, the more preferable. For example, the flow rate ratio of oxygen gas is set to 0% or more and less than 30%, preferably 0%. It is preferable to set the ratio to 10% or less.

[0276] CAC-OS is a method for measuring X-ray diffraction (XRD). When measured using the out-of-plane θ / 2θ scan, In other words, no clear peaks are observed in the X-ray diffraction measurement. It can be seen that no orientation in the ab plane direction or the c-axis direction is observed in the fixed region.

[0277] In addition, CAC-OS uses an electron beam with a probe diameter of 1 nm (also called a nanobeam electron beam). In the electron beam diffraction pattern obtained by irradiating the sample, a ring-shaped region of high brightness and the corresponding Several bright spots are observed in the ring region. Therefore, the electron diffraction pattern indicates that the CAC-OS The crystal structure of nc (nano-c) has no orientation in the planar direction and cross-sectional direction. It can be seen that it has a crystal structure.

[0278] For example, in the CAC-OS of In-Ga-Zn oxide, the energy dispersive X Energy Dispersive X-ray spectroscopy (EDX) The EDX mapping obtained using scopy revealed that GaO X3 The area where is the main component And, In X2 Zinc Y2 O Z2 , or InO X1 The areas where the main component is It can be confirmed that the compound has the structure shown in FIG.

[0279] CAC-OS has a structure different from that of IGZO compounds in which metal elements are uniformly distributed. It has different properties from GZO compounds. That is, CAC-OS is GaO X3 The main components are and the region where In X2 Zinc Y2 O Z2 , or InO X1 The region where is the main component and The phase is separated into two layers, and the regions each containing one element as a main component are arranged in a mosaic pattern.

[0280] Here, In X2 Zinc Y2 O Z2 , or InO X1 The area where GaO is the main component X3 This region has a higher electrical conductivity than the region where In is the main component. X2 Zinc Y 2O Z2 , or InO X1 The carriers flow through the area where the main component is the metal oxide. Therefore, the InX2 Zinc Y2 O Z2 , or InO X1 Mainly The regions of the component are distributed in a cloud-like shape in the metal oxide, resulting in high field-effect mobility ( μ) can be realized.

[0281] On the other hand, GaO X3 The region where the main components are In X2 Zinc Y2 O Z2 , or InO X This region has higher insulating properties than the region where GaO X3 etc. The main component is distributed in the metal oxide, which suppresses leakage current and provides good switching performance. This allows for switching operations.

[0282] Therefore, when CAC-OS is used in a semiconductor device, GaO X3 Insulation and , In X2 Zinc Y2 O Z2 , or InO X1 The conductivity caused by the This results in a high on-state current (I on ) and high field-effect mobility (μ) can be achieved. Cut.

[0283] In addition, semiconductor devices using CAC-OS have high reliability. It is ideal for a variety of semiconductor devices including displays.

[0284] In addition, a transistor having a CAC-OS semiconductor layer has high field-effect mobility and Because of its high dynamic capability, the transistor is connected to a driving circuit, typically a scanning transistor which generates a gate signal. By using this in a line driver circuit, it is possible to provide a display device with a narrow frame width (also called a narrow frame). In addition, the transistor can be used in a signal line driver circuit (particularly, a signal line driver (Demultiplexer connected to the output terminal of a shift register in a drive circuit) Therefore, it is possible to provide a display device having a small number of wires connected to the display device.

[0285] In addition, the transistor with CAC-OS in the semiconductor layer is a transistor using low-temperature polysilicon. Unlike conventional transistors, no laser crystallization process is required. It is possible to reduce the manufacturing cost even for ultra-high visibility display devices. ("4K resolution", "4K2K", "4K"), Super Hi-Vision ("8K resolution" In the case of large-scale display devices with high resolution such as 1080p, 1080p, 8K4K, and 8K, By using transistors having CAC-OS in the semiconductor layer for the driver circuits and display section, This is preferable because it is possible to write in a short time and reduce display defects.

[0286] Alternatively, silicon may be used as the semiconductor in which the channel of the transistor is formed. Although amorphous silicon may be used as the silicon, it is particularly preferable to use silicon having crystallinity. For example, it is preferable to use microcrystalline silicon, polycrystalline silicon, single crystal silicon, etc. In particular, polycrystalline silicon can be formed at a lower temperature than single crystal silicon, It also has higher field effect mobility and higher reliability than amorphous silicon.

[0287] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination. [Explanation of symbols]

[0288] G1: Wiring, G2: Wiring, G3: Wiring, G3A: Wiring, S1: Wiring, V0: Wiring, 10 : pixel, 10A: pixel, 11: transistor, 12: transistor, 13: transistor 14: transistor; 15: capacitance element; 16: capacitance element; 17: light-emitting element; 20: display Device, 20A: Display device, 20B: Display device, 20C: Display device, 21: Display area, 22 : source driver, 23: gate driver, 23a: gate driver, 23b: gate driver driver, 23c: gate driver, 23d: gate driver, 24: triangular wave generating circuit, 3 1: transistor, 32: transistor, 33: transistor, 34: capacitance element, 35: Light emitting element, 301: conductive layer, 303: conductive layer, 305: conductive layer, 311: insulating layer, 321 : semiconductor layer, 323: semiconductor layer, 325: semiconductor layer, 331: insulating layer, 333: insulating layer, 341: conductive layer, 343: conductive layer, 351: conductive layer, 353: conductive layer, 361: insulating layer, 363: insulating layer, 371: conductive layer, 373a: conductive layer, 373b: conductive layer, 375: conductive layer, 377: conductive layer, 379: insulating layer, 700: display device, 700A: display device, 700 B: Display device, 701: Substrate, 702: Pixel section, 704: Source driver circuit section, 705 : substrate, 706: gate driver circuit section, 708: FPC terminal section, 710: signal line, 71 1: Wiring section, 712: Sealant, 716: FPC, 717: IC, 721: Source driver 722: Gate driver circuit section, 723: FPC, 724: Printed circuit board, 73 0: insulating film, 732: sealing film, 743: resin layer, 750: transistor, 752: transistor resistor, 760: wiring, 770: insulating layer, 772: conductive layer, 774: conductive layer, 780: different isotropic conductive film, 782: light emitting element, 790: capacitance element, 791: bump, 793: bump, 795: light shielding layer, 1723: electrode, 1724a: electrode, 1724b: electrode, 1726: insulator Edge layer, 1727: insulating layer, 1728: insulating layer, 1729: insulating layer, 1741: insulating layer, 1 742: semiconductor layer, 1744a: electrode, 1744b: electrode, 1746: electrode, 1771: Substrate, 1772: Insulating layer

Claims

1. A pixel includes a plurality of pixels and a first wiring to a third wiring, One of the plurality of pixels includes a light-emitting element, a first transistor, and a second transistor, In the first transistor, one of a source and a drain is always electrically connected to one of the electrodes of the light-emitting element, and a gate is always electrically connected to one of a source and a drain of the second transistor; the second wiring is always electrically connected to the other electrode of the light-emitting element, a gate of the second transistor is always electrically connected to the third wiring; a first potential corresponding to display data is applied from the first wiring to the gate of the first transistor, thereby determining a voltage between the gate and the source of the first transistor according to the first potential; The light emission luminance of the light emitting element is controlled in response to a triangular wave potential applied to the second wiring, When a reset signal is applied to the third wiring, the light-emitting element is turned off. The potential of the triangular wave becomes lowest in synchronization with the reset signal. Display device.

2. In claim 1, The light emitting element is an LED. Display device.

3. In claim 1, The light emitting element is an OLED. Display device.

4. In any one of claims 1 to 3, the first transistor or the second transistor includes a metal oxide in a semiconductor layer; Display device.

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