IC chip movement detection system, IC chip movement detection method, and method for manufacturing IC chip mounting substrate
By using a camera and a computing unit in the IC chip motion detection system, the relative position change between the IC chip and the substrate is detected, and the problem of difficulty in effective detection in the prior art is solved, and high-precision position detection and quality control of the packaging process is achieved.
Patent Information
- Application Number
- JP2024213044
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2024-12-06
- Publication Date
- 2025-04-02
- Estimated Expiration
- 2044-12-06
AI Technical Summary
The prior art is difficult to effectively detect the relative position changes between the IC chip and the substrate, especially during the chip packaging process.
An IC chip motion detection system including a camera, a substrate position recognition unit, a chip position recognition unit, a relative position calculation unit and a motion detection unit is adopted to calculate and detect the relative position change between the substrate and the chip by comparing the images at the front and back moments.
High-precision detection of relative position changes between the IC chip and the substrate is achieved, ensuring position stability and quality control during chip packaging.
Smart Images

Figure 0007656142000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to an IC chip movement detection system, an IC chip movement detection method, and a method for manufacturing an IC chip mounting substrate. [Background technology]
[0002] Patent Document 1 describes a semiconductor device comprising a support, an adhesive resin layer consisting of two layers formed on the support, an insulating layer and a rewiring layer formed on the adhesive resin layer, a chip layer, and a molded resin layer, wherein the adhesive resin layer is composed of, in order from the support side, a resin layer A containing a resin decomposable by irradiation with light, and a resin layer B containing a non-silicone thermoplastic resin, the resin decomposable by irradiation with light is a resin containing a condensed ring in its main chain, and the resin layer B has a storage modulus E at 25°C of 1 to 500 MPa and a tensile breaking strength of 5 to 50 MPa. (Claim 1) Patent Document 2 describes a method for manufacturing a resin molded product in which, in a state in which the inner surface of a cavity recess provided in a lower mold is covered with a process release film and a molding resin is supplied to the cavity recess, a molded product is clamped between an upper mold and a lower mold and compression molded, the process release film, the molding resin, and the molded product are set in a mold, and the process release film is sucked with air from the lower mold side to be air-adsorbed along the inner surface of the cavity recess, and optionally, in a state in which the upper mold and the lower mold are brought into contact with each other to form a cavity that is air-sealed from the outside, air is sucked from the cavity by an air suction mechanism through a flow path provided in communication with the cavity. and a step of clamping the upper mold and the lower mold to a compression molding position, curing the resin for molding, and compression molding the molded product, in this order, wherein the tensile strength of the process release film when stretched 37.5% at 100 mm / min at a temperature of 175°C in at least one direction is 1.0 MPa to 10.0 MPa, and when the process release film is stretched 37.5% in at least one direction under the same conditions, left at rest for 2 minutes, and then returned to the origin at 100 mm / min in the compression direction, the recovery rate (%) obtained according to the following formula (1) from the return value, which is the displacement until the load becomes 0, is 30 to 80 (%). "(Claim 1)" (return value / extended length x 100 = restoration rate % (1)) is stated. [Prior art document] [Patent documents] [Patent Document 1] JP 2018-164002 A [Patent Document 2] JP 2020-19264 A Summary of the Invention
[0003] In a first aspect of the present invention, an IC chip movement detection system is provided that detects the movement of the relative position between an IC chip and a wiring board. The IC chip movement detection system includes an image capture unit, a wiring position identification unit, a chip position identification unit, a relative position calculation unit, and a movement detection unit. The image capture unit may capture a first image including the IC chip and the wiring board at a first time. The image capture unit may capture a second image including the IC chip and the wiring board at a second time after the first time. The wiring position identification unit may identify a first wiring position of the wiring board in the first image. The wiring position identification unit may identify a second wiring position of the wiring board in the second image. The chip position identification unit may identify a first chip position of the IC chip in the first image and a second chip position of the IC chip in the second image using feature points of the surface of the IC chip in the first image and the second image. The relative position calculation unit may calculate a first relative position that is a relative position of the IC chip and the wiring board at the first time based on the first wiring position and the first chip position. The relative position calculation unit may calculate a second relative position, which is a relative position of the IC chip and the wiring board at the second time, based on the second wiring position and the second chip position. The movement detection unit may detect a change in the relative positional relationship between the IC chip and the wiring board based on the first relative position and the second relative position.
[0004] In the above, the wiring position specifying unit may specify the positions of alignment marks provided on the wiring board, thereby specifying the first wiring position and the second wiring position.
[0005] In the above, the wiring position specifying section may specify the first wiring position and the second wiring position by using a pixel value of the alignment mark.
[0006] In the above, the wiring position specifying section may specify the first wiring position and the second wiring position by using a difference between pixel values of adjacent pixels of the alignment mark.
[0007] In the above, the alignment mark may have a convex angle or a concave angle, and the wiring position specifying unit may specify the first wiring position and the second wiring position by specifying the position of the convex angle or the concave angle.
[0008] In the above, the chip position identifying unit may include a feature point detecting unit, a matching unit, and a position identifying unit. The feature point detecting unit may detect feature points on the surface of the IC chip in the first image and the second image. The matching unit may match the feature points in the first image with the feature points in the second image. The position identifying unit may identify the first chip position and the second chip position from the positions of the matched feature points.
[0009] In the above, the relative position calculation section may calculate the first relative position and the second relative position by averaging movements of a plurality of associated feature points.
[0010] In the above, the chip position specifying unit may set feature points by an ORB (Oriented Fast Rotated Brief) and specify the first chip position and the second chip position.
[0011] In the above, the first time may be a time before the resin sealing process is performed on the IC chip, and the second time may be a time after the resin sealing process is performed on the IC chip.
[0012] In a second aspect of the present invention, there is provided an IC chip movement detection method for detecting a movement of a relative position between an IC chip and a wiring board. The IC chip movement detection method includes an imaging step, a wiring position specification step, a chip position specification step, a relative position calculation step, and a movement detection step. In the imaging step, a first image including the IC chip and the wiring board at a first time may be captured. In the imaging step, a second image including the IC chip and the wiring board at a second time after the first time may be captured. In the wiring position specification step, a first wiring position of the wiring board in the first image may be specified. In the wiring position specification step, a second wiring position of the wiring board in the second image may be specified. In the chip position specification step, a first chip position of the IC chip in the first image and a second chip position of the IC chip in the second image may be specified using feature points of the surface of the IC chip in the first image and the second image. In the relative position calculation step, a first relative position which is a relative position of the IC chip and the wiring board at the first time may be calculated based on the first wiring position and the first chip position. In the relative position calculation step, a second relative position which is a relative position of the IC chip and the wiring board at the second time may be calculated based on the second wiring position and the second chip position. In the movement detection step, a change in the relative positional relationship between the IC chip and the wiring board may be detected based on the first relative position and the second relative position.
[0013] In a third aspect of the present invention, there is provided a method for manufacturing an IC chip mounting substrate. The method for manufacturing an IC chip mounting substrate includes a mounting step, a first photographing step, a sealing step, a second photographing step, a wiring position specifying step, a chip position specifying step, a relative position calculation step, and a movement detection step. In the mounting step, an IC chip may be mounted on a wiring substrate. In the first photographing step, a first image including the IC chip and the wiring substrate may be photographed at a first time. In the sealing step, the IC chip may be sealed with resin. In the second photographing step, a second image including the IC chip and the wiring substrate may be photographed at a second time. In the wiring position specifying step, a first wiring position of the wiring substrate in the first image may be specified. In the wiring position specifying step, a second wiring position of the wiring substrate in the second image may be specified. In the chip position specifying step, a first chip position of the IC chip in the first image and a second chip position of the IC chip in the second image may be specified using feature points of the surface of the IC chip in the first image and the second image. In the relative position calculation step, a first relative position which is a relative position of the IC chip and the wiring board at a first time may be calculated based on the first wiring position and the first chip position. In the relative position calculation step, a second relative position which is a relative position of the IC chip and the wiring board at a second time may be calculated based on the second wiring position and the second chip position. In the movement detection step, a change in the relative positional relationship between the IC chip and the wiring board may be detected based on the first relative position and the second relative position.
[0014] The above summary of the invention does not list all of the features of the present invention. Also, subcombinations of these features may also be inventions. [Brief description of the drawings]
[0015] [Figure 1] 1 shows a configuration of an IC chip movement detection system according to an embodiment of the present invention. [Diagram 2] 2 shows an example of the configuration of the chip position specifying unit 130. [Diagram 3] 1 shows an example of a flow of a method for manufacturing an IC chip mounting substrate according to this embodiment. [Figure 4]An example of the wiring board 20 at the mounting stage is shown. [Diagram 5] 5 shows an example of a first image 500 according to the present embodiment. [Figure 6] An example of a wiring substrate 20 at the sealing stage is shown. [Figure 7] 7 shows an example of a second image 700 according to the present embodiment. [Figure 8] An example of a method for identifying the first wiring position in the first image 500 in S500 will be described. [Figure 9] 5 shows an example of a graph of pixel values on line B'-B in a first image 500. [Figure 10] An example of a graph of pixel values on the line A'-A in a first image 500 is shown. [Figure 11] 10 shows an example of the pixel value difference in the graph of FIG. [Figure 12] 11 shows an example of the pixel value difference in the graph of FIG. [Figure 13] An example of a method for identifying the second wiring position in the second image 700 in S500 will be described. [Figure 14] 4 shows an example of a sub-flow of S600 in the flow according to FIG. [Figure 15] 5 shows an example of feature points detected in a first image 500. [Figure 16] 7 shows an example of feature points detected in a second image 700. [Figure 17] 5 shows an example of a first relative position in a first image 500. [Figure 18] An example of a second relative position in a second image 700 is shown. [Figure 19] An example of the process of S800 by the movement detection unit 150 will be described. [Figure 20] An example of an actual IC chip and alignment mark image is shown. [Figure 21] 22 illustrates an example computer 2200 in which aspects of the present invention may be embodied, in whole or in part. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0016] The present invention will be described below through embodiments of the invention, but the following embodiments do not limit the scope of the invention according to the claims. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention.
[0017] FIG. 1 shows the configuration of an IC chip movement detection system 10 according to this embodiment. The IC chip movement detection system 10 detects movement of the relative position between an IC chip and a wiring board. After mounting an IC chip on a wiring board, a separate process such as resin sealing may be performed. For example, the IC chip movement detection system 10 detects whether or not the IC chip has moved relative to the wiring board in the separate process. The IC chip movement detection system 10 includes an imaging unit 110, a wiring position identifying unit 120, a chip position identifying unit 130, a relative position calculation unit 140, and a movement detection unit 150.
[0018] The IC chip movement detection system 10 may be a computer such as a PC (personal computer), a tablet computer, a smartphone, a workstation, a server computer, or a general-purpose computer, or may be a computer system in which a plurality of computers are connected.
[0019] Alternatively, the IC chip movement detection system 10 may be a dedicated computer designed for IC chip movement detection, or may be dedicated hardware realized by a dedicated circuit. The IC chip movement detection system 10 may be implemented by one device (computer), or may be realized by multiple devices with different roles. Although not specifically described below, the IC chip movement detection system 10 is provided with a memory / hard disk, etc., and information required for processing is appropriately stored, and information is transmitted between each processing module such as the wiring position identification unit 120 and the chip position identification unit 130.
[0020] The photographing unit 110 photographs an image including an IC chip and a wiring image. For example, the photographing unit 110 photographs a first image including an IC chip and a wiring board at a first time, and a second image including the IC chip and the wiring board at a second time. The second time may be a time after another process such as resin sealing is performed after the first time. The photographing unit 110 may be connected to an imaging element and acquire image data from the imaging element. The photographing unit 110 may perform image processing on the photographed image data as necessary to acquire the first image and the second image.
[0021] The wiring position specifying unit 120 specifies the first wiring position of the wiring board in the first image and the second wiring position of the wiring board in the second image. For example, the wiring position specifying unit 120 may specify the first wiring position and the second wiring position by specifying the position of an alignment mark provided on the wiring board. A specific method will be described later.
[0022] The chip position identifying unit 130 identifies the first chip position of the IC chip in the first image and the second chip position of the IC chip in the second image by using feature points of the surfaces of the IC chip in the first image and the second image. For example, the chip position identifying unit 130 may set feature points by an ORB (Oriented Fast Rotated Brief) and identify the first chip position and the second chip position.
[0023] 2 shows an example of the configuration of the chip position specifying unit 130. The chip position specifying unit 130 includes a feature point detection unit 132, a matching unit 134, and a position specifying unit 136.
[0024] The feature point detection unit 132 detects feature points on the surface of the IC chip in the first image and the second image.
[0025] The association section 134 associates the feature points in the first image detected by the feature point detection section 132 with the feature points in the second image.
[0026] The position specifying section 136 specifies the first chip position and the second chip position from the positions of the feature points associated by the association section 134 .
[0027] The relative position calculation unit 140 calculates a first relative position, which is the relative position of the IC chip and the wiring board at a first time, based on the first wiring position and the first chip position. The relative position calculation unit 140 calculates a second relative position, which is the relative position of the IC chip and the wiring board at a second time, based on the second wiring position and the second chip position.
[0028] The movement detection unit 150 detects a change in the relative positional relationship between the IC chip and the wiring board based on the first relative position and the second relative position. For example, the movement detection unit 150 may detect the difference between the first relative position and the second relative position as the change in the positional relationship.
[0029] 3 shows an example of a flow of the method for manufacturing an IC chip mounted substrate according to this embodiment. The IC chip movement detection system 10 manufactures an IC chip mounted substrate by executing, for example, each process of S100 to S800. Also, movement detection of the IC chip is performed by executing S200 to S800. The order of the processes of S100 to S800 may be changed, and some processes may be omitted.
[0030] First, in S100, a mounting step is performed in which an IC chip is mounted on a wiring substrate. The wiring substrate may be a substrate on which rewiring for connecting to an IC chip is provided. For example, the substrate may be a semiconductor wafer such as a silicon wafer, a resin substrate, or a glass substrate. The substrate may function as a carrier in the fan-out package manufacturing process and may be peeled off and removed later. The materials, formation methods, designs, etc. of the substrate and the rewiring layer are not particularly limited.
[0031] One or more IC chips may be mounted on the wiring substrate. The mounting step may be performed so that bumps provided on the IC chips are connected to the rewirings.
[0032] 4 shows an example of the wiring board 20 in the mounting stage. As shown in the figure, the wiring board 20 includes a carrier 30 and a rewiring layer 40. The rewiring layer 40 provided with rewiring is provided on one surface of the carrier 30. An IC chip 50 is mounted and fixed on the wiring board 20 via the rewiring layer 40.
[0033] Next, in S200, the photographing unit 110 executes a first photographing step of photographing a first image including the IC chip and the wiring board. The first image is assumed to be photographed at a first time.
[0034] The photographing unit 110 photographs the first image so that at least a part of the IC chip and at least a part of the wiring board are included in the same image. The photographing unit 110 may photograph the first image so that an alignment mark provided on the wiring board is included in the image. The alignment mark may be a mark provided on the surface of the wiring board and serving as a reference for the position of the wiring board. The alignment mark may have a convex angle or a concave angle. For example, the alignment mark may be a triangle, a rectangle, a polygon with five or more sides, a cross, a star, or the like. As an example, the alignment mark may have a shape including a pair of straight lines that intersect at right angles.
[0035] The photographing unit 110 may use an optical system such as a lens to magnify and photograph an area including the IC chip and the wiring board. The photographing unit 110 may photograph with a sufficiently large angle of view so that both the IC chip and the wiring board can be included in one image even if they move later.
[0036] There is no particular limitation on the wavelength used for imaging by the imaging section 110. For example, the imaging section 110 may perform imaging using visible light, infrared light, or X-rays.
[0037] The photographing section 110 may photograph the first image from the IC chip side (the upper side in FIG. 4). Alternatively, the photographing section 110 may photograph the first image from the opposite side of the IC chip (the lower side in FIG. 4).
[0038] 5 shows an example of a first image 500 according to the present embodiment. As shown in the figure, the first image 500 includes a cross-shaped alignment mark 520 arranged on a rewiring layer 530 of the wiring substrate 20, and a part (e.g., the lower left part) of an IC chip 510.
[0039] When multiple IC chips 510 are mounted on the wiring substrate 20, the process of S200 may be performed for only one IC chip. Alternatively, the process of S200 may be performed for all IC chips or for two or more selected IC chips. When the process of S200 is performed for multiple IC chips, the subsequent processes of S300 to S800 may be performed for each IC chip.
[0040] Next, in S300, an encapsulation step is performed in which the IC chip is encapsulated with resin. In the encapsulation step, the periphery of the IC chip is encapsulated with encapsulation resin. When the imaging unit 110 captures images from the IC chip side (the upper side in FIG. 4), the encapsulation resin is transparent to the wavelength used for imaging. For example, the encapsulation step may be performed by pouring molten resin around the IC chip using a mold or the like, and then cooling the resin. If necessary, part of the encapsulation resin may be ground for encapsulation. When grinding exposes a portion required for measuring the movement amount of the IC chip, the encapsulation resin may be opaque to the wavelength used for imaging.
[0041] 6 shows an example of the wiring substrate 20 at the sealing stage. As shown in the figure, a region of sealing resin 60 is formed on one surface of the rewiring layer 40 in a region adjacent to the IC chip 50, thereby manufacturing a package including the IC chip 50.
[0042] Next, in S400, the photographing unit 110 executes a second photographing step of photographing a second image including the IC chip and the wiring board. The second image is photographed at a second time after the first time. In the second photographing step, the photographing unit 110 photographs the second image so that the IC chip and the wiring board photographed in the first photographing step are included.
[0043] The photographing unit 110 may execute the second photographing stage under the same or similar conditions as the first photographing stage. For example, the photographing unit 110 may execute the second photographing stage by photographing the IC chip and wiring board photographed in the first photographing stage at the same distance (e.g., the distance between the wiring board 20 and the photographing unit 110) and at the same photographing angle (e.g., the angle of attack of the photographing unit 110 with respect to the surface of the wiring board 20 and the rotation angle within the plane of the wiring board 20, etc.) as in the first photographing stage.
[0044] If the second photographing stage is performed under conditions different from those of the first photographing stage, an image obtained when photographed under the same conditions as those of the first photographing stage may be obtained by performing image processing on the second image. For example, if the distance between the wiring board 20 and the photographing unit 110 in the second photographing stage is greater than that in the first photographing stage, the second image may be enlarged by a predetermined magnification to obtain an image under the same conditions.
[0045] The first time is a time point before the resin sealing process is performed on the IC chip, and the second time is a time point after the resin sealing process is performed on the IC chip. In this manner, the photographing unit 110 captures images of the wiring board and the IC chip before and after the sealing step.
[0046] 7 shows an example of a second image 700 according to the present embodiment. As shown in the figure, the second image 700 includes a cross-shaped alignment mark 720 and an IC chip 710 arranged on a redistribution layer 730. The cross-shaped alignment mark 720 corresponds to the alignment mark 520 of the first image 500 shown in FIG. 5, and the IC chip 710 corresponds to the IC chip 510 of the first image 500 shown in FIG. 5. As shown in FIG. 5 and FIG. 7, the relative positional relationship between the alignment mark and the IC chip moves before and after the sealing step. Specifically, the IC chip moves relatively to the alignment mark from the dotted line to the solid line position.
[0047] The image capturing unit 110 may perform image processing, etc., on the first image and / or the second image as necessary. For example, the image capturing unit 110 may apply a filter to the first image and / or the second image to perform processing such as improving sharpness, aligning color tones, aligning contrast, etc.
[0048] Next, in S500, the wiring position identifying unit 120 performs a wiring position identifying step. The wiring position identifying unit 120 identifies a first wiring position, which is the position of the wiring board in the first image. The wiring position identifying unit 120 identifies a second wiring position, which is the position of the wiring board in the second image. The wiring position identifying unit 120 may identify the first wiring position and the second wiring position using an alignment mark on the wiring board.
[0049] The wiring position specifying unit 120 may specify the first wiring position and the second wiring position by specifying the position of a part of the alignment mark. For example, the wiring position specifying unit 120 may specify the first wiring position and the second wiring position by specifying the position of a convex corner or a concave corner of the alignment mark. As an example, the wiring position specifying unit 120 may specify at least a part of the coordinates of two perpendicular lines passing through the convex corner or the concave corner, and may specify the position of the convex corner or the concave corner by combining the specified coordinates of the two lines.
[0050] The wiring position specifying unit 120 may specify the first wiring position and the second wiring position by using pixel values of the alignment mark. As an example, the wiring position specifying unit 120 may specify the first wiring position and the second wiring position by using a difference in pixel values between adjacent pixels of the alignment mark.
[0051] Fig. 8 shows an example of a method for identifying the first wiring in first image 500 in S500. Fig. 8 shows alignment mark 520 in first image 500. Here, wiring position identifying unit 120 may identify the position of reentrant corner 540 in alignment mark 520 as the first wiring position. Here, the horizontal axis of Fig. 8 is the X-axis, the vertical axis is the Y-axis, and the coordinates of reentrant corner 540 are defined as (X1, Y1).
[0052] In order to identify the position of the reentrant corner 540, the wiring position identifying unit 120 identifies the coordinates of points on two line segments (an X line segment 550 parallel to the X axis and a Y line segment 560 parallel to the Y axis) that pass through the reentrant corner 540 in the alignment mark 520. For example, the wiring position identifying unit 120 identifies the X coordinate of a point 565 on the Y line segment 560 parallel to the Y axis. Furthermore, the wiring position identifying unit 120 identifies the Y coordinate of a point 555 on the X line segment 550 parallel to the X axis. Note that in FIG. 8, the X line segment 550 is separated into a left part and a right part at the cross intersection in the alignment mark 520, but the two parts form a straight line. Similarly, the upper part and the lower part of the Y line segment 560 also form a straight line.
[0053] 9 shows an example of a graph of pixel values on line B'-B in first image 500. The horizontal axis indicates pixel position along line B'-B, and the vertical axis indicates pixel value. Pixel position 0 corresponds to the B' side, and as the pixel position increases, it moves toward the B side.
[0054] The pixel value may be, for example, a luminance value of a pixel. In Fig. 9, the pixel value increases significantly at a specific pixel position (701) and decreases significantly at a specific pixel position (847). This indicates that the pixel value increases on the alignment mark 520 along the line B'-B and decreases on other regions (i.e., the redistribution layer 530).
[0055] The wiring position identifying unit 120 may detect the difference (or the absolute value) of pixel values between adjacent pixels while gradually moving from the B' side to the B side, and detect the points where the pixel value difference has the maximum value and the minimum value. The wiring position identifying unit 120 may determine the pixel position (701) of the fluctuation point 910 where the pixel value difference is the largest as the X coordinate X1 of the reentrant corner 540. The fluctuation point 910 corresponds to the point 565 on the Y line segment in FIG. 8. Alternatively, the wiring position identifying unit 120 may determine whether the difference etc. has exceeded a threshold value and / or fallen below the threshold value, and may determine the pixel position (701) of the fluctuation point 910 where the absolute value of the difference first exceeds the threshold value as the X coordinate X1 of the reentrant corner 540.
[0056] 10 shows an example of a graph of pixel values on the line A'-A in the first image 500. The horizontal axis indicates the pixel position along the line A'-A, and the vertical axis indicates the pixel value. Pixel position 0 corresponds to the A' side, and as the pixel position increases, it moves toward the A side.
[0057] 10, the pixel value increases significantly at a particular pixel location (188) and decreases significantly at a particular pixel location (335). This indicates that the pixel value increases along line A'-A on alignment mark 520 and decreases along other regions (i.e., redistribution layer 530).
[0058] The wiring position identifying unit 120 may detect the difference (or the absolute value) of pixel values between adjacent pixels while gradually moving from the A' side to the A side, and detect the points where the pixel value difference has the maximum value and the minimum value. The wiring position identifying unit 120 may determine the pixel position (335) of the fluctuation point 1010 where the pixel value difference is the smallest as the Y coordinate Y1 of the reentrant corner 540. The fluctuation point 1010 corresponds to the point 555 on the X line segment in FIG. 8. Alternatively, the wiring position identifying unit 120 may determine whether the difference etc. has exceeded a threshold value and / or fallen below the threshold value, and may determine the pixel position (335) of the fluctuation point 1010 where the absolute value of the difference first exceeds the threshold value as the Y coordinate Y1 of the reentrant corner 540.
[0059] In this manner, the wiring position identifying unit 120 identifies the coordinates (X1, Y1) of the reentrant corner 540. The wiring position identifying unit 120 may set the coordinates (X1, Y1) as the first wiring position. Instead of indirectly calculating the coordinates (X1, Y1) using the pixel values of the pixels on the line segment AA' and the pixels on the line segment BB', the wiring position identifying unit 120 may directly identify the coordinates (X1, Y1) using pixel values in the X-axis direction passing through the reentrant corner 540 and pixel values in the Y-axis direction passing through the reentrant corner 540. For example, after identifying the point 565 that gives X1, the coordinates (X1, Y1) may be directly identified by analyzing pixel values of a line that passes through the point 565 and is parallel to the Y-axis direction.
[0060] Fig. 11 shows an example of the pixel value differences in the graph of Fig. 9. In Fig. 11, large upper and lower peaks are detected at pixel position (701) and pixel position (847) of fluctuation point 910 where the pixel value suddenly fluctuates in Fig. 9.
[0061] Fig. 12 shows an example of the pixel value difference in the graph of Fig. 10. In Fig. 12, large upper and lower peaks are detected at a pixel position (188) where the pixel value suddenly changes in Fig. 10, and at a pixel position (335) corresponding to a change point 1010.
[0062] The wiring position identifying unit 120 may identify the wiring position by the pixel value itself, not the difference between pixel values. For example, the wiring position identifying unit 120 may identify the wiring position only by whether the pixel value itself exceeds and / or falls below a threshold. However, according to this method, depending on the shooting conditions of the image, there may be cases where the pixel value is close to the threshold, and in such cases, the wiring position may be erroneously detected. However, when the difference between pixel values is used, the possibility of erroneous detection can be reduced.
[0063] 13 shows an example of a method for identifying the second wiring position in the second image 700 in S500. The wiring position identifying unit 120 may identify the coordinates (X2, Y2) of the reentrant corner 740 of the alignment mark 720 in the second image 700 by a method similar to the method described in Fig. 8 to Fig. 12. The wiring position identifying unit 120 may determine the coordinates (X2, Y2) as the second wiring position.
[0064] Next, in S600, the chip position identifying unit 130 performs a chip position identifying step of identifying a first chip position of the IC chip in the first image and a second chip position of the IC chip in the second image. The chip position identifying unit 130 may perform the chip position identifying step by using feature points of the surface of the IC chip in the first image and the second image.
[0065] Fig. 14 shows an example of a sub-flow of S600 in the flow according to Fig. 3. The chip position identifying section 130 executes the process of S600 by executing the processes of S632 to S636. Other processes may be executed in addition to S632 to S636. Some of the processes of S632 to S636 may be omitted.
[0066] In S632, the feature point detection unit 132 of the chip position identification unit 130 detects feature points on the surfaces of the IC chip 510 in the first image 500 and the IC chip 710 in the second image 700. The feature point detection unit 132 may set feature points using features of the images of the IC chip 510 and the IC chip 710. The feature point detection unit 132 may set feature points on the IC chip by a known algorithm. For example, the feature point detection unit 132 may set corner parts in the image as feature points by the FAST algorithm.
[0067] The feature point detection section 132 may detect a plurality of feature points for each of the first image 500 and the second image 700. The feature point detection section 132 may select a feature point with a clearer characteristic from the plurality of feature points by using the HARRIS corner evaluation method.
[0068] 15 shows an example of feature points detected in the first image 500. For example, it is assumed that the feature point detection unit 132 detects five feature points (feature point 572, feature point 574, feature point 576, feature point 578, and feature point 580) from the area of the IC chip 510 in the first image 500.
[0069] 16 shows an example of feature points detected in the second image 700. For example, it is assumed that the feature point detection unit 132 detects five feature points (feature point 772, feature point 774, feature point 776, feature point 778, and feature point 780) from the area of the IC chip 710 in the second image 700.
[0070] Next, in S634, the matching unit 134 matches the feature points detected in the first image 500 with the feature points detected in the second image 700. For example, the matching unit 134 may match the feature points using a known feature point matching method. As an example, the matching unit 134 may match the feature points using ORB (Oriented FAST and Rotated BRIEF).
[0071] For example, the matching unit 134 matches the feature point 572 with the feature point 772, the feature point 574 with the feature point 774, the feature point 576 with the feature point 776, the feature point 578 with the feature point 778, and the feature point 580 with the feature point 780.
[0072] Next, in S636, the position specifying unit 136 calculates the first chip position and the second chip position from the positions of the associated feature points. For example, the position specifying unit 136 may calculate the centers of gravity of five locations in the first image 500, namely, the position (xa1, ya1) of the feature point 572, the position (xb1, yb1) of the feature point 574, the position (xc1, yc1) of the feature point 576, the position (xd1, yd1) of the feature point 578, and the position (xe1, ye1) of the feature point 580, and set these as the first chip position (x1, y1).
[0073] For example, the position identification unit 136 may calculate the center of gravity of five locations in the second image 700: the position of feature point 772 (xa2, ya2), the position of feature point 774 (xb2, yb2), the position of feature point 776 (xc2, yc2), the position of feature point 778 (xd2, yd2), and the position of feature point 780 (xe2, ye2), and use these as the second chip position (x2, y2).
[0074] Next, in S700, a relative position calculation step is executed to calculate a first relative position and a second relative position. The relative position calculation unit 140 calculates a first relative position, which is a relative position of the IC chip and the wiring board at a first time, based on the first wiring position and the first chip position. For example, the relative position calculation unit 140 may calculate the first relative position by calculating the difference between the first wiring position (X1, Y1) and the first chip position (x1, y1).
[0075] 17 shows an example of the first relative position in the first image 500. As shown in the figure, the relative position calculation section 140 may calculate the first relative position (x1-X1, y1-Y1) represented by a vector 595 by calculating a vector difference between the first wiring position (X1, Y1) and the first chip position (x1, y1) represented by the center of gravity 590.
[0076] The relative position calculation section 140 calculates a second relative position, which is the relative position of the IC chip and the wiring board at the second time, based on the second wiring position and the second chip position. For example, the relative position calculation section 140 may calculate the second relative position by calculating the difference between the second wiring position (X2, Y2) and the second chip position (x2, y2).
[0077] 18 shows an example of the second relative position in the second image 700. As shown in the figure, the relative position calculation section 140 may calculate the second relative position (x2-X2, y2-Y2) represented by the vector 795 by calculating the vector difference between the second wiring position (X2, Y2) and the second chip position (x2, y2) represented by the center of gravity 790.
[0078] In this way, the relative position calculation unit 140 calculates the first relative position and the second relative position by averaging the movements of the multiple associated feature points using the center of gravity positions of the feature points of the IC chip. Alternatively, the first relative position and the second relative position may be calculated by calculating multiple vectors of the differences between each feature point of the IC chip and the wiring position, and averaging these multiple vectors.
[0079] Next, in S800, the movement detection unit 150 performs a movement detection step of detecting a change in the relative positional relationship between the IC chip and the wiring board based on the first relative position and the second relative position. For example, the movement detection unit 150 may detect the difference between the first relative position and the second relative position as the change in the positional relationship.
[0080] 19 shows an example of the process of S800 by the movement detection unit 150. The movement detection unit 150 may calculate a vector 990 that is the difference between a first relative position (X1-x1, Y1-y1) represented by a vector 595 and a second relative position (X2-x2, Y2-y2) represented by a vector 795. The movement detection unit 150 detects the vector 990 as a movement of the relative position between the IC chip and the wiring board.
[0081] The movement detection unit 150 may output the vector 990 itself, the direction of the vector 990, and / or the absolute value of the vector 990. The movement detection unit 150 may determine whether the absolute value of the vector 990 exceeds a threshold, and output a warning if the absolute value exceeds the threshold. In this way, the IC chip movement detection system 10 can detect the movement of the IC chip before and after a process in which the IC chip may move, such as a sealing step.
[0082] If the IC chip moves by more than a predetermined amount, the conditions of the process that caused the movement, such as the sealing step, may be reviewed, the product being manufactured may be discarded, and / or the IC chip may be moved to its original position.
[0083] After S800, further steps may be performed, such as peeling off the carrier 30, forming solder balls on the back side of the IC chip 50 of the rewiring layer 40, and (if multiple IC chips 50 are mounted) dicing to separate the IC chips 50. By performing these additional steps, a fan-out package mounted with the IC chips 50 can be manufactured.
[0084] According to this embodiment, the position of the IC chip can be specified more accurately by using the feature points on the surface of the IC chip. Instead of using the feature points, the position of the IC chip can be specified by using the coordinates of the outer edge of the IC chip in the image. For example, the position of the IC chip may be specified by using the pixel values of the outer edge of the IC chip in the image or the difference between them, similar to the method described in S500.
[0085] However, when such a method is used, the IC chip has depth, and slight differences in shooting conditions such as focus position and shadows may cause the outer edge of the IC chip to be unable to be accurately identified.
[0086] 20 shows an example of an actual IC chip and alignment mark image. As shown in the figure, the portion corresponding to the outer edge of the IC chip 510 is black in the image, and it is not necessarily easy to identify the outer edge. For example, the line 1020 may be taken as the outer edge of the IC chip, and the line 1030 may be taken as the outer edge. Thus, identifying the IC chip based on the outer edge may cause a position error.
[0087] On the other hand, according to the present embodiment, the position of the wiring board can be accurately identified by identifying the position of the wiring board using the difference in pixel values. Thus, according to the present embodiment, the movement of the IC chip can be detected with high accuracy by identifying the positions of the wiring board and the IC chip using appropriate methods.
[0088] The IC chip movement detection system 10 may calculate the amount of rotation of the IC chip in addition to the relative movement between the IC chip and the wiring position. For example, the wiring position specifying unit 120 may specify two or more wiring positions in each of the first image and the second image, and specify the wiring angle of the wiring position (or the alignment mark) from the positional relationship between the wiring positions, the chip position specifying unit 130 may specify the chip angle of the IC chip from the positional relationship between a plurality of feature points, and the relative position calculation unit 140 may calculate the rotation of the IC chip from the difference between the wiring angle and the chip angle in the first image and the difference between the wiring angle and the chip angle in the second image.
[0089] In the above embodiment, the fan-out package is mainly manufactured as an IC chip mounting substrate through steps S100 to S800, but the present invention is not limited to this. The method described in this embodiment can be applied to various other processes including a process of aligning wiring and IC chips.
[0090] Various embodiments of the present invention may be described with reference to flow charts and block diagrams, where the blocks may represent (1) stages of a process in which operations are performed or (2) sections of an apparatus responsible for performing the operations. Particular stages and sections may be implemented by dedicated circuitry, programmable circuitry provided with computer readable instructions stored on a computer readable medium, and / or a processor provided with computer readable instructions stored on a computer readable medium. Dedicated circuitry may include digital and / or analog hardware circuitry and may include integrated circuits (ICs) and / or discrete circuits. Programmable circuitry may include reconfigurable hardware circuitry including logical AND, logical OR, logical XOR, logical NAND, logical NOR, and other logical operations, memory elements such as flip-flops, registers, field programmable gate arrays (FPGAs), programmable logic arrays (PLAs), and the like.
[0091] A computer-readable medium may include any tangible device capable of storing instructions that are executed by a suitable device, such that the computer-readable medium having instructions stored thereon comprises an article of manufacture that includes instructions that can be executed to create means for performing the operations specified in the flowcharts or block diagrams. Examples of computer-readable media may include electronic storage media, magnetic storage media, optical storage media, electromagnetic storage media, semiconductor storage media, and the like. More specific examples of computer-readable media may include floppy disks, diskettes, hard disks, random access memories (RAMs), read-only memories (ROMs), erasable programmable read-only memories (EPROMs or flash memories), electrically erasable programmable read-only memories (EEPROMs), static random access memories (SRAMs), compact disk read-only memories (CD-ROMs), digital versatile disks (DVDs), Blu-ray disks, memory sticks, integrated circuit cards, and the like.
[0092] The computer readable instructions may include either assembler instructions, Instruction Set Architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, or source or object code written in any combination of one or more programming languages, including object-oriented programming languages such as Smalltalk®, JAVA®, C++, etc., and conventional procedural programming languages such as the “C” programming language or similar programming languages.
[0093] Computer readable instructions may be provided to a processor or programmable circuitry of a programmable data processing apparatus, such as a general purpose computer, special purpose computer, or other computer, either locally or over a local area network (LAN), a wide area network (WAN) such as the Internet, etc., to execute the computer readable instructions to create means for performing the operations specified in the flowcharts or block diagrams. Examples of processors include computer processors, processing units, microprocessors, digital signal processors, controllers, microcontrollers, etc.
[0094] 21 illustrates an example of a computer 2200 in which aspects of the present invention may be embodied in whole or in part. Programs installed on the computer 2200 may cause the computer 2200 to function as or perform operations associated with an apparatus or one or more sections of the apparatus according to an embodiment of the present invention, and / or to perform a process or steps of a process according to an embodiment of the present invention. Such programs may be executed by the CPU 2212 to cause the computer 2200 to perform specific operations associated with some or all of the blocks of the flowcharts and block diagrams described herein.
[0095] The computer 2200 according to this embodiment includes a CPU 2212, a RAM 2214, a graphic controller 2216, and a display device 2218, which are connected to each other by a host controller 2210. The computer 2200 also includes input / output units such as a communication interface 2222, a hard disk drive 2224, a DVD-ROM drive 2226, and an IC card drive, which are connected to the host controller 2210 via an input / output controller 2220. The computer also includes legacy input / output units such as a ROM 2230 and a keyboard 2242, which are connected to the input / output controller 2220 via an input / output chip 2240.
[0096] The CPU 2212 operates according to a program stored in the ROM 2230 and the RAM 2214, thereby controlling each unit. The graphic controller 2216 retrieves image data generated by the CPU 2212 into a frame buffer or the like provided in the RAM 2214 or into the graphic controller 2216 itself, and causes the image data to be displayed on the display device 2218.
[0097] The communication interface 2222 communicates with other electronic devices via a network. The hard disk drive 2224 stores programs and data used by the CPU 2212 in the computer 2200. The DVD-ROM drive 2226 reads programs or data from the DVD-ROM 2201 and provides the programs or data to the hard disk drive 2224 via the RAM 2214. The IC card drive reads programs and data from an IC card and / or writes programs and data to an IC card.
[0098] The ROM 2230 stores therein a boot program or the like executed by the computer 2200 upon activation, and / or a program that depends on the hardware of the computer 2200. The input / output chip 2240 may also connect various input / output units to the input / output controller 2220 via a parallel port, a serial port, a keyboard port, a mouse port, and the like.
[0099] The programs are provided by a computer-readable medium such as a DVD-ROM 2201 or an IC card. The programs are read from the computer-readable medium, installed in the hard disk drive 2224, the RAM 2214, or the ROM 2230, which are also examples of computer-readable media, and executed by the CPU 2212. Information processing described in these programs is read by the computer 2200, and brings about cooperation between the programs and the various types of hardware resources described above. An apparatus or method may be constructed by realizing information manipulation or processing according to the use of the computer 2200.
[0100] For example, when communication is performed between the computer 2200 and an external device, the CPU 2212 may execute a communication program loaded in the RAM 2214 and instruct the communication interface 2222 to perform communication processing based on the processing described in the communication program. Under the control of the CPU 2212, the communication interface 2222 reads transmission data stored in a transmission buffer processing area provided in the RAM 2214, the hard disk drive 2224, the DVD-ROM 2201, or a recording medium such as an IC card, and transmits the read transmission data to the network, or writes reception data received from the network to a reception buffer processing area or the like provided on the recording medium.
[0101] The CPU 2212 may cause all or a necessary portion of a file or database stored in an external recording medium such as the hard disk drive 2224, the DVD-ROM drive 2226 (DVD-ROM 2201), an IC card, etc. to be read into the RAM 2214, and perform various types of processing on the data on the RAM 2214. The CPU 2212 then writes back the processed data to the external recording medium.
[0102] Various types of information, such as various types of programs, data, tables, and databases, may be stored in the recording medium and undergo information processing. The CPU 2212 may perform various types of processing on the data read from the RAM 2214, including various types of operations, information processing, conditional judgment, conditional branching, unconditional branching, information search / replacement, etc., as described throughout this disclosure and specified by the instruction sequence of the program, and write back the results to the RAM 2214. The CPU 2212 may also search for information in a file, database, etc. in the recording medium. For example, when a plurality of entries each having an attribute value of a first attribute associated with an attribute value of a second attribute are stored in the recording medium, the CPU 2212 may search for an entry that matches a condition, in which an attribute value of the first attribute is specified, from among the plurality of entries, read the attribute value of the second attribute stored in the entry, and thereby obtain the attribute value of the second attribute associated with the first attribute that satisfies a predetermined condition.
[0103] The above-described programs or software modules may be stored in a computer-readable medium on the computer 2200 or in the vicinity of the computer 2200. Also, a recording medium such as a hard disk or a RAM provided in a server system connected to a dedicated communication network or the Internet can be used as a computer-readable medium, thereby providing the programs to the computer 2200 via the network.
[0104] Although the present invention has been described above using the embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It is clear to those skilled in the art that various modifications and improvements can be made to the above embodiments. It is clear from the description of the claims that such modifications and improvements can also be included in the technical scope of the present invention.
[0105] It should be noted that the order of execution of each process, such as operations, procedures, steps, and stages, in the apparatus, system, program, and method shown in the claims, specifications, and drawings is not specifically indicated as "before" or "prior to," and that the process may be performed in any order unless the output of a previous process is used in a subsequent process. Even if the operational flow in the claims, specifications, and drawings is described using "first," "next," etc. for convenience, it does not mean that the process must be performed in this order. The expression "A and / or B" may mean "A, B, or A and C." The expression "A, B, and / or C" may mean "any one of A, B, and C, or any combination of two or more of them." [Explanation of symbols]
[0106] 10. IC Chip Movement Detection System 20 Wiring board 30 Career 40 Redistribution layer 50 IC chips 60 Sealing resin 110 Filming Department 120 Wiring position identification part 130 Chip position identification unit 132 Feature point detection unit 134 Mapping section 136 Location identification part 140 Relative position calculation unit 150 Movement detection unit 500 1st image 510 IC chip 520 Alignment Mark 530 Redistribution layer 540 Concave angle 550 X-rays 555 Point on X-segment 560 Y line segment Point on 565 Y segment 572 feature points 574 feature points 576 feature points 578 feature points 580 feature points 590 Center of gravity 595 Vector 700 2nd image 710 IC chip 720 Alignment Mark 730 Redistribution layer 740 Concave angle 772 feature points 774 feature points 776 feature points 778 feature points 780 feature points 790 Center of gravity 795 Vector 910 Fluctuation Point 990 Vector 1010 Fluctuation point 1020 Line 1030 Line 2200 Computer 2201 DVD-ROM 2210 Host Controller 2212 CPU 2214 RAM 2216 Graphics Controller 2218 Display Device 2220 Input / Output Controller 2222 Communication Interface 2224 Hard Disk Drive 2226 DVD-ROM drive 2230 ROM 2240 Input / Output Chip 2242 Keyboard
Claims
1. An IC chip movement detection system for detecting a movement of a relative position between an IC chip and a wiring board, comprising: an imaging unit that captures a first image including an IC chip and a wiring board at a first time and a second image including the IC chip and the wiring board at a second time after the first time; a wiring position specifying unit that specifies a first wiring position of the wiring board in the first image and a second wiring position of the wiring board in the second image; a chip position specifying unit that specifies a first chip position of the IC chip in the first image and a second chip position of the IC chip in the second image by using feature points of a surface of the IC chip in the first image and the second image; a relative position calculation unit that calculates a first relative position, which is a relative position between the IC chip and the wiring board at the first time, based on the first wiring position and the first chip position, and calculates a second relative position, which is a relative position between the IC chip and the wiring board at the second time, based on the second wiring position and the second chip position; a movement detection unit that detects a change in a relative positional relationship between the IC chip and the wiring substrate based on the first relative position and the second relative position; An IC chip movement detection system comprising:
2. the wiring position specifying unit specifies the first wiring position and the second wiring position by specifying a position of an alignment mark provided on the wiring substrate; 2. The IC chip movement detection system according to claim 1.
3. the wiring position specifying unit specifies the first wiring position and the second wiring position by using a pixel value of the alignment mark; 3. The IC chip movement detection system according to claim 2.
4. the wiring position specifying unit specifies the first wiring position and the second wiring position by using a difference between pixel values of adjacent pixels of the alignment mark; 3. The IC chip movement detection system according to claim 2.
5. the alignment mark has a convex or concave angle, the wiring position specifying unit specifies the first wiring position and the second wiring position by specifying the position of the convex corner or the reentrant corner.
3. The IC chip movement detection system according to claim 2.
6. The chip position specifying unit is a feature point detection unit that detects feature points of a surface of the IC chip in the first image and the second image; a matching unit that matches the feature points in the first image with the feature points in the second image; a position specifying unit that specifies the first chip position and the second chip position from the positions of the associated feature points; 2. The IC chip movement detection system according to claim 1, comprising:
7. the relative position calculation unit calculates the first relative position and the second relative position by averaging movements of a plurality of associated feature points; 7. The IC chip movement detection system according to claim 6.
8. the chip position specifying unit sets the feature point by an ORB (Oriented Fast Rotated Brief) and specifies the first chip position and the second chip position; 7. The IC chip movement detection system according to claim 6.
9. the first time is a time point before a resin sealing process is performed on the IC chip, The second time is a time point after a resin sealing process is performed on the IC chip. The IC chip movement detection system according to any one of claims 1 to 8.
10. An IC chip movement detection method for detecting a movement of a relative position between an IC chip and a wiring board, comprising: an imaging step of capturing a first image including an IC chip and a wiring board at a first time and a second image including the IC chip and the wiring board at a second time after the first time; a wiring position specifying step of specifying a first wiring position of the wiring board in the first image and a second wiring position of the wiring board in the second image; a chip position specifying step of specifying a first chip position of the IC chip in the first image and a second chip position of the IC chip in the second image by using feature points of a surface of the IC chip in the first image and the second image; a relative position calculation step of calculating a first relative position, which is a relative position between the IC chip and the wiring board at the first time, based on the first wiring position and the first chip position, and calculating a second relative position, which is a relative position between the IC chip and the wiring board at the second time, based on the second wiring position and the second chip position; a movement detection step of detecting a change in a relative positional relationship between the IC chip and the wiring board based on the first relative position and the second relative position; An IC chip movement detection method comprising:
11. a mounting step of mounting an IC chip on a wiring substrate; a first photographing step of photographing a first image including the IC chip and the wiring board at a first time; a step of sealing the IC chip with resin; a second photographing step of photographing a second image including the IC chip and the wiring board at a second time; a wiring position specifying step of specifying a first wiring position of the wiring board in the first image and a second wiring position of the wiring board in the second image; a chip position specifying step of specifying a first chip position of the IC chip in the first image and a second chip position of the IC chip in the second image by using feature points of a surface of the IC chip in the first image and the second image; a relative position calculation step of calculating a first relative position, which is a relative position between the IC chip and the wiring board at the first time, based on the first wiring position and the first chip position, and calculating a second relative position, which is a relative position between the IC chip and the wiring board at the second time, based on the second wiring position and the second chip position; a movement detection step of detecting a change in a relative positional relationship between the IC chip and the wiring board based on the first relative position and the second relative position; A method for manufacturing an IC chip mounting substrate comprising:
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