Semiconductor device and its manufacturing method

Abstract

In the present invention, connecting with external wiring is facilitated when there is an electrode pad at a deep position from the surface of a semiconductor device.　The electrode pad is formed at a prescribed depth from the surface of the substrate. An electrically conductive section is formed in a region from the electrode pad to the surface of the substrate. The electrically conductive section has a state in which electrical connection with the wiring is possible at the surface of the substrate. The electrically conductive section is provided with a wiring region for performing electrical connection with the wiring at a position directly above the electrode pad on the surface of the substrate, or a position different from that directly above the electrode pad. The electrically conductive section can be formed by repeating a procedure for applying electrically conductive paste in the region from the electrode pad to the surface of the substrate, and a procedure for curing the applied electrically conductive paste.

Description

[Technical field]

[0001] The present technology relates to a semiconductor device, and more particularly to a semiconductor device in which an electrode pad is formed at a deep position from the surface of a substrate, and a method for manufacturing the same. [Background technology]

[0002] In semiconductor devices, electrode pads for connection to external wiring are sometimes provided in places that are dug deep from the surface of the semiconductor device. For example, a semiconductor device has been proposed in which an electrode pad is exposed and a bonding wire is connected to the electrode pad to connect to the external wiring of a mounting board (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2014-082514 A Summary of the Invention [Problem to be solved by the invention]

[0004] When the electrode pad is located deep as in the above-mentioned conventional technology, the height of the wire bond ball using gold wire and the height of the bump must be increased. In addition, when ultrasonic bonding is performed, ultrasonic waves have difficulty reaching the bonding surface (e.g., the Au-Al interface), which is likely to result in poor bonding. In addition, even if a shear strength measurement is performed to measure the strength of the bonded wire bond, only a part of the top of the gold ball is scraped off, making it difficult to measure the strength appropriately. In particular, when applied to an imaging device, if the opening of the electrode is widened to measure the shear strength, the incident light is reflected by the electrode, causing problems in the pixel characteristics, and the size of the imaging device increases, making it difficult to miniaturize the device.

[0005] The present technology has been developed in view of these circumstances, and aims to facilitate connection to external wiring when an electrode pad is located deep below the surface of a semiconductor device. [Means for solving the problem]

[0006] The present technology has been made to solve the above-mentioned problems, and a first aspect thereof is a semiconductor device including an electrode pad formed at a predetermined depth from a surface of a substrate, and a conductive part formed in a region from the electrode pad to the surface of the substrate and capable of being electrically connected to wiring on the surface of the substrate, thereby providing an effect of electrically connecting the conductive part formed on the electrode pad to the wiring on the surface of the substrate.

[0007] In addition, in the first aspect, the predetermined depth may be a depth of 1 micrometer or more, and more specifically, a depth of about 10 micrometers.

[0008] In addition, in this first aspect, the conductive portion may include a wiring region for electrically connecting with the wiring at a position directly above the electrode pad on the surface of the substrate. In this case, the wiring region may have an area larger than that of the electrode pad. The conductive portion may further include a probe region for contacting a probe at a position on the surface of the substrate other than directly above the electrode pad.

[0009] In addition, in this first aspect, the conductive portion may include a wiring region for electrically connecting with the wiring at a position different from directly above the electrode pad on the surface of the substrate. In this case, the wiring region may have an area larger than the electrode pad. The conductive portion may further include a probe region for contacting a probe at a position directly above the electrode pad on the surface of the substrate.

[0010] In addition, in the first aspect, a plurality of sets of the electrode pads and the conductive portion may be arranged in series along an edge of the substrate, or a plurality of sets of the electrode pads and the conductive portion may be arranged in a staggered manner along the edge of the substrate.

[0011] In addition, in the first aspect, the substrate may be a laminated substrate formed by laminating a plurality of substrates, the electrode pad may be formed on a substrate other than the topmost substrate of the laminated substrate, and the conductive portion may be embedded in a region up to the surface of the laminated substrate. For example, the present invention may be applied to an imaging device having a laminated structure.

[0012] A second aspect of the present technology is a method for manufacturing a semiconductor device, which includes a step of forming an electrode pad at a predetermined depth from a surface of a substrate, a step of applying a conductive paste in an area from the electrode pad to the surface of the substrate, and a step of hardening the applied conductive paste, and repeats the steps of applying and hardening the conductive paste until the conductive paste is in a state in which it can be electrically connected to wiring on the surface of the substrate. This brings about an effect of electrically connecting the wiring on the surface of the substrate to the conductive part formed by repeating the application and hardening of the conductive paste.

[0013] In addition, in the second aspect, the step of applying the conductive paste may include the step of discharging the conductive paste from a position directly above the electrode pad.

[0014] In addition, in this second aspect, the step of applying the conductive paste may include the steps of creating a mask having an opening directly above the electrode pad, and applying the conductive paste from above the mask. [Brief description of the drawings]

[0015] [Figure 1] 1 is a cross-sectional view showing a first structural example of a semiconductor device according to an embodiment of the present technology. [Diagram 2]1 is a top view showing a first arrangement example of a conductive portion 150 in a first structural example of a semiconductor device according to an embodiment of the present technology. [Diagram 3] 10 is a top view showing a second arrangement example of the conductive portion 150 in the first structural example of the semiconductor device according to the embodiment of the present technology. FIG. [Figure 4] 4 is a cross-sectional view showing a second structure example of a semiconductor device according to an embodiment of the present technology. [Diagram 5] 11 is a top view showing a first arrangement example of a conductive portion 150 in a second structural example of a semiconductor device according to an embodiment of the present technology. FIG. [Figure 6] 11 is a top view showing a second arrangement example of the conductive portion 150 in the second structural example of the semiconductor device according to the embodiment of the present technology. FIG. [Figure 7] 11 is a cross-sectional view showing a third structure example of a semiconductor device according to an embodiment of the present technology. [Figure 8] 11 is a top view showing a first arrangement example of a conductive portion 150 in a third structural example of a semiconductor device according to an embodiment of the present technology. FIG. [Figure 9] 13 is a top view showing a second arrangement example of the conductive portion 150 in the third structural example of the semiconductor device according to the embodiment of the present technology. FIG. [Figure 10] 8A to 8C are diagrams showing an example of how a conductive paste 850 is applied to a wafer 810 in a first manufacturing method for a semiconductor device according to an embodiment of the present technology. [Figure 11] 11 is a cross-sectional view showing an example of application of a conductive paste 850 in a first manufacturing method for a semiconductor device according to an embodiment of the present technology. FIG. [Figure 12] 4 is a flowchart showing an example of a processing procedure of a first manufacturing method of a semiconductor device according to an embodiment of the present technology. [Figure 13] 8A to 8C are diagrams showing an example of how a conductive paste 850 is applied to a wafer 810 in a second manufacturing method for a semiconductor device according to an embodiment of the present technology. [Figure 14] 5 is a flowchart showing an example of a processing procedure of a second manufacturing method of a semiconductor device according to an embodiment of the present technology. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0016] Hereinafter, modes for carrying out the present technology (hereinafter, referred to as embodiments) will be described. The description will be made in the following order. 1. Structure of semiconductor device 2. Manufacturing method of semiconductor device

[0017] <1. Structure of semiconductor device> [First structure example] FIG. 1 is a cross-sectional view showing a first structural example of a semiconductor device according to an embodiment of the present technology.

[0018] A first structural example of the semiconductor device in this embodiment includes a laminated substrate in which a sensor substrate 110 is laminated on a logic substrate 120. The logic substrate 120 includes wiring 130 and an electrode pad 140 connected to the wiring 130. That is, the electrode pad 140 is formed from the surface of the sensor substrate 110 to a depth penetrating the sensor substrate 110.

[0019] Here, the depth at which the electrode pads 140 are formed is, for example, 1 micrometer or more, and more specifically, is assumed to be about 10 micrometers.

[0020] A conductive portion 150 is formed in the region from the electrode pad 140 to the surface of the sensor substrate 110. As described below, this conductive portion 150 is formed by repeating a procedure of applying a conductive paste in the region from the electrode pad 140 to the surface of the sensor substrate 110 and a procedure of hardening the applied conductive paste.

[0021] In this first structural example, the conductive section 150 includes a wiring region 151 for electrical connection with wiring, located directly above the electrode pad 140 on the surface of the sensor substrate 110. This wiring region 151 is capable of electrical connection with a wire bonding ball 290. In addition, this wiring region 151 has an area larger than that of the electrode pad 140.

[0022] The ball 290 is a spherical member formed at the tip of the wiring when the wiring is wire-bonded, and is made of, for example, gold (Au). Here, the ball 290 is electrically connected in the wiring region of the conductive section 150.

[0023] In this first structural example, by providing the conductive portion 150, the electrical connection position of the ball 290 during wire bonding can be raised from the electrode pad 140 to the surface of the sensor substrate 110.

[0024] FIG. 2 is a top view showing a first arrangement example of conductive portions 150 in a first structural example of a semiconductor device according to an embodiment of the present technology.

[0025] This first arrangement example is an example in which the conductive parts 150 are arranged in series along the chip edge (X direction) of the sensor substrate 110. Each of the electrode pads 140 is dug in the depth direction (Z direction), and the conductive parts 150 are exposed on the surface of the sensor substrate 110. A ball 290 is electrically connected onto the conductive parts 150.

[0026] FIG. 3 is a top view showing a second arrangement example of the conductive portion 150 in the first structural example of the semiconductor device according to the embodiment of the present technology.

[0027] This second arrangement example is an example in which the conductive parts 150 are arranged in a staggered pattern along the chip edge (X direction) of the sensor substrate 110. This improves the area efficiency when arranging the conductive parts 150 on the sensor substrate 110, and enables the semiconductor device to be miniaturized.

[0028] [Second structure example] FIG. 4 is a cross-sectional view showing a second structure example of the semiconductor device according to the embodiment of the present technology.

[0029] The second structural example of the semiconductor device in this embodiment includes a laminated substrate in which a sensor substrate 110 is laminated on a logic substrate 120, similar to the above-described first structural example. The logic substrate 120 includes wiring 130 and an electrode pad 140 connected to the wiring 130. That is, the electrode pad 140 is formed from the surface of the sensor substrate 110 to a depth penetrating the sensor substrate 110. A conductive portion 150 is formed in the region from the electrode pad 140 to the surface of the sensor substrate 110.

[0030] In this second structural example, the conductive section 150 includes a probe region 152 for contacting a probe of a test device or the like at a position directly above the electrode pad 140 on the surface of the sensor substrate 110. The conductive section 150 also includes a wiring region 151 for electrical connection to wiring at a position different from directly above the electrode pad 140 on the surface of the sensor substrate 110. The wiring region 151 has an area larger than that of the electrode pad 140.

[0031] In this second structural example, by providing a conductive portion 150, the electrical connection position of the wire bonding can be raised from the electrode pad 140 to a wiring area 151 on the surface of the sensor substrate 110, and a probe area 152 for contacting the probe can be provided.

[0032] FIG. 5 is a top view showing a first arrangement example of conductive portions 150 in a second structural example of a semiconductor device according to an embodiment of the present technology.

[0033] This first arrangement example is an example in which the conductive parts 150 are arranged in series along the chip edge (X direction) of the sensor substrate 110. Each of the electrode pads 140 is carved in the depth direction (Z direction), and the conductive parts 150 are exposed on the surface of the sensor substrate 110. A ball 290 is electrically connected to a wiring region 151 of the conductive part 150. Also, a region for contacting a probe is provided in a probe region 152 of the conductive part 150.

[0034] FIG. 6 is a top view showing a second arrangement example of the conductive portion 150 in the second structural example of the semiconductor device according to the embodiment of the present technology.

[0035] This second arrangement example is an example in which the conductive parts 150 are arranged in a staggered pattern along the chip edge (X direction) of the sensor substrate 110. This improves the area efficiency when arranging the conductive parts 150 on the sensor substrate 110, and enables the semiconductor device to be miniaturized.

[0036] [Third structure example] FIG. 7 is a cross-sectional view showing a third structure example of a semiconductor device according to an embodiment of the present technology.

[0037] The third structural example of the semiconductor device in this embodiment includes a laminated substrate in which a sensor substrate 110 is laminated on a logic substrate 120, similar to the above-described first structural example. The logic substrate 120 includes wiring 130 and an electrode pad 140 connected to the wiring 130. That is, the electrode pad 140 is formed from the surface of the sensor substrate 110 to a depth penetrating the sensor substrate 110. A conductive portion 150 is formed in the region from the electrode pad 140 to the surface of the sensor substrate 110.

[0038] In this third structural example, the conductive section 150 includes a wiring region 151 for electrically connecting with wiring, located directly above the electrode pad 140 on the surface of the sensor substrate 110. This wiring region 151 has a larger area than the electrode pad 140. The conductive section 150 also includes a probe region 152 for contacting a probe of a test device or the like, located at a position different from directly above the electrode pad 140 on the surface of the sensor substrate 110. That is, compared to the above-mentioned second structural example, the positions of the wiring region 151 and the probe region 152 are swapped.

[0039] FIG. 8 is a top view showing a first arrangement example of conductive portions 150 in a third structural example of a semiconductor device according to an embodiment of the present technology.

[0040] This first arrangement example is an example in which the conductive parts 150 are arranged in series along the chip edge (X direction) of the sensor substrate 110. Each of the electrode pads 140 is carved in the depth direction (Z direction), and the conductive parts 150 are exposed on the surface of the sensor substrate 110. A ball 290 is electrically connected to a wiring region 151 of the conductive part 150. Also, a region for contacting a probe is provided in a probe region 152 of the conductive part 150.

[0041] FIG. 9 is a top view showing a second arrangement example of the conductive portion 150 in the third structural example of the semiconductor device according to the embodiment of the present technology.

[0042] This second arrangement example is an example in which the conductive parts 150 are arranged in a staggered pattern along the chip edge (X direction) of the sensor substrate 110. This improves the area efficiency when arranging the conductive parts 150 on the sensor substrate 110, and enables the semiconductor device to be miniaturized.

[0043] <2. Manufacturing method of semiconductor device> The first to third structural examples of the semiconductor device in the above-mentioned embodiment can be manufactured by the manufacturing methods exemplified below. The first manufacturing method example is an example in which the conductive paste is applied by ejecting the conductive paste from a position directly above the electrode pad. The second manufacturing method example is an example in which the conductive paste is applied from above a mask having an opening directly above the electrode pad.

[0044] [First manufacturing method example] Fig. 10 is a diagram showing an example of application of a conductive paste 850 to a wafer 810 in a first manufacturing method for a semiconductor device according to an embodiment of the present technology. Fig. 11 is a cross-sectional view showing an example of application of a conductive paste 850 in a first manufacturing method for a semiconductor device according to an embodiment of the present technology.

[0045] In this first manufacturing method example, a conductive paste application head 820 is scanned over the surface of a wafer 810, and conductive paste 850 is discharged and applied only to positions corresponding to electrode pads 140, and then laminated.

[0046] The conductive paste 850 is a conductive paste-like material, and is produced by, for example, mixing a resin with a metal powder such as silver (Ag) or copper (Cu) etc. The conductive paste 850 may be, for example, a conductive nanopaste.

[0047] Possible methods for discharging and applying such conductive paste 850 include, for example, an inkjet method, a dispense method, an aerosol jet method, and the like.

[0048] Methods for hardening the applied conductive paste 850 include, for example, a method of irradiating light or heat, and laser curing using a laser.

[0049] FIG. 12 is a flowchart showing an example of a process procedure of the first manufacturing method of the semiconductor device according to the embodiment of the present technology.

[0050] First, a target wafer 810 is prepared (step S911), and the wafer 810 is set in a conductive paste application device (step S912).

[0051] Next, the conductive paste 850 is applied by dispensing it onto the surface of the electrode pad 140 using the conductive paste application head 820 of the conductive paste application device (step S915). Then, the applied conductive paste 850 is cured by light or heat irradiation, or laser curing (step S916).

[0052] The step of applying the conductive paste 850 (step S915) and the step of curing (step S916) are repeated until the conductive paste 850 is laminated on the surface of the sensor substrate 110 (step S917: No).

[0053] When this series of processes is completed (step S917: Yes), the wafer 810 is removed from the conductive paste application device (step S918).

[0054] [Second manufacturing method example] FIG. 13 is a diagram showing an example of how a conductive paste 850 is applied to a wafer 810 in the second manufacturing method of a semiconductor device according to the embodiment of the present technology.

[0055] In the second manufacturing method example, a metal mask 880 having openings at positions corresponding to the electrode pads 140 is attached to the surface of a wafer 810, and a conductive paste 850 is applied using a squeegee 890, followed by lamination.

[0056] The squeegee 890 is a spatula-shaped tool. By pressing the squeegee 890 against the metal mask 880 with the conductive paste 850 placed on it, the conductive paste 850 is applied through the openings in the metal mask 880.

[0057] The method for hardening the applied conductive paste 850 is similar to that of the first manufacturing method example described above, and may be, for example, a method of irradiating light or heat, or laser curing using a laser.

[0058] FIG. 14 is a flowchart showing an example of a process procedure of the second manufacturing method of the semiconductor device according to the embodiment of the present technology.

[0059] First, a target wafer 810 is prepared (step S921), a resist is applied to the wafer 810 (step S922), exposed to UV light (step S923), and developed (step S924) to generate a metal mask 880.

[0060] Next, the conductive paste 850 is applied through the openings of the metal mask 880 using a squeegee 890 (step S925). Then, the applied conductive paste 850 is cured by light or heat irradiation, or laser curing (step S926).

[0061] The step of applying the conductive paste 850 (step S925) and the step of curing (step S926) are repeated until the conductive paste 850 is laminated on the surface of the sensor substrate 110 (step S927: No).

[0062] When this series of processes is completed (step S927: Yes), the resist is peeled off (step S928).

[0063] Thus, according to an embodiment of the present technology, by repeatedly applying and curing the conductive paste 850 to form the conductive portion 150, the electrical connection position of the ball 290 during wire bonding can be raised from the electrode pad 140 to the surface of the sensor substrate 110.

[0064] If an electrode located deep from the surface of a semiconductor device is to be pulled up to the surface by a semiconductor manufacturing process, it is expected that the circuit design forming the semiconductor device will be optimized, wiring for pulling up the electrode, a via formation process will be constructed, and an increase in the number of processes will occur, resulting in high added value. In contrast, in this embodiment, it is possible to pull up an electrode located deep at a low cost by combining existing assembly processes without using a semiconductor manufacturing process. In addition, by making the electrode itself small, applying a conductive paste discharged so as to fill the electrode, or stacking the electrodes by a squeegee method, and drawing the electrode to the surface of the semiconductor device to form a new electrode, it is possible to miniaturize the semiconductor device and simplify the manufacturing process. Furthermore, by drawing the electrode to the surface of the semiconductor device, it is possible to bond the electrode with an optimal wire bond shape using wire bond technology represented by gold wire, and it is also possible to measure whether the electrode is properly bonded on the surface of the semiconductor device.

[0065] The above-mentioned embodiment shows an example for realizing the present technology, and the matters in the embodiment and the matters specified in the claims correspond to each other. Similarly, the matters specified in the claims and the matters in the embodiment of the present technology having the same name correspond to each other. However, the present technology is not limited to the embodiment, and can be realized by applying various modifications to the embodiment within the scope of the gist of the technology.

[0066] It should be noted that the effects described in this specification are merely examples and are not limiting, and other effects may also be obtained.

[0067] The present technology can also be configured as follows. (1) an electrode pad formed at a predetermined depth from the surface of a substrate; a conductive portion that is formed in a region from the electrode pad to the surface of the substrate and that is capable of being electrically connected to wiring on the surface of the substrate; A semiconductor device comprising: (2) The predetermined depth is 1 micrometer or more. The semiconductor device according to (1) above. (3) The conductive portion includes a wiring region for electrically connecting the wiring to the electrode pad on the surface of the substrate, the wiring region being located directly above the electrode pad. The semiconductor device according to (1) or (2). (4) The wiring region has an area larger than that of the electrode pad. The semiconductor device according to (3) above. (5) The conductive portion further includes a probe region for contacting a probe at a position on the surface of the substrate other than directly above the electrode pad. The semiconductor device according to (3) or (4). (6) The conductive portion includes a wiring region for electrically connecting the wiring to a position other than directly above the electrode pad on the surface of the substrate. The semiconductor device according to (1) or (2). (7) The conductive portion further includes a probe region for contacting a probe at a position directly above the electrode pad on the surface of the substrate. The semiconductor device according to (6) above. (8) The semiconductor device according to any one of (1) to (7), wherein a plurality of pairs of the electrode pads and the conductive portions are arranged in series along an edge of the substrate. (9) The semiconductor device according to any one of (1) to (7), wherein a plurality of pairs of the electrode pads and the conductive portions are arranged in a staggered pattern along an edge of the substrate. (10) The substrate is a laminated substrate in which a plurality of substrates are laminated, the electrode pad is formed on a substrate other than the outermost substrate of the laminated substrate; The conductive portion is embedded in a region up to the surface of the laminated substrate. The semiconductor device according to any one of (1) to (9). (11) forming an electrode pad at a predetermined depth from a surface of a substrate; applying a conductive paste to an area from the electrode pad to a surface of the substrate; and a step of hardening the applied conductive paste. The steps of applying and curing the conductive paste are repeated until the conductive paste is in a state capable of being electrically connected to the wiring on the surface of the substrate. A method for manufacturing a semiconductor device. (12) The step of applying the conductive paste includes the step of discharging the conductive paste from a position directly above the electrode pad. A method for manufacturing a semiconductor device according to (11) above. (13) The step of applying the conductive paste comprises: generating a mask having an opening directly above the electrode pad; applying the conductive paste from above the mask; Equipped A method for manufacturing a semiconductor device according to (11) above. [Explanation of symbols]

[0068] 110 Sensor board 120 Logic Board 130 Wiring 140 Electrode Pads 150 Conductive part 151 Wiring area 152 Probe Region 290 Ball 810 Wafer 820 Conductive paste application head 850 Conductive Paste 880 Metal Mask 890 Squeegee

Claims

1. An electrode pad formed at a predetermined depth from the surface of a laminated substrate formed by stacking a plurality of substrates; a conductive portion that is formed in a convex region from the surfaces of the plurality of substrates toward the electrode pads and that is capable of being electrically connected to wiring on the surface of the laminated substrate; Equipped with the electrode pad is formed on a substrate other than the outermost substrate of the laminated substrate; The conductive portion is embedded in a region up to the surface of the laminated substrate. Semiconductor device.

2. The predetermined depth is 1 micrometer or more. The semiconductor device according to claim 1.

3. The conductive portion includes a wiring region for electrically connecting the wiring to the electrode pad at a position directly above the electrode pad on the surface of the laminated substrate. The semiconductor device according to claim 1.

4. The wiring region has an area larger than that of the electrode pad.

4. The semiconductor device according to claim 3.

5. The conductive portion further includes a probe region for contacting a probe at a position on the surface of the laminate substrate other than directly above the electrode pad.

4. The semiconductor device according to claim 3.

6. The conductive portion includes a wiring region for electrically connecting the wiring to a position other than directly above the electrode pad on the surface of the laminated substrate. The semiconductor device according to claim 1.

7. The conductive portion further includes a probe region for contacting a probe at a position directly above the electrode pad on the surface of the laminate substrate.

7. The semiconductor device according to claim 6.

8. 2. The semiconductor device according to claim 1, wherein a plurality of sets of said electrode pads and said conductive portions are arranged in series along an edge of said laminated substrate.

9. 2. The semiconductor device according to claim 1, wherein a plurality of sets of said electrode pads and said conductive portions are arranged in a staggered pattern along an edge of said laminated substrate.

10. A step of forming an electrode pad on a substrate other than the topmost substrate of a laminated substrate having a plurality of substrates stacked thereon at a predetermined depth from the surface of the laminated substrate; applying a conductive paste to a convex region from a surface of the laminated substrate toward the electrode pad; and a step of hardening the applied conductive paste. The steps of applying and curing the conductive paste are repeated until the conductive paste is in a state capable of being electrically connected to the wiring on the surface of the laminated substrate. A method for manufacturing a semiconductor device.

11. The step of applying the conductive paste includes the step of discharging the conductive paste from a position directly above the electrode pad. The method for manufacturing a semiconductor device according to claim 10.

12. The step of applying the conductive paste includes: generating a mask having an opening directly above the electrode pad; applying the conductive paste from above the mask; Equipped The method for manufacturing a semiconductor device according to claim 10.

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