Method for manufacturing solar cell, solar cell, solar cell device and solar cell module

Abstract

Provided is a method for manufacturing a solar cell with which cost can be reduced. This method for manufacturing a solar cell comprises: a step for forming a series of transparent electrode layer material films on electroconductive semiconductor layers 25, 35 on the reverse surface side of a substrate 11; a step for forming metal electrode layers 29, 39 on the transparent electrode layer material films; a step for forming insulation layers 41 covering the entirety of the metal electrode layers 29 except for a first non-insulation region, and insulation layers 42 covering the entirety of the metal electrode layers 39 excluding a second non-insulation region; and a step for forming patterned transparent electrode layers 28, 38 and leaving the insulation layers 41, 42 using an etching technique in which the insulation layers 41, 42 serve as masks. In the insulation layer formation step, the first non-insulation region positioned on a first straight line extending in a first direction is formed in the insulation layers 41, and the second non-insulation region positioned on a second straight line, different from the first straight line, extending in the first direction is formed in the insulation layers 42.

Description

[Technical field]

[0001] The present invention relates to a method for manufacturing a solar cell, a solar cell and a solar cell device including the solar cell, and a solar cell module including the solar cell device. [Background technology]

[0002] Patent documents 1 to 3 disclose techniques relating to the connection of electrodes of two polarities and wiring members in a back-contact type solar cell. Patent documents 1 and 2 disclose the following in a back-contact type solar cell: The first wiring and the second wiring cross the first electrode and the second electrode, the first wiring is connected to the first electrode at a point where it intersects with the first electrode, and is insulated from the second electrode by an insulating layer at a point where it intersects with the second electrode; The second wiring is connected to the second electrode at a point where it intersects with the second electrode, and is insulated from the first electrode by an insulating layer at a point where it intersects with the first electrode; It is stated that:

[0003] In addition, Patent Document 3 describes a back-contact type solar cell as follows: A wiring for a p-electrode and a wiring for an n-electrode intersecting the p-electrode and the n-electrode are provided, -Insulating resin is formed on the back side, the p-electrode wiring is connected to the p-electrode by a conductive member in a hole in the insulating resin at a point where it intersects with the p-electrode, and is insulated from the n-electrode by the insulating resin at a point where it intersects with the n-electrode; The n-electrode wiring is connected to the n-electrode by a conductive member in a hole in the insulating resin at a point where it intersects with the n-electrode, and is insulated from the p-electrode by the insulating resin at a point where it intersects with the p-electrode. It is stated that: [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2018-133567 A [Patent Document 2] JP 2015-159286 A [Patent Document 3] JP 2014-127550 A Summary of the Invention [Problem to be solved by the invention]

[0005] The present inventors aim to reduce the cost of the manufacturing process for such solar cells. An object of the present invention is to provide a method for manufacturing a solar cell that enables cost reduction, a solar cell and a solar cell device including the solar cell, and a solar cell module including the solar cell device. [Means for solving the problem]

[0006] A method for manufacturing a solar cell according to the present invention is a method for manufacturing a back-contact type solar cell including a semiconductor substrate, a first conductive type semiconductor layer, a first transparent electrode layer, and a first metal electrode layer which are laminated in this order on a portion of one main surface side of the semiconductor substrate, and a second conductive type semiconductor layer, a second transparent electrode layer, and a second metal electrode layer which are laminated in this order on another portion of the one main surface side of the semiconductor substrate, the method including a transparent electrode layer material film forming step of forming a series of transparent electrode layer material films on the first conductive type semiconductor layer and the second conductive type semiconductor layer on the one main surface side of the semiconductor substrate, a metal electrode layer forming step of forming the first metal electrode layer and the second metal electrode layer spaced apart from each other on the transparent electrode layer material film, and a first insulating layer which entirely covers the first metal electrode layer except for a first non-insulating region and a second insulating layer which entirely covers the second metal electrode layer except for a second non-insulating region. the first insulating layer and the second insulating layer being spaced apart from each other; and a transparent electrode layer forming process in which exposed portions of a material film of the transparent electrode layer are removed by an etching method using the first insulating layer and the second insulating layer as a mask to form patterned first transparent electrode layer and second transparent electrode layer, and the first insulating layer and the second insulating layer are left unremoved, wherein the insulating layer forming process forms, in the first insulating layer, the first non-insulating region exposing the first metal electrode layer, the first non-insulating region being located on a first straight line extending in a first direction along the one main surface of the semiconductor substrate, and forms, in the second insulating layer, the second non-insulating region exposing the second metal electrode layer, the second non-insulating region being located on a second straight line different from the first straight line extending in the first direction.

[0007] The solar cell according to the present invention is a back-contact type solar cell including a semiconductor substrate, a first conductive type semiconductor layer, a first transparent electrode layer, and a first metal electrode layer laminated in this order on a portion of one main surface side of the semiconductor substrate, and a second conductive type semiconductor layer, a second transparent electrode layer, and a second metal electrode layer laminated in this order on another portion of the one main surface side of the semiconductor substrate, the solar cell including a first insulating layer entirely covering the first metal electrode layer except for a first non-insulating region, and a second insulating layer entirely covering the second metal electrode layer except for a second non-insulating region, a region between the first transparent electrode layer and the second transparent electrode layer, the region between the first transparent electrode layer and the second transparent electrode layer is not covered with the first insulating layer and the second insulating layer, the first non-insulating region is not covered with the first insulating layer, exposes the first metal electrode layer, and is arranged on a first straight line extending in a first direction along the one main surface of the semiconductor substrate, and the second non-insulating region is not covered with the second insulating layer, exposes the second metal electrode layer, and is arranged on a second straight line different from the first straight line extending in the first direction.

[0008] A solar cell device according to the present invention includes the above-mentioned plurality of solar cells, and the above-mentioned first wiring member and second wiring member that electrically connect adjacent solar cells among the plurality of solar cells.

[0009] A solar cell module according to the present invention comprises one or more solar cell devices as described above. Effect of the Invention

[0010] According to the present invention, it is possible to provide a method for manufacturing a solar cell that enables cost reduction, a solar cell and a solar cell device including the solar cell, and a solar cell module including the solar cell device. [Brief description of the drawings]

[0011] [Figure 1] FIG. 2 is a diagram showing a solar cell module including a solar cell device according to the embodiment, as viewed from the back surface side. [Diagram 2]2 is a cross-sectional view taken along line II-II of the solar cell module shown in FIG. [Diagram 3] FIG. 3 is a diagram of a solar cell in the solar cell device shown in FIGS. 1 and 2, viewed from the back surface side. [Figure 4] 4 is a cross-sectional view taken along line IV-IV of the solar cell shown in FIG. [Figure 5A] 5A to 5C are diagrams illustrating a semiconductor layer forming step in the manufacturing method for a solar cell according to the present embodiment. [Figure 5B] 3A to 3C are diagrams illustrating a transparent electrode layer material film forming step, a metal electrode layer forming step, and an insulating layer forming step in the manufacturing method for a solar cell according to the present embodiment. [Figure 5C] 5A to 5C are diagrams illustrating a transparent electrode layer forming step in the manufacturing method for a solar cell according to the present embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings. In each drawing, the same or corresponding parts are denoted by the same reference numerals. For convenience, hatching and reference numerals may be omitted, in which case other drawings shall be referred to.

[0013] (Solar cell module) Fig. 1 is a view of a solar cell module including a solar cell device according to this embodiment as viewed from the back side, and Fig. 2 is a cross-sectional view of the solar cell module shown in Fig. 1 along line II-II. A light-receiving side protection member 3, a back side protection member 4, and a sealing material 5, which will be described later, are omitted in Fig. 1. An XY orthogonal coordinate system is also shown in Figs. 1 and 2 and in the drawings that will be described later. The XY plane is a plane that runs along the light-receiving surface and back surface of the solar cell module.

[0014] As shown in Figures 1 and 2, the solar cell module 100 includes a solar cell device (also called a solar cell string) 1 in which multiple back-contact type (also called back-surface junction type: back electrode type) solar cells 2 are electrically connected using a shingling method.

[0015] The solar cell device 1 is sandwiched between a light-receiving side protection member 3 and a back side protection member 4. A liquid or solid sealing material 5 is filled between the light-receiving side protection member 3 and the back side protection member 4, thereby sealing the solar cell device 1.

[0016] The encapsulant 5 encapsulates and protects the solar cell device 1, i.e., the solar cell 2, and is interposed between the light-receiving surface of the solar cell 2 and the light-receiving-side protection member 3, and between the back surface of the solar cell 2 and the back-side protection member 4. The shape of the encapsulant 5 is not particularly limited, and may be, for example, a sheet-like shape. This is because the sheet-like shape makes it easy to cover the front and back surfaces of the planar solar cell 2.

[0017] The material of the encapsulant 5 is not particularly limited, but preferably has a property of transmitting light (translucency). In addition, the material of the encapsulant 5 preferably has an adhesive property for bonding the solar cell 2, the light-receiving side protection member 3, and the back side protection member 4. Examples of such materials include translucent resins such as ethylene / vinyl acetate copolymer (EVA), ethylene / α-olefin copolymer, ethylene / vinyl acetate / triallyl isocyanurate (EVAT), polyvinyl butyrate (PVB), acrylic resin, urethane resin, and silicone resin.

[0018] The light-receiving-side protection member 3 covers the solar cell device 1, i.e., the surface (light-receiving surface) of the solar cell 2, via the sealing material 5, to protect the solar cell 2. The shape of the light-receiving-side protection member 3 is not particularly limited, but a plate or sheet shape is preferable in order to indirectly cover the planar light-receiving surface.

[0019] The material of the light-receiving side protection member 3 is not particularly limited, but is preferably a material that is translucent and resistant to ultraviolet light, similar to the sealing material 5, and examples of such materials include glass, or transparent resins such as acrylic resin or polycarbonate resin. The surface of the light-receiving side protection member 3 may be processed to have an uneven shape or may be covered with an anti-reflection coating layer. In this way, the light-receiving side protection member 3 makes it difficult to reflect the received light, and can guide more light to the solar cell device 1.

[0020] The backside protection member 4 covers the back side of the solar cell device 1, i.e., the solar cell 2, via the sealing material 5, to protect the solar cell 2. The shape of the backside protection member 4 is not particularly limited, but similar to the light-receiving-side protection member 3, a plate or sheet shape is preferable since it indirectly covers the planar back side.

[0021] The material of the back protection member 4 is not particularly limited, but is preferably a material that prevents the intrusion of water, etc. (has high water-proofing properties). Examples include resin films such as polyethylene terephthalate (PET), polyethylene (PE), olefin resins, fluorine-containing resins, and silicone-containing resins, or laminates of a translucent plate-shaped resin member such as glass, polycarbonate, and acrylic, and a metal foil such as aluminum foil.

[0022] (Solar cell devices) In the solar cell device 1, the solar cells 2 are connected in series by overlapping parts of their ends. Specifically, a part of the light receiving surface side at one end side in the X direction (the left end side in FIG. 2) of one of the adjacent solar cells 2, 2 overlaps under a part of the back surface side at the other end side in the X direction (the right end side in FIG. 2) of the other solar cell 2.

[0023] In this way, multiple solar cells 2 form a stacked structure in which they are uniformly tilted in a certain direction, like tiles on a roof, and this method of electrically connecting solar cells 2 is called the shingling method. Additionally, multiple solar cells 2 connected in a string shape are called a solar cell string (solar cell device). Below, the area where adjacent solar cells 2, 2 overlap is called the overlapping area Ro.

[0024] The first wiring member 51 and the second wiring member 52 are disposed so as to bridge between adjacent solar cells 2, 2, and electrically connect the adjacent solar cells 2, 2. The first wiring member 51 and the second wiring member 52 will be described in detail later. The solar cell 2 in the solar cell device 1 will be described below.

[0025] (Solar cell) Fig. 3 is a view of the solar cell 2 in the solar cell device 1 shown in Fig. 1 and Fig. 2, viewed from the back surface side. The solar cell 2 shown in Fig. 3 includes a semiconductor substrate 11 having two main surfaces, and the main surface of the semiconductor substrate 11 has a first region 7 and a second region 8. In the following, the main surface of the semiconductor substrate 11 that receives light is referred to as the light-receiving surface, and the main surface of the semiconductor substrate 11 opposite the light-receiving surface (one main surface) is referred to as the back surface.

[0026] The first regions 7 are strip-shaped and extend in the Y direction (second direction). Similarly, the second regions 8 are strip-shaped and extend in the Y direction. The first regions 7 and the second regions 8 are alternately provided in the X direction (first direction) that intersects with the Y direction.

[0027] Fig. 4 is a cross-sectional view of the solar cell 2 shown in Fig. 3 taken along line IV-IV. As shown in Fig. 4, the solar cell 2 includes a passivation layer 13 and an antireflection layer 15, which are laminated in this order on the light-receiving surface side of the semiconductor substrate 11. The solar cell 2 also includes a passivation layer 23, a first conductive type semiconductor layer 25, a first electrode layer 27 (a first transparent electrode layer 28 and a first metal electrode layer 29, which will be described later) and a first insulating layer 41, which are laminated in this order on a portion (a first region 7) of the back surface side of the semiconductor substrate 11. The solar cell 2 also includes a passivation layer 33, a second conductive type semiconductor layer 35, a second electrode layer 37 (a second transparent electrode layer 38 and a second metal electrode layer 39, which will be described later) and a second insulating layer 42, which are laminated in this order on another portion (a second region 8) of the back surface side of the semiconductor substrate 11.

[0028] The semiconductor substrate 11 is made of a crystalline silicon material such as single crystal silicon or polycrystalline silicon. The semiconductor substrate 11 is, for example, an n-type semiconductor substrate in which a crystalline silicon material is doped with an n-type dopant. An example of the n-type dopant is phosphorus (P). The semiconductor substrate 11 functions as a photoelectric conversion substrate that absorbs incident light from the light-receiving surface side and generates photocarriers (electrons and holes).

[0029] By using crystalline silicon as the material for the semiconductor substrate 11, the dark current is relatively small, and a relatively high output (stable output regardless of illuminance) can be obtained even when the intensity of incident light is low.

[0030] The passivation layer 13 is formed on the light-receiving surface side of the semiconductor substrate 11. The passivation layer 23 is formed in a first region 7 on the back surface side of the semiconductor substrate 11. The passivation layer 33 is formed in a second region 8 on the back surface side of the semiconductor substrate 11. The passivation layers 13, 23, and 33 are formed of, for example, an intrinsic (i-type) amorphous silicon material. The passivation layers 13, 23, and 33 suppress recombination of carriers generated in the semiconductor substrate 11 and increase the carrier collection efficiency.

[0031] Antireflection layer 15 is formed on intrinsic semiconductor layer 13 on the light-receiving surface side of semiconductor substrate 11. Antireflection layer 15 functions as an antireflection layer that prevents reflection of incident light, and also functions as a protective layer that protects the light-receiving surface side of semiconductor substrate 11 and intrinsic semiconductor layer 13. Antireflection layer 15 is formed of an insulating material, for example, silicon oxide (SiO), silicon nitride (SiN), or a composite thereof such as silicon oxynitride (SiON).

[0032] The first conductive type semiconductor layer 25 is formed on the passivation layer 23, that is, in the first region 7 on the back surface side of the semiconductor substrate 11. On the other hand, the second conductive type semiconductor layer 35 is formed on the passivation layer 33, that is, in the second region 8 on the back surface side of the semiconductor substrate 11. That is, the first conductive type semiconductor layer 25 and the second conductive type semiconductor layer 35 have a strip shape and extend in the Y direction. The first conductive type semiconductor layer 25 and the second conductive type semiconductor layer 35 are alternately provided in the X direction. In the overlapping region Ro, the first conductive type semiconductor layer 25 and the second conductive type semiconductor layer 35 may be formed to form a continuous pattern.

[0033] The first conductive type semiconductor layer 25 is formed of, for example, an amorphous silicon material. The first conductive type semiconductor layer 25 is, for example, a p-type semiconductor layer in which an amorphous silicon material is doped with a p-type dopant. An example of the p-type dopant is boron (B).

[0034] The second conductive type semiconductor layer 35 is formed of, for example, an amorphous silicon material. The second conductive type semiconductor layer 35 is, for example, an n-type semiconductor layer in which an amorphous silicon material is doped with an n-type dopant (for example, the above-mentioned phosphorus (P)).

[0035] The first conductive type semiconductor layer 25 may be an n-type semiconductor layer, and the second conductive type semiconductor layer 35 may be a p-type semiconductor layer. The semiconductor substrate 11 may be a p-type semiconductor substrate in which a crystalline silicon material is doped with a p-type dopant (for example, the above-mentioned boron (B)).

[0036] The first electrode layer 27 is formed on the first conductive type semiconductor layer 25, that is, in the first region 7 on the back side of the semiconductor substrate 11. The first electrode layer 27 has a first transparent electrode layer 28 and a first metal electrode layer 29 laminated in order on the first conductive type semiconductor layer 25. The second electrode layer 37 is formed on the second conductive type semiconductor layer 35, that is, in the second region 8 on the back side of the semiconductor substrate 11. The second electrode layer 37 has a second transparent electrode layer 38 and a first metal electrode layer 39 laminated in order on the second conductive type semiconductor layer 35. That is, the first metal electrode layer 29 and the second metal electrode layer 39 have a strip-like shape and extend in the Y direction. The first metal electrode layer 29 and the second metal electrode layer 39 are alternately provided in the X direction. In the overlapping region Ro, the first metal electrode layer 29 and the second metal electrode layer 39 may be formed to form a continuous pattern.

[0037] The first transparent electrode layer 28 and the second transparent electrode layer 38 are formed of a transparent conductive material. Examples of the transparent conductive material include ITO (Indium Tin Oxide: a composite oxide of indium oxide and tin oxide), ZnO (Zinc Oxide: zinc oxide), etc.

[0038] The first metal electrode layer 29 and the second metal electrode layer 39 are formed of a metal material. Examples of the metal material include Cu, Ag, Al, and alloys thereof. The first metal electrode layer 29 and the second metal electrode layer 39 may be formed of a conductive paste material containing a metal powder such as silver.

[0039] The first insulating layer 41 is formed on the first metal electrode layer 29, i.e., in the first region 7 on the back surface side of the semiconductor substrate 11. The second insulating layer 42 is formed on the second metal electrode layer 39, i.e., in the second region 8 on the back surface side of the semiconductor substrate 11. That is, the first insulating layer 41 and the second insulating layer 42 have a strip-like shape and extend in the Y direction as shown in FIG. 3. The first insulating layer 41 and the second insulating layer 42 are alternately provided in the X direction. Note that, in the overlapping region Ro, the first insulating layer 41 and the second insulating layer 42 may be formed to form a continuous pattern.

[0040] The first insulating layer 41 entirely covers the first metal electrode layer 29 except for a first non-insulating region 41a. Similarly, the second insulating layer 42 entirely covers the second metal electrode layer 39 except for a second non-insulating region 42a.

[0041] The first non-insulating region 41a is not covered with the first insulating layer 41 and is formed by an opening exposing the first metal electrode layer 29. The first non-insulating region 41a is disposed on a first straight line X1 extending in the X direction (first direction). Similarly, the second non-insulating region 42a is not covered with the second insulating layer 42 and is formed by an opening exposing the second metal electrode layer 39. The second non-insulating region 42a is disposed on a second straight line X2 different from the first straight line X1 extending in the X direction (first direction). The first straight line X1 and the second straight line X2 intersect the first metal electrode layer 29 and the second metal electrode layer 39 and are arranged alternately in the Y direction (second direction).

[0042] The width in the Y direction (second direction) of all or a part of the first non-insulating region 41a is greater than the width of the first wiring member 51. Similarly, the width in the Y direction (second direction) of all or a part of the second non-insulating region 42a is greater than the width of the second wiring member 52. For example, the widths of the first non-insulating region 41a and the second non-insulating region 42a are not less than 1 mm and not more than 50 mm. This makes it possible to ensure alignment clearance when connecting the wiring members.

[0043] The material for the first insulating layer 41 and the second insulating layer 42 is not particularly limited, but may include resins such as acrylic, vinyl chloride, polyurethane, polyester, nylon, phenol, and epoxy, as well as inorganic pigments, organic pigments, ceramics, metal oxides, glass, and the like. The first insulating layer 41 and the second insulating layer 42 may contain a resin material, which can reduce stress applied to the ends of the solar cell in the shingled structure due to temperature changes.

[0044] 3, the first electrode layer 27 and the second electrode layer 37 are separated at the boundary between the first region 7 and the second region 8. That is, the first transparent electrode layer 28 and the second transparent electrode layer 38 are separated, and the first metal electrode layer 29 and the second metal electrode layer 39 are separated. In addition, the first insulating layer 41 and the second insulating layer 42 are separated.

[0045] The region between the first metal electrode layer 29 and the second metal electrode layer 39, and between the first transparent electrode layer 28 and the second transparent electrode layer 38, is not covered with the first insulating layer 41 and the second insulating layer 42.

[0046] In the first metal electrode layer 29, a main surface opposite to the main surface in contact with the first transparent electrode layer 28 and a side surface are covered with a first insulating layer 41. Similarly, in the second metal electrode layer 39, a main surface opposite to the main surface in contact with the second transparent electrode layer 38 and a side surface are covered with a second insulating layer 42.

[0047] On the other hand, the side surface of the first transparent electrode layer is not covered with the first insulating layer 41. Similarly, the side surface of the second transparent electrode layer is not covered with the second insulating layer .

[0048] 3, the first wiring member 51 extends in the X direction (first direction) along a first straight line X1. Similarly, the second wiring member 52 extends in the X direction (first direction) along a second straight line X2. That is, the first wiring member 51 and the second wiring member 52 intersect the first metal electrode layer 29 and the second metal electrode layer 39, and are alternately arranged in the Y direction (second direction).

[0049] The first wiring member 51 is electrically connected to the first metal electrode layer 29 in the first non-insulating region 41a of the first insulating layer 41, and is not electrically connected to the second metal electrode layer 39 by the second insulating layer 42. Similarly, the second wiring member 52 is electrically connected to the second metal electrode layer 39 in the second non-insulating region 42a of the second insulating layer 42, and is not electrically connected to the first metal electrode layer 29 by the first insulating layer 41.

[0050] The center-to-center distance (pitch) in the Y direction between the first wiring member 51 and the second wiring member 52 is larger than the center-to-center distance (pitch) in the X direction between the first metal electrode layer 29 and the second metal electrode layer 39. For example, the center-to-center distance (pitch) between the first wiring member 51 and the second wiring member 52 is 5 mm or more and 50 mm or less. This makes it possible to shorten the current path flowing through the metal electrode layer, reduce output loss caused by electrode resistance, and improve the power generation efficiency of the solar cell.

[0051] The first wiring member 51 and the second wiring member 52 may be a ribbon wire made of a copper core material coated with a low-melting point metal or solder, a conductive film formed of a thermosetting resin film containing low-melting point metal particles or metal microparticles, or a member formed of a knitted fabric or woven fabric made of multiple conductive wires (see, for example, JP 2016-219799 A or JP 2014-3161 A).

[0052] The braided wire may have a width of 0.2 mm to 5 mm and a thickness of 5 μm to 1 mm. In this way, when a stretchable braided wire is used as a wiring member for connecting electrodes in a solar cell, the stress applied to the electrodes due to temperature changes during manufacturing can be alleviated. In addition, when a stretchable braided wire is used as a wiring member between solar cells, the stress applied to the ends of the solar cells in a shingling structure can be alleviated.

[0053] The braided wire may be coated with solder. In this way, plating (coating) the braided wire with low-temperature melting solder allows multiple points of the braided wire to be soldered simultaneously, and processes such as applying conductive paste can be omitted.

[0054] The solder may be a solder having a melting point higher than the lamination temperature of each layer of the solar cell, such as Sn-Bi solder. If the melting point of the solder is higher than the lamination temperature of each layer of the solar cell, it is possible to prevent the solder of the entire braid from unnecessarily melting.

[0055] (Solar Cell Manufacturing Method) Next, a method for manufacturing a solar cell according to this embodiment will be described with reference to Figures 5A to 5C. Figure 5A is a diagram showing a semiconductor layer forming step in the method for manufacturing a solar cell according to this embodiment, and Figure 5B is a diagram showing a transparent electrode layer material film forming step, a metal electrode layer forming step, and an insulating layer forming step in the method for manufacturing a solar cell according to this embodiment. Figure 5C is a diagram showing a transparent electrode layer forming step in the method for manufacturing a solar cell according to this embodiment. Figures 5A to 5C show the back side of semiconductor substrate 11, and the front side of semiconductor substrate 11 is omitted.

[0056] 5A, a passivation layer 23 and a first conductive type semiconductor layer 25 are formed on a part of the back surface side of the semiconductor substrate 11, specifically, on the first region 7 (semiconductor layer formation step). For example, after a passivation layer material film and a first conductive type semiconductor layer material film are formed on the entire back surface side of the semiconductor substrate 11 using a CVD method or a PVD method, the passivation layer 23 and the first conductive type semiconductor layer 25 may be patterned using an etching method that uses a resist or a metal mask generated using a photolithography technique.

[0057] In addition, examples of the etching solution for the p-type semiconductor layer material film include an acidic solution such as hydrofluoric acid containing ozone or a mixture of nitric acid and hydrofluoric acid, and examples of the etching solution for the n-type semiconductor layer material film include an alkaline solution such as an aqueous solution of potassium hydroxide.

[0058] Alternatively, when a passivation layer and a first conductive type semiconductor layer are laminated on the back surface side of the semiconductor substrate 11 using a CVD method or a PVD method, the passivation layer 23 and the p-type semiconductor layer 25 may be deposited and patterned simultaneously using a mask.

[0059] Next, a passivation layer 33 and a second conductive type semiconductor layer 35 are formed on another part of the back surface side of the semiconductor substrate 11, specifically, on the second region 8 (semiconductor layer formation step). For example, as described above, a passivation layer material film and a second conductive type semiconductor layer material film may be formed on the entire back surface side of the semiconductor substrate 11 using a CVD method or a PVD method, and then the passivation layer 33 and the second conductive type semiconductor layer 35 may be patterned using an etching method that uses a resist or a metal mask generated using a photolithography technique.

[0060] Alternatively, when a passivation layer and a second conductive type semiconductor layer are laminated on the back surface side of the semiconductor substrate 11 using a CVD method or a PVD method, the passivation layer 33 and the second conductive type semiconductor layer 35 may be deposited and patterned simultaneously using a mask.

[0061] In this semiconductor layer forming step, a passivation layer 13 (not shown) may be formed on the entire light-receiving surface side of the semiconductor substrate 11.

[0062] 5B, a series of transparent electrode layer material films 28Z are formed on and across the first conductive type semiconductor layer 25 and the second conductive type semiconductor layer 35 (transparent electrode layer material film forming process). The transparent electrode layer material film 28Z is formed by, for example, a CVD method or a PVD method.

[0063] Next, a strip-shaped first metal electrode layer 29 is formed on the first conductive type semiconductor layer 25 via the transparent electrode layer material film 28Z so as to extend in the Y direction, and a strip-shaped second metal electrode layer 39 is formed on the second conductive type semiconductor layer 35 via the transparent electrode layer material film 28Z so as to extend in the Y direction (metal electrode layer forming step). The first metal electrode layer 29 and the second metal electrode layer 39 are formed so as to be spaced apart from each other. Examples of methods for forming the first metal electrode layer 29 and the second metal electrode layer 39 include a PVD method, a screen printing method, an inkjet method, a gravure coating method, and a dispenser method.

[0064] Next, a first insulating layer 41 is formed so as to entirely cover the first metal electrode layer 29 except for the first non-insulating region 41a, and a second insulating layer 42 is formed so as to entirely cover the second metal electrode layer 39 except for the second non-insulating region 42a (insulating layer forming step). The first insulating layer 41 and the second insulating layer 42 are formed so as to be spaced apart from each other. As shown in FIG. 3, in the first insulating layer 41, the first non-insulating region 41a is formed so as to expose the first metal electrode layer 29 and to be disposed on a first straight line X1 extending in the X direction. In the second insulating layer 42, the second non-insulating region 42a is formed so as to expose the second metal electrode layer 39 and to be disposed on a second straight line X2 different from the first straight line X1 extending in the X direction.

[0065] Methods for forming the first insulating layer 41 and the second insulating layer 42 include a PVD method, a CVD method, a screen printing method, an inkjet method, a gravure coating method, a dispenser method, and the like.

[0066] 5C, the transparent electrode layer material film 28Z is patterned by etching using the first insulating layer 41 and the second insulating layer 42 (the first metal electrode layer 29 and the second metal electrode layer 39 in the first non-insulating region 41a and the second non-insulating region 42a) as a mask to form the first transparent electrode layer 28 and the second transparent electrode layer 38 that are separated from each other (transparent electrode layer forming step). At this time, the first insulating layer 41 and the second insulating layer 42 are left without being removed.

[0067] An etching solution for the transparent electrode layer material film 28Z is a solution that does not etch the first metal electrode layer 29 exposed in the first non-insulating region 41a and the second metal electrode layer 39 exposed in the second non-insulating region 42a, and examples of such solutions include acidic solutions such as hydrochloric acid (HCl).

[0068] Thereafter, anti-reflection layer 15 (not shown) is formed on the entire light-receiving surface side of semiconductor substrate 11. Through the above steps, back-contact type solar cell 2 of this embodiment shown in Figs.

[0069] Furthermore, as shown in Figures 1 and 2, the solar cell device 1 and solar cell module 100 of this embodiment can be obtained by connecting multiple solar cells 2 using a shingling method so that parts of the ends of the solar cells 2 overlap each other.

[0070] As described above, according to the manufacturing method for a solar cell of this embodiment, the insulating layers 41, 42 for ensuring insulation from the wiring members 51, 52 also serve as an etching resist for the transparent electrode layers 28, 29. This eliminates the need for the steps of forming and removing the etching resist for the transparent electrode layers 28, 29, thereby simplifying the manufacturing process for the solar cell and reducing costs.

[0071] Moreover, according to the solar cell 2 of this embodiment, the first insulating layer 41 entirely covers the strip-shaped first metal electrode layer 29 extending in the Y direction (second direction) except for the first non-insulating region 41a, the second insulating layer 42 entirely covers the strip-shaped second metal electrode layer 39 extending in the Y direction except for the second non-insulating region 42a, the first non-insulating region 41a is disposed on a first straight line X1 extending in the X direction (first direction) intersecting the Y direction, and the second non-insulating region 42a is disposed on a second straight line X2 different from the first straight line X1 extending in the X direction (first direction). Thus, by disposing the first wiring member 51 along the first straight line X1, the first wiring member 51 is electrically connected to the first metal electrode layer 29 in the first non-insulating region 41a and is insulated from the second metal electrode layer 39 by the second insulating layer 42. Furthermore, by arranging the second wiring member 52 along the second straight line X2, the second wiring member 52 is electrically connected to the second metal electrode layer 39 in the second non-insulated region 42a, and is insulated from the first metal electrode layer 29 by the first insulating layer 41. This makes it possible to easily connect the strip-shaped electrode layers in the solar cell 2 with the wiring member, and also makes it easy to prevent short circuits between the electrodes.

[0072] Moreover, by alternately arranging the multiple first wiring members 51 and the multiple second wiring members 52, the current path flowing through the metal electrode layer can be shortened, which makes it possible to reduce output loss caused by electrode resistance and improve the power generation efficiency of the solar cell.

[0073] In addition, since busbar electrodes and pad electrodes for wiring connection are not required, it is possible to reduce photoelectric conversion loss due to carrier recombination in the busbar electrodes and pad electrodes, which have a relatively large area. In addition, since busbar electrodes and pad electrodes, which have a relatively large area, are not used, it is possible to reduce the amount of expensive electrode materials such as Ag used.

[0074] Furthermore, in the solar cell 2 of this embodiment, the first insulating layer 41 entirely covers the first metal electrode layer 29, and the second insulating layer 42 entirely covers the second metal electrode layer 39, so that even if the width of the metal electrode layer is increased and the electrode spacing is reduced, short circuits between the electrodes can be avoided. This makes it possible to reduce the electrode resistance and improve the power generation efficiency of the solar cell.

[0075] Furthermore, according to the solar cell device 1 and solar cell module 100 of this embodiment, a plurality of solar cells 2 are electrically connected using a shingling method so that ends of the solar cells 2 partially overlap. This allows more solar cells 2 to be mounted in the limited solar cell mounting area of ​​the solar cell device 1 and solar cell module 100, increasing the light receiving area for photoelectric conversion and improving the output of the solar cell device 1 and solar cell module 100. Furthermore, no gaps are generated between the solar cells 2, improving the design of the solar cell device 1 and solar cell module 100.

[0076] Furthermore, according to the solar cell device 1 and the solar cell module 100 of the present embodiment, since a back-contact type solar cell is used, the electrodes and wiring are not visible, and the design of the solar cell device 1 and the solar cell module 100 is further improved.

[0077] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications and variations are possible. For example, in the above-described embodiments, a solar cell device and a solar cell module in which a plurality of solar cells are electrically connected using a shingling method are exemplified. However, the solar cell of the present invention is not limited to this, and can be applied to various solar cell devices and solar cell modules. For example, the solar cell of the present invention can also be applied to a solar cell device and a solar cell module in which a plurality of solar cells arranged in a planar manner at a predetermined insulating distance are electrically connected without using a shingling method.

[0078] In addition, in the present embodiment, the solar cell 2 using a crystalline silicon material is exemplified, but the material is not limited to this. For example, various materials such as gallium arsenide (GaAs) may be used as the material of the solar cell.

[0079] In the above-described embodiment, a heterojunction solar cell 2 is illustrated as an example, as shown in Fig. 4. However, the present invention is not limited to this, and can be applied to various solar cells such as a homojunction solar cell.

[0080] Furthermore, in the above-described embodiment, the solar cell module includes a single solar cell device 1, but the solar cell module may include a plurality of solar cell devices 1 arranged in, for example, the Y direction. [Explanation of symbols]

[0081] 1. Solar cell devices 2. Solar Cell 3. Receiving side protection material 4 Back protection material 5. Encapsulating material 7 First area 8 Second area 11 Semiconductor substrate 13,23,33 Passivation layer 15 Anti-reflection layer 25 First conductive type semiconductor layer 27 1st electrode layer 28 First transparent electrode layer 28Z Transparent electrode layer material film 29 First metal electrode layer 35 Second conductive type semiconductor layer 37 Second electrode layer 38 Second transparent electrode layer 39 Second metal electrode layer 39 41 First insulating layer 41a First non-insulated area 42 Second insulating layer 42a Second non-insulated area 51 First wiring member 52 Second wiring member 100 Solar Modules X1 1st straight line X2 2nd straight line Ro overlapping area

Claims

1. A method for manufacturing a back-contact type solar cell comprising: a semiconductor substrate; a first conductive type semiconductor layer, a first transparent electrode layer, and a first metal electrode layer, which are laminated in this order on a portion of one main surface side of the semiconductor substrate; and a second conductive type semiconductor layer, a second transparent electrode layer, and a second metal electrode layer, which are laminated in this order on another portion of the one main surface side of the semiconductor substrate, a transparent electrode layer material film forming step of forming a series of transparent electrode layer material films on the first conductive type semiconductor layer and the second conductive type semiconductor layer on the one main surface side of the semiconductor substrate; a metal electrode layer forming step of forming the first metal electrode layer and the second metal electrode layer spaced apart from each other on a material film of the transparent electrode layer; an insulating layer forming step of forming a first insulating layer that entirely covers the first metal electrode layer except for a first non-insulating region and a second insulating layer that entirely covers the second metal electrode layer except for a second non-insulating region, the first insulating layer and the second insulating layer being spaced apart from each other; a transparent electrode layer forming step of forming patterned first and second transparent electrode layers by removing exposed portions of a material film of the transparent electrode layer using an etching method with the first and second insulating layers as masks, and leaving the first and second insulating layers unremoved; Including, In the insulating layer forming step, forming a first non-insulating region in the first insulating layer, the first non-insulating region exposing the first metal electrode layer, the first non-insulating region being disposed on a first straight line extending in a first direction along the one main surface of the semiconductor substrate; forming a second non-insulating region in the second insulating layer, the second non-insulating region exposing the second metal electrode layer, the second non-insulating region being disposed on a second straight line different from the first straight line extending in the first direction; A method for manufacturing solar cells.

2. In the metal electrode layer forming step, the first metal electrode layer and the second metal electrode layer are formed in a strip shape extending in a second direction along the one main surface and intersecting the first direction, and are alternately arranged in the first direction, In the insulating layer forming step, the first non-insulating region and the second non-insulating region are formed on the first straight line and the second straight line that intersect with the first metal electrode layer and the second metal electrode layer and are alternately arranged in the second direction. A method for producing the solar cell according to claim 1 .

3. A back-contact type solar cell comprising: a semiconductor substrate; a first conductive type semiconductor layer, a first transparent electrode layer, and a first metal electrode layer laminated in this order on a portion of one main surface side of the semiconductor substrate; and a second conductive type semiconductor layer, a second transparent electrode layer, and a second metal electrode layer laminated in this order on another portion of the one main surface side of the semiconductor substrate, a first insulating layer entirely covering the first metal electrode layer except for a first non-insulating region; a second insulating layer entirely covering the second metal electrode layer except for a second non-insulating region; Equipped with a region between the first metal electrode layer and the second metal electrode layer, the region between the first transparent electrode layer and the second transparent electrode layer being not covered with the first insulating layer and the second insulating layer; a side surface of the first metal electrode layer in the region between the first metal electrode layer and the second metal electrode layer is covered with the first insulating layer; a side surface of the second metal electrode layer in the region between the first metal electrode layer and the second metal electrode layer is covered with the second insulating layer; a side surface of the first transparent electrode layer in the region between the first transparent electrode layer and the second transparent electrode layer is not covered with the first insulating layer; a side surface of the second transparent electrode layer in the region between the first transparent electrode layer and the second transparent electrode layer is not covered with the second insulating layer; the first non-insulating region is not covered with the first insulating layer, exposes the first metal electrode layer, and is disposed on a first straight line extending in a first direction and a second direction along the one main surface of the semiconductor substrate, the first direction and the second direction intersecting each other; the second non-insulating region is not covered with the second insulating layer, exposes the second metal electrode layer, and is disposed on a second straight line different from the first straight line extending in the first direction. Solar cell.

4. the first metal electrode layer and the second metal electrode layer are strip-shaped extending in the second direction and are arranged alternately in the first direction; the first straight line and the second straight line intersect the first metal electrode layer and the second metal electrode layer and are alternately arranged in the second direction; The solar cell according to claim 3 .

5. a first wiring member extending in the first direction along the first straight line and electrically connected to the first metal electrode layer in the first non-insulating region; a second wiring member extending in the first direction along the second straight line and electrically connected to the second metal electrode layer in the second non-insulated region; The solar cell according to claim 3 or 4, comprising:

6. a width in the second direction of the portion of the first non-insulating region is greater than a width of the first wiring member; a width in the second direction of a portion of the second non-insulating region is greater than a width of the second wiring member; The solar cell according to claim 5 .

7. The solar cell according to claim 5 , wherein a center-to-center distance between the first wiring member and the second wiring member is larger than a center-to-center distance between the first metal electrode layer and the second metal electrode layer.

8. The solar cell according to any one of claims 5 to 7, wherein the first wiring member and the second wiring member are braided wires.

9. The solar cell according to claim 8 , wherein the first wiring member and the second wiring member are coated with solder.

10. The solar cell according to claim 9 , wherein the melting point of the solder is higher than a lamination temperature of each layer.

11. A plurality of solar cells according to any one of claims 5 to 10; A first wiring member and a second wiring member according to any one of claims 5 to 10, which electrically connect adjacent solar cells among the plurality of solar cells; A solar cell device comprising:

12. The solar cell device according to claim 11 , wherein the plurality of solar cells are electrically connected using a shingling method.

13. The solar cell device according to claim 12 , wherein the first insulating layer and the second insulating layer in the solar cell include a resin material.

14. A solar cell module comprising one or more solar cell devices according to any one of claims 11 to 13.

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