Semiconductor Device

Abstract

To provide a semiconductor device that can easily discharge heat generated by semiconductor chips.SOLUTION: A semiconductor device has a substrate, a first circuit pattern on the substrate, a second circuit pattern on the substrate, a third circuit pattern on the substrate, a first semiconductor chip having a first electrode and a second electrode on the third circuit pattern, and a metal plate, and the first electrode is bonded to the third circuit pattern and the metal plate is bonded to the first circuit pattern, the second circuit pattern and the second electrode.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor device. [Background technology]

[0002] 2. Description of the Related Art As a semiconductor device used in a power module, a semiconductor device in which a metal plate is connected to an electrode of a semiconductor chip has been proposed (eg, Patent Documents 1 and 2). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2016-162773 A [Patent Document 2] JP 2000-156439 A Summary of the Invention [Problem to be solved by the invention]

[0004] In conventional semiconductor devices, the heat generated in the semiconductor chip cannot be sufficiently discharged, and there is a risk that the temperature of the semiconductor chip will rise excessively.

[0005] An object of the present disclosure is to provide a semiconductor device that can easily dissipate heat generated in a semiconductor chip. [Means for solving the problem]

[0006] The semiconductor device disclosed herein comprises a substrate, a first circuit pattern provided on the substrate, a second circuit pattern provided on the substrate, a third circuit pattern provided on the substrate, a first semiconductor chip provided on the third circuit pattern and having a first electrode and a second electrode, and a metal plate, wherein the first electrode is bonded to the third circuit pattern, and the metal plate is bonded to the first circuit pattern, the second circuit pattern, and the second electrode. Effect of the Invention

[0007] According to the present disclosure, heat generated in a semiconductor chip can be easily discharged. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a top view showing the semiconductor device according to the first embodiment. [Diagram 2] FIG. 2 is a top view showing the first semiconductor chip and the second semiconductor chip in the first embodiment. [Diagram 3] FIG. 3 is a cross-sectional view showing the semiconductor device according to the first embodiment. [Figure 4] FIG. 4 is a cross-sectional view showing a semiconductor device according to a modified example of the first embodiment. [Diagram 5] FIG. 5 is a top view showing the semiconductor device according to the second embodiment. [Figure 6] FIG. 6 is a top view showing the first semiconductor chip and the second semiconductor chip in the second embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] The embodiments for carrying out the invention are described below.

[0010] [Description of the embodiments of the present disclosure] First, the embodiments of the present disclosure will be described. In the following description, the same or corresponding elements are denoted by the same reference numerals, and the same description thereof will not be repeated.

[0011] [1] A semiconductor device according to one embodiment of the present disclosure includes a substrate, a first circuit pattern provided on the substrate, a second circuit pattern provided on the substrate, a third circuit pattern provided on the substrate, a first semiconductor chip provided on the third circuit pattern and having a first electrode and a second electrode, and a metal plate, wherein the first electrode is bonded to the third circuit pattern, and the metal plate is bonded to the first circuit pattern, the second circuit pattern, and the second electrode.

[0012] Since the metal plate is bonded to the first circuit pattern, the second circuit pattern, and the second electrode, the second electrode is electrically connected to the first circuit pattern and the second circuit pattern. Thus, signals are transmitted between the second electrode and the first circuit pattern and the second circuit pattern. Furthermore, heat generated in the first semiconductor chip is transmitted from the second electrode to both the first circuit pattern and the second circuit pattern through the metal plate. Thus, compared to a case where the metal plate is not bonded to either the first circuit pattern or the second circuit pattern, it is easier to dissipate heat generated in the first semiconductor chip.

[0013] [2] In [1], the third circuit pattern may be provided between the first circuit pattern and the second circuit pattern. In this case, heat generated in the semiconductor chip is discharged in two directions opposite to each other, making it easier to dissipate the heat.

[0014] [3] In [1] or [2], the first semiconductor chip may be a transistor chip or a diode chip. Even if the transistor chip or diode chip used in the first semiconductor chip generates a large amount of heat, the heat can be easily discharged, and breakdowns and the like caused by heat can be suppressed.

[0015] [4] In the above [1] to [3], a second semiconductor chip may be provided on the third circuit pattern and have a third electrode and a fourth electrode, the third electrode being bonded to the third circuit pattern, and the metal plate may also be bonded to the fourth electrode. In this case, heat generated in the second semiconductor chip can also be easily discharged. Furthermore, the variation in heat dissipation efficiency between the first semiconductor chip and the second semiconductor chip can be reduced. In particular, when the first semiconductor chip and the second semiconductor chip are of the same type and generate heat to the same extent, the temperature difference between the first semiconductor chip and the second semiconductor chip can be reduced, making it easier to avoid a situation in which one of the first and second semiconductor chips is more likely to break down.

[0016] [5] In [4], the second semiconductor chip may be a transistor chip or a diode chip. Even if the transistor chip or diode chip used in the second semiconductor chip generates a large amount of heat, the heat can be easily discharged, and breakdowns and the like caused by heat can be suppressed.

[0017] [6] In any of [1] to [5], the second semiconductor chip may be a silicon carbide semiconductor chip. In this case, the second semiconductor chip can have excellent voltage resistance. Even if the silicon carbide semiconductor chip generates a large amount of heat, the heat generated in the second semiconductor chip can be easily discharged, and breakdowns and the like caused by heat can be suppressed.

[0018] [7] In any of [1] to [6], a first external terminal for a source electrically connected to the first circuit pattern and a second external terminal for a Kelvin source electrically connected to the second circuit pattern may be provided, in which case the second electrode can be used as a source electrode.

[0019] [8] In any one of [1] to [7], the metal plate may have a first bonding surface bonded to the first circuit pattern, a second bonding surface bonded to the second circuit pattern, a third bonding surface bonded to the second electrode, a first connecting portion connecting the first bonding surface and the third bonding surface, and a second connecting portion connecting the second bonding surface and the third bonding surface. In this case, the metal plate can be easily formed by bending or the like, for example.

[0020] [9] In [8], an area of ​​the first bonding surface may be larger than an area of ​​the second bonding surface, in which case the amount of current flowing through the first circuit pattern can be made larger than the amount of current flowing through the second circuit pattern.

[0021]

[10] In any one of [1] to [9], in a plan view, the metal plate extends in a first direction, the first semiconductor chip has first and second sides parallel to the first direction and third and fourth sides perpendicular to the first direction, and the lengths of the first and second sides may be less than the lengths of the third and fourth sides. In this case, the third and fourth sides, which are longer than the first and second sides, are perpendicular to the first direction in which the metal plate extends, making it easier to dissipate heat generated in the first semiconductor chip.

[0022]

[11] In any of [1] to

[10] , the first semiconductor chip may be a silicon carbide semiconductor chip. In this case, the first semiconductor chip has excellent voltage resistance. Even if the silicon carbide semiconductor chip generates a large amount of heat, the heat generated in the first semiconductor chip can be easily discharged, and breakdowns and the like caused by heat can be suppressed.

[0023] [Details of the embodiment of the present disclosure] Hereinafter, the embodiments of the present disclosure will be described in detail, but the present embodiment is not limited thereto. In this specification and drawings, components having substantially the same functional configuration may be denoted by the same reference numerals to avoid redundant description. In this specification and drawings, the X1-X2 direction, the Y1-Y2 direction, and the Z1-Z2 direction are defined as mutually orthogonal directions. A plane including the X1-X2 direction and the Y1-Y2 direction is defined as the XY plane, a plane including the Y1-Y2 direction and the Z1-Z2 direction is defined as the YZ plane, and a plane including the Z1-Z2 direction and the X1-X2 direction is defined as the ZX plane. For convenience, the Z1 direction is defined as the upward direction, and the Z2 direction is defined as the downward direction. In addition, in this disclosure, planar view refers to viewing an object from the Z1 side. The Y1-Y2 direction is an example of a first direction, and the X1-X2 direction is an example of a second direction.

[0024] (First embodiment) A first embodiment will be described. The first embodiment relates to a semiconductor device. FIG. 1 is a top view showing the semiconductor device according to the first embodiment. FIG. 2 is a top view showing a first semiconductor chip and a second semiconductor chip in the first embodiment. FIG. 3 is a cross-sectional view showing the semiconductor device according to the first embodiment. FIG. 3 corresponds to a cross-sectional view taken along line III-III in FIG. 1.

[0025] As shown in FIGS. 1 to 3, the semiconductor device 1 according to the first embodiment mainly includes a first semiconductor chip 100, a second semiconductor chip 200, a metal plate 300, a heat sink 400, a substrate 500, and a case 600.

[0026] The heat sink 400 has a surface 401 on the Z1 side and a surface 402 on the Z2 side, and a substrate 500 is provided above the surface 401. For example, the heat sink 400 is a copper (Cu) plate on which a nickel (Ni) plating film is formed.

[0027] The substrate 500 has an insulating base material 510, a first circuit pattern 521, a second circuit pattern 522, a third circuit pattern 523, a fourth circuit pattern 524, and a conductive layer 530. The base material 510 is made of ceramics such as silicon nitride (Si3N4), and has a surface 511 on the Z1 side and a surface 512 on the Z2 side. The first circuit pattern 521, the second circuit pattern 522, the third circuit pattern 523, and the fourth circuit pattern 524 are formed on the surface 511 of the base material 510. In the cross section shown in FIG. 3, the third circuit pattern 523 is disposed on the Y2 side of the first circuit pattern 521, the fourth circuit pattern 524 is disposed on the Y2 side of the third circuit pattern 523, and the second circuit pattern 522 is disposed on the Y2 side of the fourth circuit pattern 524. That is, the third circuit pattern 523 is disposed between the first circuit pattern 521 and the second circuit pattern 522. The conductive layer 530 is formed on the surface 512 of the base material 510. The conductive layer 530 may be provided over substantially the entire surface 512. The conductive layer 530 is bonded to the heat sink 400 by a bonding material 50 such as solder. For example, the first circuit pattern 521, the second circuit pattern 522, the third circuit pattern 523, the fourth circuit pattern 524 and the conductive layer 530 are copper layers. For example, the bonding material 12 is a tin (Sn)-silver (Ag)-copper (Cu) based solder or a tin (Sn)-antimony (Sb) based solder.

[0028] A first semiconductor chip 100 and a second semiconductor chip 200 are mounted on a substrate 500. For example, the first semiconductor chip 100 is on the Y1 side of the second semiconductor chip 200.

[0029] The first semiconductor chip 100 is a transistor such as a MOS field effect transistor (FET) and has a rectangular planar shape in a planar view. The first semiconductor chip 100 has a surface 101 on the Z1 side and a surface 102 on the Z2 side. A source electrode pad 111 and a gate electrode pad 113 are provided on the surface 101, and a drain electrode pad 112 is provided on the surface 102. For example, the gate electrode pad 113 is on the X2 side of the source electrode pad 111. In a planar view, the source electrode pad 111 and the gate electrode pad 113 have a rectangular planar shape, and the area of ​​the source electrode pad 111 is larger than the area of ​​the gate electrode pad 113. In a planar view, the drain electrode pad 112 has a rectangular planar shape and is provided over approximately the entire surface 102. The drain electrode pad 112 is joined to the third circuit pattern 523 by a joining material 21 such as solder. For example, the bonding material 21 is a Sn-Ag-Cu based solder or a Sn-Sb based solder, etc. The drain electrode pad 112 is an example of a first electrode, and the source electrode pad 111 is an example of a second electrode.

[0030] In a plan view, the first semiconductor chip 100 has a first side 701 and a second side 702 parallel to the Y1-Y2 direction, and a third side 703 and a fourth side 704 parallel to the X1-X2 direction. The first side 701 is on the X1 side of the second side 702, and the third side 703 is on the Y1 side of the fourth side 704. The first semiconductor chip 100 has a square planar shape, and the lengths of the first side 701 and the second side 702 are equal to the lengths of the third side 703 and the fourth side 704.

[0031] In addition, in a plan view, the source electrode pad 111 has a fifth side 705 and a sixth side 706 parallel to the Y1-Y2 direction, and a seventh side 707 and an eighth side 708 parallel to the X1-X2 direction. The fifth side 705 is on the X1 side of the sixth side 706, and the seventh side 707 is on the Y1 side of the eighth side 708. The source electrode pad 111 has a square planar shape, and the lengths of the fifth side 705 and the sixth side 706 are equal to the lengths of the seventh side 707 and the eighth side 708. The fifth side 705 and the sixth side 706 may be longer than the seventh side 707 and the eighth side 708.

[0032] The second semiconductor chip 200 is a diode such as a Schottky Barrier Diode (SBD) and has a rectangular planar shape. The second semiconductor chip 200 has a surface 201 on the Z1 side and a surface 202 on the Z2 side. An anode electrode pad 211 is provided on the surface 201, and a cathode electrode pad 212 is provided on the surface 202. In a plan view, the anode electrode pad 211 has a rectangular planar shape and is provided over substantially the entire surface 201. In a plan view, the cathode electrode pad 212 has a rectangular planar shape and is provided over substantially the entire surface 202. The cathode electrode pad 212 is bonded to the third circuit pattern 523 by a bonding material 22 such as solder. For example, the bonding material 22 is a Sn-Ag-Cu solder or a Sn-Sb solder. The cathode electrode pad 212 is an example of a third electrode, and the anode electrode pad 211 is an example of a fourth electrode.

[0033] In a plan view, the second semiconductor chip 200 has a ninth side 709 and a tenth side 710 parallel to the Y1-Y2 direction, and an eleventh side 711 and a twelfth side 712 parallel to the X1-X2 direction. The ninth side 709 is on the X1 side of the tenth side 710, and the eleventh side 711 is on the Y1 side of the twelfth side 712. The second semiconductor chip 200 has a square planar shape, and the lengths of the ninth side 709 and the tenth side 710 are equal to the lengths of the eleventh side 711 and the twelfth side 712.

[0034] In addition, in a plan view, the anode electrode pad 211 has a thirteenth side 713 and a fourteenth side 714 parallel to the Y1-Y2 direction, and a fifteenth side 715 and a sixteenth side 716 parallel to the X1-X2 direction. The thirteenth side 713 is on the X1 side of the fourteenth side 714, and the fifteenth side 715 is on the Y1 side of the sixteenth side 716. The anode electrode pad 211 has a square planar shape, and the lengths of the thirteenth side 713 and the fourteenth side 714 are equal to the lengths of the fifteenth side 715 and the sixteenth side 716. The thirteenth side 713 and the fourteenth side 714 may be longer than the thirteenth side 713 and the fourteenth side 714.

[0035] The metal plate 300 extends in the Y1-Y2 direction. The metal plate 300 has a first bonding surface 301, a second bonding surface 302, a third bonding surface 303, a first connecting portion 311, and a second connecting portion 312. The first bonding surface 301 is bonded to the first circuit pattern 521. The second bonding surface 302 is bonded to the second circuit pattern 522. The third bonding surface 303 is bonded to the source electrode pad 111 and the anode electrode pad 211. The first connecting portion 311 connects the first bonding surface 301 and the third bonding surface 303. The second connecting portion 312 connects the second bonding surface 302 and the third bonding surface 303. The metal plate 300 is, for example, a copper plate. The metal plate 300 may be a copper plate on which a nickel plating film is formed. The metal plate 300 is formed, for example, by bending a single metal plate. The metal plate 300 can be easily formed by bending or the like.

[0036] The first circuit pattern 521 and the first bonding surface 301 are bonded by a bonding material 11 such as solder. The second circuit pattern 522 and the second bonding surface 302 are bonded by a bonding material 12 such as solder. The source electrode pad 111 and the third bonding surface 303 are bonded by a bonding material 31 such as solder. The anode electrode pad 211 and the third bonding surface 303 are bonded by a bonding material 32 such as solder. For example, the bonding material 11, the bonding material 12, the bonding material 31, and the bonding material 32 are Sn-Ag-Cu based solder or Sn-Sb based solder.

[0037] The case 600 is formed, for example, in a frame shape in a plan view. The material of the case 600 is an insulating material such as resin. In a plan view, the substrate 500 is disposed inside the case 600. The case 600 is provided with a first external terminal 601 for a source, a second external terminal 602 for a Kelvin source, a third external terminal 603 for a drain, and a fourth external terminal 604 for a gate.

[0038] For example, the first external terminal 601 is joined to the first circuit pattern 521 by a bonding material (not shown) such as solder, and the third external terminal 603 is joined to the third circuit pattern 523 by a bonding material (not shown) such as solder. The first external terminal 601 for the source is electrically connected to the first circuit pattern 521, and the third external terminal 603 for the drain is electrically connected to the third circuit pattern 523. If the first external terminal 601 and the first circuit pattern 521 are electrically connected, another circuit pattern, a conductive member such as a bonding wire, etc. may be interposed between the first external terminal 601 and the first circuit pattern 521. If the third external terminal 603 and the third circuit pattern 523 are electrically connected, another circuit pattern, a conductive member such as a bonding wire, etc. may be interposed between the third external terminal 603 and the third circuit pattern 523.

[0039] The semiconductor device 1 has a bonding wire 41 that connects the second circuit pattern 522 and the second external terminal 602, a bonding wire 42 that connects the gate electrode pad 113 and the fourth circuit pattern 524, and a bonding wire 43 that connects the fourth circuit pattern 524 and the fourth external terminal 604. The second external terminal 602 for the Kelvin source is electrically connected to the second circuit pattern 522, and the fourth external terminal 604 for the gate is electrically connected to the fourth circuit pattern 524.

[0040] In the semiconductor device 1 according to the first embodiment, the metal plate 300 is joined to the source electrode pad 111 and the anode electrode pad 211, and the metal plate 300 is joined to the first circuit pattern 521 and the second circuit pattern 522. Therefore, heat generated in the first semiconductor chip 100 is transferred from the source electrode pad 111 to the first circuit pattern 521 and the second circuit pattern 522 through the metal plate 300. Also, heat generated in the second semiconductor chip 200 is transferred from the anode electrode pad 211 to the first circuit pattern 521 and the second circuit pattern 522 through the metal plate 300. Therefore, compared to a case where the metal plate 300 is joined to the first circuit pattern 521 and is not joined to the second circuit pattern 522, the heat generated in the first semiconductor chip 100 and the heat generated in the second semiconductor chip 200 can be easily discharged.

[0041] The first circuit pattern 521 is electrically connected to the first external terminal 601 for the source, and the second circuit pattern 522 is electrically connected to the second external terminal 602 for the Kelvin source. Therefore, the metal plate 300 can function as a current path while also functioning as a heat exhaust path. Also, a bonding wire for connecting the first semiconductor chip 100 and the second circuit pattern 522 can be eliminated.

[0042] Since the third circuit pattern 523 on which the first semiconductor chip 100 and the second semiconductor chip 200 are provided is provided between the first circuit pattern 521 and the second circuit pattern 522, the heat dissipation direction through the metal plate 300 becomes two directions facing opposite each other on the Y1 side and the Y2 side. Therefore, it is possible to more easily dissipate heat.

[0043] The first semiconductor chip 100 and the second semiconductor chip 200 may be silicon carbide semiconductor chips manufactured using, for example, a silicon carbide (SiC) substrate. The silicon carbide semiconductor chips provide, for example, excellent breakdown voltage. Even if the first semiconductor chip 100 and the second semiconductor chip 200 are silicon carbide semiconductor chips and thus generate a large amount of heat, the heat generated by the first semiconductor chip 100 and the second semiconductor chip 200 can be easily discharged, thereby suppressing breakdowns and the like caused by heat generation.

[0044] It should be noted that the first semiconductor chip 100 and the second semiconductor chip 200 are not limited to a transistor chip and a diode chip, respectively. For example, both may be transistor chips or diode chips, or the first semiconductor chip 100 may be a diode chip and the second semiconductor chip 200 may be a transistor chip. In particular, when the first semiconductor chip 100 and the second semiconductor chip 200 are the same type of semiconductor chips and generate heat to the same extent, it is possible to reduce the temperature difference between the first semiconductor chip 100 and the second semiconductor chip 200, and to easily avoid a situation in which one of the first semiconductor chips 100 and the second semiconductor chip 200 is more likely to break down.

[0045] In this embodiment, the first circuit pattern 521 is connected to a first external terminal 601 for a source, and the second circuit pattern 522 is connected to a second external terminal 602 for a Kelvin source. Therefore, by making the area of ​​the first bonding surface 301 of the metal plate 300 larger than the area of ​​the second bonding surface 302, it is easy to make the amount of current flowing through the first circuit pattern 521 larger than the amount of current flowing through the second circuit pattern 522.

[0046] It is noted that the substrate 500 does not necessarily have to be used. Fig. 4 is a cross-sectional view showing a semiconductor device according to a modified example of the first embodiment. Fig. 4 corresponds to a cross-sectional view taken along line III-III in Figs. 1 and 2, similar to Fig. 3. For example, as shown in Fig. 4, an insulating layer 410 of resin or the like may be provided on a heat sink 400, and a first circuit pattern 521, a second circuit pattern 522, a third circuit pattern 523, and a fourth circuit pattern 524 may be provided on the insulating layer 410.

[0047] The semiconductor device 1 may have an upper arm and a lower arm, and each of the upper arm and the lower arm may include a first semiconductor chip 100 and a second semiconductor chip 200.

[0048] Second embodiment A second embodiment will be described. The second embodiment differs from the first embodiment in the planar shapes of the first semiconductor chip and the second semiconductor chip. Fig. 5 is a top view showing a semiconductor device according to the second embodiment. Fig. 6 is a top view showing the first semiconductor chip and the second semiconductor chip in the second embodiment.

[0049] 5 and 6, in the semiconductor device 2 according to the second embodiment, the lengths of a first side 701 and a second side 702 of the first semiconductor chip 100 are shorter than the lengths of a third side 703 and a fourth side 704. In addition, a fifth side 705 and a sixth side 706 of the source electrode pad 111 are shorter than a seventh side 707 and an eighth side 708.

[0050] Furthermore, in the semiconductor device 2 according to the second embodiment, the lengths of the ninth side 709 and the tenth side 710 of the second semiconductor chip 200 are shorter than the lengths of the eleventh side 711 and the twelfth side 712. Also, the thirteenth side 713 and the fourteenth side 714 of the anode electrode pad 211 are shorter than the thirteenth side 713 and the fourteenth side 714.

[0051] The other configuration is similar to that of the first embodiment.

[0052] The second embodiment also provides the same effects as the first embodiment. In addition, since the long sides of the first semiconductor chip 100 and the second semiconductor chip 200 are perpendicular to the direction in which the metal plate 300 extends (the Y1-Y2 direction), it is easier to dissipate the heat generated in the first semiconductor chip 100 and the heat generated in the second semiconductor chip 200 compared to a case in which the short sides are perpendicular to the Y1-Y2 direction.

[0053] In the present disclosure, the transistor is not limited to a MOS type FET, and may be an insulated gate bipolar transistor (IGBT). When the transistor is an IGBT, the collector electrode pad is an example of a first electrode, and the emitter electrode pad is an example of a second electrode.

[0054] Although the embodiments have been described in detail above, the present invention is not limited to the specific embodiments, and various modifications and changes are possible within the scope of the claims. [Explanation of symbols]

[0055] 1, 2: Semiconductor device 11, 12, 21, 22, 31, 32, 50: Bonding material 41, 42, 43: Bonding wire 100: First semiconductor chip 101, 102, 201, 202, 401, 402, 511, 512: Surface 111: Source electrode pad (second electrode) 112: Drain electrode pad (first electrode) 113: Gate electrode pad 200: Second semiconductor chip 211: Anode electrode pad (fourth electrode) 212: Cathode electrode pad (third electrode) 300: Metal plate 301: 1st joint surface 302:Second joint surface 303: Third joint surface 311: 1st connection part 312:Second connection part 400: Heat sink 410: Insulating layer 500: Substrate 510: Base material 521: First circuit pattern 522: Second circuit pattern 523: 3rd circuit pattern 524: 4th circuit pattern 530: Conductive layer 600: Case 601: First external terminal 602: Second external terminal 603: Third external terminal 604: 4th external terminal 701: Side 1 702: Side 2 703: Third side 704: Side 4 705: Side 5 706: Side 6 707: Side 7 708: Side 8 709: Side 9 710: Side 10 711: Side 11 712: Side 12 713: Side 13 714: Side 14 715: Side 15 716: Side 16

Claims

1. A substrate; A first circuit pattern provided on the substrate; A second circuit pattern provided on the substrate; a third circuit pattern provided on the substrate; a first semiconductor chip provided on the third circuit pattern, the first semiconductor chip having a first surface facing the third circuit pattern, a second surface opposite to the first surface, a first electrode provided on the first surface, and a second electrode provided on the second surface; A metal plate; having the first semiconductor chip is a transistor chip having a gate electrode pad on the second surface, the third circuit pattern is provided between the first circuit pattern and the second circuit pattern, the first electrode is bonded to the third circuit pattern; the metal plate is bonded to the first circuit pattern, the second circuit pattern, and the second electrode; In a plan view perpendicular to the second surface, The first semiconductor chip is a first side and a second side that are parallel to each other; a third side and a fourth side connected to the first side and the second side and parallel to each other; having the metal plate overlaps the third side and the fourth side, The gate electrode pad is located between the metal plate and the second side.

2. a second semiconductor chip provided on the third circuit pattern and having a third electrode and a fourth electrode; the third electrode is bonded to the third circuit pattern; The semiconductor device according to claim 1 , wherein the metal plate is also joined to the fourth electrode.

3. The semiconductor device according to claim 2 , wherein the second semiconductor chip is a transistor chip or a diode chip.

4. A second semiconductor chip provided on the third circuit pattern and having a third electrode and a fourth electrode; the second semiconductor chip is a diode chip, the third electrode is bonded to the third circuit pattern; The semiconductor device according to claim 1 , wherein the metal plate is also joined to the fourth electrode.

5. The semiconductor device according to claim 2 , wherein the second semiconductor chip is a silicon carbide semiconductor chip.

6. a first external terminal for a source electrically connected to the first circuit pattern; a second external terminal for a Kelvin source electrically connected to the second circuit pattern; The semiconductor device according to claim 1 , further comprising:

7. The metal plate is a first bonding surface to be bonded to the first circuit pattern; a second bonding surface bonded to the second circuit pattern; a third bonding surface bonded to the second electrode; a first connection portion connecting the first joint surface and the third joint surface; a second connection portion connecting the second joint surface and the third joint surface; The semiconductor device according to claim 1 , further comprising:

8. The semiconductor device according to claim 7 , wherein an area of ​​the first bonding surface is larger than an area of ​​the second bonding surface.

9. In plan view, The metal plate extends in a first direction, The first semiconductor chip is a first side and a second side parallel to the first direction; a third side and a fourth side perpendicular to the first direction; having 9. The semiconductor device according to claim 1, wherein the lengths of the first side and the second side are less than the lengths of the third side and the fourth side.

10. The semiconductor device according to claim 1 , wherein the first semiconductor chip is a silicon carbide semiconductor chip.

11. A semiconductor device described in any one of claims 1 to 10, wherein the metal plate is a single metal plate.

12. A fourth circuit pattern provided on the substrate; a bonding wire connecting the gate electrode pad and the fourth circuit pattern; The semiconductor device according to claim 1 , further comprising:

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