Semiconductor Device

Abstract

To provide a semiconductor device including a bonding material containing metal nanoparticles, having uniform printing thickness of a bonding layer, and requiring fewer steps.SOLUTION: A semiconductor device according to the present disclosure includes an insulating substrate, a porous material directly bonded to the insulating substrate, and a semiconductor element bonded to the porous material through a bonding material containing metal nanoparticles.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor device that uses a bonding material that includes metal nanoparticles. [Background technology]

[0002] Patent Document 1 discloses a bonding method and a bonding structure using a bonding material containing metal nanoparticles. This bonding material contains an organic protective film that covers the metal nanoparticles and an organic solvent that is necessary for forming a paste. These organic substances need to be volatilized during bonding, but when the bonding surface is large, there is a problem that it is difficult to volatilize the central part well.

[0003] Patent Document 1 discloses a method for solving this problem, in which a porous metal layer is placed between two members to be joined. In this method, a porous metal layer is first joined to a lower member with a bonding material. Then, an upper member is joined onto the porous metal layer with a bonding material. According to this method, the pores in the porous metal layer can be used as a volatilization path, so that organic matter can be volatilized well. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2006-202944 A Summary of the Invention [Problem to be solved by the invention]

[0005] However, in the above-mentioned method, it is necessary to perform bonding using a bonding material at two places, above and below the porous metal layer. If printing and sintering are performed at the same time, the bonding material printed the first time is crushed during the second printing, which causes a problem of unevenness in the thickness of the bonding material and reduced product reliability. If printing and sintering are performed twice, above and below the porous metal layer, there is a problem of increased man-hours.

[0006] In order to solve the above-mentioned problems, the present disclosure aims to provide a semiconductor device in which only the upper surface of a porous metal layer is bonded with a bonding material containing metal nanoparticles, and the lower surface of the porous metal layer is directly bonded by compression bonding or the like, thereby providing a semiconductor device in which the printing thickness of the bonding layer is uniform and the required labor hours are reduced. [Means for solving the problem]

[0007] An aspect of the present disclosure is a semiconductor device including an insulating substrate, a porous material directly bonded to the insulating substrate, and a semiconductor element bonded to the porous material via a bonding material containing metal nanoparticles. The bonding material is a paste-like bonding material in which metal nanoparticles are dispersed in an organic solvent while being protected by an organic film. It is preferably a semiconductor device. Effect of the Invention

[0008] According to an aspect of the present disclosure, since only the upper surface of the porous metal layer is bonded with a bonding material containing metal nanoparticles, a semiconductor device can be obtained in which the printing thickness of the bonding layer is uniform and the number of required steps is reduced. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is a cross-sectional view according to a first embodiment of the present invention. [Diagram 2] FIG. 11 is a cross-sectional view of a joint structure according to a second embodiment of the present disclosure. [Diagram 3] FIG. 11 is a plan view of a joint structure according to a second embodiment of the present disclosure. [Figure 4] FIG. 11 is a cross-sectional view of a joint structure according to a third embodiment of the present disclosure. [Diagram 5] FIG. 11 is a plan view of a joint structure according to a third embodiment of the present disclosure. [Figure 6] FIG. 11 is a cross-sectional view of a joint structure according to a fourth embodiment of the present disclosure. [Figure 7] FIG. 11 is a plan view of a joint structure according to a fourth embodiment of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] First embodiment Fig. 1 shows a cross-sectional view of a first embodiment of the present invention. The joint structure of the first embodiment has an insulating substrate 1. The insulating substrate 1 has circuit patterns 12 on the upper and lower surfaces of a ceramic substrate 11. The ceramic substrate 11 is made of an inorganic ceramic material such as alumina (Al2O3), aluminum nitride (AlN), silicon nitride (Si3N4), or the like, and the circuit pattern 12 is made of aluminum (Al), copper (Cu), or an alloy thereof.

[0011] A porous material 2 is bonded to the upper surface of the insulating substrate 1. The porous material 2 is formed so that the pore size is equal to or smaller than the particle size of the metal component contained in the bonding material 5 described later. The porosity of the porous material 2 is preferably within 80%, and it can be made of, for example, Cu or silver (Ag). The pores of the porous material 2 are preferably connected to the periphery because they function as a path for the organic components contained in the bonding material 5 to volatilize. One example that has been established technically is lotus metal, which is a porous metal in which many elongated pores are arranged in the same direction. Furthermore, the thermal conductivity of the porous material 2 is preferably 40 W / m·K or more. It has been reported that the thermal conductivity tends to decrease as the porosity increases, so in that sense, a lower porosity is also preferable.

[0012] The circuit pattern 12 of the insulating substrate 1 and the porous material 2 are preferably joined by direct bonding, particularly pressure bonding. In pressure bonding, the materials are brought into close contact with each other, and solid-phase diffusion bonding is carried out by applying heat and pressure, thereby reducing the gap between the materials and integrating the bonding interface. Material conditions for pressure bonding include the surface roughness of the two materials being less than 100 nm, and the absence of substances that inhibit bonding, such as foreign matter, dirt, and oxide films, on the bonding surfaces. Examples of direct bonding other than pressure bonding include welding and ultrasonic bonding.

[0013] A semiconductor element 6 is bonded to the upper surface of the porous material 2 by a bonding material 5. The bonding material 5 is a paste-like bonding material in which metal nanoparticles such as Ag and Cu are dispersed in an organic solvent while being protected by an organic film. When this is heated, the organic protective film volatilizes and the metal nanoparticles are exposed on the surface, sintering them and functioning as a bonding material. In other words, the use of the bonding material 5 allows bonding to be performed without pressure, minimizing damage to the semiconductor element during bonding.

[0014] The semiconductor element 6 is an insulated gate bipolar transistor (IGBT), a metal oxide semiconductor field effect transistor (MOSFET), a Schottky barrier diode (SBD), or the like, which is made of silicon (Si) or the like.

[0015] The method for bonding the porous material 2 and the semiconductor element 6 will be described. First, the bonding material 5 is applied onto the porous material 2. Screen printing is used to ensure that the thickness of the bonding material 5 is uniform. Next, the semiconductor element 6 is placed on the bonding material 5 and heated, causing the organic solvent and organic protective film contained in the bonding material 5 to decompose and volatilize, exposing the metal nanoparticles on the surface. Sintering progresses as the exposed metal nanoparticles bond to each other, or between the metal nanoparticles and the porous material and the semiconductor element.

[0016] When bonding is performed using the bonding material 5, as described above, it is necessary to volatilize organic components such as the organic solvent and the organic protective film during the sintering process. However, when the semiconductor element 6 and the circuit pattern 12 are bonded with the bonding material 5, the volatilization path of the organic components is limited to the side of the bonded portion. Therefore, when the bonded portion is wide, that is, when the area of ​​the semiconductor element 6 is large, the organic components tend to remain near the center, causing problems such as a decrease in bonding strength. Therefore, by providing the porous material 2 between the semiconductor element 6 and the circuit pattern 12, the pores become the volatilization path of the organic components, and good bonding can be achieved even when the area of ​​the semiconductor element 6 is large.

[0017] In the conventional example, bonding with a bonding material was performed twice, once on the top and once on the bottom of the porous material. However, when printing and sintering are performed at the same time, the bonding material printed the first time is crushed from above during the second printing, resulting in uneven force being applied to the entire bonding surface. Since the force applied to the bonding material affects the pressure and speed of the screen printing and the viscosity of the bonding material, the thickness of the bonding material also becomes uneven, raising concerns about reduced product reliability. Furthermore, when printing and sintering are performed for each bonding surface, the printing and sintering process is performed twice, which requires a lot of man-hours.

[0018] In the present disclosure, the lower surface of the porous material 2 is directly bonded by pressure bonding, and the upper surface is bonded with a bonding material 5. Since bonding with the bonding material 5 is performed only once, the thickness of the bonding material 5 does not become uneven, and a semiconductor device can be manufactured with fewer required steps. Furthermore, since the thickness of the bonding material 5 is uniform, the bonding strength is improved, and the product life of the semiconductor device can also be improved.

[0019] If the upper surface of the porous material 2 is bonded by compression, the semiconductor element 6 needs to be heated and pressurized, which may cause damage such as scratches and cracks in the semiconductor element 6. However, if the upper surface of the porous material 2 is bonded with the bonding material 5, bonding can be performed without pressure as described above, and therefore damage to the semiconductor element 6 can be minimized.

[0020] When pressure bonding is performed, the interface is integrated as the diffusion bonding progresses, and the interface is bonded to the extent that it cannot be discerned in cross section, so the heat resistance increases to the metal melting point. Also, the heat resistance of the bonding material 5 increases to the metal melting point according to the above-mentioned principle. In other words, there is no problem with heat resistance even if the lower surface of the porous material 2 is pressure bonded.

[0021] The semiconductor element 6 is connected to the circuit pattern 12 by wires 7. The wires 7 are metal wirings made of Al, Cu, an alloy thereof, or the like.

[0022] Embodiment 2 2 shows a cross-sectional view of a bonding structure according to a second embodiment of the present disclosure. The bonding structure of the second embodiment includes a porous material 2a having a recess 3 formed by machining or the like, instead of the porous material 2. By including the porous material 2a, it is possible to efficiently volatilize organic components near the center of the semiconductor element 6, as in the first embodiment. Furthermore, by having the recess 3 in the porous material 2a, the contact area with the bonding material 5 is increased, so that the organic components can be volatilized more efficiently, and the semiconductor element 6 can be bonded well.

[0023] Fig. 3 shows a plan view of a bonding structure according to the second embodiment of the present disclosure. As shown by the straight line in Fig. 3, the recess 3 is located in the area where the semiconductor element 6 is placed, but the length may extend beyond that area. The width of the recess 3 is larger than the particle size of the metal nanoparticles contained in the bonding material 5 and smaller than the width of the semiconductor element 6.

[0024] Third embodiment 4 shows a cross-sectional view of a bonding structure according to a third embodiment of the present disclosure. The bonding structure of the third embodiment includes a porous material 2b having a protrusion 4 formed by machining or the like, instead of the porous material 2. By including the porous material 2b, it is possible to efficiently volatilize the organic components near the center of the semiconductor element 6, as in the first embodiment. Furthermore, by having the protrusion 4 of the porous material 2b, the contact area with the bonding material 5 is increased, so that the organic components can be volatilized more efficiently, and the semiconductor element 6 can be bonded well.

[0025] Furthermore, since the porous material 2b has the protrusions 4, the bonding material 5 becomes thicker than the height of the protrusions 4. As a result, the resistance to shear stress caused by expansion and contraction during heating and cooling is increased, and cracks and the like are less likely to occur in the bonding layer, which is expected to improve the reliability of the product.

[0026] Fig. 5 shows a plan view of a bonding structure according to the third embodiment of the present disclosure. As shown by the straight lines in Fig. 5, the protrusions 4 are located in the area where the semiconductor element 6 is placed, but the length may extend beyond that area. The width of the protrusions 4 is larger than the particle size of the metal nanoparticles contained in the bonding material 5 and smaller than the width of the semiconductor element 6. The height of the protrusions 4 is smaller than the thickness of the bonding material 5.

[0027] Fourth embodiment 6 shows a cross-sectional view of a joint structure according to a fourth embodiment of the present disclosure. The joint structure of the fourth embodiment includes a porous material 2c having a recess 3a formed by machining or the like, instead of the porous material 2. Note that, although the fourth embodiment shows an aspect in which the formed shape is a recess, a protrusion may be formed at the same position.

[0028] FIG. 7 shows a plan view of a bonding structure according to the fourth embodiment of the present disclosure. As shown by the straight lines in FIG. 7, the recesses 3a are located in the rectangular region on which the semiconductor element 6 is placed, and are formed so as to have intersections with each of the two sides constituting each interior angle. By providing the porous material 2c, as in the first embodiment, the organic components near the center of the semiconductor element 6 can be efficiently volatilized. Furthermore, since the porous material 2c has the recesses 3a, an anchor effect occurs, and the bonding strength of the four corners from which the semiconductor element 6 is likely to peel off can be increased. As a result, the semiconductor element 6 can be bonded well.

[0029] Although the present disclosure shows the semiconductor element 6 being made of Si, it may be made of a wide band gap semiconductor having a larger band gap than Si. Examples of wide band gap semiconductors include silicon carbide (SiC), gallium nitride (GaN)-based materials, and diamond. [Explanation of symbols]

[0030] 1. Insulating substrate 2 Porous material 2a Porous material 2b Porous material 2c porous material 3. Recess 3a Recess 4 Convex 5 Bonding material 6. Semiconductor elements

Claims

1. An insulating substrate; a porous material directly bonded to the insulating substrate; A semiconductor element bonded to the porous material via a bonding material containing metal nanoparticles. Equipped with The bonding material is a paste-like bonding material in which the metal nanoparticles are dispersed in an organic solvent while being protected by an organic film. Semiconductor device.

2. An insulating substrate; a porous material directly bonded to the insulating substrate; A semiconductor element bonded to the porous material via a bonding material containing metal nanoparticles. Equipped with The porous material is The bonding surface with the bonding material has a recess Semiconductor device.

3. An insulating substrate; a porous material directly bonded to the insulating substrate; A semiconductor element bonded to the porous material via a bonding material containing metal nanoparticles. Equipped with The porous material is The bonding surface with the bonding material has a protrusion Semiconductor device.

4. The recesses are located directly below the four corners of the semiconductor element. The semiconductor device according to claim 2 .

5. The protrusions are located directly below the four corners of the semiconductor element. The semiconductor device according to claim 3 .

6. The semiconductor element is formed of a wide band gap semiconductor. The semiconductor device according to claim 1 .

7. 7. The semiconductor device according to claim 6, wherein the wide band gap semiconductor is silicon carbide, a gallium nitride based material or diamond.

Images