Semiconductor device and method for manufacturing the same

Abstract

The purpose of the present disclosure is to suppress the occurrence of a scratch or a crack in the upper surface of a semiconductor element when a bonding material for connecting a metal lead electrode to the semiconductor element is supplied onto the semiconductor element by means of screen printing. A semiconductor device 101 according to the present disclosure is provided with: a plurality of semiconductor elements (1); an insulating substrate (2) that has, on the upper surface thereof, a mounting region (2a1) on which the plurality of semiconductor elements (1) are mounted, and a non-mounting region (2a2) which protrudes upward beyond the mounting region (2a1) and on which the plurality of semiconductor elements (1) are not mounted; and a metal lead electrode (4) that is bonded to the upper surface of each semiconductor element (1) by means of a bonding material (3a). With respect to this semiconductor device 101, the height difference between the mounting region (2a1) and the non-mounting region (2a2) is not less than the thickness of the semiconductor elements (1).

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor device having a metal lead electrode. [Background technology]

[0002] In semiconductor devices such as power semiconductor devices, one method for establishing circuit connections between semiconductor elements and external electrodes is to directly bond the semiconductor element to metal lead electrodes without using metal wire bonds in the main current path (see, for example, Patent Document 1). This method allows the semiconductor device to achieve high current, long life, and high reliability.

[0003] In order to directly bond the semiconductor element to the metal lead electrodes, it is necessary to supply a bonding material such as a solder paste onto the semiconductor element. This can be done by dispensing or by screen printing. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] International Publication No. 2020 / 039986 Summary of the Invention [Problem to be solved by the invention]

[0005] In the case of dispense supply, because dispense application is performed on each semiconductor element one by one, there is a problem that it takes a long time when there are many semiconductor elements. In addition, if the amount of bonding material supplied varies from semiconductor element to semiconductor element, the metal lead electrode becomes tilted, which causes a problem of poor bonding between the metal lead electrode and the semiconductor element.

[0006] On the other hand, in the case of screen printing, there are problems in that the top surface of the semiconductor element is damaged when the metal mask comes into direct contact with the semiconductor element, and there are problems in that the semiconductor element is subjected to stress when the squeegee passes over the metal mask, causing cracks and resulting in poor characteristics.

[0007] The technology disclosed herein has been made to solve the problems described above, and aims to suppress the occurrence of scratches or cracks on the top surface of a semiconductor element when a bonding material for connecting a metal lead electrode to the semiconductor element is supplied onto the semiconductor element by screen printing. [Means for solving the problem]

[0008] The semiconductor device of the present disclosure comprises a plurality of semiconductor elements, an insulating substrate having on its upper surface a mounting region in which the plurality of semiconductor elements are mounted and a non-mounting region that protrudes above the mounting region and in which the plurality of semiconductor elements are not mounted, and a metal lead electrode bonded to the upper surface of each semiconductor element by a bonding material, wherein the difference in height between the mounting region and the non-mounting region is equal to or greater than the thickness of each semiconductor element. The insulating substrate includes an insulating base material and a circuit pattern provided on the insulating base material, the upper surface of the circuit pattern has a convex portion, an end face of the convex portion is a non-mounting area, and the upper surface of the circuit pattern other than the convex portion is a mounting area. do. Effect of the Invention

[0009] According to the semiconductor device of the present disclosure, when a bonding material is supplied onto each semiconductor element by screen printing in the manufacturing process, a gap is formed between the metal mask and each semiconductor element. Therefore, the bonding material can be stably and collectively supplied to the upper surface of each semiconductor element by screen printing without damaging the upper surface of each semiconductor element. Therefore, the semiconductor device of the present disclosure is a semiconductor device that is stable, has a long life, and can be manufactured with good productivity. Objects, features, aspects, and advantages of the present disclosure will become more apparent from the following detailed description and the accompanying drawings. [Brief description of the drawings]

[0010] [Figure 1] 1 is a cross-sectional view of a semiconductor device according to a first embodiment. [Diagram 2] 4 is a flowchart showing a manufacturing process of the semiconductor device according to the first embodiment. [Diagram 3] 2A to 2C are cross-sectional views showing a manufacturing process of the semiconductor device according to the first embodiment. [Figure 4] 2A to 2C are cross-sectional views showing a manufacturing process of the semiconductor device according to the first embodiment. [Diagram 5] It is a cross-sectional view showing the manufacturing process of the semiconductor device according to Embodiment 1. [Figure 6] It is a cross-sectional view showing the manufacturing process of the semiconductor device according to Embodiment 1. [Figure 7] It is a cross-sectional view showing the manufacturing process of the semiconductor device according to Embodiment 1. [Figure 8] It is a cross-sectional view of the semiconductor device according to Embodiment 2. [Figure 9] It is a cross-sectional view of the semiconductor device according to Embodiment 3. [Figure 10] It is a cross-sectional view of the semiconductor device according to Embodiment 4. [Figure 11] It is a cross-sectional view showing the manufacturing process of the semiconductor device according to Embodiment 4. [Figure 12] It is a cross-sectional view showing the manufacturing process of the semiconductor device according to a modification of Embodiment 4.

MODE FOR CARRYING OUT THE INVENTION

[0011] <A. Embodiment 1> <A-1. Configuration> FIG. 1 is a cross-sectional view of a semiconductor device 101 according to Embodiment 1. The semiconductor device 101 includes an insulating substrate 2, a plurality of semiconductor elements 1, and a metal lead electrode 4.

[0012] The insulating substrate 2 includes an insulating base material 2b, a circuit pattern 2a formed on the upper surface of the insulating base material 2b, and a circuit pattern 2c formed on the lower surface of the insulating base material 2b. The insulating base material 2b is made of a ceramic such as aluminum nitride or silicon nitride, which has excellent thermal conductivity, or a resin. The circuit patterns 2a and 2c are made of a material having excellent electrical conductivity and thermal conductivity such as an aluminum alloy or copper. The upper surface of the circuit pattern 2a constitutes the upper surface of the insulating substrate 2. Although not shown, the circuit pattern 2c of the insulating substrate 2 may be joined to a base plate having excellent heat conduction such as an aluminum alloy or copper by a joining material such as solder or soft solder.

[0013] A plurality of semiconductor elements 1 are bonded by a bonding material 3b such as solder to a mounting region 2a1 on the upper surface of the circuit pattern 2a of the insulating substrate 2. The region on the upper surface of the circuit pattern 2a of the insulating substrate 2 where the plurality of semiconductor elements 1 are not mounted is referred to as a non-mounting region 2a2. That is, the upper surface of the circuit pattern 2a has the mounting region 2a1 and the non-mounting region 2a2.

[0014] Although a silicon (Si) IGBT, diode, or reverse conducting IGBT is often used for the semiconductor element 1, a MOSFET or Schottky diode formed of a material having a larger band gap than Si, such as silicon carbide (SiC) or gallium nitride (GaN) may also be used. Although three semiconductor elements 1 are shown in Fig. 1, the number of semiconductor elements 1 mounted on the circuit pattern 2a is not limited to this and is determined appropriately depending on the application of the semiconductor device 101.

[0015] Although not shown, a surface electrode for metal bonding with a bonding material 3a such as solder is formed on the upper surface of each semiconductor element 1 by Ni-Au plating or the like. The upper surface of each semiconductor element 1 on which the surface electrode is formed is bonded to a metal lead electrode 4 by a bonding material 3a such as solder. The metal lead electrode 4 is bonded to the upper surface of the semiconductor element 1 in FIG. 1, but may also be bonded to the circuit pattern 2a.

[0016] In the non-mounting region 2a2 of the circuit pattern 2a, a plurality of protrusions 2d protruding upward from the mounting region 2a1 are provided. The end faces of the protrusions 2d are higher than the upper faces of the semiconductor elements 1 mounted in the mounting region 2a1 of the circuit pattern 2a. The end faces of the protrusions 2d are set at a height that ensures a necessary insulation distance between the protrusions 2d and the metal lead electrodes 4. Although two protrusions 2d are shown in FIG. 1, the number of the protrusions 2d is not limited to this. The protrusions 2d are provided to ensure a necessary insulation distance between the protrusions 2d and the outer periphery of the semiconductor element 1. In order to ensure an insulation distance between the metal lead electrode 4 and the protrusions 2d, the metal lead electrode 4 may be bent upward or laterally at a position corresponding to the protrusions 2d.

[0017] In the manufacturing process of the semiconductor device 101 to be described later, the metal lead electrode 4 is electrically connected to the external output terminal, and the plurality of semiconductor elements 1 are electrically connected to each other. However, in FIG. 1, the semiconductor device 101 is illustrated in a simplified manner, and wires such as signal lines, signal terminals, external output terminals, and encapsulating resin materials are omitted in FIG. 1.

[0018] <A-2. Manufacturing Process> FIG. 2 is a flowchart showing the manufacturing process of the semiconductor device 101. FIGS. 3 to 7 are cross-sectional views showing the states during the manufacturing of the semiconductor device 101. Hereinafter, the manufacturing process of the semiconductor device 101 will be described with reference to FIGS. 2 to 7.

[0019] First, as shown in FIG. 3, a plurality of semiconductor elements 1 are joined to the insulating substrate 2 (step S101 in FIG. 2). Specifically, the plurality of semiconductor elements 1 are joined to the mounting region 2a1 of the circuit pattern 2a of the insulating substrate 2 with a joining material 3b. Generally, solder is used as the joining material 3b. The joining material 3b may be a pre-formed one such as a plate solder, or may be a solder paste or other soft solder. The paste-like joining material 3b may be applied using screen printing or dispensing, etc. When the joining material 3b on the circuit pattern 2a is heated to a temperature exceeding its melting point, the plurality of semiconductor elements 1 are joined onto the circuit pattern 2a.

[0020] Next, as shown in FIG. 4, a metal mask 5 is placed on the semiconductor elements 1 bonded to the insulating substrate 2 (step S102 in FIG. 2). As described above, since the end face of the protrusion 2d is higher than the upper face of each semiconductor element 1 mounted in the mounting area 2a1, the metal mask 5 contacts the end face of the protrusion 2d of the circuit pattern 2a, but does not contact the upper face of the semiconductor element 1. That is, a clearance exists between the metal mask 5 and the upper face of the semiconductor element 1. The metal mask 5 is generally made of a metal material having excellent wear resistance and rigidity, such as SUS. In the area of ​​the metal mask 5 corresponding to each semiconductor element 1, an opening 5a for supplying the bonding material 3a to the upper face of each semiconductor element 1 is provided. The area of ​​the metal mask 5 corresponding to each semiconductor element 1 is the area of ​​the metal mask 5 that overlaps with each semiconductor element 1 in a plan view. The area of ​​the opening 5a is set to be equal to or larger than the area of ​​the bonding material 3a, taking into consideration the area required for the bonding material 3a between each semiconductor element 1 and the metal lead electrode 4. The thickness of the metal mask 5 is designed taking into consideration the volume required for the bonding material 3a between the semiconductor element 1 and the metal lead electrode 4, and is generally 0.1 mm or more and less than 0.2 mm.

[0021] Thereafter, a bonding material 3a such as a paste-like solder is supplied to the openings 5a of the metal mask 5 (step S103 in FIG. 2). Specifically, as shown in FIG. 5, the bonding material 3a is supplied onto the metal mask 5, and the bonding material 3a is rubbed into the openings 5a a required number of times using a squeegee 6 made of SUS or urethane, etc., to fill the openings 5a. As described above, since there is a clearance between the metal mask 5 and the upper surface of the semiconductor element 1, the semiconductor element 1 does not come into contact with the metal mask 5, and the bonding material 3a is supplied to the upper surface of the semiconductor element 1, i.e., the bonding surface with the metal lead electrode 4. The bonding material 3a may flow from the openings 5a of the metal mask 5 and leak out between the upper surface of the semiconductor element 1 and the metal mask 5. However, by adjusting printing conditions such as the printing speed, printing angle, and printing pressure of the squeegee 6 according to the viscosity or thixotropy of the bonding material 3a, it is possible to adjust the amount of the bonding material 3a leaking out.

[0022] Next, as shown in Fig. 6, the metal mask 5 is removed from the insulating substrate 2 (step S104 in Fig. 2). When the metal mask 5 is separated from the insulating substrate 2, if the bonding material 3a sticks to the wall surface of the opening 5a of the metal mask 5 due to its viscosity, only an area smaller than the area of ​​the opening 5a remains on the bonding surface of the semiconductor element 1. As countermeasures to this, a method of reducing the shear force acting on the wall surface of the opening 5a by adjusting the speed and acceleration at which the metal mask 5 is separated from the insulating substrate 2 in multiple stages, a method of reducing the roughness of the wall surface of the opening 5a, and a method of coating the wall surface of the opening 5a with a resin material or the like are commonly known.

[0023] Thereafter, as shown in FIG. 7, the metal lead electrode 4 is placed on the bonding material 3a supplied on the semiconductor element 1 (step S105 in FIG. 2). The metal lead electrode 4 is held by the thixotropy of the bonding material 3a. The end of the metal lead electrode 4 may be bonded to an external electrode or the like. Alternatively, the metal lead electrode 4 itself may be extended as it is to become an external electrode. In FIG. 7, the metal lead electrode 4 is bonded to the semiconductor element 1, but in addition, it may be bonded to the circuit pattern 2a of the insulating substrate 2 by another bonding material. Also, although one metal lead electrode 4 is shown in FIG. 7, multiple metal lead electrodes 4 may be bonded to the semiconductor element 1 or the circuit pattern 2a by different bonding materials.

[0024] Next, the bonding material 3a is heated in a heating device such as a reflow furnace to a temperature higher than its melting point, thereby melting it (step S106 in FIG. 2). For example, if the melting point of the bonding material 3a is 220°C, it is heated at 220°C or higher for 5 minutes in a reflow bath whose maximum temperature reaches 270°C. In this process, the bonding material 3b between the semiconductor element 1 and the insulating substrate 2 may be remelted. Alternatively, the remelting of the bonding material 3b may be avoided by using a bonding material having a higher melting point than the bonding material 3a.

[0025] Thereafter, by cooling and solidifying the bonding material 3a, the bonding between the upper surface of the semiconductor element 1 and the metal lead electrode 4 is completed. Thereafter, through a circuit formation process such as wire bonding, a resin sealing process, and a characteristic inspection process, the semiconductor device 101 shown in FIG. 1 is completed.

[0026] <A-3. Effect> In the semiconductor device 101 according to the first embodiment, the upper surface of the insulating substrate 2 has a mounting region 2a1 on which a plurality of semiconductor elements 1 are mounted, and a non-mounting region 2a2 that protrudes above the mounting region 2a1 and on which no plurality of semiconductor elements 1 are mounted. The height difference between the mounting region 2a1 and the non-mounting region 2a2 is equal to or greater than the thickness of each semiconductor element 1. And the semiconductor device 101 includes a metal lead electrode 4 joined to the upper surface of each semiconductor element 1 by a bonding material 3b.

[0027] According to the above configuration, the metal mask 5 used for collectively supplying the bonding material 3a to the upper surface of each semiconductor element 1 contacts the mounting region 2a1 on the upper surface of the insulating substrate 2 and does not contact the upper surface of each semiconductor element 1 mounted in the mounting region 2a1. Therefore, it is possible to collectively supply the bonding material 3a to the plurality of semiconductor elements 1 by screen printing without damaging them. According to screen printing, the bonding material 3a can be supplied to the plurality of semiconductor elements 1 in a shorter time than dispensing coating. Therefore, a stable and long-life semiconductor device 101 can be manufactured with high productivity.

[0028] The manufacturing method of the semiconductor device 101 according to Embodiment 1 includes: (a) preparing a plurality of semiconductor elements 1 and an insulating substrate 2 having a mounting area 2a1 on the upper surface and a non-mounting area 2a2 protruding above the mounting area 2a1; (b) mounting each semiconductor element 1 on the mounting area 2a1 on the upper surface of the insulating substrate 2; (c) after mounting each semiconductor element 1, disposing a metal mask 5 having an opening 5a at a position corresponding to each semiconductor element 1 in contact with the non-mounting area 2a2 on the upper surface of the insulating substrate 2 on the upper surface of the insulating substrate 2; (d) supplying a bonding material 3a to the upper surface of each semiconductor element 1 through the opening of the metal mask 5; (e) removing the metal mask 5; and (f) after removing the metal mask 5, adhering a metal lead electrode 4 to the bonding material 3a on the upper surface of each semiconductor element 1. The height difference between the mounting area 2a1 and the non-mounting area 2a2 is equal to or greater than the thickness of each semiconductor element 1. According to the above configuration, since the metal mask 5 does not contact the upper surface of each semiconductor element 1, it is possible to supply the bonding material 3a to the plurality of semiconductor elements 1 by screen printing without damaging them.

[0029] <B. Embodiment 2> <B-1. Configuration> FIG. 8 is a cross-sectional view of a semiconductor device 102 according to Embodiment 2. The semiconductor device 102 is different from the semiconductor device 101 according to Embodiment 1 in that it has a concave portion 2e instead of a protruding portion 2d on the upper surface of the circuit pattern 2a. The semiconductor element 1 must be mounted in the concave portion 2e such that its upper surface is lower than the upper surface of the circuit pattern 2a other than the concave portion 2e. Considering this, the depth of the concave portion 2e is designed. A necessary insulation distance is provided between the side surface of the concave portion 2e and the outer periphery of the semiconductor element 1. The configuration of the semiconductor device 102 other than the above is the same as that of the semiconductor device 101.

[0030] Regarding the manufacturing method of the semiconductor device 102, except for the upper surface shape of the circuit pattern 2a, it is the same as the manufacturing method of the semiconductor device 101.

[0031] <B-2. Effect> That is, in Embodiment 2, the bottom surface of the concave portion 2e of the circuit pattern 2a becomes the mounting area 2a1, and the upper surface of the circuit pattern 2a other than the concave portion 2e becomes the non-mounting area 2a2.

[0032] According to the above configuration, the metal mask 5 used to collectively supply the bonding material 3a to the upper surfaces of the semiconductor elements 1 does not contact the upper surfaces other than the recesses 2e of the circuit pattern 2a, and thus does not contact the upper surfaces of the semiconductor elements 1. Therefore, it is possible to collectively supply the bonding material 3a to the plurality of semiconductor elements 1 by screen printing without damaging them. According to screen printing, the bonding material 3a can be supplied to the plurality of semiconductor elements 1 in a shorter time compared to dispense coating. Therefore, a semiconductor device 102 with stable long life can be manufactured with high productivity.

[0033] Further, since the metal mask 5 is in close contact with the upper surface of the non-mounted region 2a2 of the circuit pattern 2a, when a joint portion with the metal lead electrode 4 is provided on the circuit pattern 2a, the bonding material can be supplied to the circuit pattern 2a simply by providing an opening 5a in the metal mask 5.

[0034] <C. Embodiment 3> <C-1. Configuration> FIG. 9 is a cross-sectional view of a semiconductor device 103 according to Embodiment 3. The semiconductor device 103 is different from the semiconductor device 101 according to Embodiment 1 in that, instead of the circuit pattern 2a having a plurality of protrusions 2d, the semiconductor device 103 includes a plurality of insulating members 7 provided on the upper surface of the circuit pattern 2a. The upper surfaces of the insulating members 7 are higher than the upper surfaces of the semiconductor elements 1 mounted in the mounting region 2a1. That is, each insulating member 7 is thicker than each semiconductor element 1. The material of the insulating member 7 may be a resin having necessary insulating performance such as PPS (Polyphenylene sulfide), or may be a ceramic. The planar shape of the insulating member 7 may be a frame shape. Each insulating member 7 may be composed of a combination of a plurality of spaced members.

[0035] The insulating member 7 may partially support the metal lead electrode 4 from below. It is not necessary to secure an insulating distance between the insulating member 7 and the semiconductor element 1. Therefore, the insulating member 7 may be used for positioning the semiconductor element 1.

[0036] Regarding the shape of the circuit pattern 2a and other than the insulating member 7, the manufacturing method of the semiconductor device 103 is the same as that of the semiconductor device 101.

[0037] <C-2. Effect> That is, in the third embodiment, the upper surface of the insulating member 7 provided on the upper surface of the circuit pattern 2a becomes the non-mounting region 2a2, and the region on the upper surface of the circuit pattern 2a where the insulating member 7 is not provided becomes the mounting region 2a1.

[0038] According to the above configuration, the metal mask 5 used for collectively supplying the bonding material 3a to the upper surfaces of the semiconductor elements 1 contacts the insulating member 7 and does not contact the upper surfaces of the semiconductor elements 1. Therefore, it is possible to collectively supply the bonding material 3a to the plurality of semiconductor elements 1 by screen printing without damaging them. According to screen printing, the bonding material 3a can be supplied to the plurality of semiconductor elements 1 in a shorter time compared to dispense coating. Therefore, a stable and long-life semiconductor device 103 can be manufactured with high productivity.

[0039] In addition, since there is no need to secure an insulating distance between the insulating member 7 and the semiconductor element 1, the semiconductor device 103 can be miniaturized. In the case of the semiconductor device 101 according to the first embodiment, when the semiconductor element 1 is bonded to the insulating substrate 2 using the plate solder bonding material 3b, a jig for positioning the semiconductor element 1 is separately required. However, in the semiconductor device 103, since the semiconductor element 1 can be positioned using the insulating member 7, the process can be simplified by omitting the jig. Also, depending on the shape of the insulating member 7, it can also be used for positioning in the height direction of the metal lead electrode 4.

[0040] <D. Fourth Embodiment> <D-1. Configuration> FIG. 10 is a cross-sectional view of a semiconductor device 104 according to the fourth embodiment. The semiconductor device 104 is different from the semiconductor device 101 according to the first embodiment in that the circuit pattern 2a does not have a plurality of protrusions 2d.

[0041] <D-2. Manufacturing Process> The manufacturing process of the semiconductor device 104 is different from that of the semiconductor device 101 only in the shape of the metal mask 5 used to supply the bonding material 3b to the upper surfaces of the plurality of semiconductor elements 1.

[0042] FIG. 11 is a cross-sectional view showing a state in which the metal mask 5 is disposed on the semiconductor element 1 in the manufacturing process of the semiconductor device 104. A convex portion 5b is provided at a position corresponding to the non-mounted region 2a2 of the circuit pattern 2a on the lower surface of the metal mask 5. The convex portion 5b is higher than the combination of the semiconductor element 1 and the bonding material 3b.

[0043] The lower surface of the metal mask other than the convex portion 5b is a first region that does not contact the upper surface of the circuit pattern 2a and the upper surfaces of the respective semiconductor elements 1. Further, the end surface of the convex portion 5b is a second region that contacts the upper surface of the circuit pattern 2a. In other words, the lower surface of the metal mask 5 has a first region and a second region protruding downward from the first region. The metal mask 5 has an opening 5a in the first region, and is disposed on the upper surface of the insulating substrate 2 such that the opening 5a overlaps each semiconductor element 1 and the second region contacts the upper surface of the circuit pattern 2a. FIG. 11 shows this state.

[0044] The convex portion 5b may be formed by half-etching the portion other than the portion where the convex portion 5b on the lower surface of the metal mask 5 is formed. The height of the convex portion 5b is equal to or greater than the thickness of each semiconductor element 1. In other words, the height difference between the first region and the second region is equal to or greater than the thickness of each semiconductor element 1. Therefore, when the end surface of the convex portion 5b of the metal mask 5 contacts the upper surface of the circuit pattern 2a, the upper surface of the semiconductor element 1 does not contact the metal mask 5.

[0045] <D-3. Modification Example> As shown in FIG. 12, instead of the convex portions 5b, recessed portions 5c may be provided on the lower surface of the metal mask 5 at positions overlapping with the respective semiconductor elements 1. That is, the bottom surface of the recessed portion 5c becomes the first region, and the lower surface of the metal mask 5 other than the recessed portion 5c becomes the second region. The depth of the recessed portion 5c is equal to or greater than the thickness of each semiconductor element 1. In other words, the height difference between the first region and the second region is equal to or greater than the thickness of each semiconductor element 1. Therefore, when the lower surface of the metal mask 5 other than the recessed portion 5c contacts the upper surface of the circuit pattern 2a, the upper surface of the semiconductor element 1 does not contact the bottom surface of the recessed portion 5c.

[0046] <D-4. Effect> The manufacturing method of the semiconductor device 104 according to the fourth embodiment includes: (a) preparing a plurality of semiconductor elements 1 and an insulating substrate 2; (b) mounting each semiconductor element 1 on the upper surface of the insulating substrate 2; (c) providing a metal mask 5 having a first region and a second region protruding downward from the first region on the lower surface, and having an opening 5a in the first region, such that the second region contacts the upper surface of the insulating substrate 2 and the opening 5a overlaps with each semiconductor element 1 mounted on the insulating substrate 2, and disposing the metal mask 5 on the upper surface of the insulating substrate 2; (d) supplying a bonding material 3a to the upper surface of each semiconductor element 1 through the opening 5a of the metal mask 5; (e) removing the metal mask 5; and (f) after removing the metal mask 5, bonding a metal lead electrode 4 to the bonding material 3a on the upper surface of each semiconductor element 1. Here, the height difference between the first region and the second region is equal to or greater than the thickness of each semiconductor element 1.

[0047] Therefore, when the second region on the lower surface of the metal mask 5 contacts the insulating substrate 2, the upper surface of each semiconductor element 1 does not contact the first region on the lower surface of the metal mask 5. Therefore, it is possible to supply the bonding material 3a to the plurality of semiconductor elements 1 by screen printing without damaging them. According to screen printing, the bonding material 3a can be supplied to the plurality of semiconductor elements 1 in a shorter time than dispensing coating. Therefore, a stable and long-life semiconductor device 104 can be manufactured with high productivity.

[0048] Also, unlike the first and second embodiments, since there is no restriction on the shape of the circuit pattern 2a, the insulating substrate 2 can be easily designed.

[0049] In addition, each embodiment can be freely combined, and each embodiment can be appropriately modified or omitted. The above description is an example in all respects. It is understood that countless modified examples not illustrated can be assumed. [Explanation of symbols]

[0050] 1 semiconductor element, 2 insulating substrate, 2a circuit pattern, 2a1 mounting area, 2a2 non-mounting area, 2b insulating base material, 2c circuit pattern, 2d protrusion, 2e recess, 3a, 3b bonding material, 4 metal lead electrode, 5 metal mask, 5a opening, 5b protrusion, 5c recess, 6 squeegee, 7 insulating member, 101-104 semiconductor device.

Claims

1. A plurality of semiconductor elements; an insulating substrate having, on an upper surface thereof, a mounting region on which the plurality of semiconductor elements are mounted and a non-mounting region protruding above the mounting region and on which the plurality of semiconductor elements are not mounted; a metal lead electrode bonded to an upper surface of each of the semiconductor elements by a bonding material; a difference in height between the mounting area and the non-mounting area is equal to or greater than a thickness of each of the semiconductor elements; The insulating substrate is An insulating substrate; A circuit pattern provided on the insulating substrate, the top surface of the circuit pattern has a convex portion; an end surface of the protruding portion is the non-mounting area, The upper surface of the circuit pattern other than the protruding portion is the mounting area. Semiconductor device.

2. A plurality of semiconductor elements; an insulating substrate having, on an upper surface thereof, a mounting region on which the plurality of semiconductor elements are mounted and a non-mounting region protruding above the mounting region and on which the plurality of semiconductor elements are not mounted; a metal lead electrode bonded to an upper surface of each of the semiconductor elements by a bonding material; a difference in height between the mounting area and the non-mounting area is equal to or greater than a thickness of each of the semiconductor elements; The insulating substrate is An insulating substrate; A circuit pattern provided on the insulating substrate, The top surface of the circuit pattern has a recess, a bottom surface of the recessed portion is the mounting area; The upper surface of the circuit pattern other than the recess is the non-mounting area. Semiconductor device.

3. (a) preparing a plurality of semiconductor elements and an insulating substrate having a mounting area on an upper surface thereof and a non-mounting area protruding above the mounting area; (b) mounting each of the semiconductor elements in the mounting area on the upper surface of the insulating substrate; (c) after mounting each of the semiconductor elements, placing a metal mask having openings at positions corresponding to each of the semiconductor elements on the upper surface of the insulating substrate in contact with the non-mounting area of ​​the upper surface of the insulating substrate; (d) supplying a bonding material to an upper surface of each of the semiconductor elements through the openings in the metal mask; (e) removing the metal mask; (f) after removing the metal mask, bonding a metal lead electrode to the bonding material on the upper surface of each of the semiconductor elements; A method for manufacturing a semiconductor device, comprising: a difference in height between the mounting area and the non-mounting area is equal to or greater than a thickness of each of the semiconductor elements; A method for manufacturing a semiconductor device.

4. The insulating substrate is An insulating substrate; A circuit pattern provided on the insulating substrate, the top surface of the circuit pattern has a convex portion; an end surface of the protruding portion is the non-mounting area, The upper surface of the circuit pattern other than the protruding portion is the mounting area. The method for manufacturing a semiconductor device according to claim 3 .

5. The insulating substrate is An insulating substrate; A circuit pattern provided on the insulating substrate, The top surface of the circuit pattern has a recess, an upper surface of the circuit pattern other than the recessed portion is the mounting area; A bottom surface of the recess is the non-mounting area. The method for manufacturing a semiconductor device according to claim 3 .

6. The insulating substrate is An insulating substrate; A circuit pattern provided on the insulating substrate; an insulating member provided on an upper surface of the circuit pattern, an upper surface of the insulating member is the non-mounting area; a region of the upper surface of the circuit pattern where the insulating member is not provided is the mounting region; The method for manufacturing a semiconductor device according to claim 3 .

7. (a) preparing a plurality of semiconductor elements and an insulating substrate; (b) mounting each of the semiconductor elements on an upper surface of the insulating substrate; (c) placing a metal mask having a first region on a lower surface thereof and a second region protruding downwardly from the first region, the metal mask having an opening in the first region, on the upper surface of the insulating substrate such that the second region is in contact with the upper surface of the insulating substrate and the opening overlaps each of the semiconductor elements mounted on the insulating substrate; (d) supplying a bonding material to an upper surface of each of the semiconductor elements through the openings in the metal mask; (e) removing the metal mask; (f) after removing the metal mask, bonding a metal lead electrode to the bonding material on the upper surface of each of the semiconductor elements; A method for manufacturing a semiconductor device, comprising: a difference in height between the first region and the second region is equal to or greater than a thickness of each of the semiconductor elements; A method for manufacturing a semiconductor device.

8. the metal mask has a protrusion on a lower surface thereof, an end surface of the protrusion is the second region, the lower surface of the metal mask other than the protruding portion is the first region; The method for manufacturing a semiconductor device according to claim 7 .

9. the metal mask has a recess on a lower surface thereof; a bottom surface of the recess is the first region, the lower surface of the metal mask other than the recessed portion is the second region. The method for manufacturing a semiconductor device according to claim 7 .

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