Copper / ceramic joint and insulated circuit board

Abstract

To provide a copper / ceramic joined body excellent in cooling and heating cycle reliability, and sufficiently suppressed in generation of solder stains, and an insulation circuit board composed of the copper / ceramic joined body.SOLUTION: A copper / ceramic joined body 10 is constituted by joining a copper member 12, 13 composed of copper or a copper alloy with a ceramic member 11, where the distance between the ceramic member 11 of an end part of the copper member 12, 13 and the copper member 12, 13 on a joining interface of the ceramic member 11 with the copper member 12, 13 is within a range of 3 μm or more and 30 μm or less, and the void ratio in an end region E of the copper member 12, 13 is 10% or less.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to a copper / ceramic bonded body formed by bonding a copper member made of copper or a copper alloy to a ceramic member, and to an insulating circuit board formed by bonding a copper plate made of copper or a copper alloy to a surface of a ceramic substrate. [Background technology]

[0002] In power modules, LED modules and thermoelectric modules, power semiconductor elements, LED elements and thermoelectric elements are bonded to an insulating circuit board having an insulating layer on one side of which a circuit layer made of a conductive material is formed. For example, power semiconductor elements for controlling large amounts of power used to control wind power generation, electric vehicles, hybrid vehicles, and the like generate a large amount of heat during operation. Therefore, as a substrate for mounting these elements, an insulated circuit board has been widely used which includes a ceramic substrate, a circuit layer formed by bonding a metal plate with excellent electrical conductivity to one surface of the ceramic substrate, and a metal layer for heat dissipation formed by bonding a metal plate to the other surface of the ceramic substrate.

[0003] For example, Patent Document 1 proposes an insulating circuit board in which a circuit layer and a metal layer are formed by bonding copper plates to one and the other sides of a ceramic substrate. In Patent Document 1, copper plates are arranged on one and the other sides of a ceramic substrate with an Ag-Cu-Ti brazing material interposed therebetween, and the copper plates are bonded by performing a heat treatment (so-called active metal brazing method). Moreover, Patent Document 2 proposes a power module substrate in which a copper plate made of copper or a copper alloy and a ceramic substrate made of AlN or Al2O3 are bonded together using a bonding material containing Ag and Ti.

[0004] Furthermore, Patent Document 3 proposes a power module substrate in which an aluminum plate made of aluminum or an aluminum alloy and a ceramic substrate are joined using a brazing material made of an alloy such as Al-Si, Al-Ge, Al-Cu, Al-Mg, or Al-Mn. In Patent Document 3, a protruding portion is formed around a circuit layer formed on one side of the ceramic substrate and a heat dissipation layer formed on the other side of the ceramic substrate. This ensures insulation between the circuit layer and the heat dissipation layer and increases the heat capacity of the circuit layer and the heat dissipation layer. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Patent No. 3211856 [Patent Document 2] Patent No. 5757359 [Patent Document 3] Patent No. 5957862 Summary of the Invention [Problem to be solved by the invention]

[0006] Recently, the heat generation temperature of semiconductor elements mounted on insulating circuit boards has tended to increase, and insulating circuit boards are required to have higher thermal cycle reliability than ever before, so that they can withstand severe thermal cycles. Here, in an insulated circuit board in which a copper plate and a ceramic substrate are bonded together, if a protrusion is formed in the circuit layer as described in Patent Document 3, thermal stress may be concentrated at the end of the circuit layer when subjected to a thermal cycle, resulting in a risk of reduced bonding reliability.

[0007] On the other hand, if the thickness of the bonding layer at the end is increased in order to ensure the strength at the end of the copper member, there is a risk that the bonding material arranged between the copper member and the ceramic member will protrude, causing a defect known as "solder stain."

[0008] The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to provide a copper / ceramic bonded body which has excellent thermal cycle reliability and in which the occurrence of solder stains is sufficiently suppressed, and an insulated circuit board made of this copper / ceramic bonded body. [Means for solving the problem]

[0009] In order to achieve the above object, a copper / ceramic joined body of the present invention is a copper / ceramic joined body obtained by joining a copper member made of copper or a copper alloy to a ceramic member, comprising: a chamfered portion is formed on a peripheral edge portion of a surface of the copper member facing the ceramic member, At the joint interface between the ceramic member and the copper member, the distance between the ceramic member and the copper member at the end of the copper member is within a range of 3 μm or more and 30 μm or less, and the void rate in the end region of the copper member is 10% or less.

[0010] According to the copper / ceramic bonded body of the present invention, the distance between the ceramic member and the copper member at the end of the copper member at the bonded interface between the ceramic member and the copper member is 3 μm or more, and the void ratio in the end region of the copper member is 10% or less, so that the thickness of the bonding layer at the end face is ensured and the strength of the end can be sufficiently ensured, thereby making it possible to suppress cracking and peeling of the ceramic member when subjected to a thermal cycle. Furthermore, since the distance between the ceramic member and the copper member at the end of the copper member is set to 30 μm or less, the bonding material can be prevented from protruding, and the occurrence of "braze stains" can be suppressed.

[0011] In the copper / ceramic bonded body of the present invention, an active metal compound layer is formed on the ceramic member side at the bonding interface between the ceramic member and the copper member, and the active metal compound layer at the end of the copper member has a thickness t1 A and a thickness t1 of the active metal compound layer at the center of the copper member. Bis within the range of 0.05 μm to 1.2 μm, and the thickness ratio t1 A / t1 B It is preferable that the ratio is within the range of 0.7 to 1.4.

[0012] In this case, the thickness t1 of the active metal compound layer at the end of the copper member A and a thickness t1 of the active metal compound layer at the center of the copper member. B Since the thickness is within the range of 0.05 μm or more and 1.2 μm or less, the ceramic member and the copper member are reliably and firmly bonded to each other by the active metal, and hardening of the bonded interface is further suppressed. And the thickness ratio t1 A / t1 B Since the hardness of the bonding interface between the end and central portion of the copper member does not differ significantly, the occurrence of cracks in the ceramic member when subjected to thermal cycles can be further suppressed.

[0013] In the copper / ceramic bonded body of the present invention, an Ag-Cu alloy layer is formed on the copper member side at the bonding interface between the ceramic member and the copper member, and the thickness t2 of the Ag-Cu alloy layer at the end of the copper member is A and a thickness t2 of the Ag-Cu alloy layer at the center of the copper member. B is within the range of 3 μm to 30 μm, and the thickness ratio t2 A / t2 B It is preferable that the ratio is within the range of 0.7 to 1.4.

[0014] In this case, the thickness t2 of the Ag-Cu alloy layer at the end of the copper member A and a thickness t2 of the Ag-Cu alloy layer at the center of the copper member. B Since the thickness is within the range of 3 μm or more and 30 μm or less, the Ag of the bonding material reacts sufficiently with the copper member to reliably and firmly bond the ceramic member and the copper member, and hardening of the bonding interface is further suppressed. And the thickness ratio t2 A / t2 B Since the hardness of the bonding interface between the end and center of the copper member does not differ significantly, the occurrence of cracks in the ceramic member when subjected to thermal cycles can be further suppressed.

[0015] The insulating circuit board of the present invention is an insulating circuit board having a copper plate made of copper or a copper alloy bonded to a surface of a ceramic substrate, a chamfered portion is formed on a peripheral portion of a surface of the copper plate facing the ceramic substrate, At the bonding interface between the ceramic substrate and the copper plate, the distance between the ceramic substrate and the copper plate at the end of the copper plate is within a range of 3 μm or more and 30 μm or less, and the void rate in the end region of the copper plate is 10% or less.

[0016] According to the insulating circuit board of the present invention, the distance between the ceramic substrate and the copper plate at the end of the copper plate at the bonding interface between the ceramic substrate and the copper plate is 3 μm or more, and the void ratio in the end region of the copper plate is 10% or less, so that the thickness of the bonding layer at the end face is ensured, and the strength of the end can be sufficiently ensured, thereby making it possible to suppress cracking and peeling of the ceramic substrate when subjected to a thermal cycle. Furthermore, since the distance between the ceramic substrate and the copper plate at the end of the copper plate is 30 μm or less, the bonding material is prevented from spilling out, and the occurrence of "solder stains" can be suppressed.

[0017] Here, in the insulating circuit board of the present invention, the thickness t1 of the active metal compound layer at the end of the copper plate A and the thickness t1 of the active metal compound layer at the center of the copper plate B is within the range of 0.05 μm to 1.2 μm, and the thickness ratio t1 A / t1 B It is preferable that the ratio is within the range of 0.7 to 1.4.

[0018] In this case, the thickness t1 of the active metal compound layer at the end of the copper plate Aand the thickness t1 of the active metal compound layer at the center of the copper plate B Since the thickness is within the range of 0.05 μm or more and 1.2 μm or less, the ceramic substrate and the copper plate are reliably and firmly bonded to each other by the active metal, and hardening of the bonded interface is further suppressed. And the thickness ratio t1 A / t1 B Since the hardness of the bonding interface between the end and center of the copper plate is within the range of 0.7 or more and 1.4 or less, there is no significant difference in hardness, and it is possible to further suppress the occurrence of cracks in the ceramic substrate when subjected to thermal cycle loading.

[0019] In the insulating circuit board of the present invention, an Ag-Cu alloy layer is formed on the copper plate side at the bonding interface between the ceramic substrate and the copper plate, and the thickness t2 of the Ag-Cu alloy layer at the end of the copper plate is A and the thickness t2 of the Ag-Cu alloy layer at the center of the copper plate B is within the range of 3 μm to 30 μm, and the thickness ratio t2 A / t2 B It is preferable that the ratio is within the range of 0.7 to 1.4.

[0020] In this case, the thickness t2 of the Ag-Cu alloy layer at the end of the copper plate A and the thickness t2 of the Ag-Cu alloy layer at the center of the copper plate B Since the thickness is within the range of 3 μm or more and 30 μm or less, the Ag of the bonding material reacts sufficiently with the copper plate to reliably and firmly bond the ceramic substrate and the copper plate, and hardening of the bonding interface is further suppressed. And the thickness ratio t2 A / t2 B Since the hardness of the bonding interface between the end and center of the copper plate does not differ significantly, the occurrence of cracks in the ceramic substrate when subjected to thermal cycles can be further suppressed. Effect of the Invention

[0021] According to the present invention, it is possible to provide a copper / ceramic bonded body which has excellent thermal cycle reliability and in which the occurrence of solder stains is sufficiently suppressed, and an insulated circuit board made of this copper / ceramic bonded body. [Brief description of the drawings]

[0022] [Figure 1] FIG. 1 is a schematic explanatory diagram of a power module using an insulating circuit board according to an embodiment of the present invention. [Diagram 2] 3 is an enlarged explanatory view of ends of a circuit layer and a metal layer of the insulating circuit board according to the embodiment of the present invention. FIG. [Diagram 3] 1A is an explanatory view of an edge and a center of the circuit layer and the metal layer of the insulating circuit board according to an embodiment of the present invention, and FIG. [Figure 4] FIG. 2 is a flow diagram of a method for manufacturing an insulating circuit board according to an embodiment of the present invention. [Diagram 5] 1A to 1C are schematic explanatory diagrams of a method for producing an insulating circuit board according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0023] Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings. The copper / ceramic bonded body according to this embodiment is an insulating circuit board 10 formed by bonding a ceramic substrate 11 as a ceramic member made of ceramics to a copper plate 42 (circuit layer 12) and a copper plate 43 (metal layer 13) as copper members made of copper or a copper alloy. Fig. 1 shows a power module 1 including the insulating circuit board 10 according to this embodiment.

[0024] This power module 1 includes an insulating circuit board 10 having a circuit layer 12 and a metal layer 13 arranged thereon, a semiconductor element 3 bonded to one surface of the circuit layer 12 (the upper surface in FIG. 1) via a bonding layer 2, and a heat sink 5 arranged on the other side of the metal layer 13 (the lower side in FIG. 1).

[0025] The semiconductor element 3 is made of a semiconductor material such as Si. The semiconductor element 3 and the circuit layer 12 are bonded to each other via a bonding layer 2. The bonding layer 2 is made of, for example, a Sn--Ag based, Sn--In based, or Sn--Ag--Cu based solder material.

[0026] The heat sink 5 is for dissipating heat from the insulating circuit board 10. The heat sink 5 is made of copper or a copper alloy, and in this embodiment, is made of phosphorus deoxidized copper. The heat sink 5 is provided with a flow path for a cooling fluid to flow. In this embodiment, the heat sink 5 and the metal layer 13 are joined by a solder layer 7 made of a solder material. The solder layer 7 is made of, for example, a Sn-Ag based, Sn-In based, or Sn-Ag-Cu based solder material.

[0027] As shown in FIG. 1, the insulating circuit board 10 of this embodiment includes a ceramic substrate 11, a circuit layer 12 disposed on one surface (the upper surface in FIG. 1) of the ceramic substrate 11, and a metal layer 13 disposed on the other surface (the lower surface in FIG. 1) of the ceramic substrate 11.

[0028] The ceramic substrate 11 is made of ceramics such as silicon nitride (Si3N4), aluminum nitride (AlN), and alumina (Al2O3) that have excellent insulating and heat dissipating properties. In this embodiment, the ceramic substrate 11 is made of aluminum nitride (AlN), which has particularly excellent heat dissipating properties. The thickness of the ceramic substrate 11 is set within a range of 0.2 mm to 1.5 mm, for example, and is set to 0.635 mm in this embodiment.

[0029] As shown in FIG. 5, the circuit layer 12 is formed by bonding a copper plate 42 made of copper or a copper alloy to one surface (the upper surface in FIG. 5) of the ceramic substrate 11. In this embodiment, the circuit layer 12 is formed by bonding a rolled sheet of oxygen-free copper to the ceramic substrate 11. The thickness of the copper plate 42 that becomes the circuit layer 12 is set within a range of 0.1 mm to 2.0 mm, and is set to 0.6 mm in this embodiment.

[0030] As shown in FIG. 5, the metal layer 13 is formed by joining a copper plate 43 made of copper or a copper alloy to the other surface (the lower surface in FIG. 5) of the ceramic substrate 11. In this embodiment, the metal layer 13 is formed by bonding a rolled sheet of oxygen-free copper to the ceramic substrate 11. The thickness of the copper plate 43 that becomes the metal layer 13 is set within a range of 0.1 mm to 2.0 mm, and is set to 0.6 mm in this embodiment.

[0031] In the insulating circuit board 10 of this embodiment, as shown in FIG. 2, at the bonding interface between the ceramic substrate 11 and the circuit layer 12 and metal layer 13, the distance h between the ceramic substrate 11 and the circuit layer 12 and metal layer 13 at the ends of the circuit layer 12 and metal layer 13 is within a range of 3 μm or more and 30 μm or less. Furthermore, in the insulating circuit board 10 of this embodiment, as shown in FIG. 2, the void ratio in the end region E of the circuit layer 12 and the metal layer 13 at the bonding interface between the ceramic substrate 11 and the circuit layer 12 and the metal layer 13 is 10% or less.

[0032] Here, the end region in this embodiment refers to a region that, when observed in cross-section of the bonding interface between the ceramic substrate 11 and the circuit layer 12 and metal layer 13, as shown in Figure 2, has a height of 30 μm from the surface of the ceramic substrate 11 toward the circuit layer 12 and metal layer 13, starting from the intersection P of a perpendicular line from the end face position of the circuit layer 12 and metal layer 13 at a position 1 / 3 of the thickness of the circuit layer 12 and metal layer 13 from the ceramic substrate 11 and the ceramic substrate 11, and a width of 400 μm along the surface of the ceramic substrate 11 toward the center of the circuit layer 12 and metal layer 13.

[0033] In addition, when the thickness of the circuit layer 12 and the metal layer 13 is less than 90 μm, the end region is a region that starts from the intersection P of the ceramic substrate 11 with a perpendicular line from the end face position of the circuit layer 12 and the metal layer 13 at a position 1 / 3 of the thickness of the circuit layer 12 and the metal layer 13 from the ceramic substrate 11, and has a height of 1 / 3 of the thickness of the circuit layer 12 and the metal layer 13 from the surface of the ceramic substrate 11 toward the circuit layer 12 and the metal layer 13 side, and a width of 400 μm along the surface of the ceramic substrate 11 toward the center of the circuit layer 12 and the metal layer 13. Furthermore, the void ratio is calculated as follows: In the above-mentioned edge region, the region where the metals constituting the circuit layer 12 and the metal layer 13 are not present is defined as a void portion, and the proportion of the void portion in the above-mentioned edge region is defined as the void ratio.

[0034] In addition, in this embodiment, at the bonding interface between the ceramic substrate 11 and the circuit layer 12 and the metal layer 13, it is preferable that an active metal compound layer 21 and an Ag-Cu alloy layer 22 are formed in this order from the ceramic substrate 11 side, as shown in Figure 3.

[0035] In insulating circuit board 10 according to this embodiment, as shown in FIG. 3(a), the interface structure at end portion A and center portion B of circuit layer 12 and metal layer 13 is specified as follows. In this embodiment, the end A of the circuit layer 12 and the metal layer 13 is a region extending 200 μm inward in the width direction from the width direction end of the circuit layer 12 and the metal layer 13 in a cross section along the stacking direction of the circuit layer 12 and the metal layer 13 and the ceramic substrate 11, as shown in FIG. 3(a). Furthermore, the central portion B of the circuit layer 12 and the metal layer 13 is a region of 200 μm in the width direction including the widthwise center of the circuit layer 12 and the metal layer 13 in a cross section along the stacking direction of the circuit layer 12 and the metal layer 13 and the ceramic substrate 11, as shown in Figure 3(a).

[0036] In this embodiment, the thickness t1 of the active metal compound layer 21A formed at the end A of the bonding interface between the circuit layer 12 and the metal layer 13 is A and the thickness t1 of the active metal compound layer 21B formed in the center B of the bonding interface between the circuit layer 12 and the metal layer 13. B is within the range of 0.05 μm to 1.2 μm, and the thickness ratio t1 A / t1 B It is preferable that the ratio is within the range of 0.7 to 1.4.

[0037] Here, the active metal compound layers 21A, 21B are layers made of compounds of active metals (Ti, Zr, Nb, Hf) used in the bonding material 45. More specifically, when the ceramic substrate is made of silicon nitride (Si3N4) or aluminum nitride (AlN), the layers are made of nitrides of these active metals, and when the ceramic substrate is made of alumina (Al2O3), the layers are made of oxides of these active metals. The active metal compound layers 21A, 21B are formed by aggregating particles of active metal compounds. The average particle size of these particles is 10 nm or more and 100 nm or less. In this embodiment, since the bonding material 45 contains Ti as an active metal and the ceramic substrate 11 is made of aluminum nitride, the active metal compound layer 21 (21A, 21B) is made of titanium nitride (TiN). That is, it is formed by an aggregation of titanium nitride (TiN) particles having an average particle size of 10 nm or more and 100 nm or less.

[0038] In this embodiment, the thickness t2 of the Ag-Cu alloy layer 22A formed at the end A of the bonding interface between the circuit layer 12 and the metal layer 13 is A , and the thickness t2 of the Ag-Cu alloy layer 22B formed in the center B of the bonding interface between the circuit layer 12 and the metal layer 13. B is within the range of 3 μm to 30 μm, and the thickness ratio t2 A / t2 B It is preferable that the ratio is within the range of 0.7 to 1.4.

[0039] A method for manufacturing the insulating circuit board 10 according to this embodiment will be described below with reference to FIGS.

[0040] (Joint material placement process S01) A copper plate 42 that will become the circuit layer 12 and a copper plate 43 that will become the metal layer 13 are prepared. Here, in the copper plate 42 that will become the circuit layer 12 and the copper plate 43 that will become the metal layer 13, chamfered portions are formed on the peripheral edge portions of the surfaces facing the ceramic substrate 11. Then, a bonding material 45 is applied to the bonding surfaces of the copper plate 42 that will become the circuit layer 12 and the copper plate 43 that will become the metal layer 13, and then dried. The thickness of the applied paste bonding material 45 is preferably within a range of 10 μm to 50 μm after drying. In this embodiment, the paste-like bonding material 45 is applied by screen printing.

[0041] The bonding material 45 contains Ag and active metals (Ti, Zr, Nb, Hf). In this embodiment, an Ag-Ti brazing material (Ag-Cu-Ti brazing material) is used as the bonding material 45. It is preferable to use the Ag-Ti brazing material (Ag-Cu-Ti brazing material) having a composition that contains, for example, Cu in the range of 0 mass% to 45 mass% and Ti as an active metal in the range of 0.5 mass% to 20 mass%, with the balance being Ag and unavoidable impurities.

[0042] Here, the Ag equivalent film thickness and the mass ratio of Ag to the active metal, Ag / active metal, of the applied bonding material 45 are adjusted, which makes it possible to control the absolute amount and fluidity of the Ag-Cu liquid phase generated in the pressurizing and heating step S03 described later. Specifically, the Ag equivalent thickness is preferably 2.5 μm or more, and more preferably 3.5 μm or more, while the Ag equivalent thickness is preferably 20 μm or less, and more preferably 15 μm or less. The mass ratio of Ag to the active metal, Ag / active metal, is preferably 8 or more, and more preferably 12 or more. On the other hand, the mass ratio of Ag to the active metal, Ag / active metal, is preferably 60 or less, and more preferably 45 or less.

[0043] The specific surface area of ​​the Ag powder contained in the bonding material 45 is 0.15 m 2 / g or more, and 0.25m 2 / g or more, and more preferably 0.40m 2 On the other hand, the specific surface area of ​​the Ag powder contained in the bonding material 45 is 1.40 m 2 / g or less, and 1.00m 2 / g or less, and more preferably 0.75m 2 It is more preferable that the molecular weight is 1 / g or less. The particle size of the Ag powder contained in the paste-like bonding material 45 is preferably within a range of D10 of 0.7 μm to 3.5 μm and D100 of 4.5 μm to 23 μm.

[0044] (Lamination process S02) Next, a copper plate 42 that will become the circuit layer 12 is laminated on one surface (the upper surface in FIG. 5) of the ceramic substrate 11 via a bonding material 45, and a copper plate 43 that will become the metal layer 13 is laminated on the other surface (the lower surface in FIG. 5) of the ceramic substrate 11 via a bonding material 45. Since chamfered portions are formed on the peripheries of the copper plate 42 that will become the circuit layer 12 and the copper plate 43 that will become the metal layer 13, a gap is formed at the end of the ceramic substrate 11.

[0045] (Pressure and heating process S03) Next, the copper plate 42, the ceramic substrate 11, and the copper plate 43 are heated in a heating furnace in a vacuum atmosphere while being pressurized, so that the bonding material 45 melts. Here, the heating temperature in the pressurizing and heating step S03 is preferably within a range of 800° C. to 850° C. The sum of the temperature integral values ​​in the temperature increasing step from 780° C. to the heating temperature and the holding step at the heating temperature is preferably within a range of 7° C. h to 80° C. h. The pressure load in the pressurizing and heating step S03 is preferably set within a range of 0.029 MPa or more and 2.94 MPa or less. Furthermore, the degree of vacuum in the pressurizing and heating step S03 is 1×10 -6 Pa or more 5×10 -2 It is preferable to set the range to 0.1 Pa or less.

[0046] (Cooling process S04) Then, after the pressurizing and heating step S03, cooling is performed to solidify the molten bonding material 45, thereby bonding the copper plate 42 that will become the circuit layer 12 to the ceramic substrate 11, and the ceramic substrate 11 to the copper plate 43 that will become the metal layer 13. The cooling rate in the cooling step S04 is preferably within a range of 2° C. / min to 20° C. / min from the heating temperature to 780° C., which is the Ag-Cu eutectic temperature.

[0047] As described above, the insulating circuit board 10 of this embodiment is manufactured by the bonding material providing step S01, the laminating step S02, the pressurizing and heating step S03, and the cooling step S04.

[0048] (Heat sink bonding process S05) Next, heat sink 5 is bonded to the other surface side of metal layer 13 of insulating circuit board 10. Insulated circuit board 10 and heat sink 5 are laminated with a solder material interposed therebetween and loaded into a heating furnace, where insulating circuit board 10 and heat sink 5 are solder-joined via solder layer 7 .

[0049] (Semiconductor element bonding process S06) Next, the semiconductor element 3 is joined to one surface of the circuit layer 12 of the insulating circuit board 10 by soldering. Through the above-described steps, the power module 1 shown in FIG. 1 is manufactured.

[0050] According to the insulating circuit board 10 (copper / ceramic bonded body) of the present embodiment configured as described above, at the bonding interface between the ceramic substrate 11 and the circuit layer 12 and metal layer 13, the distance h between the ceramic substrate 11 and the circuit layer 12 and metal layer 13 at the ends of the circuit layer 12 and metal layer 13 is 3 μm or more, and the void ratio in the end regions of the circuit layer 12 and metal layer 13 is 10% or less, so that the thickness of the bonding layer at the end faces is ensured, and it is possible to sufficiently ensure the strength of the ends of the circuit layer 12 and metal layer 13. Therefore, it is possible to suppress cracking and peeling of the ceramic substrate 11 when subjected to a thermal cycle. In addition, since the distance h between the ceramic substrate 11 and the circuit layer 12 and the metal layer 13 at the ends of the circuit layer 12 and the metal layer 13 is set to 30 μm or less, the bonding material 45 can be prevented from protruding, and the occurrence of "solder stains" can be suppressed.

[0051] The distance h between the ceramic substrate 11 and the circuit layer 12 and metal layer 13 at the ends of the circuit layer 12 and metal layer 13 is preferably 5 μm or more, and more preferably 8 μm or more. On the other hand, the distance h between the ceramic substrate 11 and the circuit layer 12 and metal layer 13 at the ends of the circuit layer 12 and metal layer 13 is preferably 25 μm or less, and more preferably 20 μm or less. Furthermore, the void ratio in edge regions E of circuit layer 12 and metal layer 13 at the bonding interfaces between ceramic substrate 11 and circuit layer 12 and metal layer 13 is preferably 8% or less, and more preferably 5% or less.

[0052] In this embodiment, the thickness t1 of the active metal compound layer 21A formed on the end A of the circuit layer 12 and the metal layer 13 is A、 and the thickness t1 of the active metal compound layer 21B formed in the central portion B of the circuit layer 12 and the metal layer 13. BWhen the thickness is within the range of 0.05 μm or more and 1.2 μm or less, the active metal reliably and firmly bonds the ceramic substrate 11 to the circuit layer 12 and the metal layer 13, and hardening of the bonding interface is further suppressed.

[0053] In order to bond the ceramic substrate 11 to the circuit layer 12 and the metal layer 13 more firmly, the thickness t1 of the active metal compound layer 21A formed on the end A of the circuit layer 12 and the metal layer 13 is set to 0.05 mm. A t1 of the active metal compound layer 21B formed in the central portion B of the circuit layer 12 and the metal layer 13. B is preferably 0.08 μm or more, and more preferably 0.15 μm or more. In order to more reliably prevent the bonding interface from becoming hard, the thickness t1 of the active metal compound layer 21A formed on the end A of the circuit layer 12 and the metal layer 13 is set to 0.5 μm. A t1 of the active metal compound layer 21B formed in the central portion B of the circuit layer 12 and the metal layer 13. B is preferably 1.0 μm or less, and more preferably 0.6 μm or less.

[0054] Furthermore, in this embodiment, the thickness t1 of the active metal compound layer 21A formed on the end A of the circuit layer 12 and the metal layer 13 is A and the thickness t1 of the active metal compound layer 21B formed in the central portion B of the circuit layer 12 and the metal layer 13. B Thickness ratio t1 A / t1 B When the ratio is within the range of 0.7 or more and 1.4 or less, there is no significant difference in hardness of the bonding interface between the end A and the central portion b of the circuit layer 12 and the metal layer 13, and the occurrence of cracks in the ceramic substrate 11 when subjected to thermal cycle loading can be further suppressed.

[0055] In order to further suppress the occurrence of cracks in the ceramic substrate 11 during thermal cycle loading, the thickness t1 of the active metal compound layer 21A formed on the end A of the circuit layer 12 and the metal layer 13 is set to 0.1 mm. At1 of the active metal compound layer 21B formed in the central portion B of the circuit layer 12 and the metal layer 13. B Ratio of t1 A / t1 B is more preferably within the range of 0.8 or more and 1.2 or less, and even more preferably within the range of 0.9 or more and 1.1 or less.

[0056] In this embodiment, the thickness t2 of the Ag-Cu alloy layer 22A formed on the end A of the circuit layer 12 and the metal layer 13 is A , and the thickness t2 of the Ag-Cu alloy layer 22B formed in the central portion B of the circuit layer 12 and the metal layer 13. B In the case where the thickness is within the range of 3 μm or more and 30 μm or less, Ag of the bonding material 45 described later reacts sufficiently with the circuit layer 12 and the metal layer 13, so that the ceramic substrate 11, the circuit layer 12 and the metal layer 13 are reliably and firmly bonded to each other, and hardening of the bonding interface is further suppressed.

[0057] In order to bond the ceramic substrate 11 to the circuit layer 12 and the metal layer 13 more firmly, the thickness t2 of the Ag-Cu alloy layer 22A formed on the end A of the circuit layer 12 and the metal layer 13 is set to 0.05 mm. A , and the thickness t2 of the Ag-Cu alloy layer 22B formed in the central portion B of the circuit layer 12 and the metal layer 13. B is preferably 5 μm or more, and more preferably 7 μm or more. In order to further prevent the bonding interface from becoming unnecessarily hard, the thickness t2 of the Ag-Cu alloy layer 22A formed at the end A of the circuit layer 12 and the metal layer 13 is set to 0.5 mm. A , and the thickness t2 of the Ag-Cu alloy layer 22B formed in the central portion B of the circuit layer 12 and the metal layer 13. B is preferably 25 μm or less, and more preferably 20 μm or less.

[0058] Furthermore, in this embodiment, the thickness t2 of the Ag-Cu alloy layer 22A formed on the end A of the circuit layer 12 and the metal layer 13 is Aand the thickness t2 of the Ag-Cu alloy layer 22B formed in the central portion B of the circuit layer 12 and the metal layer 13. B Ratio to t2 A / t2 B is within the range of 0.7 or more and 1.4 or less, there is no significant difference in hardness of the bonding interface between the end A and the central B of the circuit layer 12 and the metal layer 13, and the occurrence of cracks in the ceramic substrate when subjected to thermal cycle loading can be further suppressed.

[0059] In order to further suppress the occurrence of cracks in the ceramic substrate 11 during thermal cycle loading, the thickness t2 of the Ag-Cu alloy layer 22A formed on the end A of the circuit layer 12 and the metal layer 13 is set to 0.1 mm. A and the thickness t2 of the Ag-Cu alloy layer 22B formed in the central portion B of the circuit layer 12 and the metal layer 13. B Ratio to t2 A / t2 B is more preferably within the range of 0.8 or more and 1.2 or less, and even more preferably within the range of 0.9 or more and 1.1 or less.

[0060] Although the embodiment of the present invention has been described above, the present invention is not limited to this, and can be modified as appropriate without departing from the technical concept of the invention. For example, in the present embodiment, a power module is configured by mounting a semiconductor element on an insulating circuit board, but the present invention is not limited to this. For example, an LED module may be configured by mounting an LED element on a circuit layer of an insulating circuit board, or a thermoelectric module may be configured by mounting a thermoelectric element on a circuit layer of an insulating circuit board.

[0061] In addition, in the insulating circuit board of this embodiment, the ceramic substrate is described as being made of aluminum nitride (AlN) as an example, but the present invention is not limited to this, and other ceramic substrates such as alumina (Al2O3), silicon nitride (Si3N4), etc. may also be used.

[0062] Furthermore, in the present embodiment, Ti is used as an example of the active metal contained in the bonding material, but the present invention is not limited thereto, and the bonding material may contain one or more active metals selected from Ti, Zr, Hf, and Nb. These active metals may be contained as hydrides.

[0063] Furthermore, in this embodiment, the circuit layer is formed by bonding a rolled sheet of oxygen-free copper to the ceramic substrate, but the present invention is not limited to this, and the circuit layer may be formed by bonding copper pieces punched out of a copper plate to the ceramic substrate in a state of being arranged in a circuit pattern. In this case, it is sufficient that each copper piece has an interface structure with the ceramic substrate as described above. EXAMPLES

[0064] The results of experiments carried out to confirm the effects of the present invention will be described below.

[0065] First, we prepared ceramic substrates (40 mm x 40 mm) as shown in Table 1. The thicknesses were 0.635 mm for AlN and Al2O3, and 0.32 mm for Si3N4. In addition, a copper plate of 37 mm × 37 mm made of oxygen-free copper was prepared as the copper plate to be the circuit layer and metal layer, with the thickness shown in Table 1. The copper plate to be the circuit layer and metal layer had a chamfered edge on the ceramic substrate side.

[0066] Then, a bonding material was applied to the copper plate that would become the circuit layer and the metal layer. A paste material was used as the bonding material, and the amounts of Ag, Cu, and active metal were as shown in Table 1. Here, as shown in Table 1, the Ag-equivalent thickness and the mass ratio of Ag to active metal (Ag / active metal) were adjusted.

[0067] A copper plate to serve as a circuit layer was laminated on one surface of the ceramic substrate, and a copper plate to serve as a metal layer was laminated on the other surface of the ceramic substrate.

[0068] The laminate was heated while being pressurized in the lamination direction to generate an Ag-Cu liquid phase. The pressure load was 0.294 MPa, and the temperature integral value was as shown in Table 1. The heated laminate was then cooled to bond the copper plate that would become the circuit layer, the ceramic substrate, and the metal plate that would become the metal layer, thereby obtaining an insulated circuit board (copper / ceramic bonded body).

[0069] The obtained insulating circuit board (copper / ceramic bonded body) was evaluated for the void ratio at the edge, the distance between the ceramic substrate and the copper plate at the edge, the active metal compound layer, the Ag-Cu alloy layer, the thermal cycle reliability, and the presence or absence of solder stains as described below.

[0070] (Void ratio at edge) An EPMA device was used to obtain elemental mapping of Ag, Cu, and active metals for the edge cross-sections of the bonding interface between the circuit layer and ceramic substrate, and the bonding interface between the ceramic substrate and metal layer. Elemental mapping was obtained for each of five fields of view. The area (void area) of the edge region where Ag, Cu, and active metals were not detected was then calculated, and the maximum value of the formula (void ratio = 100 x void area / edge region area) was defined as the "edge void ratio" and is listed in Table 2.

[0071] (Distance between the ceramic substrate and the copper plate at the edge) At the bonding interface between the circuit layer and the ceramic substrate, and at the bonding interface between the ceramic substrate and the metal layer, line analysis of the above-mentioned end cross section was performed using an EPMA device for each element of Ag, Cu, and active metal. Line analysis of each element was performed in five fields of view, passing through the intersection point P and toward the circuit layer or the metal layer in a direction perpendicular to the ceramic substrate. Then, assuming Ag+Cu+active metal=100 mass%, the distance from the ceramic substrate surface to the area where the Cu concentration was 90 mass% or more was measured, and the shortest distance among the five fields of view, for a total of 10 fields of view, was taken as the "distance between the ceramic substrate and the copper plate at the end" and is listed in Table 2.

[0072] (Active metal compound layer) The cross-sections of the bonding interface between the circuit layer and the ceramic substrate, and the bonding interface between the ceramic substrate and the metal layer were measured at a magnification of 30,000 times using a scanning electron microscope (Carl Zeiss NTS ULTRA55, accelerating voltage 1.8 kV), and elemental mapping of N, O, and active metal elements was obtained by energy dispersive X-ray analysis. The presence of an active metal compound layer was determined when an active metal element and N or O existed in the same region. Observations were made in five fields of view for each sample, and the area in which the active metal element and N or O were present in the same region was divided by the measured width to obtain the average value that was taken as the "thickness of the active metal compound layer," which is shown in Table 2.

[0073] (Ag-Cu alloy layer) The cross-sections of the bonding interface between the circuit layer and the ceramic substrate, and between the ceramic substrate and the metal layer were subjected to elemental mapping of Ag, Cu, and active metals using an EPMA device. Each elemental mapping was obtained in five fields of view. When Ag+Cu+active metal=100 mass%, the area where the Ag concentration was 15 mass% or more was determined as the Ag-Cu alloy layer, and the area was calculated and divided by the width of the measurement area (area / width of measurement area). The average of these values ​​is shown in Table 2 as the thickness of the Ag-Cu alloy layer.

[0074] (Reliability of thermal cycles) The above-mentioned insulating circuit boards were subjected to the following thermal cycles according to the material of the ceramic substrate, and the presence or absence of ceramic cracks was judged by SAT inspection. The evaluation results are shown in Table 2. For AlN and Al2O3: -40℃×10min ←→ 150℃×10min, SAT inspection every 50 cycles up to 500 cycles. For Si3N4: -40℃×10min ←→ 150℃×10min, SAT inspection every 200 cycles up to 2000 cycles.

[0075] (whether or not there is wax stain) The circuit layer surface and metal layer surface were subjected to elemental mapping of Ag, Cu, and active metals using an EPMA device. When Ag+Cu+active metals=100mass%, the area with an Ag concentration of 15mass% or more was determined as a "solder stain", and the area was calculated and divided by the area of ​​the area 100μm from the periphery of the circuit layer and metal layer to determine the presence of a "solder stain" if it was 20% or more.

[0076] [Table 1]

[0077] [Table 2]

[0078] First, invention examples 1-3 using AlN as the ceramic substrate will be compared with comparative example 1. In Comparative Example 1, the distance between the ceramic substrate and the circuit layer (metal layer) at the end of the circuit layer (metal layer) was 23.2 μm, the void ratio in the end region of the circuit layer (metal layer) was 16.3%, and the number of cracks that occurred in the thermal cycle test was 100. In addition, solder stains were confirmed.

[0079] In contrast, in Example 1 of the present invention, the distance between the ceramic substrate and the circuit layer (metal layer) at the end of the circuit layer (metal layer) was 24.7 μm, the void ratio in the end region of the circuit layer (metal layer) was 9.8%, and the number of cracks that occurred in the thermal cycle test was 400. Also, no solder stains were observed. In Example 2 of the present invention, the distance between the ceramic substrate and the circuit layer (metal layer) at the end of the circuit layer (metal layer) was 20.9 μm, the void ratio in the end region of the circuit layer (metal layer) was 5.3%, and the number of cracks that occurred in the thermal cycle test was 450. Also, no solder stains were observed. In Example 3 of the present invention, the distance between the ceramic substrate and the circuit layer (metal layer) at the end of the circuit layer (metal layer) was 12.1 μm, the void ratio in the end region of the circuit layer (metal layer) was 0.8%, and the number of cracks that occurred in the thermal cycle test was 500. Also, no solder stains were observed.

[0080] Next, the present invention examples 4-6, which use Si3N4 as the ceramic substrate, are compared with the comparative example 2. In Comparative Example 2, the distance between the ceramic substrate and the circuit layer (metal layer) at the end of the circuit layer (metal layer) was 45.1 μm, the void ratio at the end region of the circuit layer (metal layer) was 13.2%, and the number of cracks that occurred in the thermal cycle test was 1200. Also, solder stains were confirmed.

[0081] In contrast, in Example 4 of the present invention, the distance between the ceramic substrate and the circuit layer (metal layer) at the end of the circuit layer (metal layer) was 3.2 μm, the void ratio in the end region of the circuit layer (metal layer) was 0.3%, and the number of cracks that occurred in the thermal cycle test was 1600. Also, no solder stains were observed. In Example 5 of the present invention, the distance between the ceramic substrate and the circuit layer (metal layer) at the end of the circuit layer (metal layer) was 6.4 μm, the void ratio in the end region of the circuit layer (metal layer) was 7.1%, and the number of cracks that occurred in the thermal cycle test was 1800. Also, no solder stains were observed. In Example 6 of the present invention, the distance between the ceramic substrate and the circuit layer (metal layer) at the end of the circuit layer (metal layer) was 8.1 μm, the void ratio in the end region of the circuit layer (metal layer) was 0.1%, and no cracks were generated even after 2000 cycles in the thermal cycle test. Also, no solder stains were observed.

[0082] Next, invention examples 7 and 8, which used Al2O3 as the ceramic substrate, will be compared with comparative example 3. In Comparative Example 3, the distance between the ceramic substrate and the circuit layer (metal layer) at the end of the circuit layer (metal layer) was 1.3 μm, the void ratio in the end region of the circuit layer (metal layer) was 0.0%, and the number of cracks that occurred in the thermal cycle test was 50. No solder stains were observed.

[0083] In contrast, in Example 7 of the present invention, the distance between the ceramic substrate and the circuit layer (metal layer) at the end of the circuit layer (metal layer) was 29.6 μm, the void ratio in the end region of the circuit layer (metal layer) was 8.2%, and the number of cracks that occurred in the thermal cycle test was 350. Also, no solder stains were observed. In Example 8 of the present invention, the distance between the ceramic substrate and the circuit layer (metal layer) at the end of the circuit layer (metal layer) was 19.6 μm, the void ratio in the end region of the circuit layer (metal layer) was 4.8%, and the number of cracks that occurred in the thermal cycle test was 450. Also, no solder stains were observed.

[0084] From the results of the above confirmatory experiments, it was confirmed that the present invention can provide an insulated circuit board (copper / ceramic bonded body) that has excellent thermal cycle reliability and in which the occurrence of solder stains is sufficiently suppressed. [Explanation of symbols]

[0085] 10 Insulated circuit board (copper / ceramic joint) 11 Ceramic substrate (ceramic component) 12 Circuit layer (copper material) 13 Metal layer (copper material) 21(21A,21B) Active metal compound layer 22(22A,22B) Ag-Cu alloy layer

Claims

1. A copper / ceramic bonded body obtained by bonding a copper member made of copper or a copper alloy to a ceramic member, a chamfered portion is formed on a peripheral edge portion of a surface of the copper member facing the ceramic member, At a bonding interface between the ceramic member and the copper member, a distance between the ceramic member and the copper member at an end of the copper member is within a range of 3 μm to 30 μm, A copper / ceramic bonded body, characterized in that the void ratio in the end region of the copper member is 10% or less.

2. an active metal compound layer is formed on the ceramic member side at a joint interface between the ceramic member and the copper member, The thickness t1 of the active metal compound layer at the end of the copper member Ａ and a thickness t1 of the active metal compound layer at the center of the copper member. Ｂ is in the range of 0.05 μm or more and 1.2 μm or less, and the thickness ratio t1 Ａ / t1 Ｂ 2. The copper / ceramic bonded body according to claim 1, wherein the coefficient of friction is in the range of 0.7 to 1.

4.

3. an Ag-Cu alloy layer is formed on the copper member side at a bonding interface between the ceramic member and the copper member; The thickness t2 of the Ag-Cu alloy layer at the end of the copper member Ａ and a thickness t2 of the Ag-Cu alloy layer at the center of the copper member. Ｂ is in the range of 3 μm or more and 30 μm or less, and the thickness ratio t2 Ａ / t2 Ｂ 3. The copper / ceramic bonded body according to claim 1, wherein the coefficient of friction is in the range of 0.7 to 1.

4.

4. An insulating circuit board having a ceramic substrate and a copper plate made of copper or a copper alloy bonded to the surface thereof, a chamfered portion is formed on a peripheral portion of a surface of the copper plate facing the ceramic substrate; At a bonding interface between the ceramic substrate and the copper plate, a distance between the ceramic substrate and the copper plate at an end of the copper plate is within a range of 3 μm to 30 μm, An insulating circuit board, characterized in that the void rate in the edge region of the copper plate is 10% or less.

5. an active metal compound layer is formed on the ceramic substrate side at a bonding interface between the ceramic substrate and the copper plate, The thickness t1 of the active metal compound layer at the end of the copper plate Ａ and a thickness t1 of the active metal compound layer at the center of the copper plate. Ｂ is in the range of 0.05 μm or more and 1.2 μm or less, and the thickness ratio t1 Ａ / t1 Ｂ 5. The insulating circuit board according to claim 4, wherein the resistance is within a range of 0.7 to 1.

4.

6. an Ag-Cu alloy layer is formed on the copper plate side at the bonding interface between the ceramic substrate and the copper plate; The thickness t2 of the Ag-Cu alloy layer at the end of the copper plate Ａ and a thickness t2 of the Ag-Cu alloy layer at the center of the copper plate. Ｂ is in the range of 3 μm or more and 30 μm or less, and the thickness ratio t2 Ａ / t2 Ｂ 6. The insulating circuit board according to claim 4, wherein the resistance is within a range of 0.7 to 1.4.

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