Image contrast metric for estimating and improving imaging conditions
The described method and system improve semiconductor wafer inspection by calculating contrast ratios between setup and runtime image frames to adjust stage position and normalize defect attributes, resulting in enhanced focus control and reduced variability in defect inspection.
Patent Information
- Application Number
- JP2023558800
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2021-09-02
- Filing Date
- 2022-06-15
- Publication Date
- 2025-05-12
- Estimated Expiration
- 2042-06-15
AI Technical Summary
Current semiconductor wafer inspection systems struggle to effectively detect image focus changes and compare image contrast to golden dies, leading to inefficiencies in yield management and high variability in defect inspection results.
A method and system that utilize a processor to extract and align setup and runtime image frames, determine their respective image contrasts, and calculate a contrast ratio. This information is used to adjust the position of the stage holding the semiconductor wafer and normalize defect attribute values, thereby improving focus and reducing image contrast variations.
The solution enables real-time monitoring of focus conditions, reduces image contrast variations, and stabilizes defect inspection results, leading to improved yield management and reduced manual calibration needs.
Smart Images

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Abstract
Description
[Technical field]
[0001] REFERENCE TO RELATED APPLICATIONS This application claims priority to a provisional patent application filed on June 17, 2021 and assigned to U.S. Application 63 / 211,556, the disclosure of which is incorporated herein by reference.
[0002] "Field of Disclosure" FIELD OF THE DISCLOSURE This disclosure relates to imaging of semiconductor wafers. This disclosure relates to image contrast metrics for deriving and improving imaging conditions. [Background technology]
[0003] The evolution of the semiconductor manufacturing industry is placing greater demands on yield management, especially on metrology and inspection systems. Critical dimensions (CDs) continue to shrink, but the industry must reduce the time to achieve high-yield, high-value production. Minimizing the total time from detecting a yield problem to fixing it maximizes the return on investment for semiconductor manufacturers.
[0004] Fabricating semiconductor devices, such as logic and memory devices, typically involves processing semiconductor wafers using a number of manufacturing processes to form the various features and levels of the semiconductor devices. For example, lithography is a semiconductor manufacturing process that involves transferring a pattern from a reticle to a photoresist disposed on a semiconductor wafer. Further examples of semiconductor manufacturing processes include, but are not limited to, chemical mechanical polishing (CMP), etching, deposition, and ion implantation. An array of multiple semiconductor devices fabricated on a single semiconductor wafer may be separated into individual semiconductor devices.
[0005] Inspection processes are used at various steps during semiconductor manufacturing to detect defects on wafers to promote higher yields in the manufacturing process and therefore higher profits. Inspection has always been an important part of manufacturing semiconductor devices such as integrated circuits (ICs). However, as the dimensions of semiconductor devices decrease, inspection becomes even more important to the successful manufacture of acceptable semiconductor devices because smaller defects can cause device failures. For example, as the dimensions of semiconductor devices shrink, detection of reduced size defects has become necessary because even relatively small defects can cause undesirable aberrations in the semiconductor device.
[0006] Inspection systems do not effectively inspect the dies on a semiconductor wafer for direct focus. Autofocus systems are not sensitive enough to detect image focus changes. Similarly, run-time focus calibration systems are not very sensitive. Additionally, these previous techniques do not compare image contrast to a golden die. Manual calibration is time consuming and may be limited in duration or application so as not to adversely affect the throughput of semiconductor manufacturers. [Prior art documents] [Patent documents]
[0007] [Patent Document 1] U.S. Patent Publication No. 2020-0312778A1 [Patent Document 2] U.S. Patent Publication No. 2019-0295908A1 Summary of the Invention [Problem to be solved by the invention]
[0008] Improved techniques and systems are needed. [Means for solving the problem]
[0009] Summary of the Disclosure In a first embodiment, a method is provided. The method includes extracting a setup image frame during recipe setup using a processor. A first image contrast of the setup image frame is determined using the processor. A runtime setup image frame is extracted using the processor dining runtime at the same position as the setup image frame. The setup image frame and the runtime image frame are aligned using the processor. A second image contrast of the runtime image frame is determined using the processor. A contrast ratio between the first image contrast and the second image contrast is determined using the processor.
[0010] The method can include adjusting a position of a stage configured to hold the semiconductor wafer based on the contrast ratio.
[0011] The method may include, using a processor, normalizing the contrast ratio by dividing the first image contrast by a maximum contrast of a setup image frame and dividing the second image contrast by a maximum contrast of a runtime image frame.
[0012] The method can include using a processor to determine focus variations caused by a position of a stage configured to hold the semiconductor wafer using the contrast ratio.
[0013] The method may include using a processor to adjust the runtime image frames and the setup image frames based on the contrast ratio.
[0014] In one example, the method includes determining, using a processor, a first offset between setup and runtime of a plurality of inspection frames; determining, using a processor, a second offset between setup and runtime of the plurality of inspection frames; and, using a processor, determining a placement of one or more care areas based on an offset correction including the first offset and the second offset.
[0015] The method may include using a processor to determine the offset using a sum of squared differences between the setup image frame and the runtime image frame.
[0016] A computer readable medium storing a program may be configured to instruct a processor to perform the method of the first embodiment.
[0017] In a second embodiment, a system is provided. The system includes a stage configured to hold a semiconductor wafer. An energy source is configured to direct a beam toward the semiconductor wafer on the stage. A detector is configured to receive the beam reflected from the semiconductor wafer on the stage. A processor is in electronic communication with the detector. The energy source can be a light source. The beam can be a beam of light. The processor can be configured to: extract a setup image frame during recipe setup; determine a first image contrast for the setup image frame; extract a runtime setup image frame during runtime at the same location as the setup image frame; align the setup image frame with the runtime image frame; determine a second image contrast for the runtime image frame; and determine a contrast ratio between the first image contrast and the second image contrast.
[0018] The processor may be further configured to adjust the position of the stage based on the contrast ratio.
[0019] The processor may be further configured to normalize the contrast ratio by dividing the first image contrast by a maximum contrast of the setup image frame and dividing the second image contrast by a maximum contrast of the nm-time image frame.
[0020] The processor may further be configured to use the contrast ratio to determine focus variations caused by the position of the stage.
[0021] The processor may be further configured to adjust the runtime image frames and the setup image frames based on a contrast ratio.
[0022] In one example, the processor is further configured to: determine a first offset between the setup and runtime of the multiple inspection frames; determine a second offset between the design and runtime of the multiple inspection frames; and determine a placement of one or more care areas based on the offset correction including the first offset and the second offset.
[0023] The processor may be further configured to determine the offset using a sum of squared differences between the setup image frame and the runtime image frame. [Brief description of the drawings]
[0024] For a fuller understanding of the nature and objects of the present disclosure, reference should be made to the following detailed description taken in conjunction with the accompanying drawings. [Figure 1] FIG. 1 is a flow chart of one embodiment of a method according to the present disclosure. [Diagram 2] FIG. 2 is an example comparison of contrast ratio between setup and runtime. [Diagram 3] Figure 3 is an exemplary flowchart of image data collection using patch-to-design alignment (PDA). [Figure 4] FIG. 4 illustrates the determination of Tenengrad variance using example image frames. [Diagram 5] FIG. 5 is an embodiment of a system according to the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0025] Although the claimed subject matter is described with respect to certain embodiments, other embodiments, including embodiments that do not provide all of the benefits and features described herein, are also within the scope of this disclosure. Various structural, logical, process step, and electronic changes may be made without departing from the scope of the disclosure. Accordingly, the scope of the disclosure is defined solely by reference to the appended claims.
[0026] The embodiments disclosed herein can identify and mitigate wafer-to-wafer and intra-wafer image contrast variations. Image frames can be extracted and image contrast can be determined for the image frames. Focus conditions can be checked with high time resolution during run-time. Focus conditions can also be checked for the inspection system directly on the inspection images in the actively interrogated area of the die. Out-of-focus conditions, focus variations of the inspection system, and correct stage position (e.g., in the Z direction) can be determined.
[0027] Figure 1 is an embodiment of a method 100. An additional embodiment of the method 100 is shown in Figure 2. Some or all of the steps of the method 100 may be performed using a processor.
[0028] In the method 100 of Figure 1, a setup image frame is extracted at 101. This occurs during recipe setup. For example, a golden image can be extracted from a die selected during setup. The golden image can be generated from a golden die. The image frame can be, for example, a die on a semiconductor wafer or a portion of a die on a semiconductor wafer.
[0029] At 102, a first image contrast (C) is determined for the setup image frame. This can be determined for some or all pixels having gray level intensity I using the following equation (Equation (1)):
number
[0030] In equation (1), Δ is the Laplacian operator. If there is a known difference in the frame, the first image contrast may be determined for only some of the pixels. Using only some pixels for the first image contrast may be performed for other reasons. If there is no known difference in the frame, the first image contrast may be determined for all pixels in the frame.
[0031] At 103, a runtime setup image frame is extracted. At 104, the setup image frame and the runtime image frame are aligned. For example, the sum of squared differences can be determined while shifting the images relative to each other to determine the best aligned position. The setup image frame and the runtime image frame may be of different dies or different wafers. If a different die or different wafer is used, the same position is a position on the same wafer or die as on the selected die used in the golden image.
[0032] At 105, a second image contrast is determined for the runtime image frame, which may also use equation (1).
[0033] At 106, a contrast ratio between the first image contrast and the second image contrast is determined. If the contrast ratio is close to 1.0, the contrast has not changed significantly between setup and runtime. This can be useful during image alignment. Deviations far from 1.0 can mean that corrective action should be taken. Based on the contrast ratio, out-of-control situations or focus variations can be reported. Wafer-to-wafer or intra-wafer image contrast variations can be monitored. For example, if the image contrast is blurred, the inspection system or the wafer may be out of control. These effects are reflected in the contrast ratio.
[0034] Although the method 100 is described with one runtime image frame, multiple runtime image frames can be extracted. A second image contrast and resulting contrast ratio can be determined for each of these runtime image frames. In one example, this is repeated for each die or for multiple dies during runtime.
[0035] In one example, the position of a stage holding a semiconductor wafer is adjusted based on the contrast ratio. For example, the stage can be adjusted in the Z direction. A calibration curve can be used to collect images through focal points (e.g., at known Z positions) and calculate the image contrast for each focal point. A curve can be fitted to these data points and used to predict the current Z position based on the image contrast (as shown in Figure 5). This can improve the focus and improve the contrast ratio results. The stage can be adjusted in the Z direction using the calibration curve.
[0036] In another example, a contrast-based defect attribute is determined. The contrast-based defect attribute can be used to perform nuisance filtering or other troubleshooting. The contrast-based defect attribute can be, for example, image contrast or normalized image contrast.
[0037] In another example, the contrast ratio can be used to normalize the defect attribute values. The contrast values of an image can include a wide range of numbers, so it can be useful to divide the number by the maximum contrast value.
[0038] In another example, the contrast ratio can be used to determine the focus variation. This allows a calibration curve for the stage in the Z direction to be used. Each image contrast value can be mapped to a specific focus. The focus variation can be determined based on this mapping.
[0039] In another example, the candidate image and the reference image may be adjusted based on a contrast ratio. The candidate image may be a run-time image. The reference image may be a setup image or another golden image.
[0040] In yet another example, a first offset between setup and runtime and a second offset between design and runtime can be determined for multiple inspection frames. For example, multiple frames on a setup wafer (e.g., a golden wafer) and a runtime wafer can be used. The placement of one or more care areas can be determined based on an offset correction including a first offset and a second offset. In one example, the offset is determined by a sum of squared differences of the setup image and the runtime image. When both the setup image and the runtime image are at the same focus, the images will look as similar as possible, so the x / y offset can be corrected with greater precision.
[0041] Another example is shown in Figure 2. The image frame during recipe setup can be a golden die frame. The image frame size can be, for example, 196x196 pixels, although other sizes are possible.
[0042] Image frame data during setup and runtime may be collected while running the optical PDA. This image frame data during setup and runtime data may be used to collect data used for image contrast comparison. The PDA flow is shown in Figure 3. Highlighted items with hashed contours indicate where image data can be extracted. 2D unique targets may be evenly distributed across the die. Image rendering targets may be learned from example targets. Design-to-image offsets may be determined for each inspection frame from the targets. The targets and offsets stored in the database may be used for runtime inspection. The offset between the setup image and runtime image, or the offset between the design image and runtime image, may be determined for each inspection frame.
[0043] This data extraction in Figure 3 can be added to the current process flow and used for image contrast calculations. Note that Figure 3 is just one example of image data collection. Other techniques for collecting this data are possible, such as using a completely separate flow.
[0044] The contrast calculation is not limited to the Laplacian-based contrast as in Equation (1), but can also be done using other metrics such as Tenengrad variance. Figure 4 shows the calculation procedure using Tenengrad variance. Tenengrad variance (TEN) can convolve an image with the Sobel operator and sum the squares of the magnitudes greater than a threshold.
[0045] Using embodiments of the method 100, semiconductor manufacturers can immediately determine if the focus of the inspection system is out of control and / or needs adjustment. This avoids manual calibration or extra run-time focus calibration steps that impact throughput. Focus changes can be measured directly based on the image being inspected, not on dummy structures. Stage position can be adjusted based on the results. Because the focus state of the inspection system can be monitored in real time, lower variability in defect inspection results can be provided. Defect attribute values change less, resulting in more stable inspection results and higher capture rates of defects. Tool-to-tool alignment (i.e., alignment between inspection systems) can be improved. More stable results can be provided for applications that use image or defect attributes, such as decision trees (e.g., random forest-based decision trees) or other nuisance event filters.
[0046] One embodiment of system 200 is shown in FIG. System 200 includes an optical-based subsystem 201. Generally, optical-based subsystem 201 is configured to generate an optical-based output for sample 202 by directing (or scanning) light at and detecting light from sample 202. In one embodiment, sample 202 includes a wafer. The wafer may include any wafer known in the art. In another embodiment, sample 202 includes a reticle. The reticle may include any reticle known in the art.
[0047] In the embodiment of the system 200 shown in FIG. 5, the optical-based subsystem 201 includes an illumination subsystem configured to direct light to the sample 202. The illumination subsystem includes at least one light source. For example, as shown in FIG. 5, the illumination subsystem includes a light source 203. In one embodiment, the illumination subsystem is configured to direct light to the sample 202 at one or more angles of incidence, which may include one or more oblique angles and / or one or more normal angles. For example, as shown in FIG. 5, light from the light source 203 passes through an optical element 204 and then through a lens 205 and is directed to the sample 202 at an oblique angle of incidence. The oblique angle of incidence may include any suitable oblique angle of incidence, which may vary depending on, for example, the characteristics of the sample 202.
[0048] The optical-based subsystem 201 can be configured to direct light to the sample 202 at different angles of incidence at different times. For example, the optical-based subsystem 201 can be configured to change one or more properties of one or more elements of the illumination subsystem so that light can be directed to the sample 202 at angles of incidence different than the angles of incidence shown in Figure 5. In one such example, the optical-based subsystem 201 can be configured to move the light source 203, the optical element 204, and the lens 205 so that light is directed to the sample 202 at different oblique or normal (or near normal) angles of incidence.
[0049] In some cases, the optical-based subsystem 201 may be configured to direct light to the sample 202 at multiple angles of incidence simultaneously. For example, the illumination subsystem may include multiple illumination channels, one of which may include a light source 203, optical elements 204, and a lens 205 as shown in FIG. 5, and another of the illumination channels (not shown) may include similar elements that may be configured differently or may be the same, or may include at least a light source and, in some cases, one or more other components such as those further described herein. When such light is directed to the sample simultaneously with other light, one or more characteristics (e.g., wavelength, polarization, etc.) of the light directed to the sample 202 at different angles of incidence may be different such that light resulting from illumination of the sample 202 at different angles of incidence may be distinguished from one another at the detector.
[0050] In another example, the illumination subsystem may include only one light source (e.g., light source 203 shown in FIG. 5 ), and the light from the light source may be separated into different optical paths (e.g., based on wavelength, polarization, etc.) by one or more optical elements (not shown) of the illumination subsystem. The light in each of the different optical paths may then be directed to the sample 202. The multiple illumination channels may be configured to direct light to the sample 202 simultaneously or at different times (e.g., when different illumination channels are used to sequentially illuminate the sample). In another example, the same illumination channel may be configured to direct light with different characteristics to the sample 202 at different times. For example, in some cases, the optical element 204 may be configured as a spectral filter, and the characteristics of the spectral filter may be changed in a variety of different ways (e.g., by swapping out the spectral filter) such that light of different wavelengths may be directed to the sample 202 at different times. The illumination subsystem may have any other suitable configuration known in the art for directing light having different or the same characteristics to the sample 202 sequentially or simultaneously at different or the same angles of incidence.
[0051] In one embodiment, the light source 203 may include a broadband plasma (BBP) source. In this manner, the light generated by the light source 203 and directed to the sample 202 may include broadband light. However, the light source may include any other suitable light source, such as a laser. The laser may include any suitable laser known in the art and may be configured to generate light at any suitable wavelength or wavelengths known in the art. In addition, the laser may be configured to generate light that is monochromatic or nearly monochromatic. In this manner, the laser may be a narrowband laser. The light source 203 may also include a polychromatic light source that generates light at multiple discrete wavelengths or wavelength bands.
[0052] Light from the optical element 204 may be focused onto the sample 202 by the lens 205. Although the lens 205 is shown in FIG. 5 as a single refractive optical element, it should be understood that in practice the lens 205 may include several refractive and / or reflective optical elements that combine to focus the light from the optical elements onto the sample. The illumination subsystem shown in FIG. 5 and described herein may include any other suitable optical elements (not shown). Examples of such optical elements include, but are not limited to, polarizing components, spectral filters, spatial filters, reflective optical elements, apodizers, beam splitters (such as beam splitter 213), apertures, and the like, and may include any such suitable optical elements known in the art. Additionally, the optical-based subsystem 201 may be configured to alter one or more of the elements of the illumination subsystem based on the type of illumination used to generate the optical-based output.
[0053] The optical-based subsystem 201 may also include a scanning subsystem configured to scan the light over the specimen 202. For example, the optical-based subsystem 201 may include a stage 206 on which the specimen 202 is positioned during optical-based output generation. The scanning subsystem may include any suitable mechanical and / or robotic assembly (including the stage 206) that may be configured to move the specimen 202 such that the light may be scanned across the specimen 202. Additionally or alternatively, the optical-based subsystem 201 may be configured such that one or more optical elements of the optical-based subsystem 201 perform some scanning of the light across the specimen 202. The light may be scanned across the specimen 202 in any suitable manner, such as a serpentine-like path or a spiral path.
[0054] The optical-based subsystem 201 further includes one or more detection channels. At least one of the one or more detection channels includes a detector configured to detect light from the sample 202 resulting from illumination of the sample 202 by the subsystem and generate an output in response to the detected light. For example, the optical-based subsystem 201 shown in FIG. 5 includes two detection channels, one formed by a collector 207, an element 208, and a detector 209, and the other formed by a collector 210, an element 211, and a detector 212. As shown in FIG. 5, the two detection channels are configured to collect and detect light at different collection angles. In some examples, both detection channels are configured to detect scattered light, and the detection channels are configured to detect light scattered from the sample 202 at different angles. However, one or more detection channels can be configured to detect another type of light (e.g., reflected light) from the sample 202.
[0055] As further shown in FIG. 5, both detection channels are shown positioned in the plane of the paper, and the illumination subsystem is also shown positioned in the plane of the paper. Thus, in this embodiment, both detection channels are positioned (e.g., centered) in the plane of incidence. However, one or more of the detection channels may be positioned off the plane of incidence. For example, the detection channel formed by collector 210, element 211, and detector 212 may be configured to collect and detect light scattered from the plane of incidence. Thus, such detection channels may be generally referred to as "side" channels, and such side channels may be centered in a plane substantially perpendicular to the plane of incidence.
[0056] Although FIG. 5 illustrates an embodiment of the optical-based subsystem 201 including two detection channels, the optical-based subsystem 201 may include a different number of detection channels (e.g., only one detection channel, or two or more detection channels). In one such case, the detection channel formed by the collector 210, the element 211, and the detector 212 may form one side channel, as described above, and the optical subsystem 201 may include an additional detection channel (not shown) formed as another side channel located on the opposite side of the incidence face. Thus, the optical-based subsystem 201 may include a detection channel including the collector 207, the element 208, and the detector 209, located in the center of the incidence face, and configured to collect and detect light at a scattering angle normal or near normal to the sample 202 surface. Thus, this detection channel may be generally referred to as the "top" channel, and the optical-based subsystem 201 may also include two or more side channels configured as described above. Thus, the optical-based subsystem 201 may include at least three channels (i.e., one top channel and two side channels), each of the at least three channels having its own concentrator, each of which is configured to collect light at a different scattering angle than each of the other concentrators.
[0057] As further described above, each of the detection channels included in the optical subsystem 201 may be configured to detect scattered light. Thus, the optical-based subsystem 201 shown in FIG. 5 may be configured for dark-field (DF) output generation for the sample 202. However, the optical-based subsystem 201 may additionally or alternatively include a detection channel configured for bright-field (BF) output generation for the sample 202. In other words, the optical-based subsystem 201 may include at least one detection channel configured to detect light specularly reflected from the sample 202. Thus, the optical-based subsystem 201 described herein may be configured for DF only, BF only, or both DF and BF imaging. Although each of the collectors is shown in FIG. 5 as a single refractive optical element, it should be understood that each of the collectors may include one or more refractive optical dies and / or one or more reflective optical elements.
[0058] The one or more detection channels may include any suitable detectors known in the art. For example, the detectors may include photomultiplier tubes (PMTs), charge-coupled devices (CCDs), time-delay integration (TDI) cameras, and any other suitable detectors known in the art. The detectors may also include non-imaging or imaging detectors. In this manner, when the detectors are non-imaging detectors, each of the detectors may be configured to detect a particular characteristic of the scattered light, such as intensity, but may not be configured to detect such a characteristic as a function of position in the imaging plane. Thus, the output generated by each of the detectors included in each of the detection channels of the optical-based subsystem may be a signal or data, but is not an image signal or image data. In such a case, a processor, such as the processor 214, may be configured to generate an image of the sample 202 from the non-imaging output of the detectors. However, in other cases, the detectors may be configured as imaging detectors, configured to generate imaging signals or image data. Thus, the optical-based subsystem may be configured to generate an optical image or other optical-based output described herein in several ways.
[0059] It should be noted that FIG. 5 is provided herein to diagrammatically illustrate configurations of optical-based subsystem 201 that may be included in or generate optical-based output used by system embodiments described herein. The configurations of optical-based subsystem 201 described herein may be modified to optimize performance of optical-based subsystem 201, as is typically done when designing commercial power acquisition systems. In addition, the systems described herein may be implemented using existing systems (e.g., by adding functionality described herein to an existing system). For some such systems, the methods described herein may be provided as optional functionality of the system (e.g., in addition to other functions of the system). Alternatively, the systems described herein may be designed as entirely new systems.
[0060] The processor 214 may be coupled to the components of the system 200 in any suitable manner (e.g., via one or more transmission media, which may include wired and / or wireless transmission media) such that the processor 214 can receive the output. The processor 214 may be configured to perform several functions using the output. The system 200 may receive instructions or other information from the processor 214. The processor 214 and / or the electronic data storage unit 215 may optionally be in electronic communication with a wafer inspection tool, a wafer metrology tool, or a wafer review tool (not shown) to receive additional information or send instructions. For example, the processor 214 and / or the electronic data storage unit 215 may be in electronic communication with a scanning electron microscope.
[0061] The processor 214, other systems, or other subsystems described herein may be part of a variety of systems, including a personal computer system, an image computer, a mainframe computer system, a workstation, a network appliance, an Internet appliance, or other devices. The subsystems or systems may include any suitable processor known in the art, such as a parallel processor. In addition, the subsystems or systems may include platforms with high speed processing and software, either as stand-alone tools or as network tools.
[0062] The processor 214 and electronic data storage unit 215 may be located within or part of the system 200 or another device. In an example, the processor 214 and electronic data storage unit 215 may be part of a stand-alone control unit or may be a centralized quality control unit. Multiple processors 214 or electronic data storage units 215 may be used.
[0063] The processor 214 may in fact be implemented by any combination of hardware, software, and firmware. Also, its functions as described herein may be performed by one unit or may be divided among different components, each of which may in turn be implemented by any combination of hardware, software, and firmware. Program codes or instructions for the processor 214 to implement the various methods and functions may be stored in a readable storage medium, such as a memory in the electronic data storage unit 215 or other memory.
[0064] Where system 200 includes multiple processors 214, the different subsystems may be coupled to one another such that images, data, information, instructions, etc. may be transmitted between the subsystems. For example, one subsystem may be coupled to additional subsystems by any suitable transmission medium, which may include any suitable wired and / or wireless transmission medium known in the art. Two or more of such subsystems may also be effectively coupled by a shared computer-readable storage medium (not shown).
[0065] The processor 214 may be configured to perform a number of functions using the output of the system 200 or other outputs. For example, the processor 214 may be configured to send the output to an electronic data storage unit 215 or another storage medium. The processor 214 may be configured according to any of the embodiments described herein. The processor 214 may also be configured to perform other functions or additional steps using the output of the system 200 or using images or data from other sources.
[0066] The various steps, functions, and / or operations of the system 200 and methods disclosed herein may be performed by one or more of the following: electronic circuits, logic gates, multiplexers, programmable logic devices, ASICs, analog or digital controls / switches, microcontrollers, or computing systems. Program instructions implementing methods such as those described herein may be transmitted through or stored on a carrier medium. The carrier medium may include a storage medium such as a read-only memory, a random access memory, a magnetic or optical disk, a non-volatile memory, a solid-state memory, a magnetic tape, etc. The carrier medium may include a transmission medium such as a wire, a cable, or a wireless transmission link. For example, the various steps described throughout this disclosure may be performed by a single processor 214 or, alternatively, by multiple processors 214. Furthermore, different subsystems of the system 200 may include one or more computing or logic systems. Thus, the above description should not be interpreted as a limitation on the present disclosure, but merely as an example.
[0067] In an example, the processor 214 is in communication with the system 200. The processor 214 is configured to execute an embodiment of the method 100. The processor 214 can extract a setup image frame during recipe setup and determine a first image contrast of the setup image frame. The processor 214 can also extract a runtime setup image frame during runtime at the same position as the setup image frame, align the setup image frame with the runtime image frame, and determine a second image contrast of the runtime image frame. The processor 214 can then determine a contrast ratio between the first image contrast and the second image contrast.
[0068] Although disclosed as using the same system 200, the setup image frames may be extracted by a different system than the runtime setup image frames.
[0069] Further embodiments relate to a non-transitory computer readable medium storing program instructions executable on a controller to perform a computer-implemented method for classifying a wafer map as disclosed herein. In particular, as shown in FIG. 5, an electronic data storage unit 215 or other storage medium may include a non-transitory computer readable medium including program instructions executable on a processor 214. The computer-implemented method may include any step of any method described herein, including method 100.
[0070] The program instructions may be implemented in any of a variety of ways, including procedure-based techniques, component-based techniques, and / or object-oriented techniques, among others. For example, the program instructions may be implemented using ActiveX controls, C objects, JavaBeans, Microsoft Foundation Classes (MFC), Streaming S1MD Extensions (SSE), or other technologies or methodologies, as desired.
[0071] Although system 200 uses light, method 100 can be performed using different semiconductor inspection systems. For example, method 100 can be performed using results from a system that uses an electron beam or an ion beam, such as a scanning electron microscope. Thus, the system can have an electron beam source or an ion beam source as the energy source instead of a light source.
[0072] Although the present disclosure has been described with respect to one or more particular embodiments, it will be understood that other embodiments of the present disclosure may be made without departing from the scope of the present disclosure, and therefore the present disclosure is deemed to be limited only by the appended claims and their reasonable interpretation.
Claims
1. 1. A method comprising: extracting, with a processor, a setup image frame during setup; determining, with the processor, a first image contrast of the setup image frame; extracting, with the processor, a run-time setup image frame during run-time at the same location as the setup image frame; aligning, with the processor, the setup image frame and the runtime setup image frame; determining, with the processor, a second image contrast for the runtime image frames; determining, with the processor, a contrast ratio between the first image contrast and the second image contrast; Including, The first image contrast and the second image contrast are determined using the following formula: [0010] where I is the gray level intensity and Δ is the Laplacian operator. method.
2. The method of claim 1 , further comprising adjusting a position of a stage holding a semiconductor wafer based on the contrast ratio.
3. 2. The method of claim 1, further comprising: using the processor to normalize the contrast ratio by dividing the first image contrast by a maximum contrast of the setup image frame and dividing the second image contrast by a maximum contrast of the runtime setup image frame.
4. The method of claim 1 , further comprising using the processor to determine focus variations caused by a position of a stage configured to hold a semiconductor wafer using the contrast ratio.
5. The method of claim 1 , further comprising using the processor to adjust the runtime setup image frame and the setup image frame based on the contrast ratio.
6. determining, using the processor, a first offset between setup and runtime for a plurality of inspection frames; determining, using the processor, a second offset between design and run-time of a plurality of inspection frames; determining, using the processor, a location of an area for one or more inspections based on an offset correction including the first offset and the second offset; The method of claim 1 further comprising:
7. The method of claim 1 , further comprising using the processor to determine an offset using a sum of squared differences between the setup image frame and the runtime setup image frame.
8. A computer readable medium storing a program configured to instruct a processor to perform the method of claim 1.
9. 1. A system comprising: a stage configured to hold a semiconductor wafer; a light source configured to direct a beam of light onto the semiconductor wafer on the stage; a detector configured to receive the beam of light reflected from the semiconductor wafer on the stage; a processor in electronic communication with the detector, Extract setup image frames during setup, determining a first image contrast of the setup image frame; extracting a runtime setup image frame during runtime at the same location as said setup image frame; aligning the setup image frame with the runtime setup image frame; determining a second image contrast for the runtime setup image frame; determining a contrast ratio between the first image contrast and the second image contrast; wherein the first image contrast and the second image contrast are determined using the following formula: [0025] where I is the gray level intensity and Δ is the Laplacian operator. A processor; Including, system.
10. The system of claim 9 , wherein the processor is further configured to adjust a position of the stage based on the contrast ratio.
11. 10. The system of claim 9, wherein the processor is further configured to normalize the contrast ratio by dividing the first image contrast by a maximum contrast of the setup image frame and dividing the second image contrast by a maximum contrast of the runtime setup image frame.
12. The system of claim 9 , wherein the processor is further configured to use the contrast ratio to determine focus variation caused by a position of the stage.
13. The system of claim 9 , wherein the processor is further configured to adjust the runtime setup image frames and the setup image frames based on the contrast ratio.
14. The processor, determining a first offset between setup and runtime of a plurality of inspection frames; determining a second offset between the design and run-time of the plurality of inspection frames; determining a location of an area for one or more inspections based on an offset correction including the first offset and the second offset; The system of claim 9 , further configured to:
15. 10. The system of claim 9, wherein the processor is further configured to determine the offset using a sum of squared differences between the setup image frame and the runtime setup image frame.
Citation Information
Patent Citations
Plate deviation detector and printer therewith
JP2000127353A
Method and apparatus for inspecting solder paste deposits on substrates
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Photomask, focus monitor method, exposure monitor method and production method of semiconductor device
JP2003287870A
Real-time autofocus algorithm
JP2020535473A
Targeted Recall of Semiconductor Devices Based on Manufacturing Data
US20190295908A1