Display device

Abstract

To reduce the diffusion of the reducing agent into an oxide semiconductor.SOLUTION: A display device includes: a thin film transistor 26 using an oxide semiconductor; a display element 46 controlled by the thin film transistor 26; and at least one trap layer 48 made of a material with dangling bonds capable of trapping hydrogen.SELECTED DRAWING: Figure 4

Description

[Technical field]

[0001] The present invention relates to a display device. [Background technology]

[0002] Thin film transistors (TFTs) using low-temperature polysilicon have high driving capability and high carrier mobility, but they have a high off-current and it is difficult to suppress leakage current. Therefore, TFTs using oxide semiconductors have been developed (Patent Documents 1 and 2). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2016-100521 A [Patent Document 2] JP 2012-104639 A [Patent Document 3] JP 2010-165922 A Summary of the Invention [Problem to be solved by the invention]

[0004] In oxide semiconductors, the diffusion of reducing agents such as hydrogen causes deoxidation, which changes the voltage-current characteristics. As a result, the characteristics become non-uniform beyond the range of specifications, and the yield decreases. Patent Document 3 discloses a protective film, but silicon oxide film and silicon nitride film are insufficient in preventing the diffusion of reducing agents.

[0005] An object of the present invention is to reduce the diffusion of a reducing agent into an oxide semiconductor. [Means for solving the problem]

[0006] The display device according to the present invention is characterized by comprising a thin-film transistor using an oxide semiconductor, a display element controlled by the thin-film transistor, and at least one trap layer made of a material having dangling bonds capable of trapping hydrogen.

[0007] According to the present invention, the trap layer can reduce the diffusion of a reducing agent into an oxide semiconductor. [Brief description of the drawings]

[0008] [Figure 1] 1 is a plan view of a display device according to an embodiment. [Diagram 2] FIG. 2 is a schematic diagram showing a state in which the display device is used. [Diagram 3] 3 is a schematic cross-sectional view of the display device shown in FIG. 2 taken along line III-III. [Figure 4] 4 is an enlarged cross-sectional view taken along line IV-IV of the display device shown in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. However, the present invention can be embodied in various forms without departing from the spirit of the present invention, and the present invention should not be construed as being limited to the description of the embodiment exemplified below.

[0010] In order to clarify the description, the drawings may show the width, thickness, shape, etc. of each part in a schematic manner compared to the actual embodiment, but these are merely examples and do not limit the interpretation of the present invention. In this specification and each drawing, elements having the same functions as those explained in the previous drawings may be given the same reference numerals, and duplicate explanations may be omitted.

[0011] Furthermore, in the detailed description of the present invention, when defining the positional relationship between a certain component and another component, "above" and "below" do not only mean a component being located directly above or below another component, but also include a component being located between the other components, unless otherwise specified.

[0012] Fig. 1 is a plan view of a display device according to an embodiment. In practice, the display device is folded for use. Therefore, Fig. 1 is a development view of the display device before it is folded. Fig. 2 is a schematic view showing the display device in use.

[0013] The display device is, for example, an organic electroluminescence display device. The display device has a display area DA in which an image is displayed. In the display area DA, a full-color pixel is formed by combining unit pixels (sub-pixels) of multiple colors, for example, red, green, and blue, and a full-color image is displayed. The display device includes a display 100.

[0014] A first flexible printed circuit board FP1 is connected to the display 100 in a peripheral area PA. An integrated circuit chip CP for driving elements for displaying an image is mounted on the first flexible printed circuit board FP1. Furthermore, a second flexible printed circuit board FP2 is connected to the first flexible printed circuit board FP1.

[0015] Fig. 3 is a schematic diagram of a cross section taken along line III-III of the display device shown in Fig. 2. A spacer 102 is disposed on the inside of the bend to prevent the display 100 from bending too much. The display 100 is flexible and is bent outside the display area DA (peripheral area PA).

[0016] 4 is an enlarged cross-sectional view of the display device shown in FIG. 1 taken along line IV-IV. An undercoat 12 serving as a barrier against impurities is formed on the first substrate 10, and a semiconductor layer 14 is formed thereon. A source electrode 16 and a drain electrode 18 are electrically connected to the semiconductor layer 14, and a first inorganic film 20 (e.g., a gate insulating film) is formed covering the semiconductor layer 14. A gate electrode 22 is formed on the first inorganic film 20, and a second inorganic film 24 (e.g., an interlayer insulating film) is formed covering the gate electrode 22. The source electrode 16 and the drain electrode 18 penetrate the first inorganic film 20 and the second inorganic film 24. The semiconductor layer 14, the source electrode 16, the drain electrode 18, and the gate electrode 22 form a thin-film transistor 26. A third inorganic film 28 (e.g., a passivation film) is provided so as to cover the thin-film transistor 26.

[0017] The thin film transistor 26 uses an oxide semiconductor for the semiconductor layer 14. The oxide semiconductor is, for example, indium gallium zinc oxygen (IGZO). Such a thin film transistor 26 has a low off-current characteristic. The thin film transistor 26 is covered with a first inorganic film 20, a second inorganic film 24, and a third inorganic film 28.

[0018] A resin layer 30 (e.g., a planarizing layer) is provided on the third inorganic film 28. A plurality of pixel electrodes 32 (e.g., anodes) configured to correspond to the plurality of sub-pixels respectively are provided on the resin layer 30. The resin layer 30 is formed so that at least the surface on which the pixel electrodes 32 are provided is flat. The pixel electrodes 32 are electrically connected to one of the source electrode 16 and the drain electrode 18 on the semiconductor layer 14 by a contact hole 34 penetrating the resin layer 30 and the third inorganic film 28. The resin layer 30 covers the thin film transistor 26.

[0019] An insulating layer 36 is formed on the resin layer 30 and the pixel electrodes 32. The insulating layer 36 is formed so as to cover the ends (periphery) of the pixel electrodes 32 and expose a part (for example, a central part) of the pixel electrodes 32. The pixel electrodes 32 have an exposed area from the insulating layer 36. A bank surrounding a part of the pixel electrodes 32 is formed by the insulating layer 36. The pixel electrodes 32 are provided with a hole injection transport layer 38, which is a carrier injection transport layer. The hole injection transport layer 38 is formed so as to be continuously placed on the plurality of pixel electrodes 32.

[0020] A plurality of light-emitting layers 40 corresponding to the pixel electrodes 32 are disposed above the pixel electrodes 32 (above the hole injection transport layer 38). The light-emitting layers 40 are provided with an electron injection transport layer 42, which is another carrier injection transport layer. The electron injection transport layer 42 is formed so as to be continuously placed on the light-emitting layers 40 (above the pixel electrodes 32). A common electrode 44 (e.g., a cathode) is disposed above the light-emitting layers 40 (above the electron injection transport layer 42). The common electrode 44 is formed so as to be placed above the insulating layer 36, which serves as a bank. The light-emitting layer 40 is sandwiched between the pixel electrodes 32 and the common electrode 44, and emits light with its luminance controlled by the current flowing between them. The display device has a display element 46 controlled by a thin film transistor 26. The display element 46 includes the pixel electrodes 32 and the light-emitting layers 40.

[0021] The display device has at least one trapping layer 48 made of a material having dangling bonds capable of trapping hydrogen, such as amorphous silicon, which may be doped with any of boron, phosphorus, and carbon.

[0022] A first trapping layer 48A is provided on the second inorganic film 24. The first trapping layer 48A is interposed between the laminated second inorganic film 24 and the third inorganic layer. A second trapping layer 48B is provided on the resin layer 30. The second trapping layer 48B is not in contact with the display element 46 (e.g., the pixel electrode 32). A third trapping layer 48C is provided on the insulating layer 36. The third trapping layer 48C is not in contact with the electroluminescent layer (at least the light-emitting layer 40). According to this embodiment, the trapping layer 48 can reduce diffusion of a reducing agent into the oxide semiconductor.

[0023] The conditions for forming first trapping layer 48A to third trapping layer 48C were as follows: a G6 size glass substrate was used as the film formation target, a solid source Si target was used, the input power was 10 to 15 kW, and the pressure was 3 Pa. Boron was selected as the impurity, and was added to the film by simultaneous sputtering.

[0024] The first trapping layer 48A provided below the resin layer 30 and the second trapping layer 48B provided below the insulating layer 36 preferably have a thickness of about 50 nm to 100 nm, but even if they are formed thicker than that, there is no problem because they are covered and flattened by the resin layer 30 and the insulating layer 36. On the other hand, the third trapping layer 48C provided on the insulating layer 36 is preferably formed thinner than the first trapping layer 48A and the second trapping layer 48B, to an extent that it is covered to some extent by the hole injection transport layer 38 and the electron injection transport layer 42, specifically about 30 nm to 50 nm, so that the common electrode 44 to be formed later is not cut off by a step generated at the end of the third trapping layer 48C.

[0025] The first to third trapping layers 48A to 48C thus formed can trap hydrogen desorbed from nearby layers, and can suitably suppress hydrogen penetration into the channel region of the oxide semiconductor.

[0026] The first trapping layer 48A to the third trapping layer 48C are patterned and formed in an island shape so as not to short-circuit with other wiring, electrodes, etc. The hydrogen absorption effect is high, and the hydrogen absorption effect is 1×10 19 ~1×1020 / cm 3 However, the hydrogen content in first trapping layer 48A to third trapping layer 48C is 1×10 22 / cm 3 If the thickness exceeds this value, the film may become embrittled, so it is preferable that the pattern area is large so as to ensure a certain amount of volume for the trap layer itself in conjunction with the film thickness described above.

[0027] The display device has a sealing film 50 that seals a display element 46. The display element 46 is sealed by being covered with the sealing film 50, and is thus blocked from moisture. At least one trap layer 48 is located between the sealing film 50 and the thin film transistor 26. The sealing film 50 includes at least one of an organic film 52 and a silicon nitride film 54. A second substrate 56 is attached to the sealing film 50 via an adhesive layer (not shown).

[0028] The present invention is not limited to the above-described embodiment, and various modifications are possible. For example, the configurations described in the embodiments can be replaced with substantially the same configurations, configurations that provide the same effects, or configurations that can achieve the same purpose. [Explanation of symbols]

[0029] 10 first substrate, 12 undercoat, 14 semiconductor layer, 16 source electrode, 18 drain electrode, 20 first inorganic film, 22 gate electrode, 24 second inorganic film, 26 thin film transistor, 28 third inorganic film, 30 resin layer, 32 pixel electrode, 34 contact hole, 36 insulating layer, 38 hole injection transport layer, 40 light emitting layer, 42 electron injection transport layer, 44 common electrode, 46 display element, 48 trap layer, 48A first trap layer, 48B second trap layer, 48C third trap layer, 50 sealing film, 52 organic film, 54 silicon nitride film, 56 second substrate, 100 display, 102 spacer, CP integrated circuit chip, DA display area, FP1 first flexible printed circuit board, FP2 second flexible printed circuit board, PA peripheral area.

Claims

1. A thin film transistor using an oxide semiconductor; A display element controlled by the thin film transistor; At least one trap layer made of a material having dangling bonds capable of trapping hydrogen; having The at least one trap layer has a hydrogen absorption capacity of 1×10 ２２ / cm ３ A display device characterized in that it is configured so as not to exceed.

2. 2. The display device according to claim 1, A display device, wherein the material is amorphous silicon.

3. 3. The display device according to claim 2, The display device is characterized in that the amorphous silicon is doped with any one of boron, phosphorus and carbon.

4. The display device according to any one of claims 1 to 3, The display device further includes a sealing film that seals the display element. The display device, wherein the at least one trap layer is located between the sealing film and the thin film transistor.

5. 5. The display device according to claim 4, 13. The display device, wherein the sealing film includes at least one of an organic film and a silicon nitride film.

6. The display device according to any one of claims 1 to 5, Further comprising an inorganic film covering the thin film transistor; The at least one trapping layer includes a first trapping layer on the inorganic film.

7. 7. The display device according to claim 6, The inorganic film is one of a pair of laminated inorganic films, The display device, wherein the first trapping layer is interposed between the pair of inorganic films.

8. The display device according to any one of claims 1 to 7, Further comprising a resin layer covering the thin film transistor; The at least one trapping layer includes a second trapping layer on the resin layer.

9. 9. The display device according to claim 8, The display device according to claim 1, wherein the second trapping layer is not in contact with the display element.

10. The display device according to any one of claims 1 to 7, The display element further includes an insulating layer that covers an end portion of a pixel electrode included in the display element, 2. A display device, wherein the at least one trapping layer includes a third trapping layer on the insulating layer.

11. 10. The display device according to claim 8, The display element further includes an insulating layer that covers an end portion of a pixel electrode included in the display element, 2. A display device, wherein the at least one trapping layer includes a third trapping layer on the insulating layer.

12. 12. The display device according to claim 10, The display device according to claim 1, wherein the third trapping layer is not in contact with a light-emitting layer included in the display element.

13. A thin film transistor using an oxide semiconductor; A display element including a pixel electrode controlled by the thin film transistor; an inorganic film covering the thin film transistor; an insulating layer covering an end portion of the pixel electrode; At least one trap layer made of a material having dangling bonds capable of trapping hydrogen; having the at least one trap layer includes a first trap layer on the inorganic film, and a third trap layer on the insulating layer, the third trap layer having a smaller thickness than the first trap layer; A display device, wherein the at least one trap layer is configured so that the amount of hydrogen absorbed does not exceed 1×10 22 / cm 3 .

14. A thin film transistor using an oxide semiconductor; A display element including a pixel electrode controlled by the thin film transistor; an inorganic film covering the thin film transistor; a resin layer covering the thin film transistor; an insulating layer covering an end portion of the pixel electrode; At least one trap layer made of a material having dangling bonds capable of trapping hydrogen; having the at least one trap layer includes a first trap layer on the inorganic film, a second trap layer on the resin layer, and a third trap layer on the insulating layer, the third trap layer having a smaller thickness than both the first trap layer and the second trap layer, A display device, wherein the at least one trap layer is configured so that the amount of hydrogen absorbed does not exceed 1×10 22 / cm 3 .

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