Power supply device and image forming apparatus

Abstract

To provide a power supply device and an image-forming device for improving efficiency of the power supply device using a switching element while suppressing generation of surge voltage.SOLUTION: A power supply device includes: a transformer 206; a diode bridge 203; a smoothing capacitor 207; an FET 208; a series circuit in which a clamp capacitor 211 and a diode 212 are connected in series and connected in parallel with a primary winding 206a; and a series circuit in which a diode 213 and an auxiliary winding 206d are connected in series and connected between a source terminal of the FET 208 and a connection point where the clamp capacitor 211 and the diode 212 are connected. The transformer 206 is configured so that the number of windings of the auxiliary winding 206d is less than the number of windings of the primary winding 206a, and the product of the ratio of the number of windings of the auxiliary winding 206d to the number of windings of a secondary winding 206c and the output voltage is equal to or lower than the voltage of the smoothing capacitor 207.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to a power supply device and an image forming apparatus equipped with the power supply device. [Background technology]

[0002] In a switching power supply using a switching element, a surge voltage occurs when the switching element is turned off due to the leakage inductance of the transformer, the output capacitance of the switching element itself, and the peak current immediately before the switching element is turned off. Switching power supplies that suppress this surge voltage and improve efficiency have been proposed. For example, Patent Document 1 discloses a technology for suppressing the surge voltage of a switching power supply with little circuit loss. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Special Publication No. 2004-514398 Summary of the Invention [Problem to be solved by the invention]

[0004] In the conventional technology, there is a problem that the suppression of the surge voltage of the switching element and the improvement of efficiency cannot be realized depending on the ratio of the number of turns of the primary winding to the number of turns of the clamp winding (hereinafter referred to as the turns ratio) and the turns ratio of the secondary winding to the clamp winding. Moreover, in the conventional example, the turns ratio of the primary winding to the clamp winding and the turns ratio of the secondary winding to the clamp winding are not considered.

[0005] The present invention has been made under these circumstances, and has an object to improve the efficiency of a power supply device using switching elements while suppressing the occurrence of surge voltage. [Means for solving the problem]

[0006] In order to solve the above-mentioned problems, the present invention has the following configuration. (1 a transformer having a first primary winding and a second primary winding, a secondary winding, and an auxiliary winding, the primary side and the secondary side being insulated from each other; a rectifier circuit having a first output terminal and a second output terminal, and rectifying an AC voltage; a smoothing capacitor having one end connected to the other end of the first primary winding and the other end connected to the second output terminal; a switching element having one end connected to the other end of the second primary winding and the other end connected to the second output terminal, the switching element being switched between an on state or an off state; a first series circuit in which a capacitor and a first rectifier element are connected in series, the first series circuit being connected between the other end of the first primary winding and the other end of the second primary winding, and a second rectifier element and the auxiliary winding being connected in series; and a third series circuit in which an inductor and a third rectifying element are connected in series, the third series circuit being connected between the first output terminal and a second connection point to which one end of the first primary winding and one end of the second primary winding are connected, wherein the transformer is configured such that the number of turns of the auxiliary winding is less than the total number of turns of the first primary winding and the number of turns of the second primary winding, and the product of the output voltage and the ratio of the number of turns of the auxiliary winding to the number of turns of the secondary winding is equal to or less than the voltage of the smoothing capacitor. ( 2 ) an image forming means for forming an image on a sheet, and (1) supplying power to the image forming means ) An image forming apparatus comprising the power supply device according to the present invention. Effect of the Invention

[0007] According to the present invention, it is possible to improve the efficiency of a power supply device using a switching element while suppressing the occurrence of surge voltage. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a cross-sectional view showing a configuration of an image forming apparatus according to first to third embodiments. [Diagram 2] A circuit diagram showing the circuit configuration of a switching power supply according to a first embodiment of the present invention. [Diagram 3] FIG. 1 is a diagram for explaining a current route in the first embodiment. [Figure 4] FIG. 1 is a diagram for explaining operation waveforms in the first embodiment. [Diagram 5] A circuit diagram showing the circuit configuration of a switching power supply according to a second embodiment of the present invention. [Figure 6] FIG. 13 is a diagram illustrating an input current waveform and an input voltage waveform in the second embodiment; and FIG. 14 is a diagram illustrating a current route. [Figure 7] A circuit diagram showing the circuit configuration of a switching power supply according to a third embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. EXAMPLES

[0010] [Configuration of image forming device] FIG. 1 is a cross-sectional view showing the configuration of a laser beam printer as an example of an image forming apparatus. The laser beam printer 100 (hereinafter referred to as the printer 100) includes a photosensitive drum 101 on which an electrostatic latent image is formed, a charging unit 102 that uniformly charges the photosensitive drum 101, and a developing unit 103 that develops the electrostatic latent image formed on the photosensitive drum 101 to form a toner image. The printer 100 also includes an exposure device 110 that irradiates the photosensitive drum 101 with laser light to form an electrostatic latent image on the surface of the photosensitive drum 101. In the printer 100, the toner image formed on the photosensitive drum 101 is transferred by a transfer unit 105 to a sheet P as a recording material fed from a cassette 104. The sheet P on which the unfixed toner image has been transferred is transported to a fixing unit 106, where the toner image is fixed to the sheet P, and the sheet on which the toner image has been fixed is discharged to a tray 107. The photosensitive drum 101, the charging unit 102, the developing unit 103, and the transfer unit 105 constitute an image forming unit (image forming means). The printer 100 also includes a low-voltage power supply device 108, which supplies power to a control unit (not shown) that controls a driving unit such as a motor, an image forming operation by the image forming unit, and a conveying operation of the sheet P.

[0011] [Configuration of switching power supply unit] FIG. 2 is a circuit diagram showing a circuit configuration of a switching power supply 200, which is a power supply device of the first embodiment and which is provided in the printer 100 of FIG. 1 as the low-voltage power supply device 108. In FIG. 2, when a plug 201 is connected to an outlet, an AC voltage is input from an AC power supply (not shown) to the switching power supply 200. The input AC voltage is input to a diode bridge 203, which is a rectifier circuit, via a filter circuit 202. The diode bridge 203 has input terminals 203a and 203b, and output terminals 203c (first output terminal) and 203d (second output terminal). The diode bridge 203 full-wave rectifies the AC voltage input from the input terminals 203a and 203b, and outputs the full-wave rectified AC voltage to the output terminals 203c and 203d. The output terminal 203c of the diode bridge 203 is connected to one end of a smoothing capacitor 207, and the terminal 203d is connected to the other end of the smoothing capacitor 207. The full-wave rectified AC voltage is smoothed by smoothing capacitor 207 to become a substantially constant DC voltage.

[0012] The transformer 206 is an insulating transformer for converting energy on the primary side to the secondary side, and has a primary winding 206a, a secondary winding 206c, and an auxiliary winding 206d. Since Fig. 2 shows an example of application of a flyback circuit, the secondary winding 206c has a winding direction opposite to that of the primary winding 206a (see the black circle in Fig. 2). Similarly to the secondary winding 206c, the auxiliary winding 206d also has a winding direction opposite to that of the primary winding 206a (see the black circle in Fig. 2).

[0013] One end of the smoothing capacitor 207 is connected to one end of the primary winding 206a of the transformer 206, and the other end of the primary winding 206a is connected to a drain terminal of a field effect transistor (hereinafter referred to as FET) 208, which is a switching element. A source terminal of the FET 208 is connected to the other end of the smoothing capacitor 207 and a terminal 203d on the output side of the diode bridge 203. A gate terminal of the FET 208 is connected to a control IC (not shown) that controls the switching operation of the FET 208.

[0014] Moreover, one end of the secondary winding 206c of the transformer 206 is connected to the anode terminal of the diode 209, and the cathode terminal is connected to one end of a smoothing capacitor 210. One end of the smoothing capacitor 210 is connected to the cathode terminal of the diode 209, and the other end is connected to the other end of the secondary winding 206c of the transformer 206. The charging voltage of the smoothing capacitor 210 is output as the output voltage Vo of the switching power supply 200 to an external load connected to the switching power supply 200.

[0015] In FIG. 2, a low-level signal is input from a control IC (not shown) to the gate terminal of the FET 208, and a large surge voltage is generated at the drain terminal of the FET 208 at the timing when the FET 208 is turned off. A circuit for suppressing the surge voltage is a snubber circuit 214 surrounded by a dashed line. The snubber circuit 214 is composed of an auxiliary winding 206d of the transformer 206, two rectifying elements, a diode 212 (first rectifying element) and a diode 213 (second rectifying element), and a clamp capacitor 211. Here, a first series circuit in which the clamp capacitor 211 and the diode 212 are connected in series is connected in parallel with the primary winding 206a. A second series circuit in which the diode 213 and the auxiliary winding 206d are connected in series is connected between the connection point where the clamp capacitor 211 and the diode 212 are connected and the other end of the FET 208. That is, the snubber circuit 214 has a first series circuit and a second series circuit.

[0016] In the snubber circuit 214, one end of the clamp capacitor 211 is connected to the other end of the primary winding 206a of the transformer 206 and the drain terminal of the FET 208, and the other end of the clamp capacitor 211 is connected to the anode terminal of the diode 212. The cathode terminal of the diode 212 is connected to one end of the smoothing capacitor 207 and one end of the primary winding 206a of the transformer 206. The anode terminal of the diode 213 is connected to the source terminal of the FET 208, the other end of the smoothing capacitor 207, and the output side terminal 203d of the diode bridge 203. On the other hand, the cathode terminal of the diode 213 is connected to one end of the auxiliary winding 206d of the transformer 206. The other end of the auxiliary winding 206d of the transformer 206 is connected to a connection point where the clamp capacitor 211 and the anode terminal of the diode 212 are connected.

[0017] When a high-level signal is input from a control IC (not shown) to the gate terminal of FET 208, the drain terminal and source terminal of FET 208 are conductive, and FET 208 is in a conductive state (ON state). As a result, a current from smoothing capacitor 207 flows to primary winding 206a, and energy according to the conductive period of FET 208 is stored in transformer 206. During the conductive period of FET 208, a voltage is generated in secondary winding 206c of transformer 206, with the start of the winding being positive and the end of the winding being negative. However, since the voltage of the anode terminal of diode 209 on the secondary side of transformer 206 is lower than the voltage of the cathode terminal, diode 209 remains in a non-conductive state, and no current flows from secondary winding 206c through diode 209.

[0018] On the other hand, when a low-level signal is input from a control IC (not shown) to the gate terminal of the FET 208, the drain terminal and the source terminal of the FET 208 are opened, and the FET 208 is in a non-conductive state (off state). Then, a voltage is generated in the secondary winding 206c of the transformer 206, with the start of the winding being negative and the end of the winding being positive. Since the voltage of the anode terminal of the diode 209 on the secondary side of the transformer 206 is higher than the voltage of the cathode terminal, the diode 209 is in a conductive state, and a current flows from the secondary winding 206c of the transformer 206 through the diode 209 on the secondary side. In this way, a pulse-like voltage is generated in the secondary winding 206c in conjunction with the switching operation of the FET 208. The voltage generated in the secondary winding 206c of the transformer 206 is rectified by the diode 209 and smoothed by the smoothing capacitor 210 to generate an output voltage Vo, and the output voltage Vo is controlled to a constant voltage by the switching operation of the FET 208.

[0019] [Snubber circuit operation] Next, the operation of the snubber circuit 214 will be described based on the state explanatory diagram shown in FIG. 3. FIG. 3 is a circuit diagram in which the peripheral circuit of the snubber circuit 214 in FIG. 2 is extracted in order to explain the operation of the snubber circuit 214. FIG. 3(a) is a diagram for explaining the circuit operation immediately after the FET 208 is turned off (immediately after switching from the on state to the off state), and FIG. 3(b) is a diagram for explaining the circuit operation immediately after the FET 208 is turned on (immediately after switching from the off state to the on state). Note that the snubber circuit 214 of the first embodiment is characterized in the circuit operation immediately after the FET 208 is turned off and immediately after the FET 208 is turned on. The circuit operation during periods other than immediately after the FET 208 is turned off and immediately after the FET 208 is turned on is the same as the circuit operation of a general switching power supply not having the above-mentioned snubber circuit 214, and therefore will not be described here.

[0020] (Circuit operation immediately after FET 208 is turned off) First, referring to FIG. 3(a), the circuit operation immediately after the FET 208 is turned off will be described. When a low-level signal is input from a control IC (not shown) to the gate terminal of the FET 208, the drain terminal and source terminal of the FET 208 are opened. Then, the current that had been flowing from the primary winding 206a to the drain terminal of the FET 208 starts to flow to the clamp capacitor 211, and the clamp capacitor 211 is charged by the current from the primary winding 206a (hereinafter referred to as the charging current). The path of the charging current to the clamp capacitor 211 (hereinafter referred to as the current route) is the route indicated by the thick arrow in FIG. 3(a), and the current flows from the primary winding 206a to the clamp capacitor 211 and then to the diode 212. The drain voltage of the FET 208 at this time has an arc-shaped voltage waveform due to the resonance operation between the capacitance of the clamp capacitor 211 and the inductance of the primary winding 206a, and the voltage rises gradually, limiting a sudden rise in the voltage.

[0021] (Circuit operation immediately after FET208 is turned on) On the other hand, when a high-level signal is input from a control IC (not shown) to the gate terminal of the FET 208, the drain terminal and the source terminal of the FET 208 are in a conductive state. This state is shown in FIG. 3(b). The thick arrow shown in FIG. 3(b) indicates the current route of the current discharged from the clamp capacitor 211 (hereinafter referred to as the discharge current). The primary winding 206a and the auxiliary winding 206d are coupled in the transformer 206. Therefore, the discharge current flowing from the clamp capacitor 211 is divided into a current flowing through the FET 208 and a current flowing backward through the primary winding 206a, depending on the turn ratio of the primary winding 206a and the auxiliary winding 206d. The current flowing backward through the primary winding 206a becomes a regenerative current to the smoothing capacitor 207, and a part of the energy (the charging voltage of the clamp capacitor 211) generated by the surge voltage when the FET 208 is turned off is regenerated in the smoothing capacitor 207 and reused. Then, as the discharge current flows, the voltage charged by the surge voltage is discharged from the clamp capacitor 211, which returns to the state it was in just before the charging current flowed, as shown in FIG. 3(a), and is reset to a state where it can again store energy due to the surge voltage.

[0022] On the other hand, the current flowing from the clamp capacitor 211 to the FET 208 flows to the auxiliary winding 206d via the diode 213, and the energy of the discharge current is stored in the auxiliary winding 206d. The energy stored in the auxiliary winding 206d is converted into a secondary current the next time the FET 208 is turned off, and the energy stored in the primary winding 206a is added to the converted secondary current. The diode 213 has a function of blocking the charge of the clamp capacitor 211 from discharging through the auxiliary winding 206d. The diode 213 and the auxiliary winding 206d are connected in the order of the diode 213, the auxiliary winding 206d in the direction in which the discharge current from the clamp capacitor 211 flows, but the same circuit operation is achieved even if the diode 213 is connected in the order of the auxiliary winding 206d, the diode 213. 2, the anode terminal of the diode 213 is connected to the source terminal of the FET 208, the cathode terminal is connected to one end of the auxiliary winding 206d, and the other end of the auxiliary winding 206d is connected to the above-mentioned connection point. However, one end of the auxiliary winding 206d may be connected to the source terminal of the FET 208, the other end may be connected to the anode terminal of the diode 213, and the cathode terminal of the diode 213 may be connected to the connection point.

[0023] (Turns ratio considerations) Next, the turns ratio between the primary winding 206a and the auxiliary winding 206d of the transformer 206, and the turns ratio between the secondary winding 206c and the auxiliary winding 206d will be considered.

[0024] (1. Turns ratio between the primary winding 206a and the auxiliary winding 206d) As described above, the discharge current of clamp capacitor 211 immediately after FET 208 is turned on is determined by the turns ratio of primary winding 206a and auxiliary winding 206d, and is divided into a current flowing backward through primary winding 206a and a current flowing through FET 208. If the number of turns of primary winding 206a is np and the current flowing is I1, and the number of turns of auxiliary winding 206d is nc and the current flowing similarly is I2, the relationship between current I1 and current I2 is given by the following equation (1). I1 = nc / np × I2 (1)

[0025] When the number of turns nc and np are the same (nc=np), the current I1 and the current I2 are the same (I1=I2). This condition indicates that even though the FET 208 is short-circuited, no current flows through the FET 208, and only the primary winding 206a flows through the FET 208. This state is not possible in terms of phenomena. Therefore, when the number of turns nc and np are the same (nc=np), no discharge current flows through the clamp capacitor 211, and the surge energy cannot be used efficiently. In addition, when the number of turns nc of the auxiliary winding 206d is greater than the number of turns np of the primary winding 206a (nc>np), the current I1 flowing through the primary winding 206a is greater than the current I2 flowing through the auxiliary winding 206d (I1>I2). This condition is also theoretically impossible. In other words, the relationship between the number of turns nc and the number of turns np is such that the number of turns np of the primary winding 206a must be greater than the number of turns nc of the auxiliary winding 206, as shown in the following equation (2). n.c. <np (2)

[0026] (2. Turns ratio between the auxiliary winding 206d and the secondary winding 206c) The intended operation of this circuit is to flow only the charging current of the clamp capacitor 211 shown in FIG. 3(a) immediately after the FET 208 is turned off. However, depending on the turn ratio of the auxiliary winding 206d and the secondary winding 206c, a current other than this current may flow. FIG. 3(c) shows this state. Since the auxiliary winding 206d and the secondary winding 206c are also coupled in the transformer 206, a voltage that is multiplied by the turn ratio of the auxiliary winding 206d and the secondary winding 206c with respect to the output voltage Vo is generated in the auxiliary winding 206d when the FET 208 is turned off. If this voltage is equal to or lower than the voltage of the smoothing capacitor 207, only the current shown in FIG. 3(a) flows, but if the voltage generated in the auxiliary winding 206d is higher than the voltage of the smoothing capacitor 207, the current shown in FIG. 3(c) is additionally generated, and the circuit does not operate as desired. For this reason, when the number of turns of the auxiliary winding 206d is nc and the number of turns of the secondary winding 206c is ns, the turns ratio nc / ns must satisfy the following equation (3) when the voltage of the smoothing capacitor 207 is Vin. Vin≧Vo×nc / ns (3)

[0027] (100V area) Below, we will explain using specific numerical values. The input voltage of the switching power supply 200 differs from country to country, and is roughly divided into 100V and 200V ranges. First, we will consider a switching power supply 200 exclusively for the 100V range. In the following explanation, when a voltage value is expressed as an AC voltage, it will be written as AC100V, for example. The voltage in the 100V range is an AC voltage of approximately AC100V to AC127V. Considering the power supply situation and instantaneous voltage drops under these conditions, it is necessary to design the input voltage of the switching power supply 200 to have a lower limit of approximately AC70V. When the input voltage is AC70V, the charging voltage of the smoothing capacitor 207 is approximately 100V.

[0028] On the other hand, the output voltage Vo generally used in the printer 100 is about 25V. In order to satisfy the formula (3), nc / ns, that is, the turn ratio between the auxiliary winding 206d and the secondary winding 206c, must be 4 or less. On the other hand, if this turn ratio is too low, adverse effects will occur. Figures 4(a) to (c) show waveforms examined when the turn ratio (np / ns=N1) between the primary winding 206a and the secondary winding 206c is changed from 4 to 6, and when the turn ratio (nc / ns=N2) between the auxiliary winding 206d and the secondary winding 206c is changed. The numbers in each figure indicate the value of the turn ratio N2. Furthermore, the upper waveform in each figure is the voltage waveform of the clamp capacitor 211, and the lower waveform is the current waveform of the FET 208.

[0029] The voltage waveform of the clamp capacitor 211 may change during the off period of the FET 208 depending on the conditions, and the surge energy charged during this period may be discharged. It is necessary to observe the voltage waveform of the clamp capacitor 211 to determine whether it is in a state where it is easy to discharge. The voltage waveform of the clamp capacitor 211 is ideally a square wave, and it is desirable that there is no ringing. When designing a dedicated power supply for the 100V range, the turns ratio N1 is generally set to about 4 to 6. If the turns ratio N1 is reduced below 4, the withstand voltage of the diode 209 must be increased, making it impossible to use a Schottky diode with a low voltage drop Vf, and the cost of the parts itself increases. Also, if the turns ratio N1 is increased above 6, the withstand voltage of the FET 208 must be increased, which also increases the cost of the parts. For this reason, the turns ratio N1 is changed from 4 to 6 in this study. In any case, as described above, the turns ratio between the number of turns nc of the secondary winding 206c and the number of turns nc of the auxiliary winding 206d must be 4 or less.

[0030] (N1=4) In FIG. 4(a), the condition where the turns ratio N1 is 4 is confirmed. Under this condition, when the turns ratio N2 is 2.5 as indicated by the black line, the voltage waveform of the clamp capacitor 211 becomes an almost rectangular wave, which is close to ideal. In addition, when the turns ratio N2 is 3 as indicated by the dark gray line and when the turns ratio N2 is 3.5 as indicated by the light gray line, slight ringing occurs, but the clamp capacitor 211 is not completely discharged, so there is no problem in operation. Whether or not the clamp capacitor 211 is completely discharged can be determined as follows. That is, it is sufficient if the voltage of the clamp capacitor 211 that is charged when the FET 208 is off is slightly higher than the voltage of the clamp capacitor 211 during the period when the drain current of the FET 208 flows during which the clamp capacitor 211 is discharged. From the above, it can be determined that when the turns ratio N1 is 4, there is no problem in operation when the turns ratio N2 is 2.5 to 3.5.

[0031] (N1=5) Next, the condition where the turn ratio N1 is 5 (FIG. 4(b)) is examined. First, when the voltage waveform of the clamp capacitor 211 is examined, the condition where the turn ratio N2 is 2.4 and 2.7 is a rectangular wave, which is ideal. However, when the current waveform of the FET 208 is examined, when the turn ratio N2 is 2.4 and 2.7, the surge current flowing when the FET 208 is on becomes excessive, which causes switching loss of the FET 208. Therefore, when the turn ratio N1 is 5, it can be determined that the condition where the turn ratio N2 is 3 or more is desirable. Note that the surge current when the FET 208 is on is determined as the upper limit of the drain current flowing just before the FET 208 is turned off. If the surge current is suppressed below the maximum value of the drain current, when the safe operating area of ​​the FET 208 is examined, it is only necessary to consider the drain current just before the FET 208 is turned off, and it is not necessary to match the current rating to the surge current. The reason why the surge current increases when the turn ratio N2 becomes smaller is also clear from formula (2). In other words, reducing the turns ratio N2 is equivalent to reducing the number of turns nc of the auxiliary winding 206d, and most of the current I2 equivalent to the discharge current of the clamp capacitor 211 flows to the FET 208 side.

[0032] (N1=6) Next, the condition where the turns ratio N1 is 6 is examined (FIG. 4(c)). Similarly, when the voltage waveform of the clamp capacitor 211 is examined, the waveform shape is ideally rectangular when the turns ratio N2 is 2.5. However, when the current waveform of the FET 208 is examined, the surge current when the FET 208 is on is excessively large and undesirable. The surge current can be reduced by reducing the surge energy stored by lowering the capacitance of the clamp capacitor 211. However, the condition where the turns ratio N2 is 2.5 can be said to be close to the limit in terms of operation. Therefore, when the turns ratio N1 is 6, it can be determined that the turns ratio N2 should be between 2.5 and 3.5, taking into consideration the usable limit state from both the voltage waveform of the clamp capacitor 211 and the current waveform of the FET 208. From the above, it can be determined that for a switching power supply exclusively for use in the 100V range, the desirable conditions are that the turns ratio N1 be between 4 and 6, and the turns ratio N2 be between 2.5 and 3.5.

[0033] (200V area) Next, the switching power supply 200 in the 200V range will be considered by checking Fig. 4(d) to (f). The voltage in the 200V range is approximately AC220V to AC240V. Considering the power supply situation and instantaneous voltage drops under these conditions, the input voltage of the switching power supply 200 must be designed with a lower limit of approximately AC160V. When the input voltage is AC160V, the charging voltage of the smoothing capacitor 207 is approximately 225V. On the other hand, the output voltage Vo generally used in the printer 100 is approximately 25V, the same as the switching power supply 200 dedicated to the 100V range. Here, in order to satisfy the formula (3), nc / ns, that is, the turns ratio N2 must be 9 or less.

[0034] Next, the limit value for the turns ratio N2 is verified. In the case of the switching power supply 200 exclusively for the 200V range, the turns ratio N1 is changed from 6 to 8. As in the case of the switching power supply 200 exclusively for the 100V range, if the turns ratio N1 is lowered below 6, the withstand voltage of the diode 209 must be increased. This makes it impossible to use a Schottky diode with a low voltage drop Vf, and increases the cost of the parts themselves. Also, if the turns ratio N1 is increased above 8, the withstand voltage of the FET 208 must be increased, which also increases the cost of the parts. For this reason, the turns ratio N1 is changed from 6 to 8 this time for verification. In any case, as mentioned above, the turns ratio of the secondary winding 206c and the auxiliary winding 206d must be 9 or less.

[0035] (N1=6) 4(d) to (f) show the results of an investigation in which the turns ratio N2 of the switching power supply 200 exclusively for the 200V range is changed from 6 to 8 while the turns ratio N1 is changed. First, the condition when the turns ratio N1 is 6 is examined. As in the aforementioned verification of the switching power supply 200 exclusively for the 100V range, a judgment is made from the voltage waveform of the clamp capacitor 211 (the upper waveform) and the current waveform of the FET 208 (the lower waveform). With the turns ratio N2 at 2 (FIG. 4(d)), the surge current when the FET 208 is on becomes excessive, and it can be determined that a turns ratio of 3 or more is desirable.

[0036] (N1=7, 8) Next, we look at the condition where the turns ratio N1 is 7 (Fig. 4(e)). Under these conditions, it can be determined that a turns ratio N2 of 3 would result in excessive surge current, and that a turns ratio of 4 or more is desirable. Furthermore, we look at the case where the turns ratio N1 is 8 (Fig. 4(f)). Here, it can be determined that there is no problem if the turns ratio N2 is 5 or more. From the above, it can be determined that in the switching power supply 200 exclusively for the 200V range, it is desirable to set the turns ratio N1 to 6 to 8 and the turns ratio N2 to 3 or more. When designing the switching power supply 200 with universal specifications compatible with AC 100V to 200V, it is necessary to support the 100V system voltage, which is the lower limit of the input voltage, so the same idea as for the switching power supply 200 exclusively for the 100V range can be applied.

[0037] As described above, the surge voltage (surge energy) generated by the FET 208 can be suppressed by storing the surge voltage (surge energy) in the clamp capacitor 211 immediately after the FET 208 is turned off. Furthermore, when the FET 208 is turned on, a part of the discharge current that discharges the voltage charged in the clamp capacitor 211 is regenerated in the smoothing capacitor 207, so that the surge voltage (surge energy) can be reused. Furthermore, a part of the discharge current can be stored as energy in the auxiliary winding 206d and converted into a secondary side current. That is, the current from the clamp capacitor 211 flows through the smoothing capacitor 207 and the auxiliary winding 206d via the primary winding 206a according to the turn ratio of the primary winding 206a and the auxiliary winding 206d.

[0038] Further, in addition to the condition that the number of turns np of the primary winding 206a is greater than the number of turns nc of the auxiliary winding 206d, the turn ratio N1 is set to 4 to 6 and the turn ratio N2 is set to 2.5 to 4 in the switching power supply 200 exclusively for the 100V range. In addition, in the switching power supply 200 exclusively for the 200V range and for universal specifications, the turn ratio N1 is set to 6 to 8 and the turn ratio N2 is set to 3 or more. This makes it possible to realize a switching power supply 200 with good power conversion efficiency while suppressing the surge voltage of the FET 208. In the first embodiment, the switching power supply device of the flyback type has been described, but it goes without saying that the same effect can be obtained in the switching power supply device of the forward type.

[0039] In the first embodiment, the transformer 206 is configured such that the number of turns of the auxiliary winding 206d is less than the number of turns of the primary winding 206a, and the value obtained by multiplying the output voltage by the ratio of the number of turns of the auxiliary winding 206d to the number of turns of the secondary winding 206c is equal to or less than the voltage of the smoothing capacitor 207.

[0040] As described above, according to the first embodiment, it is possible to improve the efficiency of a power supply device using switching elements while suppressing the occurrence of surge voltage. EXAMPLES

[0041] In the first embodiment, an example of a snubber circuit applied to a flyback type switching power supply device is described. In the second embodiment, an example of a snubber circuit applied to an isolated switching power supply capable of improving a power factor is described.

[0042] [Switching power supply configuration] FIG. 5 is a circuit diagram showing a circuit configuration of a power factor correctable switching power supply 400 to which the snubber circuit 214 of the second embodiment is applied. In the switching power supply 200 of the first embodiment, the smoothing capacitor 207 is connected to the rear stage (downstream side) of the diode bridge 203. On the other hand, the switching power supply 400 of the second embodiment has a power factor correction circuit, so that the smoothing capacitor 207 is configured downstream of the primary windings 403a, 403b of the transformer 403. Note that in the switching power supply 400, the same reference numerals are used for components having the same configuration as the flyback type switching power supply 200 of the first embodiment, and the description here is omitted. Also, in the switching power supply 400, the description of the same circuit operation as the switching power supply 200 of the first embodiment is omitted.

[0043] In the switching power supply 400 of the second embodiment, an inductor 401 on the input side and a diode 402 as a third rectifying element are added to the switching power supply 200 of the first embodiment, and the transformer 206 is changed to a transformer 403. The transformer 206 of the switching power supply 200 of the first embodiment has a primary winding 206a, a secondary winding 206c, and an auxiliary winding 206d. On the other hand, the transformer 403 of the second embodiment has two primary windings connected in series, that is, a first primary winding 403a (hereinafter simply referred to as the primary winding 403a) and a second primary winding 403b (hereinafter simply referred to as the primary winding 403b). The transformer 403 also has a secondary winding 403c and an auxiliary winding 403d. The transformer 403 is different from the transformer 206 in that it has two primary windings.

[0044] 5, output terminal 203c of diode bridge 203 is connected to one end of inductor 401. The other end of inductor 401 is connected to an anode terminal of diode 402, and a cathode terminal of diode 402 is connected to primary windings 403a and 403b of transformer 403. In this manner, inductor 401 and diode 402 are connected in series to form a third series circuit.

[0045] The primary winding 403a and the primary winding 403b of the transformer 403 are connected in series, one end of the primary winding 403a is connected to one end of the smoothing capacitor 207, and the other end of the primary winding 403a is connected to one end of the primary winding 403b and the cathode terminal of the diode 402. The other end of the primary winding 403b is connected to the drain terminal of the FET 208, and the source terminal of the FET 208 is connected to the other end of the smoothing capacitor 207 and the terminal 203d on the output side of the diode bridge 203. The gate terminal of the FET 208 is connected to a control IC (not shown), and the FET 208 is set to an on state or an off state according to a signal input from the control IC to the gate terminal. With the above-mentioned connection configuration, the smoothing capacitor 207 is connected in parallel to the primary winding 403a and the primary winding 403b connected in series of the transformer 403.

[0046] Moreover, one end of secondary winding 403c of transformer 403 is connected to the anode terminal of diode 209, and the cathode terminal is connected to one end of smoothing capacitor 210. One end of smoothing capacitor 210 is connected to the cathode terminal of diode 209, and the other end is connected to the other end of secondary winding 403c of transformer 403. The charging voltage of smoothing capacitor 210 is output as output voltage Vo of switching power supply 400 to an external load connected to switching power supply 400.

[0047] Similarly to the first embodiment, the snubber circuit 214 of the second embodiment is composed of an auxiliary winding 403d, two diodes 212 and 213, and a clamp capacitor 211. In the snubber circuit 214, one end of the clamp capacitor 211 is connected to the other end of the primary winding 403b of the transformer 403 and the drain terminal of the FET 208, and the other end of the clamp capacitor 211 is connected to the anode terminal of the diode 212. The cathode terminal of the diode 212 is connected to one end of the smoothing capacitor 207 and one end of the primary winding 403a of the transformer 403. The anode terminal of the diode 213 is connected to the source terminal of the FET 208, the other end of the smoothing capacitor 207, and the output side terminal 203d of the diode bridge 203. On the other hand, the cathode terminal of the diode 213 is connected to one end of the auxiliary winding 403d of the transformer 403. The other end of the auxiliary winding 403d of the transformer 403 is connected to a first connection point (hereinafter simply referred to as a connection point) at which the clamp capacitor 211 and the anode terminal of the diode 212 are connected. A second series circuit in which the diode 213 and the auxiliary winding 403d are connected in series is connected between the connection point at which the clamp capacitor 211 and the diode 212 are connected and the other end (source terminal) of the FET 208.

[0048] As described above, the FET 208 is turned on or off depending on the voltage applied to the gate terminal of the FET 208 from the control IC (not shown). When the FET 208 is turned on, the voltage of the second connection point (hereinafter simply referred to as the connection point) where the primary winding 403a and the primary winding 403b of the transformer 403 are connected becomes the following voltage. That is, it becomes a voltage obtained by dividing the charging voltage of the smoothing capacitor 207 according to the turn ratio of the primary windings 403a and 403b. The divided voltage is also the voltage on the cathode terminal side of the diode 402. At this time, if the output voltage of the terminal 203c on the output side of the diode bridge 203 is higher than the divided voltage, the output current flows from the terminal 203c on the output side of the diode bridge 203 along the following current route. That is, the output current from the output terminal 203c of the diode bridge 203 flows to the output terminal 203d of the diode bridge 203 via the inductor 401, the diode 402, the primary winding 403b, and the FET 208. On the other hand, when the divided voltage is higher than the output voltage of the output terminal 203c of the diode bridge 203, no output current flows from the output terminal 203c of the diode bridge 203. The output voltage of the diode bridge 203 is clamped to a voltage obtained by dividing the charging voltage of the smoothing capacitor 207 according to the turn ratio of the primary windings 403a and 403b.

[0049] In this way, when FET 208 is on, the voltage at the connection point where primary winding 403a and primary winding 403b of transformer 403 are connected is the voltage obtained by dividing the charging voltage of smoothing capacitor 207 according to the turn ratio of primary windings 403a and 403b. Therefore, by making the number of turns of primary winding 403a larger than the number of turns of primary winding 403b, the divided voltage becomes lower, and even if the output voltage of diode bridge 203 is a lower voltage, an output current flows from output side terminal 203c. In addition, when an external load (not shown) connected to switching power supply 400 is approximately constant and output voltage Vo is stable, the charging voltage of smoothing capacitor 207 is approximately constant, and therefore the divided voltage is also approximately constant. In the diode bridge 203, the AC voltage, which is a sine wave, is full-wave rectified, so that the output voltage at the terminal 203c on the output side of the diode bridge 203 changes in a sine wave shape, and therefore the waveform of the output current at the terminal 203c also changes in a substantially sine wave shape. Therefore, the switching power supply 400 can obtain power supply characteristics with a high power factor.

[0050] [Relationship between the output voltage of the diode bridge and the input current of the transformer] FIG. 6(a) is a diagram for explaining the relationship between the input current Iin and the output voltage Vin, where Iin is the input current to the primary windings 403a and 403b of the transformer 403, and Vin is the output voltage at the terminal 203c of the diode bridge 203. In FIG. 6(a), the upper waveform diagram shows the current waveform of the input current Iin, the lower waveform diagram shows the voltage waveform of the output voltage Vin, and the horizontal axis shows time. In the output voltage Vin in FIG. 6(a), the divided voltage value shown by the dashed line is the voltage at the connection point between the primary windings 403a and 403b, which is obtained by dividing the voltage of the smoothing capacitor 207 by the number of turns of the primary windings 403a and 403b. When the output voltage Vin at the terminal 203c on the output side of the diode bridge 203 exceeds the voltage of the divided voltage value shown in FIG. 6(a), the input current Iin flows. In other words, the circuit of the switching power supply 400 is configured such that the input current Iin does not flow until the output voltage Vin reaches the divided voltage value, and as shown in Fig. 6(a), the input current Iin does not flow during the period when the output voltage Vin is lower than the divided voltage value. However, even in the state of the input current Iin shown in Fig. 6(a), the switching power supply 400 can obtain a power factor of about 90%. Therefore, the power factor of the switching power supply 400 of the second embodiment is greatly improved compared to the power factor of 50 to 60% of a switching power supply with a general capacitor input configuration.

[0051] In the configuration of Fig. 5, the output voltage Vo is about to change instantaneously depending on conditions such as the turns ratio between the primary windings 403a, 403b and the secondary winding 403c, the input voltage, the load current, etc. The control IC (not shown) of the switching power supply 400 changes the on-duty, which is the time during which the FET 208 is in the on-state, based on a feedback signal from a feedback circuit (not shown) that notifies the primary side of the voltage value of the output voltage Vo on the secondary side. In this way, the control IC (not shown) controls the voltage (voltage waveform) generated in the secondary winding 403c. Then, the voltage generated in the secondary winding 403c is rectified and smoothed by the diode 209 and the smoothing capacitor 210, thereby stabilizing the output voltage Vo to a predetermined voltage.

[0052] [Snubber circuit operation] Next, the operation of the snubber circuit 214 will be described based on the state explanatory diagram shown in FIG. 6(b). FIG. 6(b) is a circuit diagram of the peripheral circuit of the snubber circuit 214 of FIG. 5, in order to explain the operation of the snubber circuit 214. FIG. 6(b)(b-1) is a diagram for explaining the circuit operation immediately after the FET 208 is turned off (immediately after switching from the on state to the off state). FIG. 6(b)(b-2) is a diagram for explaining the circuit operation immediately after the FET 208 is turned on (immediately after switching from the off state to the on state). Note that, as in the case of the first embodiment, the snubber circuit 214 of the second embodiment is characterized in the circuit operation immediately after the FET 208 is turned off and immediately after the FET 208 is turned on. The circuit operation during periods other than immediately after the FET 208 is turned off and immediately after the FET 208 is turned on is the same as that of a general switching power supply device that does not have the snubber circuit 214, and therefore will not be described here.

[0053] (Circuit operation immediately after FET 208 is turned off) First, referring to FIG. 6(b)(b-1), the circuit operation immediately after the FET 208 is turned off will be described. When a low-level signal is input from a control IC (not shown) to the gate terminal of the FET 208, the drain terminal and the source terminal of the FET 208 are opened. Then, the current that had been flowing from the primary winding 403b to the drain terminal of the FET 208 starts to flow to the clamp capacitor 211, and the clamp capacitor 211 is charged by the input current from the primary winding 403b. The current route of the charging current to the clamp capacitor 211 is the current route indicated by the thick arrow in FIG. 6(b)(b-1), and flows from the primary winding 403b to the clamp capacitor 211 and then to the diode 212. Depending on the input voltage of the terminal 203c on the output side of the diode bridge 203 and the voltage condition of the smoothing capacitor 207, the current from the smoothing capacitor 207 also flows through the primary windings 403a and 403b. At this time, the drain voltage of FET 208 has a sinusoidal voltage waveform due to the resonance operation of the capacitance of clamp capacitor 211 and the inductance of primary windings 403a and 403b, so the voltage rises gradually and a sudden voltage rise is limited.

[0054] (Circuit operation immediately after FET208 is turned on) On the other hand, when a high-level signal is input from a control IC (not shown) to the gate terminal of the FET 208, the drain terminal and the source terminal of the FET 208 are in a conductive state. This state is shown in FIG. 6(b)(b-2). The thick arrow shown in FIG. 6(b)(b-2) is the current route of the discharge current from the clamp capacitor 211. The primary windings 403a and 403b are coupled to the auxiliary winding 403d inside the transformer 403. Therefore, due to the turn ratio between the primary windings 403a and 403b and the auxiliary winding 403d, the discharge current flowing from the clamp capacitor 211 is divided into a current flowing through the FET 208 and a current flowing backward through the primary windings 403a and 403b. The current flowing backward through the primary windings 403a and 403b becomes a regenerative current to the smoothing capacitor 207. A part of the energy (the charging voltage of clamp capacitor 211) generated by the surge voltage when FET 208 is turned off is regenerated and reused in smoothing capacitor 207. Then, as the discharge current flows, clamp capacitor 211, from which the voltage charged by the surge voltage is discharged, returns to the state shown in Fig. 6(b)(b-1) immediately before the charging current flows, and is reset to a state in which it can store the surge voltage (surge energy) again.

[0055] On the other hand, the current flowing from the clamp capacitor 211 to the FET 208 flows to the auxiliary winding 403d via the diode 213, and the energy of the discharge current is stored in the auxiliary winding 403d. The energy stored in the auxiliary winding 403d is converted into a secondary current when the FET 208 is next turned off, and the energy stored by the current flowing through the primary windings 403a and 403b is added to the converted secondary current. The diode 213 has a function of blocking the charge of the clamp capacitor 211 from discharging through the auxiliary winding 403d. The diode 213 and the auxiliary winding 403d are connected in the order of the diode 213, the auxiliary winding 403d in the direction in which the discharge current from the clamp capacitor 211 flows, but the same circuit operation is achieved even if the auxiliary winding 403d, the diode 213, is connected in that order.

[0056] As described above, by applying the snubber circuit 214 to the power factor correctable insulated switching power supply 400, it is possible to suppress the surge voltage and to regenerate part of the surge energy due to the surge voltage to the smoothing capacitor 207. In addition, it becomes possible to accumulate part of the surge energy in the auxiliary winding 403d and convert it into secondary side energy.

[0057] In the first embodiment, the low-loss snubber circuit of the present invention is applied to a switching power supply of a flyback type, and in the second embodiment, to an isolated switching power supply capable of improving the power factor. The low-loss snubber circuit of the present invention can be applied to any switching power supply device as long as the circuit configuration transmits the energy of a smoothing capacitor to a transformer by the operation of a switching element. As described above, the switching power supplies 200 and 400 equipped with the snubber circuit 214 described in the first and second embodiments can improve the power supply efficiency compared to a general switching power supply. The printer 100 is equipped with the fixing unit 106 that consumes a large amount of power, but there is an upper limit to the current value that can be supplied from the power outlet. Therefore, the higher the power supply efficiency of the switching power supply, the more advantageous it is, and the switching power supplies 200 and 400 equipped with the above-mentioned configuration are effective for high-priced image forming devices that have many device options and consume a large amount of power.

[0058] (Turns ratio considerations) Next, similarly to the first embodiment, the turns ratio between the primary windings 403a, 403b and the auxiliary winding 403d of the transformer 403 will be considered. Note that, like the charging voltage of the smoothing capacitor 207 of the switching power supply 200, the voltage of the smoothing capacitor 207 of the switching power supply 400 is also charged at approximately the peak voltage value of the input voltage. Therefore, the same idea as in the first embodiment (e.g., equation (3), etc.) can be applied to the turns ratio (N2) between the secondary winding 403c and the auxiliary winding 403d, and therefore a description thereof will be omitted.

[0059] (3. Turns ratio of the primary windings 403a, 403b and the auxiliary winding 403d) The circuit configuration of Example 2 is different from that of Example 1 in that the primary winding is composed of two windings, namely the primary winding 403a and the primary winding 403b. The discharge current of the clamp capacitor 211 immediately after the FET 208 is turned on is determined by the turns ratio of the primary winding 403a, the primary winding 403b, and the auxiliary winding 403d, and is divided into the current flowing backward through the primary windings 403a and 403b and the current flowing through the FET 208. Here, let the number of turns of the primary winding 403a be npa, the number of turns of the primary winding 403b be npb, the flowing current be I1, the number of turns of the auxiliary winding 403d be nc, and the flowing current be I2 as well. Then, the relationship between the current I1 and the current I2 is given by the following equation (4). I1 = nc / (npa + npb) × I2 (4)

[0060] When the number of turns nc and the total number of turns npa + npb are the same, the values of the current I1 and the current I2 are the same. However, since this condition means that no current flows through the FET 208, it does not actually hold. Therefore, the condition that the number of turns nc and the total number of turns npa + npb are the same is the condition under which the discharge current of the clamp capacitor 211 does not flow, and the surge energy cannot be efficiently utilized. Also, the condition of nc > npa + npb results in I1 > I2, and a current greater than the discharge current flows through the FET 208, and this condition is also not possible in principle. That is, the relationship between nc and npa + npb needs to satisfy the following equation (5). nc < npa + npb (5)

[0061] As described above, according to Example 2, the low-loss snubber circuit is applied to an isolated switching power supply capable of improving the power factor. As a result, the sum of the number of turns npa + npa of the primary winding 403a and the primary winding 403b composed of two windings is configured to be less than the number of turns of the auxiliary winding 403d (nc < npa + npb). Thereby, it is possible to suppress the generation of a surge voltage and improve the efficiency of the switching power supply.

[0062] As described above, in the transformer 403 of the second embodiment, the number of turns of the auxiliary winding 403d is less than the total number of turns of the first primary winding 403a and the second primary winding 403b. Furthermore, the transformer 403 is configured so that the product of the output voltage and the ratio of the number of turns of the auxiliary winding 403d to the number of turns of the secondary winding 403c is equal to or less than the voltage of the smoothing capacitor 207 (see equation (3)).

[0063] As described above, according to the second embodiment, it is possible to improve the efficiency of a power supply device using switching elements while suppressing the occurrence of surge voltage. EXAMPLES

[0064] In the first and second embodiments, the surge voltage generated when the FET 208 is turned off is suppressed, and the energy due to the surge voltage is regenerated to the smoothing capacitor 207, and is also stored in the auxiliary winding and supplied to the secondary side, thereby improving efficiency. In the third embodiment, an embodiment will be described in which, in contrast to the first and second embodiments, the auxiliary winding 206d or the auxiliary winding 403d used in the snubber circuit 214 is also used as a power supply voltage generating circuit, which is a generating unit that generates a power supply voltage to be supplied to a control IC.

[0065] [Switching power supply configuration] The third embodiment will be described with reference to the circuit diagram of Fig. 7. In the circuit diagram shown in Fig. 7, a power supply voltage generating circuit 703 is added to the switching power supply 200 shown in Fig. 2 of the first embodiment, and the same components as those in Fig. 2 are denoted by the same reference numerals. In Fig. 7, the diode 213 and the auxiliary winding 206d are arranged in the opposite positions to those in Fig. 2.

[0066] In FIG. 7, the power supply voltage generating circuit 703 is composed of a diode 701 and a capacitor 702. The diode 701 is a diode for rectifying the output voltage induced in the auxiliary winding 206d, and the capacitor 702 is a capacitor for smoothing the voltage rectified by the diode 701. The control IC 704 is a control means for controlling the switching power supply 200. The control IC 704 operates by being supplied with the DC voltage generated by the power supply voltage generating circuit 703 as a drive voltage. The control IC 704 changes the pulse width and duty of a control signal output to the gate terminal of the FET 208 based on a feedback signal (not shown) from the secondary side feedback circuit (not shown) described above, and controls the output voltage Vo to a constant voltage. The resistor 705 is a gate resistor for limiting the current flowing from the control IC 704 to the gate terminal of the FET 208.

[0067] Next, the operation of the power supply voltage generating circuit 703 will be described. In the following, the same circuit operation as in the first embodiment will be omitted, and the description will be limited to the characteristic circuit operation in FIG. 6(b). First, when the FET 208 is turned off, if the drain voltage of the FET 208 rises due to the influence of the leakage inductance and parasitic capacitance of the transformer 206, the clamp capacitor 211 is charged as described above, and the voltage rise speed becomes slow. At this time, since the auxiliary winding 206d starts winding in the opposite direction to the primary winding 206a, a positive voltage is generated on the anode terminal side of the diodes 213 and 701 of the auxiliary winding 206d. Next, when the FET 208 is turned on, the charge of the clamp capacitor 211 is discharged, and a negative voltage is generated on the anode terminal side of the diodes 213 and 701 of the auxiliary winding 206d. In this way, the clamp capacitor 211 repeats charging and discharging according to the off / on state of the FET 208, and functions to suppress the surge voltage. On the other hand, the auxiliary winding 206d alternately generates a positive voltage and a negative voltage according to the off / on state of the FET 208. Then, the power supply voltage generating circuit 703 rectifies and smoothes this alternately generated voltage, and supplies the smoothed power supply voltage to the control IC 704.

[0068] As described above, in the third embodiment, the auxiliary winding 206d used in the power supply voltage generating circuit 703 is also configured to be used in the snubber circuit 214. This allows the clamp capacitor 211 to mitigate the surge voltage generated when the FET 208 is turned off, and the auxiliary winding 206d to be used in both circuits, thereby reducing costs. The power supply voltage generating circuit 703 can also be applied to the switching power supply 400.

[0069] As described above, according to the third embodiment, it is possible to improve the efficiency of a power supply device using switching elements while suppressing the occurrence of surge voltage. [Explanation of symbols]

[0070] 203 Diode Bridge 206 Trans 206a Primary Winding 206c secondary winding 206d Auxiliary Winding 207 Smoothing capacitor 208 FET 211 Clamp Capacitor 212, 213 Diodes

Claims

1. a transformer having a first primary winding and a second primary winding connected in series, a secondary winding, and an auxiliary winding, the primary side and the secondary side being insulated from each other; a rectifier circuit having a first output terminal and a second output terminal, and configured to rectify an AC voltage; a smoothing capacitor having one end connected to the other end of the first primary winding and the other end connected to the second output terminal; a switching element having one end connected to the other end of the second primary winding and the other end connected to the second output terminal, the switching element being switched between an on state and an off state; a first series circuit in which a capacitor and a first rectifying element are connected in series, the first series circuit being connected between the other end of the first primary winding and the other end of the second primary winding; a second series circuit in which a second rectifying element and the auxiliary winding are connected in series, the second series circuit being connected between a first connection point at which the capacitor and the first rectifying element are connected and the other end of the switching element; a third series circuit in which an inductor and a third rectifying element are connected in series, the third series circuit being connected between the first output terminal and a second connection point to which one end of the first primary winding and one end of the second primary winding are connected; Equipped with the transformer is configured such that the number of turns of the auxiliary winding is less than the total number of turns of the first primary winding and the second primary winding, and such that the product of the ratio of the number of turns of the auxiliary winding to the number of turns of the secondary winding and the output voltage is equal to or less than the voltage of the smoothing capacitor.

2. 2. The power supply device according to claim 1, wherein a current flows through the third series circuit when the output voltage of the first output terminal is higher than the voltage of the second connection point.

3. 3. The power supply device according to claim 2, wherein the voltage at the second connection point is a voltage obtained by dividing the charging voltage of the smoothing capacitor by the number of turns of the first primary winding and the number of turns of the second primary winding when the switching element is in an on-state.

4. the third rectifying element is a diode, the inductor has one end connected to the first output terminal and the other end connected to the anode terminal of the diode; 4. The power supply device according to claim 3, wherein the cathode terminal of the diode is connected to the second connection point.

5. the first rectifying element is a diode, the capacitor has one end connected to the other end of the second primary winding and one end of the switching element, and the other end connected to the anode terminal of the diode; 5. The power supply device according to claim 4, wherein a cathode terminal of the diode is connected to the other end of the first primary winding and one end of the smoothing capacitor.

6. the second rectifying element is a diode, the diode has an anode terminal connected to the other end of the switching element and a cathode terminal connected to one end of the auxiliary winding; 6. The power supply device according to claim 5, wherein the other end of the auxiliary winding is connected to the first connection point.

7. the second rectifying element is a diode, the auxiliary winding has one end connected to the other end of the switching element and the other end connected to the anode terminal of the diode; 6. The power supply device according to claim 5, wherein the cathode terminal of the diode is connected to the first connection point.

8. 8. The power supply device according to claim 6, wherein when the switching element is turned off, the current flowing through the second primary winding flows through the first series circuit, and the capacitor is charged, thereby suppressing a surge voltage.

9. 9. The power supply device according to claim 8, wherein when the switching element is turned on, a current from the capacitor flows through the second primary winding and the first primary winding to the smoothing capacitor and the auxiliary winding of the second series circuit in accordance with the number of turns of the first primary winding, the second primary winding, and the auxiliary winding.

10. An image forming means for forming an image on a sheet; The power supply device according to any one of claims 1 to 9, which supplies power to the image forming unit; An image forming apparatus comprising:

Images