Display device

Abstract

To provide a transistor including an oxide semiconductor film, in which the field effect mobility is improved and the reliability is improved.SOLUTION: A semiconductor device includes an oxide semiconductor film. The semiconductor device includes a gate electrode, an insulating film on the gate electrode, an oxide semiconductor film on the insulating film, and a pair of electrodes on the oxide semiconductor film. The oxide semiconductor film includes a first oxide semiconductor film, a second oxide semiconductor film on the first oxide semiconductor film, and a third oxide semiconductor film on the second oxide semiconductor film. The first to third oxide semiconductor films have the same element. The second oxide semiconductor film includes a region with the crystallinity lower than that of one of or both the first oxide semiconductor film and the third oxide semiconductor film.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] One embodiment of the present invention is a semiconductor device including an oxide semiconductor film and a method for manufacturing the semiconductor device. Another embodiment of the present invention relates to a display device including the semiconductor device.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field of one aspect of the present invention relates to an article, a method, or a manufacturing method. is a process, machine, manufacture, or composition of matter. In particular, one embodiment of the present invention relates to a semiconductor device, a display device, a light-emitting device, a power storage device, The present invention relates to a storage device, a driving method thereof, or a manufacturing method thereof.

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Refers to devices in general. Semiconductor elements such as transistors, semiconductor circuits, computing devices, memory The device is one aspect of a semiconductor device. Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic devices The device may include a semiconductor device. [Background technology]

[0004] Oxide semiconductors have been attracting attention as semiconductor materials that can be used for transistors. In Patent Document 1, a plurality of oxide semiconductor layers are stacked, and among the plurality of oxide semiconductor layers, The oxide semiconductor layer serving as a channel contains indium and gallium, and the ratio of indium By making μF larger than the percentage of gallium, the field effect mobility (simply called mobility, or μFE A semiconductor device is disclosed in which the resistance (which may be called "resistance") is improved.

[0005] In addition, Non-Patent Document 1 states that an oxide semiconductor containing indium, gallium, and zinc is , In 1-x Ga 1+x O 3 (ZnO) m (x is a number satisfying -1≦x≦1, and m is a natural number) In addition, Non-Patent Document 1 discloses that the compound has a homologous phase represented by the formula: The solid solution range of the homologous phase is disclosed. For example, when m = 1, the solid solution region of the homologous phase is from -0.33 to 0.0 8, and the solid solution region of the homologous phase when m = 2 is x from -0.68 to 0.32. The range is. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2014-7399 A [Non-patent literature]

[0007] [Non-Patent Document 1] M. Nakamura, N. Kimizuka, and T. Mohri, "The Phase Relations in the In2O3-Ga2ZnO4-ZnO System at 1350℃", J. Solid State Chem., 1991, Vol.93, pp.298-315 Summary of the Invention [Problem to be solved by the invention]

[0008] As a transistor using an oxide semiconductor film for a channel region, the field-effect mobility is high. However, increasing the field effect mobility of a transistor However, there is a problem that the characteristics of the normally-on transistor tend to become normally-on characteristics. This means that a channel exists and current flows through the transistor even when no voltage is applied to the gate electrode. It is a state in which one becomes disoriented.

[0009] In addition, in a transistor using an oxide semiconductor film for a channel region, The oxygen vacancies formed in the semiconductor layer are problematic because they affect the transistor characteristics. For example, When oxygen vacancies are formed in the oxide semiconductor film, hydrogen is bonded to the oxygen vacancies to supply carriers. When a carrier supply source is generated in the oxide semiconductor film, This causes a change in the electrical characteristics of the transistor, typically a shift in the threshold voltage.

[0010] For example, when there are too many oxygen vacancies in the oxide semiconductor film, the threshold voltage of the transistor is increased. Therefore, the oxide semiconductor film is shifted to the negative side, resulting in a normally-on characteristic. In particular, in the channel region, there is little oxygen vacancy or the device has normally-on characteristics. It is preferable that the amount of oxygen deficiency is not so large as to cause the formation of a void.

[0011] In view of the above problems, one embodiment of the present invention is a transistor including an oxide semiconductor film, One of the objectives is to improve the field effect mobility and the reliability. According to one embodiment of the present invention, a change in electrical characteristics of a transistor including an oxide semiconductor film can be prevented. Another object of the present invention is to suppress the above-mentioned problems and to improve reliability. Another object of the present invention is to provide a semiconductor device with reduced power consumption. An object of one embodiment of the present invention is to provide a novel semiconductor device. An object of one embodiment is to provide a novel display device.

[0012] The above description of the problem does not preclude the existence of other problems. The embodiment does not necessarily have to solve all of these problems. Problems other than those mentioned above may be solved by the specification. The above problems are obvious from the description of the specification, etc., and problems other than those mentioned above cannot be extracted from the description of the specification, etc. It is possible to issue it. [Means for solving the problem]

[0013] One embodiment of the present invention is a semiconductor device including an oxide semiconductor film. a gate electrode, an insulating film on the gate electrode, an oxide semiconductor film on the insulating film, and a a pair of electrodes; and the oxide semiconductor film includes a first oxide semiconductor film and a second oxide semiconductor film. a second oxide semiconductor film on the first oxide semiconductor film; and a third oxide semiconductor film on the second oxide semiconductor film. the first to third oxide semiconductor films each contain the same element, and the second oxide semiconductor The conductive film is formed of a first oxide semiconductor film, a third oxide semiconductor film, or both of the first oxide semiconductor film and the third oxide semiconductor film. The semiconductor device has a region with lower crystallinity than the conventional semiconductor device.

[0014] In the above aspect, the first to third oxide semiconductor films each independently contain In and M( It is preferable that M includes Al, Ga, Y, or Sn) and Zn. In the above, the atomic ratio of In, M, and Zn is approximately In:M:Zn=4:2:3. When n is 4, it is preferable that M is 1.5 or more and 2.5 or less, and Zn is 2 or more and 4 or less. In the above embodiment, the atomic ratio of In, M, and Zn is In:M:Zn=5. :1:6, and when In is 5, M is 0.5 or more and 1.5 or less, and Zn is 5 It is preferable that the number is 7 or less.

[0015] In the above aspect, the second oxide semiconductor film is In a M b Zinc c O d (M is Al , Ga, Y, or Sn, and a, b, c, and d represent any number. Area and In x Zinc y O z (x, y, and z represent any numbers), and It is preferable that the material is a composite oxide semiconductor.

[0016] In the above aspect, the second oxide semiconductor film is a first oxide semiconductor film and a third oxide semiconductor film. It is preferable that the insulating film have a region thicker than one or both of the oxide semiconductor films.

[0017] In the above aspect, any one of the first oxide semiconductor film and the third oxide semiconductor film It is preferable that one or both of them have a crystalline portion, and the crystalline portion has a c-axis orientation.

[0018] Another aspect of the present invention is a semiconductor device comprising: Another embodiment of the present invention is a display device including the display device and a touch sensor. In addition, another aspect of the present invention is a display module having any of the above aspects. The semiconductor device according to any one of claims 1 to 5, the display device, or the display module, and an operation key or is an electronic device having a battery.

[0019] Another embodiment of the present invention is a method for manufacturing a semiconductor device including an oxide semiconductor film. A step of forming a gate electrode, a step of forming an insulating film on the gate electrode, and a step of forming an oxide on the insulating film. forming a pair of electrodes on the oxide semiconductor film. The step of forming the oxide semiconductor film includes a step of forming a first oxide semiconductor film and a step of forming a first forming a second oxide semiconductor film over the oxide semiconductor film; and forming a third oxide semiconductor film. This is a method for continuously forming semiconductor films in a vacuum using a sputtering device. do.

[0020] In the above aspect, the second oxide semiconductor film is a first oxide semiconductor film and a third oxide semiconductor film. It is preferable that the insulating film be formed at a lower oxygen partial pressure than either one or both of the oxide semiconductor films. . Effect of the Invention

[0021] According to one embodiment of the present invention, in a transistor including an oxide semiconductor film, The accuracy and reliability can be improved. In a transistor including an oxide semiconductor film, a change in electrical characteristics can be suppressed and a signal can be improved. According to one embodiment of the present invention, power consumption can be reduced. According to one embodiment of the present invention, a novel semiconductor device can be provided. According to one embodiment of the present invention, a novel display device can be provided. This can be done.

[0022] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have to have all of these effects. The above will become apparent from the description in the specification, drawings, claims, etc. It is possible to extract other effects from the descriptions in the claims, etc. [Brief description of the drawings]

[0023] [Figure 1] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Diagram 2] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Diagram 3] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 4] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Diagram 5] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 6] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 7] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 8] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 9] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 10] 1 is a conceptual diagram showing a diffusion path of oxygen or excess oxygen diffusing into an oxide semiconductor film. [Figure 11] 1A and 1B are conceptual diagrams illustrating a top surface and cross-sectional structure of an oxide semiconductor film. [Figure 12] 1A and 1B are conceptual diagrams illustrating a top surface and cross-sectional structure of an oxide semiconductor film. [Figure 13] 1A and 1B are conceptual diagrams illustrating a top surface and cross-sectional structure of an oxide semiconductor film. [Figure 14] 1A and 1B are conceptual diagrams illustrating a top surface and cross-sectional structure of an oxide semiconductor film. [Figure 15] 1A to 1C are diagrams illustrating atomic ratios of oxide semiconductor films. [Figure 16] FIG. 1 is a diagram illustrating a sputtering apparatus. [Figure 17] 1A and 1B are diagrams illustrating energy bands of a transistor in which an oxide semiconductor is used for a channel region. [Figure 18] 1A and 1B illustrate a cross-sectional TEM image and a cross-sectional HR-TEM image of an oxide semiconductor film. [Figure 19] 1A and 1B illustrate a cross-sectional TEM image and a cross-sectional HR-TEM image of an oxide semiconductor film. [Figure 20] 1A and 1B illustrate a cross-sectional TEM image and a cross-sectional HR-TEM image of an oxide semiconductor film. [Figure 21] 13A to 13C show XRD measurement results and electron beam diffraction patterns of an oxide semiconductor film. [Figure 22] 13A to 13C show XRD measurement results and electron beam diffraction patterns of an oxide semiconductor film. [Diagram 23] 13A to 13C show XRD measurement results and electron beam diffraction patterns of an oxide semiconductor film. [Figure 24] FIG. 2 is a diagram for explaining an electron beam diffraction pattern. [Diagram 25] FIG. 2 is a diagram for explaining a line profile of an electron beam diffraction pattern. [Figure 26] 3A to 3C are diagrams illustrating a line profile of an electron beam diffraction pattern, a relative luminance R of the line profile, and a half-width of the line profile. [Figure 27] 3A to 3C are diagrams illustrating electron beam diffraction patterns and line profiles. [Figure 28] 13A and 13B are graphs showing relative luminance estimated from electron diffraction patterns of oxide semiconductor films. [Figure 29] 1A to 1C show cross-sectional TEM images of an oxide semiconductor film and cross-sectional TEM images after image analysis. [Diagram 30] 13A to 13C show SIMS measurement results of an oxide semiconductor film. [Diagram 31] FIG. 1 is a top view illustrating one embodiment of a display device. [Diagram 32] FIG. 1 is a cross-sectional view showing one embodiment of a display device. [Diagram 33] FIG. 1 is a cross-sectional view showing one embodiment of a display device. [Diagram 34] FIG. 1 is a cross-sectional view showing one embodiment of a display device. [Diagram 35] FIG. 1 is a cross-sectional view showing one embodiment of a display device. [Diagram 36] FIG. 1 is a cross-sectional view showing one embodiment of a display device. [Figure 37] FIG. 1 is a cross-sectional view showing one embodiment of a display device. [Figure 38] 1A and 1B are a block diagram and a circuit diagram illustrating a display device. [Figure 39] FIG. 2 is a diagram illustrating a display module. [Diagram 40] 1A to 1C are diagrams illustrating electronic devices. [Diagram 41] 1A to 1C are diagrams illustrating electronic devices. [Diagram 42] FIG. 1 is a perspective view illustrating a display device. [Diagram 43] 13A to 13C show XRD measurement results of an oxide semiconductor film. [Diagram 44] FIG. 1 is a diagram for explaining EDX mapping of a cross section of a sample in an embodiment. [Diagram 45] FIG. 2 is a diagram for explaining a BF-STEM image of a cross section of a sample in an embodiment. [Figure 46] FIG. 2 is a diagram for explaining the XRD measurement results of a sample according to an embodiment and the XRD analysis positions. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0024] Hereinafter, the embodiments will be described with reference to the drawings. The present invention may be embodied in various different forms without departing from its spirit and scope. It will be readily understood by those skilled in the art that various modifications and changes may be made to the embodiments and details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments.

[0025] Also, in the drawings, the size, layer thickness, or area are exaggerated for clarity. Therefore, the scale is not necessarily limited to that shown in the drawings. The drawings are merely schematic illustrations and are not limited to the shapes or values ​​shown in the drawings.

[0026] In addition, the ordinal numbers "first," "second," and "third" used in this specification refer to the components of the It should be noted that this is added to avoid confusion and is not intended to limit the numbers.

[0027] In addition, in this specification, the words "above" and "below" indicating the position of the components are used. The positional relationship is used for convenience in describing the drawings. The relationship changes depending on the direction in which each component is depicted. The above words and phrases are not limited to those used above, but can be rephrased appropriately depending on the situation.

[0028] In this specification, a transistor includes a gate, a drain, and a source. The drain terminal is a diode that has at least three terminals. Between the drain region or drain electrode and the source (source terminal, source region or source electrode) A channel region is formed between the source and drain, and a current flows between the source and drain through the channel region. In this specification and the like, the channel region is a region through which a current mainly flows. This refers to the area in which the fluid flows.

[0029] In addition, the functions of the source and drain may differ depending on whether transistors of different polarities are used or the circuit In operation, when the direction of the current changes, the positions may be reversed. In the specification, the terms source and drain may be used interchangeably. do.

[0030] In addition, in this specification, "electrically connected" means "something that has some kind of electrical effect." This includes cases where the device is connected via a "device having some electrical function." "of" is not subject to any particular restrictions as long as it enables the transmission and reception of electrical signals between connected objects. For example, "something that has an electrical effect" includes electrodes, wiring, and transistors. These devices have various functions such as switching elements, resistor elements, inductors, capacitors, etc. This includes elements such as:

[0031] In addition, in this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, this also includes cases where the angle is between 85° and 95°.

[0032] In addition, in this specification and the like, the terms "film" and "layer" are interchangeable. For example, the term "conductive layer" can be changed to the term "conductive film." For example, the term "insulating film" may be changed to "insulating layer." It may be possible to change the term to:

[0033] In this specification and the like, unless otherwise specified, the off-state current refers to the current that occurs when a transistor is off. This refers to the drain current when the device is in a non-conducting state (also called a cut-off state). Unless otherwise specified, for n-channel transistors, V is the voltage between the gate and source When gs is lower than the threshold voltage Vth, the gate and source of a p-channel transistor This refers to a state in which the voltage Vgs between the n-channel transistors is higher than the threshold voltage Vth. The off-state current of a transistor is the voltage between the gate and source, Vgs, that is, the threshold voltage, Vt It may refer to the drain current when it is lower than h.

[0034] The off-state current of a transistor may depend on Vgs. The off-state current is I or less if there exists a Vgs value at which the off-state current of the transistor is I or less. The off-state current of a transistor is the current that flows through it in the off-state at a given Vgs. , an off-state at Vgs within a given range or a sufficiently reduced off-current is obtained. In some cases, it may refer to the off-state current at Vgs.

[0035] As an example, when the threshold voltage Vth is 0.5V and Vgs is 0.5V, The current is 1×10 -9 A, and the drain current at Vgs of 0.1 V is 1×10 -1 3 A, and the drain current at Vgs -0.5 V is 1×10 -19 A and Vg The drain current at s = -0.8 V is 1 × 10 -22 A n-channel transistor The drain current of the transistor is as follows when Vgs is -0.5V: , or 1×10 when Vgs is in the range of -0.5V to -0.8V -19 A or below Therefore, the off-state current of the transistor is 1×10 -19 There are cases where it is said to be A or lower. The drain current of the transistor is 1×10 -22 A or less Vgs exists. Therefore, the off-state current of the transistor is 1×10 -22 It may be said that it is below A.

[0036] In this specification, the off-state current of a transistor having a channel width W is expressed as It is sometimes expressed as the current value that flows per watt. Also, for a given channel width (for example, 1 μm), In the latter case, the unit of the off-state current is current / length. It may be expressed in units with an element (e.g., A / μm).

[0037] The off-state current of a transistor may depend on temperature. Unless otherwise specified, the operating temperature is room temperature, 60°C, 85°C, 95°C, or 125°C. Or, the reliability of a semiconductor device including the transistor may be guaranteed. The temperature at which the transistor is certified, or the temperature at which a semiconductor device or the like that contains the transistor is used (e.g. For example, the off-state current at any one of temperatures from 5° C. to 35° C. The off-state current of the transistor is I or less at room temperature, 60°C, 85°C, 95°C, 125°C, The temperature at which the reliability of a semiconductor device including the transistor is guaranteed, or The temperature at which the semiconductor device containing the transistor is used (for example, any one of 5°C to 35°C) (temperature), there exists a value of Vgs at which the off-state current of the transistor is equal to or less than I. There are cases where it is pointed out.

[0038] The off-state current of a transistor may depend on the voltage Vds between the drain and source In this specification, unless otherwise specified, the off-state current is measured when Vds is 0.1 V, 0.8 V, 1V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, and In some cases, it indicates the off-state current at 20 V. In other cases, it indicates the off-state current at 20 V. Vds that guarantees the reliability of semiconductor devices, or semiconductor devices including the transistor The term may also refer to the off-state current at Vds used in the transistor off-state. The current is equal to or less than I when Vds is 0.1V, 0.8V, 1V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, 20V, transistors included Vds that guarantees the reliability of the semiconductor device in which the transistor is used, or Vds used in semiconductor devices, etc., where the off-state current of the transistor is I or less This may refer to the existence of a gs value.

[0039] In the above description of the off-state current, the drain may be read as the source. The current may also refer to the current through the source when the transistor is in the off state.

[0040] In this specification and the like, the term "leak current" may be used to mean the same thing as the "off current." In this specification, the off-state current refers to, for example, the current flowing when a transistor is in an off state. , may refer to the current flowing between the source and drain.

[0041] In this specification, the threshold voltage of a transistor is the threshold voltage of a transistor. This refers to the gate voltage (Vg) when a gate is formed. Specifically, it refers to the threshold voltage of a transistor. Voltage is plotted on the horizontal axis as gate voltage (Vg) and on the vertical axis as the square root of drain current (Id). The line obtained by extrapolating the tangent line with the maximum slope in the simulated curve (Vg-√Id characteristics) is , the gate voltage (Vg Alternatively, the threshold voltage of a transistor can be expressed as the channel length L and the The channel width is W, and the value of Id[A]×L[μm] / W[μm] is 1×10 -9 [A] Sometimes it refers to the gate voltage (Vg) applied to the device.

[0042] In addition, even when the term "semiconductor" is used in this specification, for example, If the electrical conductivity is low enough, the material may have the properties of an insulator. The boundary between "insulators" and "insulators" is unclear, and it may not be possible to strictly distinguish them. In some cases, the term "semiconductor" in the above can be replaced with "insulator." In some cases, the term "insulator" in the specification can be replaced with "semiconductor." In some cases, the term "insulator" in this specification can be rephrased as "semi-insulator." .

[0043] In addition, even when the term "semiconductor" is used in this specification, for example, If the electrical conductivity is high enough, it may have the properties of a "conductor". The boundary between the term "conductor" and the term "electrical conductor" is unclear, and it may not be possible to strictly distinguish between them. In some cases, the term "semiconductor" in the above can be replaced with "conductor." The term "conductor" in the specification etc. may be replaced with "semiconductor" in some cases.

[0044] In this specification, impurities in a semiconductor refer to anything other than the main component that constitutes the semiconductor. For example, an element with a concentration of less than 0.1 atomic percent is an impurity. In semiconductors, DOS (Density of States) is formed, and In some cases, the semiconductor may become acidic, causing a decrease in the carrier mobility or crystallinity. In the case of a nitride semiconductor, impurities that change the properties of the semiconductor include, for example, Group 1 elements. Elements of Group 2, Group 13, Group 14, Group 15, transition metals other than the main component, etc. In particular, hydrogen (which is also contained in water), lithium, sodium, silicon, boron, In the case of oxide semiconductors, for example, impurities such as hydrogen can cause In addition, when the semiconductor contains silicon, the characteristics of the semiconductor Impurities that change the properties of the material include, for example, oxygen, elements of Group 1 except hydrogen, elements of Group 2, and elements of Group 3. These include the Group 13 elements and the Group 15 elements.

[0045] In this specification, the term "metal oxide" refers to a metal in a broad sense. Metal oxides are oxide insulators and oxide conductors (including transparent oxide conductors). ), oxide semiconductor (also called oxide semiconductor or simply OS) For example, when a metal oxide is used in the active layer of a transistor, the metal An oxide may be called an oxide semiconductor. In other words, the transistor can be a transistor including a metal oxide or an oxide semiconductor.

[0046] In the present specification and the like, metal oxides having nitrogen are also referred to as metal oxides. Metal oxides containing nitrogen are also called metal oxynitrides (MEs). It may also be called tal oxynitride.

[0047] In the present specification, CAAC (C-Axis Aligned Crystal l), and CAC (Cloud-Aligned Composite) CAAC represents an example of a crystal structure, and CAC represents a function or a material configuration. Shows an example.

[0048] An example of the crystal structure of an oxide semiconductor or a metal oxide will be described below. In-Ga-Zn oxide target (In:Ga:Zn=4:2:4.1 [atomic ratio]) The oxide semiconductor film formed by sputtering will be described as an example. The substrate temperature was set to 100°C or higher and 130°C or lower, and the sputtering method was used. The oxide semiconductor formed by this method is called sIGZO, and the substrate temperature is kept at room temperature using the above target. The oxide semiconductor formed by sputtering at RT is called tIGZO. For example, sIGZO is either nc (nano crystal) or CAAC. In addition, tIGZO has an nc crystal structure. In addition, room temperature (RT) here includes the temperature when the substrate is not intentionally heated. .

[0049] In the present specification and the like, CAC-OS or CAC-metal oxide means Some materials have the function of a conductor and some materials have the function of a dielectric (or insulator). The material as a whole functions as a semiconductor. When etal oxide is used in the active layer of a transistor, the conductor acts as a carrier. The dielectric has the function of not allowing the electrons (or holes) that become carriers to flow. The function as a conductor and the function as a dielectric are complementarily acted. By doing so, the switching function (On / Off function) can be set by CAC-OS or It can be added to CAC-metal oxide. By separating the functions of each metal oxide, can be increased to the maximum.

[0050] In the present specification and the like, CAC-OS or CAC-metal oxide is The conductive region has the above-mentioned function of the conductor and the dielectric region. The conductive region has the above-mentioned function of the dielectric. The regions may be separated at the nanoparticle level. The conductive regions may be unevenly distributed in the material. They may be observed connected in a dot-like pattern.

[0051] That is, CAC-OS or CAC-metal oxide is a matrix composite. matrix composite, or metal matrix composite It can also be called a composite matrix.

[0052] In addition, in the CAC-OS or CAC-metal oxide, a conductive region and The dielectric regions are each 0.5 nm to 10 nm thick, preferably 0.5 nm to 3 nm thick. They may be dispersed in the material at sizes of less than one millimeter.

[0053] (Embodiment 1) In this embodiment, a semiconductor device and a manufacturing method of the semiconductor device according to one embodiment of the present invention will be described. The following description will be given with reference to FIGS.

[0054] <1-1. Configuration example 1 of semiconductor device> FIG. 1A is a top view of a transistor 100 which is a semiconductor device of one embodiment of the present invention. 1B corresponds to a cross-sectional view taken along dashed line X1-X2 in FIG. 1A. FIG. 1C is a cross-sectional view taken along the dashed line Y1-Y2 in FIG. 1A. In FIG. 1A, in order to avoid complication, the transistor 100 Some of the components (such as the insulating film that functions as the gate insulating film) are omitted in the figure. The dashed line X1-X2 direction is the channel length direction, and the dashed line Y1-Y2 direction is the channel width direction. In the top view of the transistor, As in FIG. 1(A), some of the components may be omitted.

[0055] The transistor 100 includes a conductive film 104 on a substrate 102 and a conductive film 104. the insulating film 106 on the oxide semiconductor film 108; The conductive film 112a is disposed over the oxide semiconductor film 108, and the conductive film 112b is disposed over the oxide semiconductor film 108. Specifically, the oxide semiconductor film 108, the conductive film 112a, and the conductive On the film 112b, an insulating film 114, an insulating film 116 on the insulating film 114, and a An insulating film 118 is formed.

[0056] The transistor 100 is a so-called channel etch type transistor.

[0057] The oxide semiconductor film 108 is formed by dividing the oxide semiconductor film 108_1 over the insulating film 106 and the oxide semiconductor film 108_2 over the insulating film 106. The oxide semiconductor film 108_2 on the oxide semiconductor film 108_1 and the oxide semiconductor film 108_2 on the oxide semiconductor film 108_2 Note that the oxide semiconductor film 108_1, the oxide semiconductor film 108_2, and the oxide semiconductor film 108_3 are The oxide semiconductor film 108_2 and the oxide semiconductor film 108_3 each contain the same element. , an oxide semiconductor film 108_1, an oxide semiconductor film 108_2, and an oxide semiconductor film 108_ 3 each independently represents In, M (wherein M is Al, Ga, Y, or Sn), Zn, It is preferable to have

[0058] In addition, the oxide semiconductor film 108_1, the oxide semiconductor film 108_2, and the oxide semiconductor film 1 Preferably, each of the compounds of formula 08_3 independently has a region in which the atomic ratio of In is greater than the atomic ratio of M. For example, the ratio of the number of In atoms to the number of M atoms to the number of Zn atoms in the oxide semiconductor film 108_1 is preferably set to 1 / 100. In the oxide semiconductor film 108_2, the composition ratio of In:M:Zn is preferably about 4:2:3. It is preferable that the ratio of the numbers of In, M, and Zn atoms is about In:M:Zn=4:2:3. In addition, the atomic ratio of In, M, and Zn in the oxide semiconductor film 108_3 is In:M: It is preferable to have Zn=4:2:3 or so. Here, "nearby" means that when In is 4, M is 1. The oxide semiconductor film has a molecular weight of 5 or more and a molecular weight of 2.5 or less, and Zn is 2 or more and 4 or less. The oxide semiconductor film 108_1, the oxide semiconductor film 108_2, and the oxide semiconductor film 108_3 have approximately the same composition. This allows the same sputtering target to be used for the formation of the layers, reducing manufacturing costs. It is possible to control this.

[0059] The oxide semiconductor film 108_1, the oxide semiconductor film 108_2, and the oxide semiconductor film 108_ 3, each of which independently has a region in which the atomic ratio of In is greater than the atomic ratio of M, The field effect mobility of the transistor 100 can be increased. The field effect mobility of 100 is 10 cm 2 / Vs, more preferably transistor 1 The field effect mobility of 00 is 30 cm 2 / Vs can be exceeded.

[0060] For example, the above-mentioned high field effect mobility transistor is used as a gate driver for generating a gate signal. By using this in a driver, it is possible to provide a display device with a narrow frame width (also called a narrow frame). In addition, the above-mentioned transistor having high field effect mobility is provided as a The source driver that supplies the signal (especially the output of the shift register that the source driver has) By using it in a 10-pin demultiplexer (connected to the output terminal), the number of wires connected to the display device can be reduced. Therefore, a display device with fewer display elements can be provided.

[0061] On the other hand, the oxide semiconductor film 108_1, the oxide semiconductor film 108_2, and the oxide semiconductor film 108_3 each independently has a region in which the atomic ratio of In is greater than the atomic ratio of M. However, the oxide semiconductor film 108_1, the oxide semiconductor film 108_2, and the oxide semiconductor film 10 8_3 When the crystallinity of each is high, the field effect mobility may be low.

[0062] However, in the semiconductor device of one embodiment of the present invention, the oxide semiconductor film 108_2 , the oxide semiconductor film 108_1, or the oxide semiconductor film 108_3, or both of them. The oxide semiconductor film 108 has a region with lower crystallinity than that of the oxide semiconductor film 108. For example, X-ray diffraction (XRD) is used for analysis. Or, a transmission electron microscope (TEM) The analysis can be done using a microscope.

[0063] When the oxide semiconductor film 108_2 has a region with low crystallinity, the following excellent effects are obtained. do.

[0064] First, oxygen vacancies that can be formed in the oxide semiconductor film 108 will be described.

[0065] Since oxygen vacancies formed in the oxide semiconductor film 108 affect the transistor characteristics, For example, when oxygen vacancies are formed in the oxide semiconductor film 108, Hydrogen bonds to the oxide semiconductor film 108 and becomes a carrier supply source. As a result, the electrical characteristics of the transistor 100 including the oxide semiconductor film 108 change, typically Therefore, in the oxide semiconductor film 108, The fewer the element defects, the more preferable.

[0066] In view of this, in one embodiment of the present invention, an insulating film in the vicinity of the oxide semiconductor film 108, specifically, The insulating films 114 and 116 formed above the oxide semiconductor film 108 contain excess oxygen. Oxygen or excess oxygen is transferred from the insulating films 114 and 116 to the oxide semiconductor film 108. By moving the oxide semiconductor film, oxygen vacancies in the oxide semiconductor film can be reduced.

[0067] Here, oxygen or 10A and 10B show a path of excess oxygen that diffuses into the oxide semiconductor film 108. FIG. 10(A) is a schematic diagram showing the diffusion path of oxygen that diffuses or excess oxygen along the channel length. 10(A) is a conceptual diagram in the channel width direction, and FIG. 10(B) is a conceptual diagram in the channel width direction.

[0068] The oxygen or excess oxygen contained in the insulating films 114 and 116 is introduced from above, i.e., from the oxide semiconductor. The oxide semiconductor film 108_1 passes through the conductive film 108_3 and is then (Route 1 shown in Figure 10 (A) and (B)).

[0069] Alternatively, oxygen or excess oxygen contained in the insulating films 114 and 116 may be added to the oxide semiconductor film 10. 8_1, the oxide semiconductor film 108_2, and the oxide semiconductor film 108_3. The oxygen atoms diffuse into the oxide semiconductor film 108 (Route 2 in FIG. 10B).

[0070] For example, in the case of Route 1 shown in FIGS. 10A and 10B, the oxide semiconductor film 108_3 When the crystallinity of is high, it may hinder the diffusion of oxygen or excess oxygen. In the case of Route 2 shown in (B), the oxide semiconductor film 108_1 and the oxide semiconductor film 108 1, from the side of the oxide semiconductor film 108_1, 108_2, and 108_3, Oxygen or excess oxygen is diffused into the oxide semiconductor film 108_2 and the oxide semiconductor film 108_3. It is possible to do so.

[0071] In the case of Route 2 shown in FIG. 10B, the crystallinity of the oxide semiconductor film 108_2 is However, the crystallinity of the oxide semiconductor film 108_1 and the crystallinity of the oxide semiconductor film 108_3 are lower than that of the oxide semiconductor film 108_2. Therefore, the region serves as a diffusion path for excess oxygen and is thicker than the oxide semiconductor film 108_2. Excess oxygen is diffused into the highly crystalline oxide semiconductor film 108_1 and the oxide semiconductor film 108_3. Therefore, the thickness of the oxide semiconductor film 108_2 can be set to be equal to or larger than that of the oxide semiconductor film 10 The thicker the oxide semiconductor film 8_1 and the oxide semiconductor film 108_3, the larger the oxygen diffusion path becomes. Although not shown in FIGS. 10A and 10B, the insulating film 106 may be formed of oxygen or In the case where excess oxygen is contained, oxygen or excess oxygen is also introduced from the insulating film 106 into the oxide semiconductor film 108. The element can spread.

[0072] In this manner, in the semiconductor device of one embodiment of the present invention, oxide semiconductors having different crystal structures By using a laminated film structure and using areas with low crystallinity as a diffusion path for excess oxygen, a highly reliable A semiconductor device can be provided.

[0073] Note that when the oxide semiconductor film 108 is formed using only an oxide semiconductor film with low crystallinity, The impurity (for example, water) is added to the channel side, that is, the region corresponding to the oxide semiconductor film 108_3. When reliability is reduced due to adhesion of substances such as metals or moisture or the inclusion of impurities. There is.

[0074] Impurities such as hydrogen or moisture entering the oxide semiconductor film 108 can adversely affect transistor characteristics. Therefore, in the oxide semiconductor film 108, hydrogen or The less impurities such as moisture, the more preferable.

[0075] In view of the above, in one embodiment of the present invention, By increasing the crystallinity, impurities that may enter the oxide semiconductor film 108 can be suppressed. In particular, by increasing the crystallinity of the oxide semiconductor film 108_3, the conductive films 112a and 112 The surface of the oxide semiconductor film 108, that is, the surface of the oxide semiconductor film 108, can be prevented from being damaged during processing of the surface of the oxide semiconductor film 108. That is, the surface of the oxide semiconductor film 108_3 is etched when the conductive films 112a and 112b are processed. However, the oxide semiconductor film 108_3 is exposed to a solvent or an etching gas. Since it has a region with high crystallinity, it functions as an etching stopper.

[0076] Note that the oxide semiconductor film 108 is formed of an oxide semiconductor having a low impurity concentration and a low density of defect states. By using a semiconductor film, a transistor having excellent electrical characteristics can be manufactured. Here, it is preferable that the impurity concentration is low and the defect level density is low (there is little oxygen vacancy). High purity authentic or substantially high purity authentic. High purity authentic or substantially high purity authentic Since the oxide semiconductor film has a small number of carrier generation sources, the carrier density can be reduced. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film has a threshold voltage The electrical characteristics where the voltage is negative (also called normally-on) are rare. A highly-purified intrinsic or substantially highly-purified intrinsic oxide semiconductor film has a low density of defect states. In addition, the trap level density may be lower. The oxide semiconductor film having a channel width W of 1×10 6 μm Even if the channel length L of the element is 10 μm, the voltage between the source electrode and the drain electrode (drain When the voltage (voltage) is in the range of 1V to 10V, the off-state current is measured by a semiconductor parameter analyzer. Below the limit, i.e. 1×10 -13 It is possible to obtain a characteristic of A or less.

[0077] The oxide semiconductor film 108_2 is a semiconductor film having a thickness of 100 nm and a thickness of 100 nm. By having a region with lower crystallinity than 08_3, the carrier density may be increased.

[0078] In addition, when the carrier density of the oxide semiconductor film 108_2 is increased, the oxide semiconductor film 108 The Fermi level may be relatively high with respect to the conduction band of _2. This results in oxide The bottom of the conduction band of the oxide semiconductor film 108_2 is lowered. and the energy of a trap level that may be formed in the gate insulating film (the insulating film 106 in this example). When the energy difference becomes large, the gate insulating film This reduces the amount of charge trapped in the transistor, which reduces the variation in the threshold voltage of the transistor. In addition, when the carrier density of the oxide semiconductor film 108_2 is high, the oxide semiconductor The field effect mobility of the conductive film 108 can be increased.

[0079] The oxide semiconductor film 108_2 is In a M b Zinc c O d (M is Al, Ga, Y, or Sn, and a, b, c, and d represent any numbers; x Z n y O z (x, y, and z are any numbers), and a second region having The complex oxide semiconductor film is preferably a complex oxide semiconductor. I will explain in detail.

[0080] Note that in the transistor 100 illustrated in FIGS. The insulating films 114, 116, and 118 function as gate insulating films of the transistor 100. The insulating film functions as a protective insulating film for the transistor 100. In the above, the conductive film 104 functions as a gate electrode, and the conductive film 112a functions as a source The conductive film 112b functions as a drain electrode. In this specification and the like, the insulating film 106 is referred to as a first insulating film, and the insulating films 114 and 116 are referred to as a second insulating film. The insulating film and the insulating film 118 may be referred to as a third insulating film.

[0081] <1-2. Components of Semiconductor Device> Next, components included in the semiconductor device of this embodiment will be described in detail.

[0082] [substrate] There is no particular restriction on the material of the substrate 102, but it should be strong enough to withstand the subsequent heat treatment. For example, glass substrates, ceramic substrates, quartz substrates, and sa A fire substrate or the like may be used as the substrate 102. Also, a material such as silicon or silicon carbide may be used. Single crystal semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductors such as silicon germanium, etc. It is also possible to use a substrate, an SOI substrate, or the like, on which a semiconductor element is provided. The substrate 102 may be a glass substrate. If you have 6th generation (1500mm x 1850mm), 7th generation (1870mm x 220 0mm), 8th generation (2200mm x 2400mm), 9th generation (2400mm x 280 By using large-area substrates such as 10th generation (2950mm x 3400mm), Larger display devices can be manufactured.

[0083] In addition, a flexible substrate is used as the substrate 102, and the transistor 10 is directly formed on the flexible substrate. Alternatively, a peeling layer may be provided between the substrate 102 and the transistor 100. The release layer is preferably removed from the substrate 102 after a semiconductor device is partially or entirely completed thereon. The transistor 100 can be separated and used for transfer to another substrate. It can also be transferred to substrates with poor thermal properties or flexible substrates.

[0084] [Conductive film] A conductive film 104 functions as a gate electrode, a conductive film 112a functions as a source electrode, The conductive film 112b functioning as the drain electrode may be made of chromium (Cr), copper (Cu), or aluminum. Aluminum (Al), gold (Au), silver (Ag), zinc (Zn), molybdenum (Mo), tantalum (Ta), Ta, Ti, W, Mn, Ni, A metal element selected from the group consisting of Ni, iron (Fe), and cobalt (Co), or the above-mentioned metal elements. The alloys are formed by using alloys containing the above-mentioned metal elements or alloys combining the above-mentioned metal elements. It is possible.

[0085] The conductive films 104, 112a, and 112b are made of an oxide containing indium and tin (I n-Sn oxide), oxide containing indium and tungsten (In-W oxide), Indium, tungsten and zinc oxide (In-W-Zn oxide), indium and titanium (In-Ti oxide), and oxide having indium, titanium, and tin oxides containing indium and zinc (In-Ti-Sn oxides), and oxides containing indium and zinc (In-Zn oxides). oxides having indium, tin and silicon (In-Sn-Si oxides); Conductive oxides such as oxides containing aluminum, gallium and zinc (In-Ga-Zn oxide) Alternatively, an oxide semiconductor can be used.

[0086] Here, the oxide conductor will be described. In this specification, the oxide conductor is referred to as OC For example, an oxide semiconductor may have an oxygen deficiency. When oxygen vacancies are formed and hydrogen is added to the oxygen vacancies, a donor level is formed near the conduction band. As a result, the oxide semiconductor becomes electrically conductive and becomes a conductor. In general, oxide semiconductors have an energy gap of On the other hand, oxide conductors have donors near the conduction band. Therefore, oxide conductors are oxide semiconductors that have donor levels. The influence of absorption is small, and the transparent property to visible light is comparable to that of an oxide semiconductor.

[0087] The conductive films 104, 112a, and 112b are made of a Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) may be applied. This allows processing using a wet etching process, which reduces manufacturing costs. It becomes possible.

[0088] The conductive films 112a and 112b may contain, among the above-mentioned metal elements, copper, titanium, tantalum, etc. One or more selected from the group consisting of tungsten, tantalum, and molybdenum. In particular, it is preferable to use a tantalum nitride film as the conductive films 112a and 112b. The tantalum nitride film has electrical conductivity and has high resistance to copper or hydrogen. In addition, the tantalum nitride film has a low hydrogen release rate. a conductive film in contact with the oxide semiconductor film 108 or a conductive film in the vicinity of the oxide semiconductor film 108 In addition, a copper film is preferably used as the conductive films 112a and 112b. The use of such a material is preferable because it can reduce the resistance of the conductive films 112a and 112b.

[0089] The conductive films 112a and 112b can be formed by electroless plating. Materials that can be formed by the electroless plating method include, for example, Cu, Ni, Al, Au, S One or more of the following can be used: n, Co, Ag, and Pd In particular, when Cu or Ag is used, the resistance of the conductive film can be reduced, This is preferable.

[0090] [Insulating film functioning as a gate insulating film] The insulating film 106 functioning as the gate insulating film of the transistor 100 is a plasma-treated PECVD (Plasma Enhanced Chemical Vap) Silicon oxide film, oxynitride film, etc. are formed by deposition method, sputtering method, etc. Silicon oxide film, silicon nitride film, silicon nitride film, aluminum oxide film, hafnium oxide film tungsten oxide film, yttrium oxide film, zirconium oxide film, gallium oxide film, tantalum oxide film, Magnesium oxide film, lanthanum oxide film, cerium oxide film, and neodymium oxide film, or more Note that the insulating film 106 may have a stacked structure of two or more layers. good.

[0091] In addition, a region in contact with the oxide semiconductor film 108 which functions as a channel region of the transistor 100 The insulating film 106 is preferably an oxide insulating film, and has an oxide content in excess of the stoichiometric composition. It is more preferable that the insulating film 1 has a region containing oxygen (excess oxygen region). The insulating film 106 is capable of releasing oxygen. In order to provide this, for example, the insulating film 106 is formed in an oxygen atmosphere, or the insulating film 106 after the film formation is The insulating film 106 may be heat-treated in an oxygen atmosphere.

[0092] Furthermore, when hafnium oxide is used as the insulating film 106, the following effects are obtained. Hafnium has a higher dielectric constant than silicon oxide and silicon oxynitride. Compared to the case where silicon oxide is used, the thickness of the insulating film 106 can be made larger, so that the tunnel This reduces the leakage current caused by the current. Furthermore, hafnium oxide, which has a crystalline structure, can be used to realize an amorphous structure. It has a higher relative dielectric constant than hafnium oxide, which has a low off-current. To form a transistor, it is preferable to use hafnium oxide having a crystalline structure. Examples of the crystal structure include monoclinic and cubic. The types are not limited to these.

[0093] In this embodiment, the insulating film 106 is a film made of a silicon nitride film and a silicon oxide film. A laminated film is formed. The silicon nitride film has a higher dielectric constant than the silicon oxide film, and the oxide The thickness required to obtain the same capacitance as a silicon film is large, so the transistor 100 By including a silicon nitride film as the gate insulating film, the insulating film can be made thicker. This suppresses the decrease in the dielectric strength of the transistor 100 and further improves the dielectric strength. Electrostatic damage to the transistor 100 can be suppressed.

[0094] [Oxide semiconductor film] For the oxide semiconductor film 108, the above-mentioned materials can be used.

[0095] In the case where the oxide semiconductor film 108 is an In-M-Zn oxide, the In-M-Zn oxide is formed. The atomic ratio of the metal elements in the sputtering target used for this purpose must satisfy the following: In>M. The atomic ratio of the metal elements in such a sputtering target is preferably In. :M:Zn=2:1:3, In:M:Zn=3:1:2, In:M:Zn=4:2:4. 1, In:M:Zn=5:1:6, In:M:Zn=5:1:8, In:M:Zn=6: Examples include In:M:Zn=1:6, In:M:Zn=5:2:5, etc.

[0096] In addition, when the oxide semiconductor film 108 is an In-M-Zn oxide, the sputtering target It is preferable to use a target containing polycrystalline In-M-Zn oxide as the target. By using a target containing crystalline In-M-Zn oxide, it is possible to obtain a crystalline oxide semiconductor. The conductor film 108 can be easily formed. The atomic ratio of the oxide semiconductor film 108 to be formed is The atomic ratio of the metal elements contained in the sputtering target is ±40. For example, the composition of the sputtering target used for the oxide semiconductor film 108 may vary. When the composition is In:Ga:Zn=4:2:4.1 [atomic ratio], the oxide semiconductor film formed is The composition of 108 may be close to In:Ga:Zn=4:2:3 [atomic ratio].

[0097] The oxide semiconductor film 108 has an energy gap of 2 eV or more, preferably 2.5 eV or more. In this way, by using an oxide semiconductor with a wide energy gap, The off-state current of the transistor 100 can be reduced.

[0098] The oxide semiconductor film 108 preferably has a non-single crystal structure. For example, CAAC-OS (C Axis Aligned Crystallinity) e Oxide Semiconductor), polycrystalline, microcrystalline, or amorphous Among non-single crystal structures, the amorphous structure has the highest defect level density and CAAC -OS has the lowest defect state density.

[0099] [Insulating film 1 that functions as a protective insulating film] The insulating films 114 and 116 function as protective insulating films for the transistor 100. In addition, the insulating films 114 and 116 have a function of supplying oxygen to the oxide semiconductor film 108. That is, the insulating films 114 and 116 contain oxygen. The insulating film 114 is an insulating film that can be used to form an insulating film 116 to be formed later. The oxide semiconductor film 108 also functions as a film for reducing damage to the oxide semiconductor film 108 during the thermal treatment.

[0100] The insulating film 114 has a thickness of 5 nm to 150 nm, preferably 5 nm to 50 nm. Silicon oxide, silicon oxynitride, etc., having a thickness of 1 nm or less can be used.

[0101] In addition, it is preferable that the insulating film 114 has a small amount of defects. Typically, the insulating film 114 has a small amount of defects as determined by ESR measurement. The spin density of the signal at g=2.001 originating from the silicon dangling bond is 3×10 17 spins / cm 3 This is because the insulating film 114 is preferably If the density of defects is high, oxygen will be bonded to the defects, and the oxygen in the insulating film 114 will This is because the permeability of the

[0102] In the insulating film 114, all of the oxygen that has entered the insulating film 114 from the outside is Some oxygen does not move to the outside of the insulating film 114 and remains in the insulating film 114. At the same time, oxygen contained in the insulating film 114 moves to the outside of the insulating film 114, In some cases, oxygen may move through the film 114. When the oxide insulating film capable of forming the insulating film 116 is formed over the insulating film 114, The desorbed oxygen can be transferred to the oxide semiconductor film 108 through the insulating film 114. .

[0103] The insulating film 114 is formed using an oxide insulating film having a low density of states caused by nitrogen oxides. Note that the density of states due to the nitrogen oxides can be determined by the valence Energy of the upper edge of the electronic band (Ev_os) and the lower edge of the conduction band of the oxide semiconductor film The oxide insulating film may be formed between the gate electrodes of the SiO_O_2 layer and the gate electrodes of the SiO_O_2 layer. Silicon oxynitride film with low emission or aluminum oxynitride film with low emission of nitrogen oxide For example, a tungsten film or the like can be used.

[0104] In addition, the silicon oxynitride film, which emits a small amount of nitrogen oxide, was analyzed by thermal desorption spectrometry (TD S: Thermal Desorption Spectroscopy This is a membrane that releases more ammonia than elemental oxide, and is typically The amount is 1×10 18 cm -3 5×10 or more 19 cm -3 The following is the ammonia emission. The amount of leakage is determined when the surface temperature of the film is 50°C or more and 650°C or less, preferably 50°C or more and 550°C or less. This is the amount released due to heat treatment.

[0105] Nitrogen oxides (NO x , x is greater than 0 and less than or equal to 2, preferably greater than or equal to 1 and less than or equal to 2), No to 2 Alternatively, NO forms a level in the insulating film 114 or the like. The oxides of nitrogen are located in the energy gap of the insulating film 114. When the oxide semiconductor film 108 diffuses to the interface thereof, the level is changed to an electron level on the insulating film 114 side. As a result, the trapped electrons may be trapped in the insulating film 114 and the oxide Since the ions remain near the interface of the semiconductor film 108, the threshold voltage of the transistor is shifted in the positive direction. This causes the problem.

[0106] Nitrogen oxide reacts with ammonia and oxygen during heat treatment. The nitrogen oxide contained in the insulating film 116 reacts with ammonia contained in the insulating film 116 during the heat treatment. Therefore, the amount of nitrogen oxide contained in the insulating film 114 is reduced. Electrons are less likely to be trapped at the interface between the oxide semiconductor film 106 and the oxide semiconductor film 108.

[0107] By using the oxide insulating film as the insulating film 114, the threshold voltage of the transistor It is possible to reduce the shift in the electrical characteristics of the transistor. can.

[0108] Heat treatment in the manufacturing process of a transistor is typically performed at a temperature of 300° C. or higher and lower than 350° C. By the heat treatment, the insulating film 114 shows the following characteristics in the spectrum obtained by ESR measurement at 100K or less: The first signal has a g value of 2.037 to 2.039, and the second signal has a g value of 2.001 to 2.002. A second signal with a g value of .003 or less and a third signal with a g value between 1.964 and 1.966, inclusive. A null is observed. Note that the split width of the first signal and the second signal, The split width of the second and third signals is about 5 in the X-band ESR measurement. mT. The first signal has a g value of 2.037 to 2.039, and the second signal has a g value of 2. A second signal between 0.001 and 2.003, and a g value between 1.964 and 1.966 The sum of the spin densities of the third signal is 1 × 10 18 spins / cm 3 Less than Typically, it is 1×10 17 spins / cm 3 More than 1×10 18 spins / cm 3 Not yet It is full.

[0109] In the ESR spectrum below 100K, the g value is 2.037 or more and 2.039 or less. The first signal below, the second signal with a g-value between 2.001 and 2.003, and the g-value The sum of the spin densities of the third signal, which is greater than or equal to 1.964 and less than or equal to 1.966, is the nitrogen oxide Monster (NO x (x is greater than 0 and less than or equal to 2, preferably greater than or equal to 1 and less than or equal to 2) It corresponds to the total pin density. Representative examples of nitrogen oxides include nitrogen monoxide and nitrogen dioxide. That is, the first signal has a g value of 2.037 to 2.039, and the second signal has a g value of 2.001 A second signal greater than or equal to 2.003 and a g value greater than or equal to 1.964 and less than or equal to 1.966 The smaller the total spin density of the third signal, the more nitrogen oxides are contained in the oxide insulating film. It can be said that the content is low.

[0110] The nitrogen concentration of the oxide insulating film measured by SIMS is 6×10 20 atoms / cm 3 The following is the result.

[0111] The substrate temperature is between 220℃ and 350℃, and PEC using silane and nitrous oxide is used. By forming the oxide insulating film by the VD method, a dense and hard film can be obtained. It can be formed.

[0112] The insulating film 116 is an oxide insulating film containing more oxygen than the oxygen required for the stoichiometric composition. When the oxide insulating film is heated, some of the oxygen is released. The amount of oxygen released from the oxide insulating film is 1.0×10 19 atoms / cm 3 That's all good Preferably 3.0 x 10 20 atoms / cm 3 The above region is also included. The amount of release is determined when the heat treatment temperature in TDS is 50°C or higher and 650°C or lower, or when the heat treatment temperature is 50°C or higher and 650°C or lower. The total amount of oxygen released is below 550℃. The amount of oxygen released is calculated based on the oxygen content in TDS. This is the total amount converted into atoms.

[0113] The insulating film 116 has a thickness of 30 nm to 500 nm, preferably 50 nm or more. Silicon oxide, silicon oxynitride, etc., having a thickness of 400 nm or less can be used.

[0114] In addition, it is preferable that the insulating film 116 has a small amount of defects. The spin density of the signal at g=2.001 originating from the silicon dangling bond is 1.5×10 18 spins / cm 3 Less than or even 1×10 18 spins / cm 3 Note that the insulating film 116 is preferably an oxide semiconductor compared to the insulating film 114. Since it is separated from the insulating film 108, it may have a higher defect density than the insulating film 114.

[0115] In addition, the insulating films 114 and 116 can be made of the same material, so that the insulating films In some cases, the interface between the film 114 and the insulating film 116 cannot be clearly seen. In this embodiment, the interface between the insulating film 114 and the insulating film 116 is shown by a dashed line. In the embodiment, the two-layer structure of the insulating film 114 and the insulating film 116 has been described. For example, the insulating film 114 may have a single layer structure or a laminated structure of three or more layers. Good too.

[0116] [Insulating film 2 that functions as a protective insulating film] The insulating film 118 functions as a protective insulating film for the transistor 100 .

[0117] The insulating film 118 contains either hydrogen or nitrogen, or both. The insulating film 118 contains nitrogen and silicon. The insulating film 118 contains oxygen, hydrogen, water, and alkali. The insulating film 118 has a function of blocking metals, alkaline earth metals, etc. As a result, oxygen diffuses from the oxide semiconductor film 108 to the outside, and oxygen contained in the insulating films 114 and 116 is prevented from diffusing. The diffusion of oxygen from the outside and the entry of hydrogen, water, and the like into the oxide semiconductor film 108 from the outside are prevented. It can be prevented.

[0118] The insulating film 118 may be, for example, a nitride insulating film. Examples include silicon nitride, silicon nitride oxide, aluminum nitride, and aluminum nitride oxide. etc.

[0119] The above-mentioned various films such as the conductive film, the insulating film, and the oxide semiconductor film may be formed by sputtering. The thin-film transistor can be formed by deposition or PECVD, but other methods, such as thermal CVD, are also possible. The film may be formed by a chemical vapor deposition (Chemical Vapor Deposition) method. As an example of the CVD method, MOCVD (Metal Organic Chemical Vapor Deposition) por Deposition method or ALD (Atomic Layer Deposition) method osition method.

[0120] Thermal CVD is a film formation method that does not use plasma, so defects can occur due to plasma damage. The thermal CVD method has the advantage that the source gas is not generated in a chamber. The pressure in the chamber is then set to atmospheric pressure or reduced pressure, and a film is deposited on the substrate. .

[0121] In the ALD method, the source gas is sent into the chamber and the chamber is kept at atmospheric pressure or The pressure may be reduced and a film may be deposited on the substrate.

[0122] Thermal CVD methods such as MOCVD and ALD can be used to form the conductive film, insulating film, It is possible to form various films such as oxide semiconductor films. For example, In-Ga-Zn-O films In the case of forming a film, trimethylindium, trimethylgallium, and dimethylzinc are used. The chemical formula for trimethylindium is In(CH 3 ) 3 Also, The chemical formula for methylgallium is Ga(CH 3 ) 3 The chemical formula for dimethylzinc is: Zn(CH 3 ) 2 In addition, the combination is not limited to these, and trimethylgallium Instead of triethylgallium (chemical formula Ga(C 2 H 5 ) 3 ) can also be used, Instead of diethylzinc, diethylzinc (chemical formula Zn(C 2 H 5 )2 ) can also be used.

[0123] For example, when forming a hafnium oxide film using a film forming apparatus that uses ALD, the solvent and liquids containing hafnium precursor compounds (hafnium alkoxides, tetrakisdimethyl The raw material gas is made by vaporizing hafnium amide (such as TDMAH) and acid. Ozone (O 3 Two types of gases are used: tetrakisdimethylamide The chemical formula for Hf is Hf[N(CH 3 ) 2 ] 4 In addition, other material liquids include tetrahydrofuran. Examples include rakis(ethylmethylamido)hafnium.

[0124] For example, when forming an aluminum oxide film using an ALD deposition system, A liquid containing a catalyst and an aluminum precursor compound (e.g., trimethylaluminum (TMA)) is added. Vaporized raw gas and H as oxidant 2 Two types of gases are used: trimethyl The chemical formula for aluminum is Al(CH 3 ) 3 In addition, other material liquids include Tris( Dimethylamido)aluminum, triisobutylaluminum, aluminum tris(2 ,2,6,6-tetramethyl-3,5-heptanedionate).

[0125] For example, when forming a silicon oxide film using a deposition system that uses ALD, Chlorodisilane is adsorbed onto the surface to be coated, the chlorine contained in the adsorbed matter is removed, and the oxidizing gas (O 2 , nitrous oxide) radicals are supplied to react with the adsorbate.

[0126] For example, when forming a tungsten film using a deposition system that uses ALD, the WF 6 Gas and B 2 H 6 A first tungsten film is formed using WF 6 Gas and H 2 The second tungsten film is formed using the gas B 2 H 6 Instead of gas, SiH 4 A gas may also be used.

[0127] For example, an oxide semiconductor film, such as In-Ga-Zn- When forming an O film, In(CH 3 ) 3 Gas and O 3 Forming an In-O layer using gas Then, Ga(CH 3 ) 3 Gas and O 3 A GaO layer is formed using the gas, and then Zn(CH 3 ) 2 Gas and O 3 The ZnO layer is formed using the gas. The number is not limited to this example. In addition, by mixing these gases, In-Ga-O layers and In-Zn-O layers can be formed. Alternatively, a mixed compound layer such as a Ga-Zn-O layer may be formed. 3 Gas instead of A H obtained by bubbling water with an inert gas such as r 2 O gas may be used, but it does not contain H. No 3 It is preferable to use In(CH 3 ) 3 Instead of gas, In(C 2 H 5 ) 3 Gas may also be used. 3 ) 3 Instead of gas, Ga(C2 H 5 ) 3 Gas may also be used. 3 ) 2 A gas may also be used.

[0128] <1-3. Configuration example 2 of semiconductor device> Next, modified examples of the transistor 100 shown in FIGS. This will be explained using Figure 5.

[0129] FIG. 2A is a top view of a transistor 100A which is a semiconductor device of one embodiment of the present invention. FIG. 2(B) corresponds to a cross-sectional view taken along the dashed line X1-X2 in FIG. 2(A). FIG. 2(C) is a cross-sectional view taken along the dashed line Y1-Y2 in FIG. 2(A). Equivalent.

[0130] The transistor 100A shown in FIGS. 2A, 2B, and 2C is a so-called channel protection type transistor. In this manner, the semiconductor device according to one embodiment of the present invention has a channel etch type and The transistor structure may be either a channel protection type or a channel protection type.

[0131] In the transistor 100A, the insulating films 114 and 116 have openings 141a, The oxide semiconductor film 108 is electrically connected to the insulating film 141 through the openings 141a and 141b. The conductive films 112a and 112b are connected to each other. The insulating films 114 and 116 serve as so-called channel protection films. The other configuration of the transistor 100A is the same as that of the transistor 100A shown above. It is the same as 100 and has the same effect.

[0132] FIG. 3A is a top view of a transistor 100B which is a semiconductor device of one embodiment of the present invention. 3B is a cross-sectional view taken along dashed line X1-X2 in FIG. 3A. FIG. 3(C) corresponds to a cross-sectional view taken along dashed line Y1-Y2 in FIG. 3(A). This corresponds to a surface view.

[0133] The transistor 100B includes a conductive film 104 on a substrate 102 and a conductive film 10 An insulating film 106 on the oxide semiconductor film 104, an oxide semiconductor film 108 on the insulating film 106, and an oxide semiconductor film 10 8, the conductive film 112b on the oxide semiconductor film 108, and the oxide semiconductor film 108, the conductive film 112a, the insulating film 114 on the conductive film 112b, and the insulating film 114 An insulating film 116, a conductive film 120a on the insulating film 116, and a conductive film 120b on the insulating film 116. , an insulating film 116, a conductive film 120a, and an insulating film 118 over the conductive film 120b.

[0134] The insulating films 114 and 116 have an opening 142a. 4 and 116 have an opening 142b. The conductive film 120a is The conductive film 120b is electrically connected to the conductive film 104. The conductive film 120b is also electrically connected to the conductive film 104 through the opening 142a. , and is electrically connected to the conductive film 112b.

[0135] Note that in the transistor 100B, the insulating film 106 is The insulating films 114 and 116 function as gate insulating films for the transistor 100B. The insulating film 118 functions as a second gate insulating film and serves to protect the transistor 100B. The conductive film 104 in the transistor 100B has a function as an insulating film. The conductive film 112a functions as a first gate electrode, and the conductive film 112b functions as a source electrode. The conductive film 112b functions as a drain electrode. In B, the conductive film 120a functions as a second gate electrode, and the conductive film 120b has a function as a pixel electrode of the display device.

[0136] As shown in FIG. 3C, the conductive film 120a is exposed to the conductive film 1 through the opening 142b. Therefore, the conductive film 104 and the conductive film 120a have the same potential. Given.

[0137] As shown in FIG. 3C, the oxide semiconductor film 108 is 120a and is sandwiched between two conductive films functioning as gate electrodes. The length of the conductive film 120a in the channel length direction and the length of the conductive film 120a in the channel width direction The length of the oxide semiconductor film 108 in the channel length direction and the channel thickness of the oxide semiconductor film 108 The oxide semiconductor film 108 is entirely covered by the insulating film 114, It is covered with a conductive film 120a via 116.

[0138] In other words, the conductive film 104 and the conductive film 120a are provided on the insulating films 106, 114, and 116. The oxide semiconductor film 108 is connected to the opening 104 and is located outside the side edge of the oxide semiconductor film 108. It has an area where

[0139] With such a structure, the oxide semiconductor film 10 included in the transistor 100B 8 can be electrically surrounded by the electric field of the conductive film 104 and the conductive film 120a. As in the transistor 100B, the transistor 100 is turned on by the electric field of the first gate electrode and the second gate electrode. The device structure of the transistor electrically surrounds the oxide semiconductor film in which the channel region is formed. This can be called the Surrounded channel (S-channel) structure. .

[0140] Since the transistor 100B has an S-channel structure, the first gate electrode and The conductive film 104 functions as an oxide semiconductor to effectively generate an electric field for inducing a channel. Since the voltage can be applied to the conductive film 108, the current driving capability of the transistor 100B is improved. This makes it possible to obtain high on-current characteristics. Therefore, it is possible to miniaturize the transistor 100B. In FIG. 00B, the oxide semiconductor film 108 is disposed between the conductive film 104 and Since the semiconductor device has a structure surrounded by the conductive film 120a functioning as the second gate electrode, The mechanical strength of the transistor 100B can be increased.

[0141] The conductive films 120a and 120b are the conductive films 104, 112a, and 112 shown above. In particular, the conductive films 120a and 120b may be made of the same materials as those listed in the above. As the conductive film, an oxide conductive film (OC) is preferable. By using this, oxygen can be added to the insulating films 114 and 116.

[0142] The other configurations of the transistor 100B are the same as those of the transistor 100 shown above. and has a similar effect.

[0143] FIG. 4A is a top view of a transistor 100C which is a semiconductor device of one embodiment of the present invention. 4(B) is a cross-section taken along dashed line X1-X2 shown in FIG. 4(A). FIG. 4(C) corresponds to a cross-sectional view taken along dashed line Y1-Y2 in FIG. 4(A). This corresponds to a surface view.

[0144] The transistor 100C has the conductive films 112a and 112b of the transistor 100B. 12b is a three-layer laminated structure.

[0145] The conductive film 112a of the transistor 100C includes a conductive film 112a_1 and a conductive film 11 A conductive film 112a_2 on the conductive film 2a_1 and a conductive film 112a_3 on the conductive film 112a_2 are The conductive film 112b included in the transistor 100C is a conductive film 112b_1. , a conductive film 112b_2 on the conductive film 112b_1, and a conductive film 112 on the conductive film 112b_2 b_3 and

[0146] For example, the conductive film 112a_1, the conductive film 112b_1, the conductive film 112a_3, and the conductive film 112b_3 includes titanium, tungsten, tantalum, molybdenum, indium, and gallium. It is preferable that the metal oxide contains one or more selected from the group consisting of lithium, tin, and zinc. The conductive film 112a_2 and the conductive film 112b_2 are made of copper, aluminum, or silver. It is preferable that the ink composition has one or more selected from the following:

[0147] More specifically, the conductive film 112a_1, the conductive film 112b_1, the conductive film 112a_3, and and the conductive film 112b_3 is made of In-Sn oxide or In-Zn oxide. Copper can be used for the conductive film 112a_2 and the conductive film 112b_2.

[0148] With the above structure, the wiring resistance of the conductive films 112a and 112b is reduced, and the oxide semiconductor This is preferable because it can suppress the diffusion of copper into the conductive film 108. This is preferable because it is possible to reduce the contact resistance between the conductive film 112b and the conductive film 120b. The other configurations of the transistor 100C are the same as those of the transistor 100 shown above. and has a similar effect.

[0149] FIG. 5A is a top view of a transistor 100D which is a semiconductor device of one embodiment of the present invention. 5(B) is a cross-section taken along dashed line X1-X2 shown in FIG. 5(A). FIG. 5(C) is a cross-sectional view taken along dashed line Y1-Y2 in FIG. 5(A). This corresponds to a surface view.

[0150] The transistor 100D has the same structure as the transistor 100B except for the conductive films 112a and 1 The transistor 100D has a three-layer structure. The conductive films 112a and 112b of the transistor 100C and the shapes of the conductive films 112a and 112b The shapes are different.

[0151] The conductive film 112a included in the transistor 100D is a conductive film 112a_1 and a conductive film 11 A conductive film 112a_2 on the conductive film 2a_1 and a conductive film 112a_3 on the conductive film 112a_2 are The conductive film 112b included in the transistor 100C is a conductive film 112b_1. , a conductive film 112b_2 on the conductive film 112b_1, and a conductive film 112 on the conductive film 112b_2 b_3. _3, the conductive film 112b_1, the conductive film 112b_2, and the conductive film 112b_3 are The materials shown in the following can be used.

[0152] In addition, the end of the conductive film 112a_1 is located outside the end of the conductive film 112a_2. The conductive film 112a_3 covers the upper surface and side surfaces of the conductive film 112a_2 and has a conductive The conductive film 112b_1 has an area in contact with the conductive film 112a_1. The conductive film 112b_3 has an area located outside the end of the conductive film 11 It covers the upper surface and side surfaces of 2b_2 and has a region in contact with the conductive film 112b_1.

[0153] With the above structure, the wiring resistance of the conductive films 112a and 112b is reduced, and the oxide semiconductor This is preferable because it can suppress the diffusion of copper into the conductive film 108. The structure shown in transistor 100D is more effective at suppressing copper diffusion than that shown in transistor 100C. In addition, by adopting the above-mentioned structure, the contact between the conductive film 112b and the conductive film 120b can be prevented. This is preferable because the resistance can be reduced. The structure is similar to that of the transistor 100 shown above, and the same effects are achieved.

[0154] In addition, the transistor according to the present embodiment is a transistor having the above structure, which is independently It is possible to combine them freely.

[0155] <1-4. Manufacturing method of semiconductor device> Next, a method for manufacturing the transistor 100B which is a semiconductor device of one embodiment of the present invention will be described. This will be explained with reference to FIG. 6 to FIG.

[0156] 6(A) to 6(C), 7(A) to 7(C), 8(A) to 8(C), 9C) and FIG. 9A to FIG. 9C are cross-sectional views illustrating a method for manufacturing a semiconductor device. 6(A) to 6(C), 7(A) to 7(C), 8(A) to 8(C), 9(A) to 9(C), the left side is a cross-sectional view in the channel length direction, The right side is a cross-sectional view in the channel width direction.

[0157] First, a conductive film is formed on the substrate 102, and the conductive film is then subjected to a lithography process and an etching process. Then, a conductive film 104 that functions as a first gate electrode is formed by carrying out a process. An insulating film 106 that functions as a first gate insulating film is formed on the conductive film 104 (FIG. 6(A)). reference).

[0158] In this embodiment, a glass substrate is used as the substrate 102, which functions as the first gate electrode. The conductive film 104 is a titanium film having a thickness of 50 nm and a copper film having a thickness of 200 nm. The insulating film 106 is formed by a nitride film having a thickness of 400 nm. A silicon film and a silicon oxynitride film having a thickness of 50 nm are formed by the PECVD method.

[0159] The silicon nitride film includes a first silicon nitride film, a second silicon nitride film, and a third silicon nitride film. The silicon nitride film 3 is a three-layer laminate structure. An example of the three-layer laminate structure is as follows: It can be formed as follows.

[0160] The first silicon nitride film is formed by, for example, silane at a flow rate of 200 sccm, PE-CV was performed using nitrogen at a flow rate of 100 sccm and ammonia gas at a flow rate of 100 sccm as source gas. The pressure in the reaction chamber was controlled to 100 Pa, and a 27.12 MHz high-frequency If a power of 2000 W is supplied using a frequency power supply and the thickness is formed to be 50 nm, good.

[0161] For the second silicon nitride film, silane at a flow rate of 200 sccm, The nitrogen gas and the ammonia gas with a flow rate of 2000sccm were used as raw material gases in the PECVD equipment. The pressure in the reaction chamber was controlled to 100 Pa, and a 27.12 MHz high-frequency power supply was used. A power of 2000 W may be supplied using the above method to form a film having a thickness of 300 nm.

[0162] The third silicon nitride film was prepared by using silane at a flow rate of 200 sccm and 5000 sccm. The pressure in the reaction chamber was kept at 100 The thickness was measured by controlling the temperature to 50 Pa and supplying 2000 W of power using a 27.12 MHz high frequency power source. It is sufficient to form it so that the thickness is 50 nm.

[0163] The first silicon nitride film, the second silicon nitride film, and the third silicon nitride film The substrate temperature during formation can be 350° C. or less.

[0164] By forming the silicon nitride film into the above-mentioned three-layer laminated structure, for example, the conductive film 104 can be made to contain copper. When a conductive film including the conductive material is used, the following effects are obtained.

[0165] The first silicon nitride film can suppress the diffusion of copper elements from the conductive film 104. The second silicon nitride film has a function of releasing hydrogen and acts as an insulating film that functions as a gate insulating film. The third silicon nitride film can improve the breakdown voltage of the film. The hydrogen released from the second silicon nitride film is small, and the diffusion of hydrogen released from the second silicon nitride film is suppressed. It is possible.

[0166] Next, an oxide semiconductor film 108_1_0, an oxide semiconductor film 108_2, 0 and an oxide semiconductor film 108_3_0 are formed (see FIGS. 6B and 6C).

[0167] Note that in FIG. 6B, an oxide semiconductor film 108_1_0 and an oxide semiconductor The inside of a deposition apparatus for forming the oxide semiconductor film 108_2_0 and the oxide semiconductor film 108_3_0 is In FIG. 6(B), a sputtering device is used as the film forming device. A target 191 is installed inside the targeting device, and a nucleus is formed below the target 191. The plasma 192 generated by the plasma generation is shown diagrammatically.

[0168] First, an oxide semiconductor film 108_1_0 is formed over the insulating film 106. When the body film 108_1_0 is formed, plasma is discharged in an atmosphere containing oxygen gas. At that time, oxygen is added to the insulating film 106 which is a surface on which the oxide semiconductor film 108_1_0 is to be formed. When the oxide semiconductor film 108_1_0 is formed, in addition to the oxygen gas, an inert gas Gases (eg, helium gas, argon gas, xenon gas, etc.) may be mixed. Note that the ratio of oxygen gas to the entire deposition gas when the oxide semiconductor film 108_1_0 is formed is The ratio of oxygen flow rate (hereinafter also referred to as oxygen flow rate ratio) is 70% or more and 100% or less, preferably 80% More preferably, it is 90% or more and 100% or less.

[0169] In FIG. 6B, oxygen or excess oxygen added to the insulating film 106 is shown as The oxide semiconductor film 108_1_0 is formed with the oxygen flow rate ratio in the above range. In this way, oxygen can be suitably added to the insulating film 106. The oxide semiconductor film 108_1_0 is formed at a flow rate of 1000 nm to 1000 nm. The crystallinity of _0 can be improved.

[0170] The thickness of the oxide semiconductor film 108_1_0 is preferably greater than or equal to 1 nm and less than 20 nm. Alternatively, the thickness may be set to 5 nm or more and 10 nm or less.

[0171] Next, the oxide semiconductor film 108_2_0 is formed over the oxide semiconductor film 108_1_0. The oxide semiconductor film 108_2_0 is formed by evaporating an inert gas or an oxygen gas or both of them. The oxygen flow rate ratio when the oxide semiconductor film 108_2_0 is formed is as follows: It is greater than 0% and equal to or less than 20%, preferably equal to or greater than 5% and equal to or less than 15%.

[0172] By forming the oxide semiconductor film 108_2_0 with the oxygen flow rate ratio in the above range, The crystallinity of the body film 108_2_0 can be reduced.

[0173] The thickness of the oxide semiconductor film 108_2_0 is 20 nm or more and 100 nm or less. The thickness is preferably 20 nm or more and 50 nm or less.

[0174] Next, the oxide semiconductor film 108_3_0 is formed over the oxide semiconductor film 108_2_0. The oxide semiconductor film 108_3_0 is formed in an atmosphere containing oxygen gas. The oxygen flow rate ratio when forming the film 108_3_0 is preferably 70% or more and 100% or less. The ratio is preferably 80% or more and 100% or less, and more preferably 90% or more and 100% or less.

[0175] By forming the oxide semiconductor film 108_3_0 with the oxygen flow rate ratio in the above range, In addition, oxygen can be suitably added to the membrane 108_2_0. By forming the oxide semiconductor film 108_3_0 in a ratio of The crystallinity can be increased.

[0176] The thickness of the oxide semiconductor film 108_3_0 is preferably greater than or equal to 1 nm and less than 20 nm. Alternatively, the thickness may be set to 5 nm or more and 15 nm or less.

[0177] As described above, the oxide semiconductor films 108_1_0 and 108_3_ The oxide semiconductor film 108_0 is preferably formed under a condition where the oxygen flow rate is higher than that of the oxide semiconductor film 108_2_0. In other words, the oxide semiconductor film 108_2_0 is The oxide semiconductor film 108_3_0 is formed at a lower oxygen partial pressure than either one or both of the oxide semiconductor film 108_3_0. It would be preferable if this could be done.

[0178] In addition, the oxide semiconductor film 108_1_0, the oxide semiconductor film 108_2_0, and the oxide semiconductor film The substrate temperature during the formation of the conductive film 108_3_0 is set to be equal to or higher than room temperature (25° C.) and equal to or lower than 200° C. The substrate temperature is preferably from room temperature to 130° C. By setting the substrate temperature in the above range, A glass substrate (e.g., the 8th or 10th generation glass substrate described above) is used. In particular, the oxide semiconductor film 108_1_0, the oxide semiconductor film 108_2_ 0, and the substrate temperature during deposition of the oxide semiconductor film 108_3_0 is room temperature. The bowing or distortion of the substrate can be suppressed.

[0179] Note that the oxide semiconductor film 108_1_0, the oxide semiconductor film 108_2_0, and the oxide semiconductor film By continuously forming the conductive film 108_3_0 in a vacuum, impurities are introduced into each interface. This is more preferable because it does not require

[0180] In addition, the sputtering gas must be highly purified. The oxygen gas and argon gas used in the present invention have a dew point of -40°C or less, preferably -80°C or less, and Preferably, the gas is purified to a temperature of -100°C or lower, more preferably -120°C or lower. By using the above, it is possible to prevent moisture and the like from being absorbed into the oxide semiconductor film as much as possible. .

[0181] In addition, when the oxide semiconductor film is formed by a sputtering method, The chamber is a clarified chamber to remove water and other impurities that may be harmful to the oxide semiconductor film as much as possible. A high vacuum (5×10) is created by using an adsorption type vacuum pump such as an ion pump. -7 Pa to 1 ×10 -4 It is preferable to evacuate the air to a pressure of about 10 Pa. H in the chamber at 2 Gas molecules equivalent to O (gas molecules equivalent to m / z = 18 The partial pressure of the -4 Pa or less, preferably 5×10 -5 It is preferable to set the value to 0.1 Pa or less. It is nice.

[0182] In this embodiment, the oxide semiconductor film 108_1_0 is formed under the conditions of In-Ga- Using a Zn metal oxide target (In:Ga:Zn=4:2:4.1 [atomic ratio]) The oxide semiconductor film 108_1_0 is formed by a sputtering method. The plate temperature is room temperature, and oxygen gas with a flow rate of 200 sccm is used as the deposition gas (oxygen flow rate ratio 100%).

[0183] The oxide semiconductor film 108_2_0 was formed under the following conditions: The sputtering was performed using a target of In:Ga:Zn=4:2:4.1 [atomic ratio]. The oxide semiconductor film 108_2_0 is formed by a deposition method. The deposition gas was oxygen gas with a flow rate of 20 sccm and argon gas with a flow rate of 180 sccm. A gas with an oxygen flow rate of 10% is used.

[0184] The oxide semiconductor film 108_3_0 was formed under the following conditions: The sputtering was performed using a target of In:Ga:Zn=4:2:4.1 [atomic ratio]. The oxide semiconductor film 108_3_0 is formed by a coating method. As the deposition gas, oxygen gas with a flow rate of 200 sccm is used (oxygen flow rate ratio 100%).

[0185] The oxide semiconductor film 108_1_0 and the oxide semiconductor film 108_3_0 By changing the oxygen flow rate ratio during film formation with 108_2_0, it is possible to form laminated films with different crystallinity. It is possible.

[0186] Next, the oxide semiconductor film 108_1_0, the oxide semiconductor film 108_2_0, and the oxide semiconductor film The conductive film 108_3_0 is processed into a desired shape to form an island-shaped oxide semiconductor film 108_1 Then, an island-shaped oxide semiconductor film 108_2 and an island-shaped oxide semiconductor film 108_3 are formed. In this embodiment, the oxide semiconductor film 108_1 and the oxide semiconductor film 108_2 The oxide semiconductor film 108 is formed by the oxide semiconductor film 108_1 and the oxide semiconductor film 108_3 (FIG. 7A). reference).

[0187] After the oxide semiconductor film 108 is formed, heat treatment (hereinafter referred to as first heat treatment) is performed. The first heat treatment is preferably performed to remove hydrogen from the oxide semiconductor film 108. The heat treatment for the purpose of reducing hydrogen, water, etc. The first heat treatment may be performed before processing the semiconductor film 108 into an island shape. This is one of the processes for purifying conductive films.

[0188] The first heat treatment is performed at a temperature of, for example, 150° C. or higher and lower than the distortion point of the substrate, preferably 200° C. °C or higher and 450 °C or lower, and more preferably 250 °C or higher and 350 °C or lower.

[0189] The first heat treatment can be performed using an electric furnace, an RTA device, or the like. By using this, it is possible to perform heat treatment at a temperature above the distortion point of the substrate for a short period of time. Therefore, the heating time can be shortened. Dry air (water content is 20 ppm or less, preferably 1 ppm or less, preferably 10 ppm The reaction may be carried out under an atmosphere of air (air (B) or less) or a rare gas (argon, helium, etc.). It is preferable that the nitrogen, oxygen, ultra-dry air, or rare gas does not contain hydrogen, water, etc. In addition, after heat treatment in a nitrogen or rare gas atmosphere, it is heated in an oxygen or ultra-dry air atmosphere. As a result, hydrogen, water, and the like contained in the oxide semiconductor film are released, and the oxide semiconductor film is deoxidized. As a result, oxygen can be supplied to the oxide semiconductor film. The oxygen deficiency can be reduced.

[0190] Next, the conductive film 112 is formed over the insulating film 106 and the oxide semiconductor film 108 (FIG. See B).

[0191] In this embodiment, the conductive film 112 is a titanium film having a thickness of 30 nm and a SiO 2 film having a thickness of 200 nm. A copper film having a thickness of 10 nm and a titanium film having a thickness of 10 nm are formed in this order by sputtering. do.

[0192] Next, the conductive film 112 is processed into a desired shape to form an island-shaped conductive film 112a and an island-shaped conductive film 112b. A conductive film 112b is formed (see FIG. 7C).

[0193] In this embodiment, the conductive film 112 is processed using a wet etching apparatus. However, the method for processing the conductive film 112 is not limited to this. For example, a dry air An etching device may also be used.

[0194] After the conductive films 112a and 112b are formed, the oxide semiconductor film 108 (more specifically, The surface (back channel side) of the oxide semiconductor film 108_3) may be cleaned. For example, cleaning with a chemical solution such as phosphoric acid can be used. By cleaning the oxide semiconductor film 108_3, impurities (e.g., conductive impurities) attached to the surface of the oxide semiconductor film 108_3 can be removed. The cleaning can remove elements contained in the films 112a and 112b. It is not necessarily required, and in some cases cleaning may not be required.

[0195] In addition, either one of the steps of forming the conductive films 112a and 112b and the above-mentioned cleaning step may be performed. In either case, the region of the oxide semiconductor film 108 that is exposed from the conductive films 112a and 112b is But it may become thinner.

[0196] In the semiconductor device according to one embodiment of the present invention, the conductive films 112a and 112b are not exposed. The oxide semiconductor film 108_3 is an oxide semiconductor film with improved crystallinity. The oxide semiconductor film with high crystallinity is preferably used for preventing impurities, particularly in the structure used for the conductive films 112a and 112b. This structure makes it difficult for the compositional elements to diffuse into the film. Therefore, a highly reliable semiconductor device can be provided. It is possible.

[0197] In addition, in FIG. 7C, the oxide semiconductor film 1 exposed from the conductive films 112a and 112b is Regarding the case where a recess is formed on the surface of the oxide semiconductor film 108_3, that is, on the surface of the oxide semiconductor film 108_3, However, the present invention is not limited to this example. The surface of 108 may not have any recesses.

[0198] Next, the insulating film 114 and the conductive films 112a and 112b are formed over the oxide semiconductor film 108 and the conductive films 112a and 112b. An insulating film 116 is formed (see FIG. 8(A)).

[0199] After the insulating film 114 is formed, the insulating film 116 is successively formed without exposing it to the air. After the insulating film 114 is formed, it is preferable to adjust the flow rate, pressure, and temperature of the source gas without exposing the insulating film 114 to the air. By adjusting one or more of the frequency power and the substrate temperature, the insulating film 116 is continuously formed. The concentration of impurities derived from atmospheric components can be reduced at the interface between the insulating film 114 and the insulating film 116. can.

[0200] For example, a silicon oxynitride film is formed as the insulating film 114 by using a PECVD method. In this case, the source gas may be a deposition gas containing silicon and an oxidizing gas. Representative examples of deposition gases containing silicon include silane, disilane, etc. Examples of oxidizing gases include nitrous oxide, nitrous oxide, and trisilane. In addition, the flow rate of the oxidizing gas is set to 20 times or more than 50 times the flow rate of the deposition gas. 00 times or less, preferably 40 times or more and 100 times or less.

[0201] In this embodiment, the insulating film 114 is formed by heating the substrate 102 at a temperature of 220° C. The source gases were silane at a flow rate of 50 sccm and dinitrogen monoxide at a flow rate of 2000 sccm. The pressure in the treatment chamber was set to 20 Pa, and the high frequency power supplied to the parallel plate electrodes was set to 13.56 M. Hz, 100W (power density is 1.6×10 -2 W / cm 2 ) PECVD method A silicon oxynitride film is formed using this.

[0202] The insulating film 116 is formed by depositing a substrate in a vacuum-evacuated processing chamber of a PECVD apparatus. The temperature is kept at 180°C or higher and 350°C or lower, and the raw material gas is introduced into the treatment chamber to increase the pressure in the treatment chamber. is set to 100 Pa or more and 250 Pa or less, and more preferably set to 100 Pa or more and 200 Pa or less. 0.17 W / cm2 at the electrode installed in the treatment chamber 2 More than 0.5W / cm 2 Below are some more Preferably 0.25W / cm 2 More than 0.35W / cm 2 The following high frequency power supply conditions are met: In this way, a silicon oxide film or a silicon oxynitride film is formed.

[0203] The conditions for forming the insulating film 116 are as follows: high frequency power density in a reaction chamber with the above pressure; By supplying power, the efficiency of decomposition of the source gas in the plasma increases, and the number of oxygen radicals increases. As the oxidation of the source gas progresses, the oxygen content in the insulating film 116 becomes lower than the stoichiometric composition. On the other hand, in the film formed at the above substrate temperature, the bonding strength between silicon and oxygen is Since the oxygen in the film is weak, some of the oxygen in the film is released by the heat treatment in the subsequent process. An oxide that contains more oxygen than satisfies the theoretical composition and loses some of the oxygen when heated. An insulating film can be formed.

[0204] In the step of forming the insulating film 116, the insulating film 114 serves as a protection film for the oxide semiconductor film 108. Therefore, the power density can be reduced while reducing damage to the oxide semiconductor film 108. The insulating film 116 can be formed using high radio frequency power.

[0205] In the deposition conditions for the insulating film 116, a deposition gas containing silicon is mixed with an oxidizing gas. By increasing the flow rate of the gas, it is possible to reduce the amount of defects in the insulating film 116. In the first place, ESR measurements revealed that the g value was 2.001, which is due to the dangling bonds of silicon. The spin density of the signal is 6×10 17 spins / cm 3 Less than 3 x 10 17 spins / cm 3 Less than or equal to 1.5×10 17 spins / cm 3 The following is a missing As a result, the signal quality of the transistor 100 can be improved. It can increase reliability.

[0206] After the insulating films 114 and 116 are formed, heat treatment (hereinafter referred to as second heat treatment) is performed. The nitrogen oxide contained in the insulating films 114 and 116 is preferably removed by the second heat treatment. Alternatively, the second heat treatment can reduce the amount of oxides in the insulating films 114 and 116. Part of the oxygen contained in the oxide semiconductor film 108 is transferred to the oxide semiconductor film 108. This can reduce the oxygen vacancies that occur.

[0207] The temperature of the second heat treatment is typically less than 400° C., preferably less than 375° C., and The second heat treatment is preferably performed at a temperature of 150° C. or higher and 350° C. or lower. Dry air (water content is 20 ppm or less, preferably 1 ppm or less, preferably 10 ppb The reaction may be carried out under an atmosphere of air (see below) or a rare gas (argon, helium, etc.). It is preferable that the nitrogen, oxygen, ultra-dry air, or rare gas does not contain hydrogen, water, or the like. The heat treatment can be performed using an electric furnace, RTA, or the like.

[0208] Next, openings 142a and 142b are formed in desired regions of the insulating films 114 and 116 (FIG. 8(B)).

[0209] In this embodiment, the openings 142a and 142b are formed using a dry etching device. The opening 142a reaches the conductive film 112b, and the opening 142b is formed by The membrane 104 is reached.

[0210] Next, a conductive film 120 is formed over the insulating film 116 (see FIGS. 8C and 9A).

[0211] FIG. 8C is a cross-sectional view of the inside of a film forming apparatus when a conductive film 120 is formed on the insulating film 116. In FIG. 8(C), a sputtering device is used as the film forming device. A target 193 is installed inside the targeting device, and a ion beam is formed below the target 193. The plasma 194 is shown diagrammatically.

[0212] First, when forming the conductive film 120, plasma is discharged in an atmosphere containing oxygen gas. At this time, oxygen is added to the insulating film 116, which is the surface on which the conductive film 120 is to be formed. When forming the conductive film 120, in addition to oxygen gas, an inert gas (e.g., helium gas, Argon gas, xenon gas, etc.) may be mixed.

[0213] The oxygen gas may be contained at least when the conductive film 120 is formed. The ratio of oxygen gas in the entire deposition gas when forming the film 120 is greater than 0%. 100% or less, preferably 10% to 100%, more preferably 30% to 100%. % or less.

[0214] In addition, in FIG. 8C, oxygen or excess oxygen added to the insulating film 116 is shown as It is represented by a dashed arrow.

[0215] In this embodiment, an In-Ga-Zn metal oxide target (In:Ga:Zn=4: 2:4.1 [atomic ratio], the conductive film 120 is formed by sputtering.

[0216] Note that in this embodiment, oxygen is added to the insulating film 116 when the conductive film 120 is formed. However, the present invention is not limited to this. For example, after the conductive film 120 is formed, Oxygen may be added to the insulating film 116.

[0217] As a method for adding oxygen to the insulating film 116, for example, indium, tin, and silicon An oxide (also called In-Sn-Si oxide, ITSO) target (In 2 O 3 :SnO 2 :SiO 2 = 85:10:5 [wt %]) and a 5 nm thick ITSO In this case, the thickness of the ITSO film is 1 nm or more and 20 nm or less. Alternatively, when the thickness is set to 2 nm or more and 10 nm or less, oxygen can be suitably transmitted and oxygen release can be suppressed. Then, oxygen is added to the insulating film 116 by passing it through an ITSO film. The method of adding the element includes ion doping, ion implantation, plasma treatment, etc. In addition, when oxygen is added, a bias voltage is applied to the substrate side to effectively The insulating film 116 can be applied with a bias voltage of, for example, asyn The power density of the bias voltage applied to the substrate side of the ashing device was set to 1 W / cm. m 2 More than 5W / cm 2 The substrate temperature when oxygen is added is as follows: The insulating film 1 is formed by heating the insulating film 1 at a temperature of from room temperature to 300° C., preferably from 100° C. to 250° C. Oxygen can be efficiently added to 16.

[0218] Next, the conductive film 120 is processed into a desired shape to form island-shaped conductive films 120a and island-shaped A conductive film 120b is formed (see FIG. 9B).

[0219] In this embodiment mode, the conductive film 120 is processed using a wet etching apparatus.

[0220] Next, an insulating film 118 is formed on the insulating film 116 and the conductive films 120a and 120b (FIG. 9(C)).

[0221] The insulating film 118 contains either hydrogen or nitrogen, or both. For example, a silicon nitride film is preferably used as the insulating film 118. For example, it can be formed by using a sputtering method or a PECVD method. When the insulating film 118 is formed by the PECVD method, the substrate temperature is set to less than 400° C., preferably less than 375° C. The temperature is preferably less than 180° C. and more preferably 350° C. or higher. In this case, it is preferable to set the substrate temperature in the above-mentioned range since a dense film can be formed. By setting the substrate temperature in the above range when forming the insulating film 118, the insulating films 114 and 1 Therefore, oxygen or excess oxygen in the oxide semiconductor film 106 can be moved to the oxide semiconductor film 108.

[0222] In addition, when a silicon nitride film is formed as the insulating film 118 by the PECVD method, silicon It is preferable to use a deposition gas containing nitrile, nitrogen, and ammonia as the source gas. By using a small amount of ammonia compared to hydrogen, ammonia dissociates in the plasma and becomes active. The active species are generated by bonding with silicon and hydrogen contained in the silicon-containing deposition gas. This breaks the triple bond between silicon and nitrogen. As a result, the bond between silicon and nitrogen is promoted, It is possible to form a dense silicon nitride film with few silicon and hydrogen bonds and few defects. On the other hand, if the amount of ammonia relative to nitrogen is large, the deposition gas containing silicon and the nitrogen The decomposition of the silicon does not proceed, silicon and hydrogen bonds remain, and defects increase and the material becomes rough. For these reasons, the source gas is not suitable for ammonia. It is preferable that the flow rate ratio of nitrogen to oxygen is 5 times or more and 50 times or less, and more preferably 10 times or more and 50 times or less.

[0223] In this embodiment, the insulating film 118 is formed by depositing silane, nitrogen, etc., using a PECVD apparatus. A silicon nitride film with a thickness of 50 nm is formed using nitrogen and ammonia as source gases. The flow rates were 50 sccm for silane, 5000 sccm for nitrogen, and 100 for ammonia. The pressure in the processing chamber was 100 Pa, the substrate temperature was 350°C, and the flow rate was 27.12 MWh. A high-frequency power supply of 1000 W is supplied to the parallel plate electrodes. The device has an electrode surface area of ​​6000 cm 2 The parallel plate type PECVD equipment is The force can be converted to power per unit area (power density) of 1.7 x 10 -1 W / cm 2 is .

[0224] The conductive films 120a and 120b were formed using an In-Ga-Zn metal oxide target (I When a conductive film is formed using a material with an atomic ratio of n:Ga:Zn=4:2:4.1, the insulating film By forming the insulating film 118, one or both of hydrogen and nitrogen contained in the insulating film 118 are removed. In this case, the conductive film 120a, The oxygen vacancy in 120b is bonded to either hydrogen or nitrogen or both to form a conductive layer. The resistance of the conductive films 120a and 120b may decrease.

[0225] After the insulating film 118 is formed, the insulating film 118 is heated by the same heat treatment as the first heat treatment and the second heat treatment described above. A heat treatment (hereinafter referred to as a third heat treatment) may be performed.

[0226] By performing the third heat treatment, oxygen in the insulating film 116 is converted into oxygen in the oxide semiconductor film 108. The oxygen vacancies in the oxide semiconductor film 108 are filled by the oxygen vacancies.

[0227] Through the above steps, the transistor 100B shown in FIGS. 3A, 3B, and 3C can be manufactured. Cut.

[0228] Note that the transistor 100 shown in FIGS. 1A, 1B, and 1C may be a transistor having a structure similar to that shown in FIG. After the steps are performed, the insulating film 118 is formed. The transistor 100A shown in (A), (B), and (C) includes conductive films 112a and 112b. The insulating films 114 and 116 are formed in a different order, and an opening 141a is formed in the insulating films 114 and 116. , 141b can be fabricated by adding a step of forming the insulating film 141a.

[0229] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0230] (Embodiment 2) In this embodiment, an oxide semiconductor film which is one embodiment of the present invention will be described with reference to FIGS. The explanation will be given using:

[0231] The oxide semiconductor film of one embodiment of the present invention preferably contains at least indium and zinc. In addition to these, aluminum, gallium, yttrium, tin, etc. It is preferable that boron, silicon, titanium, iron, nickel, germanium, etc. are contained. nium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum One or more of the following elements are included: tungsten, tungsten, magnesium, etc. It may be possible.

[0232] Here, the case where the oxide semiconductor film contains indium, the element M, and zinc is considered. The element M is aluminum, gallium, yttrium, tin, etc. Applicable elements for element M are boron, silicon, titanium, iron, nickel, and germanium. Cr, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum However, the element M may be any of the above elements. There are cases where it is okay to combine them.

[0233] <2-1. Conceptual diagram of top view and cross section of oxide semiconductor film> 11 to 14 are conceptual diagrams of an oxide semiconductor film according to one embodiment of the present invention. 12A, 13A, and 14A are views showing the top surface (a- 11(B), 12(B), 13(B), and 14( B) is a schematic diagram of a cross section (c-axis direction) of an oxide semiconductor film formed on a substrate (Sub.). be.

[0234] First, a description will be given with reference to FIGS.

[0235] As shown in FIGS. 11A and 11B, the oxide semiconductor film of one embodiment of the present invention includes a region A and a region B. That is, the oxide semiconductor film of one embodiment of the present invention has a region A and a region B. The region A is a composite oxide semiconductor containing In. x Zinc y O z (x, y, and z represents an arbitrary number), and region B is represented by In a M b Zinc c O d (M is Al, Ga, Y, or Sn, and a, b, c, and d represent any number. A may contain M.

[0236] In addition, the region A has a higher concentration of In than the region B. In other words, the region A has a higher concentration of In For example, area A is in the region B, and area B is in-poor. The concentration of In is at least 1.1 times that of B, and preferably from 2 to 10 times.

[0237] As shown in FIG. 11A, the region A is basically a circular region in the ab plane direction. As shown in FIG. 11B, the region A is formed in a shape similar to that of the region A in the c-axis direction. Basically, the region A is formed in an island shape. Region A is surrounded by region B. As shown in FIG. 11(A) and (B), region A is surrounded by region B. The areas are irregularly distributed. Therefore, multiple areas in area A are connected together, forming a shape similar to a circle or ellipse. However, if all the regions A are connected in the c-axis direction, the transistor The switching characteristics deteriorate. For example, the off-state current of the transistor increases. As shown in A)(B), it is preferable that the regions A are scattered.

[0238] The ratio of the dots of the region A can be adjusted by the manufacturing conditions or composition of the composite oxide semiconductor. For example, as shown in FIG. 12(A)(B), the ratio of area A is small. A composite oxide semiconductor, or a composite oxide semiconductor with a high ratio of region A as shown in Fig. 13(A)(B). In addition, the composite oxide semiconductor can be formed in the region A with respect to the region B. In complex oxide semiconductors where the proportion of region A is very large, Depending on the range, region B may be formed within region A.

[0239] In addition, for example, the size of the island formed by region A depends on the manufacturing conditions of the complex oxide semiconductor. The condition or composition can be adjusted. In Fig. 13(A) and (B), island-like regions of various sizes are formed. As shown in Fig. 14(A) and (B), the area A is roughly the same size as the point. There may be some.

[0240] In addition, as shown in FIG. 11(A) and (B), the boundary between region A and region B is not clear. In some cases, the boundary between region A and region B cannot be observed. can be evaluated by EDX mapping of the cross-sectional photograph. In EDX mapping, 0.1 nm to 5 nm or 0.3 nm to 3 nm It may be observed in.

[0241] Region A is In-rich and therefore has the function of increasing carrier mobility. The on-state current and the field-effect mobility of a transistor using an oxide semiconductor film having the region A are shown in FIG. On the other hand, since region B is in-poor, the carrier mobility can be improved. Therefore, the transistor using the oxide semiconductor film having the region B has a function of reducing the In other words, the region A has a low on-current of the transistor. and region B contributes to the field effect mobility, and region B contributes to the switching characteristics of the transistor.

[0242] In this manner, the oxide semiconductor film according to one embodiment of the present invention has a complex structure in which the region A and the region B are mixed. A compound oxide semiconductor, and the functions of region A and region B are different from each other, Region B functions in a complementary manner. For example, in the In-Ga-Zn oxide where element M is Ga, In the case of an oxide semiconductor film of one embodiment of the present invention, It can be called mentary IGZO (abbreviation: C / IGZO).

[0243] On the other hand, for example, in the case where region A and region B are laminated in layers, region A and region B There is no interaction between the functions of area A and area B, or the interactions are unlikely to occur between them. In this case, the field effect transfer function is controlled by region A. Even if the temperature can be increased, the off-state current of the transistor may be increased. Therefore, the oxide semiconductor film of one embodiment of the present invention can be formed using the above-described composite oxide semiconductor or C / The use of IGZO provides functions with high field effect mobility and good switching characteristics. This is achieved by using the oxide semiconductor film of one embodiment of the present invention. This is an excellent effect that can be achieved.

[0244] Note that in FIG. 11A and FIG. 11B, an oxide semiconductor film is formed over a substrate. However, the present invention is not limited thereto, and may be applied to a base film or an interlayer film between a substrate and an oxide semiconductor film. Alternatively, an insulating film such as a SiO 2 film or another semiconductor film such as an oxide semiconductor film may be formed.

[0245] <2-2. Atomic ratio of oxide semiconductor film> Next, the atomic ratio of the oxide semiconductor film of one embodiment of the present invention will be described with reference to FIGS. .

[0246] When a substance contains elements X, Y, and Z, the atomic ratio of each element is shown in Figure 15. The atomic ratio of element X, element Y, and element Z can be expressed as x The atomic ratio is expressed as x:y:z using the coordinates (x:y:z). It should be noted that the atomic ratio of oxygen is not shown in FIG.

[0247] In FIG. 15, the dashed line indicates [In]:[M]:[Zn]=(1+α):(1-α):1 The line where the atomic ratio (-1≦α≦1) is, [In]:[M]:[Zn]=(1+α): The line where the atomic ratio is (1-α):2, [In]:[M]:[Zn]=(1+α):( The line where the atomic ratio is 1-α):3, [In]:[M]:[Zn]=(1+α):(1 -α):4, and the line with the atomic ratio [In]:[M]:[Zn]=(1+α): This represents the line where the atomic ratio is (1-α):5.

[0248] The dashed line indicates the atomic ratio of [In]:[M]:[Zn]=1:1:β (β≧0). The line where the atomic ratio of [In]:[M]:[Zn]=1:2:β is The line where the atomic ratio is 1:3:β, [In]:[M]:[Zn ]=1:4:β atomic ratio line, [In]:[M]:[Zn]=2:1:β atomic ratio line The line with the atomic ratio of [In]:[M]:[Zn]=5:1:β , and the line where the atomic ratio of [In]:[M]:[Zn]=1:7:β.

[0249] In addition, the atomic ratio of [In]:[M]:[Zn]=0:2:1 shown in FIG. 15 or An oxide semiconductor film having a near-zero value tends to have a spinel crystal structure.

[0250] In addition, region A shown in FIG. 15 is a region with a large amount of In ([In]:[M]:[Zn]=x:y :z (x>0, y≧0, z≧0) region) This shows an example of a preferred range. Region A is [In]:[M]:[Zn] This also includes the line where the atomic ratio is (1+γ):0:(1-γ) (-1<γ≦1). do.

[0251] In addition, region B shown in FIG. 15 is a region with less In than region A ([In]:[M]:[ Zn]=m:n:l (m>0, n≧0, l≧0)) The figure shows an example of a preferable range of the numerical ratio. Zn]=4:2:3 to 4.1, including neighboring values. Neighboring values ​​include, for example, the number of atoms The ratio of [In]:[M]:[Zn]=5:3:4 is included. Region B is [In]: [M]:[Zn]=5:1:6 and its neighboring values. The atomic ratio shown in region B is The oxide semiconductor film has particularly favorable crystallinity.

[0252] When the oxide semiconductor film is formed by a sputtering apparatus, the atomic ratio of the target In particular, depending on the substrate temperature during film formation, the thickness of the film may differ from that of the film. In some cases, the atomic ratio of [Zn] in the film may be smaller than that of the target.

[0253] <2-3. Sputtering equipment> Here, an example of a sputtering apparatus will be described with reference to FIGS. 16(A) and 16(B). .

[0254] FIG. 16(A) is a cross-sectional view illustrating a film formation chamber 2501 of a sputtering apparatus. FIG. 16B shows a magnet unit 2530a and a magnet 25 is a plan view of the magnet unit 2530b.

[0255] The deposition chamber 2501 shown in FIG. 16(A) includes a target holder 2520a and a target holder 2520b. 2520b, backing plate 2510a, backing plate 2510b , target 2500a, target 2500b, member 2542, and substrate holder 25 70. The target 2500a is mounted on a backing plate 2510a. The backing plate 2510a is placed on the target holder 2520a. The magnet unit 2530a is arranged so that the backing plate 2510a is The target 2500b is placed under the target 2500a through a backing. The backing plate 2510b is disposed on the target The magnet unit 2530b is disposed on the backing holder 2520b. The target 2500b is disposed below the target 2500b via a mounting plate 2510b.

[0256] As shown in FIGS. 16A and 16B, the magnet unit 2530a includes a magnet 25 30N1, magnet 2530N2, magnet 2530S, and magnet holder 2 In the magnet unit 2530a, the magnet 253 0N1, magnet 2530N2 and magnet 2530S are attached to magnet holder 253 2. The magnet 2530N1 and the magnet 2530N2 are magnets. The magnet unit 2530b is disposed at a distance from the net 2530S. The magnet unit 2501 has a structure similar to that of the magnet unit 2530a. When loading 60 , the substrate 2560 is placed against the substrate holder 2570 .

[0257] Target 2500a, backing plate 2510a and target holder 2520 a, a target 2500b, a backing plate 2510b and a target holder 25 20b are separated by a member 2542. The member 2542 is an insulator. However, the member 2542 may be a conductor or a semiconductor. Alternatively, the member 2542 may be a conductor or semiconductor whose surface is covered with an insulator. .

[0258] The target holder 2520a and the backing plate 2510a are connected by screws (bolts, etc. The target holder 2520a is fixed to the target holder 2520b using a backplane. It has a function of supporting the target 2500a via the king plate 2510a. The target holder 2520b and the backing plate 2510b are secured to each other by screws (bolts, etc.). The target holder 2520b is fixed to the target holder 2520b using a backplane. It has the function of supporting the target 2500b via the king plate 2510b.

[0259] The backing plate 2510a has a function of fixing the target 2500a. In addition, the backing plate 2510b has a function of fixing the target 2500b.

[0260] In addition, in FIG. 16(A), the magnetic field lines 2 formed by the magnet unit 2530a are 580a, 2580b are explicitly stated.

[0261] As shown in FIG. 16B, the magnet unit 2530a has a rectangular or approximately A rectangular magnet 2530N1 and a rectangular or nearly rectangular magnet 2530N2. A rectangular or approximately rectangular magnet 2530S is fixed to a magnet holder 2532. The magnet unit 2530a has a configuration as shown in FIG. For example, the magnet unit 2530a can be rotated left and right as shown by the arrow. It is sufficient to oscillate it at a beat of 0.1 Hz or more and 1 kHz or less.

[0262] The magnetic field on the target 2500a changes with the oscillation of the magnet unit 2530a. The area with a strong magnetic field becomes a high-density plasma area, and the target 2 The sputtering phenomenon of 500a is likely to occur. This is due to the magnet unit 2530b The same applies to.

[0263] Here, the target 2500a and the target 2500b are made of In-Ga-Zn oxide. Consider the case of targets 2500a and 2500b. b has a composition of In:Ga:Zn=4:2:4.1 [atomic ratio]. In the case of a sputtering apparatus having the above structure, a deposition model of an oxide semiconductor film according to one embodiment of the present invention is as follows. It can be thought of as follows.

[0264] The gases introduced into the sputtering device were argon gas and oxygen gas. In addition, the voltage V1 applied to the terminal V1 connected to the target holder 2520a is The potential is set to be lower than the potential applied to terminal V2 connected to the substrate holder 2570. The potential applied to the terminal V4 connected to the target holder 2520b is the same as that applied to the substrate holder 2520b. The potential is set to be lower than that of terminal V2 connected to substrate holder 2570. The potential applied to the terminal V2 is the ground potential. The potential applied to the connecting terminal V3 is the ground potential.

[0265] The potentials applied to terminals V1, V2, V3, and V4 are the above potentials. In addition, the target holder 2520, the substrate holder 2570, the magnet holder It is not necessary to apply a potential to all of the substrates 2532. For example, if the substrate holder 2570 is The voltage applied to the terminal V1 can be controlled. A power source capable of being electrically connected to the equipment is assumed. The power source may be a DC power source, an AC power source, or An RF power source can be used.

[0266] First, argon gas or oxygen gas is ionized in the film formation chamber 2501 into positive ions and electrons. The positive ions in the plasma are attracted to the target holder 2520a. The applied potential V1 and the potential V4 applied to the target holder 2520b cause The positive ions are accelerated toward targets 2500a and 2500b. a, 2500b, sputter particles are generated, and the sputter particles are deposited on the substrate 2560. Children pile up.

[0267] The targets 2500a and 2500b are In-Ga-Zn oxide targets. In this case, the relative atomic masses of the positive ions collide with the targets 2500a and 2500b. Ga and Zn, which are lighter than In, are preferentially ejected from targets 2500a and 2500b. The target 2500a and the target 2500b are deposited on the substrate 2560. Since In and Zn are desorbed, In is segregated. In, segregated on the surface of 2500b, is ejected from targets 2500a and 2500b. Deposited on a substrate 2560.

[0268] By going through the above-described film formation model, the region A shown in FIGS. It is believed that a complex oxide semiconductor in which region A and region B are mixed is formed.

[0269] <2-4. Carrier density of oxide semiconductor film> Next, the carrier density of the oxide semiconductor film will be described below.

[0270] The factors that affect the carrier density of an oxide semiconductor film include oxygen in the oxide semiconductor film, Examples of the causes include vacancies (Vo) and impurities in the oxide semiconductor film.

[0271] When the number of oxygen vacancies in the oxide semiconductor film increases, hydrogen bonds to the oxygen vacancies (this state is called Vo When the oxide semiconductor film is heated to 1000 V, the density of defect states increases. When the amount of the impurities increases, the density of defect states due to the impurities increases. By controlling the density of defect states in the oxide semiconductor film, the carrier density in the oxide semiconductor film can be controlled. do.

[0272] Here, a transistor in which an oxide semiconductor film is used for a channel region will be considered.

[0273] Suppression of negative shift of the threshold voltage of a transistor or suppression of off-current of a transistor In order to reduce the carrier density of the oxide semiconductor film, it is preferable to reduce the carrier density of the oxide semiconductor film. In the case where the carrier density of the oxide semiconductor film is reduced, impurities in the oxide semiconductor film It is sufficient to lower the impurity concentration and the defect level density. A material with a low density of defect states is called high purity intrinsic or substantially high purity intrinsic. The carrier density of the oxide semiconductor film is 8×10 15 cm-3 Less than 1 ×10 11 cm -3 less than 1×10 10 cm -3 Less than 1 x 10 -9 cm -3 That should be enough.

[0274] On the other hand, the improvement of the on-state current of a transistor or the field effect mobility of a transistor In that case, it is preferable to increase the carrier density of the oxide semiconductor film. In order to increase the carrier density of the oxide semiconductor film, the impurity concentration of the oxide semiconductor film is Alternatively, the density of defect states in the oxide semiconductor film may be increased slightly. Alternatively, the band gap of the oxide semiconductor film may be made smaller. In the range where the on / off ratio of the Id-Vg characteristics is obtained, the impurity concentration is slightly high, or An oxide semiconductor film having a high density of defect states or a slightly high density of defect states can be regarded as substantially intrinsic. The electron affinity is large, and the band gap is small, resulting in thermal excitation. The oxide semiconductor film in which the density of trapped electrons (carriers) is increased can be regarded as being substantially intrinsic. In addition, when an oxide semiconductor film having a higher electron affinity is used, the threshold voltage of the transistor is The voltage becomes lower.

[0275] The carrier density of a substantially intrinsic oxide semiconductor film is 1×10 5 cm -3 More than 1×10 1 8 cm -3 Less than 1×10 is preferable. 7 cm -3 More than 1×10 17 cm -3 The following is preferred: 1×109 cm -3 5×10 or more 16 cm -3 More preferably, 1×10 10 cm -3 More than 1×10 16 cm -3 More preferably, 1×10 11 cm -3 Below top 1×10 15 cm -3 The following is even more preferred:

[0276] In addition, by using the above-described substantially intrinsic oxide semiconductor film, the reliability of the transistor can be improved. Here, referring to FIG. 17, when an oxide semiconductor film is used for a channel region, The reason why the reliability of a transistor is improved will be described. 1 is a diagram illustrating an energy band in a transistor used in a channel region.

[0277] In FIG. 17, GE denotes a gate electrode, GI denotes a gate insulating film, and OS denotes an oxide semiconductor film. 17, the gate electrode is connected to the gate electrode, and SD is connected to the source electrode or drain electrode. a gate electrode, a gate insulating film, an oxide semiconductor film, and a source electrode or is an example of an energy band of the drain electrode.

[0278] In FIG. 17, a silicon oxide film is used as the gate insulating film, and an oxide semiconductor The structure uses In-Ga-Zn oxide as the film. The defect transition level (εf) is located about 3.1 eV away from the conduction band edge of the gate insulating film. The oxide semiconductor film and the silicon oxide film are formed when the gate voltage (Vg) is 30 V. The Fermi level (Ef) of the silicon oxide film at the interface with the gate insulating film is below the conduction band of the The ferroelectric film is formed at a distance of about 3.6 eV from the edge of the silicon oxide film. The electron level varies depending on the gate voltage. For example, by increasing the gate voltage, the oxide Fermi level (Ef) of the silicon oxide film at the interface between the semiconductor film and the silicon oxide film The white circles in Fig. 17 represent electrons (carriers), and X in Fig. 17 represents silicon oxide. This represents the defect level in the silicon film.

[0279] As shown in FIG. 17, when a gate voltage is applied, for example, carriers are thermally excited. When this happens, carriers are trapped in the defect level (X in the figure), and the charge changes from positive ("+") to neutral. The charge state of the defect level changes to “0”. That is, the Fermi level of the silicon oxide film The sum of (Ef) and the thermal excitation energy mentioned above is higher than the defect transition level (εf). When the charge level of the defect in the silicon oxide film is increased, the charge state of the defect level in the silicon oxide film changes from a positive state to a neutral state, and a transistor This causes the threshold voltage of the transistor to shift in the positive direction.

[0280] In addition, when oxide semiconductor films having different electron affinities are used, The depth at which the Fermi level is formed at the interface with the oxide with a large electron affinity may differ. When an oxide semiconductor film is used, the gate insulating film is In this case, the defect level that may be formed in the gate insulating film is The Fermi level of the gate insulating film and the oxide semiconductor The energy difference between the Fermi level of the film becomes large. Therefore, the amount of electric charge trapped in the gate insulating film is reduced. The change in the charge state of the defect level that can be formed in the gate bias heat (Gate Bias Temperature (GBT) stress on transistors This can reduce the variation in the threshold voltage of the transistor.

[0281] In addition, in a transistor using an oxide semiconductor film for a channel region, carriers at grain boundaries This reduces scattering and other problems, making it possible to realize transistors with high field effect mobility. In addition, a highly reliable transistor can be realized.

[0282] In addition, it takes a long time for charges trapped in defect states in the oxide semiconductor film to disappear. Therefore, in the case of oxides with high defect level density, Transistors in which the channel region is formed in a semiconductor film may have unstable electrical characteristics. be.

[0283] Therefore, in order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor film is In order to reduce the impurity concentration in the oxide semiconductor film, It is preferable that the impurity concentration in the adjacent film is also reduced. , alkali metals, alkaline earth metals, iron, nickel, silicon, etc.

[0284] Here, the influence of each impurity in the oxide semiconductor film will be described.

[0285] When silicon or carbon, which is one of the group 14 elements, is contained in the oxide semiconductor film, Therefore, the defect level is generated in the silicon oxide semiconductor film. The concentration of silicon and carbon near the interface with the oxide semiconductor film (secondary ion mass) Secondary Ion Mass Spectrometer (SIMS) The concentration obtained by y) is 2 × 10 18 atoms / cm 3 Below, preferably 2 x 1 0 17 atoms / cm 3 The following applies.

[0286] In addition, when an alkali metal or an alkaline earth metal is contained in the oxide semiconductor film, a defect level Therefore, alkali metal or alkaline earth metals may form A transistor using an oxide semiconductor film containing metals tends to be normally on. For this reason, it is necessary to reduce the concentration of the alkali metal or the alkaline earth metal in the oxide semiconductor film. Specifically, it is preferable to obtain an alkali metal oxide film in the oxide semiconductor film by SIMS. The concentration of alkaline earth metals is 1×10 18 atoms / cm 3 Hereinafter, preferably 2×10 16 atoms / cm 3 To the following:

[0287] In addition, hydrogen contained in the oxide semiconductor film reacts with oxygen that is bonded to metal atoms to form water. Therefore, oxygen vacancies may be formed. When hydrogen enters the oxygen vacancies, the carrier Electrons may be produced. Also, some of the hydrogen may combine with oxygen, which combines with the metal atom, Therefore, the oxide semiconductor film containing hydrogen may generate electrons, which are carriers. A transistor using such a semiconductor film tends to be normally on. It is preferable that the amount of hydrogen in the oxide semiconductor film is as small as possible. The hydrogen concentration obtained by SIMS was 1×10 20 atoms / cm3 Less than, preferred 1×10 19 atoms / cm 3 less than 5×10 18 atoms / c m 3 less than 1×10 18 atoms / cm 3 Less than.

[0288] An oxide semiconductor film in which impurities are sufficiently reduced is used for a channel formation region of a transistor. This makes it possible to impart stable electrical characteristics.

[0289] In addition, the oxide semiconductor film has an energy gap of 2 eV or more, or 2.5 eV or more. It is preferable to have one.

[0290] <2-5. Structure of oxide semiconductor> Next, the structure of the oxide semiconductor will be described.

[0291] Oxide semiconductors can be divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. As a non-single-crystal oxide semiconductor, CAAC-OS (c-axis-aligned d crystalline oxide semiconductor), polycrystalline oxide Nanocrystalline oxide semiconductor, nc-OS (nanocrystalline oxide semiconducting ductor), pseudo-amorphous oxide semiconductor (a-like OS: amorphous- amorphous oxide semiconductors, etc. be.

[0292] From another point of view, the oxide semiconductor is classified into an amorphous oxide semiconductor and a crystalline oxide semiconductor. Crystalline oxide semiconductors are classified into single crystal oxide semiconductors, CAAC -OS, polycrystalline oxide semiconductor, and nc-OS.

[0293] Amorphous structures are generally isotropic and have no inhomogeneous structure, and are characterized by the arrangement of atoms in a metastable state. The positions are not fixed, the bond angles are flexible, and there is short-range order but no long-range order. It is said that there is no such thing.

[0294] That is, a stable oxide semiconductor is transformed into a completely amorphous In addition, the semiconductor is not isotropic (for example, A periodic oxide semiconductor cannot be called a completely amorphous oxide semiconductor. -like OS is not isotropic, but has an unstable structure with voids. In terms of instability, the a-like OS is physically an amorphous oxide semiconductor. Close to.

[0295] [CAAC-OS] First, let me explain about CAAC-OS.

[0296] CAAC-OS is an oxide that has multiple crystal parts (also called pellets) aligned along the c-axis. It is a type of semiconductor.

[0297] CAAC-OS is a highly crystalline oxide semiconductor. The crystallinity of oxide semiconductors is determined by the presence of impurities. CAAC-OS is designed to prevent impurities and defects from causing degradation. It can also be said to be an oxide semiconductor with few defects (such as oxygen vacancies).

[0298] The impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metals. For example, metal elements such as silicon have a higher acidity than metal elements that constitute oxide semiconductors. Elements with strong bonds to oxygen remove oxygen from the oxide semiconductor, which changes the atomic arrangement of the oxide semiconductor. In addition, heavy metals such as iron and nickel, argon, Carbon dioxide and other molecules have a large atomic radius (or molecular radius), so the atomic arrangement of oxide semiconductors This disrupts the structure and reduces the crystallinity.

[0299] [nc-OS] Next, we will explain nc-OS.

[0300] The following describes the case where nc-OS is analyzed by XRD. However, when structural analysis was performed using the out-of-plane method, no peaks indicating orientation appeared. That is, the crystals of the nc-OS do not have any orientation.

[0301] The nc-OS is an oxide semiconductor with higher order than an amorphous oxide semiconductor. The nc-OS has a lower density of defect states than the a-like OS and amorphous oxide semiconductors. However, the crystal orientation of nc-OS is not regular among different pellets. Therefore, the nc-OS may have a higher density of defect states than the CAAC-OS.

[0302] [a-like OS] The a-like OS is an oxide semiconductor that has a structure between the nc-OS and the amorphous oxide semiconductor. It is a semiconductor.

[0303] A-like OS has porosity or low density areas. Therefore, it is an unstable structure.

[0304] In addition, a-like OS has porosity, so compared with nc-OS and CAAC-OS, Specifically, the density of the a-like OS is lower than that of a single crystal of the same composition. The density of nc-OS and CAAC- The density of the OS is 92.3% or more but less than 100% of the density of a single crystal of the same composition. It is difficult to form a film of an oxide semiconductor having a density of less than 78%.

[0305] For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, Single-crystal InGaZnO with a rhombohedral crystal structure 4 The density of is 6.357g / cm 3 That is it. For example, in an oxide semiconductor that satisfies the atomic ratio of In:Ga:Zn=1:1:1, The density of a-like OS is 5.0g / cm 3 More than 5.9g / cm 3 Less than For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, The density of nc-OS and the density of CAAC-OS are 5.9 g / cm 3 More than 6.3g / cm 3 is less than.

[0306] If single crystals of the same composition are not available, single crystals of different compositions may be combined in any ratio. By combining these, it is possible to estimate the density equivalent to a single crystal of a desired composition. The density of a single crystal of a desired composition is calculated based on the ratio of the single crystals of different compositions. However, the density can be estimated by using as few types of single crystals as possible. A combined estimate is preferred.

[0307] As described above, oxide semiconductors have various structures and each structure has various characteristics. Note that the oxide semiconductor film of one embodiment of the present invention can be formed using an amorphous oxide semiconductor, an a-like OS, or Two or more of nc-OS and CAAC-OS may be mixed. As shown below.

[0308] The oxide semiconductor film of one embodiment of the present invention includes two types of crystal parts. In other words, it is an oxide semiconductor film in which two types of crystal parts are mixed. (also called the first crystal part) is in the thickness direction of the film (film surface direction, the surface on which the film is formed, or the surface of the film). The crystal part has an orientation in the c-axis direction (also called the direction perpendicular to the c-axis), that is, has a c-axis orientation. The other part of the crystal (also called the second crystal) does not have the c-axis orientation and is oriented in various directions. This is the crystalline part.

[0309] In the following, for ease of explanation, the crystal portion having the c-axis orientation is referred to as the first crystal portion. The crystal part that does not have the c-axis orientation is explained separately from the second crystal part, but these are crystallinity and In some cases, there is no difference in the size of the crystals and they cannot be distinguished. The compound semiconductor film may be expressed without distinguishing between these.

[0310] For example, the oxide semiconductor film of one embodiment of the present invention has a plurality of crystal parts. At least one of the crystal parts has a c-axis orientation. Among the crystal parts, the crystal parts not having the c-axis orientation are more abundant than the crystal parts having the c-axis orientation. For example, the oxide semiconductor film of one embodiment of the present invention may have a thickness In the cross-section in the direction of the crystal, a plurality of crystals are observed in the observation image by a transmission electron microscope. Among the plurality of crystal portions, a second crystal portion not having a c-axis orientation is a first crystal portion having a c-axis orientation. In other words, in the oxide semiconductor of one embodiment of the present invention, the crystal parts are sometimes observed more than the crystal parts of the oxide semiconductor of one embodiment of the present invention. The film contains a large proportion of second crystal portions that do not have c-axis orientation.

[0311] By increasing the proportion of the second crystal portions that do not have c-axis orientation in the oxide semiconductor film, The following excellent effects are achieved.

[0312] When there is a sufficient oxygen source near the oxide semiconductor film, the oxide semiconductor film does not have a c-axis orientation. The second crystal portion can be a diffusion path for oxygen. In the case where a source of element is present, a first crystal part having a c-axis orientation is formed through a second crystal part not having a c-axis orientation. Therefore, oxygen can be supplied to the first crystal portion of the oxide semiconductor film. When such an oxide semiconductor film is applied to a semiconductor film of a transistor, the amount of loss can be reduced. By using such a material, it is possible to obtain high reliability and high field effect mobility.

[0313] In addition, the first crystal portion has a specific crystal plane oriented in the thickness direction of the film. Therefore, for the oxide semiconductor film including the first crystal portion, the X When X-ray diffraction (XRD) is performed, the diffraction angle ( 2θ), a diffraction peak originating from the first crystal portion is observed. Even if the first crystal portion is included, the X-rays may be scattered by the supporting substrate or may be scattered above the background. In some cases, the diffraction peaks may not be clearly visible due to the increase in the diffraction intensity. ) increases in accordance with the proportion of the first crystal portion contained in the oxide semiconductor film, and It can also be used as an index to estimate the crystallinity of a semiconductor film.

[0314] In addition, one method for evaluating the crystallinity of an oxide semiconductor film is electron beam diffraction. For example, a cross-section of the oxide semiconductor film of one embodiment of the present invention is subjected to electron diffraction measurement. When the fold pattern is observed, a first region having a diffraction spot due to the first crystal portion is identified. A second region having a diffraction spot caused by the second crystal portion is observed.

[0315] The first region having the diffraction spots due to the first crystal portion is a crystal having a c-axis orientation. On the other hand, the second region having a diffraction spot due to the second crystal part is due to the orientation It is derived from crystals that have no orientation or crystals that are randomly oriented in all directions. Therefore, the beam diameter of the electron beam used in electron diffraction, i.e., the area of ​​the region to be observed, determines the size of the region. In this specification, the beam diameter of the electron beam is set to 1 Electron diffraction measured at wavelengths between nmΦ and 100 nmΦ is called nanobeam electron diffraction (NBED). This is called Nano Beam Electron Diffraction.

[0316] However, the crystallinity of the oxide semiconductor film of one embodiment of the present invention was evaluated by a method different from NBED. Examples of the method for evaluating the crystallinity of the oxide semiconductor film include electron diffraction, X-ray diffraction, and Among electron diffraction methods, in addition to the NBED mentioned above, there is also a transmission electron microscope. Transmission Electron Microscopy (TEM) , Scanning Electron Microscopy (SEM) py), Convergent Beam Electron Diffraction (CBED) Selected Area Electron Diffraction (SAED) a Electron Diffraction) can be suitably used.

[0317] In addition, in NBED, the electron beam diameter is increased (for example, 25 nmΦ or less). Nanobeam electron diffraction (up to 100 nmΦ, or 50 nmΦ to 100 nmΦ) A ring-shaped pattern is observed. The ring-shaped pattern is also radially On the other hand, in NBED, the beam diameter of the electron beam is sufficiently small. In the electron beam diffraction pattern under the condition of minutely reduced size (for example, 1 nmΦ or more and 10 nmΦ or less), At the position of the ring-shaped pattern, a plurality of spots are distributed in the circumferential direction (also called the θ direction). In other words, the ripples observed under conditions where the electron beam diameter is increased may be observed. The ring-like pattern is formed by a collection of the above-mentioned multiple spots.

[0318] <2-6. Evaluation of crystallinity of oxide semiconductor film> Three samples in which oxide semiconductor films were formed under different conditions (samples X1 to X 3) were prepared and their crystallinity was evaluated. First, the preparation methods of samples X1 to X3 are as follows: explain.

[0319] [Sample X1] Sample X1 is a sample in which an oxide semiconductor film with a thickness of about 100 nm is formed on a glass substrate. The oxide semiconductor film contains indium, gallium, and zinc. The conditions for forming the nitride semiconductor film were as follows: the substrate was heated to 170° C. and an argon gas flow rate of 140 sccm was used. Gon gas and oxygen gas at a flow rate of 60 sccm were introduced into the chamber of the sputtering device. The pressure was 0.6 Pa, and a metal oxide target having indium, gallium, and zinc was A 2.5kW AC power was applied to the ZnO-based quartz crystal (In:Ga:Zn=4:2:4.1 [atomic ratio]). The oxygen flow rate ratio in the preparation condition of sample X1 was 30%.

[0320] [Sample X2] Sample X2 is a sample in which an oxide semiconductor film with a thickness of about 100 nm is formed on a glass substrate. The oxide semiconductor film of sample X2 was formed under the following conditions: the substrate was heated to 130° C. and the flow rate was 18 Argon gas with a flow rate of 0 sccm and oxygen gas with a flow rate of 20 sccm were placed in the chamber of the sputtering device. The oxygen flow rate in the preparation condition of sample X2 was 10%. The conditions other than the substrate temperature and oxygen flow rate were the same as those for sample X1. It was decided.

[0321] [Sample X3] Sample X3 is a sample in which an oxide semiconductor film with a thickness of about 100 nm is formed on a glass substrate. The oxide semiconductor film of sample X3 was formed under the following conditions: the substrate temperature was room temperature, and the flow rate was 180 s Argon gas at a flow rate of 20 sccm and oxygen gas at a flow rate of 20 sccm were placed in the chamber of the sputtering device. The oxygen flow rate in the preparation of sample X3 was 10%. The conditions other than the substrate temperature and oxygen flow rate were the same as those for sample X1. Ta.

[0322] Table 1 shows the formation conditions of samples X1 to X3.

[0323] [Table 1]

[0324] Next, the crystallinity of the samples X1 to X3 prepared as above was evaluated. The crystallinity of the samples was evaluated by cross-sectional TEM observation, XRD measurement, and electron diffraction.

[0325] [Cross-sectional TEM observation] 18 to 20 show the cross-sectional TEM observation results of samples X1 to X3. 8(A) and (B) are cross-sectional TEM images of sample X1, and Figs. 19(A) and (B) are cross-sectional images of sample X2. 20(A) and (B) are cross-sectional TEM images of sample X3.

[0326] FIG. 18(C) shows a high-resolution transmission electron microscope (HR-TEM) image of the cross section of sample X1. 19(C) is a cross-sectional HRTEM image of sample X2. FIG. 20(C) is a cross-sectional HR-TEM image of sample X3. For R-TEM image observation, spherical aberration correction (SCA) is required. A high-resolution TEM image using the spherical aberration correction function can be used. A Cs-corrected high-resolution TEM image is specifically called a Cs-corrected high-resolution TEM image. Observation is performed using an atomic resolution analytical electron microscope such as JEM-ARM200F manufactured by Denshi Co., Ltd. It is possible.

[0327] As shown in FIGS. 18 and 19, in the samples X1 and X2, atoms are layered in the film thickness direction. Crystals arranged in layers are observed. In particular, the HR-TEM image shows In addition, as shown in Figure 20, in sample X3, the atoms are layered in the film thickness direction. It is difficult to see how they are arranged in a straight line.

[0328] [XRD measurement] Next, the XRD measurement results of each sample will be described.

[0329] FIG. 21(A) shows the XRD measurement results for sample X1, and FIG. 22(A) shows the XRD measurement results for sample X2. FIG. 23(A) shows the XRD measurement results of sample X1 and sample X2.

[0330] In XRD measurement, the powder method (also called the θ-2θ method), which is a type of out-of-plane method, is used. The θ-2θ method involves changing the incidence angle of the X-rays and This is a method for measuring X-ray diffraction intensity by setting the angle of the detector to the same as the angle of incidence. The X-rays were incident at an angle of about 0.40° from the film surface, and the X-ray diffraction was measured by changing the detector angle. Grazing-Induced Reflection-Resonance (GIXRD) is an out-of-plane method for measuring the strength of Incidence XRD) method (also called thin film method or Seemann-Bohlin method) The vertical axis in FIG. 21(A), FIG. 22(A), and FIG. 23(A) is The diffraction intensity is shown in arbitrary units, and the horizontal axis indicates the angle 2θ.

[0331] As shown in FIG. 21(A) and FIG. 22(A), in the samples X1 and X2, 2θ A peak in the diffraction intensity is observed around =31°. In sample X3, the diffraction intensity peak near 2θ=31° is difficult to confirm, or The peak of the diffraction intensity around 31° is extremely small, or the diffraction intensity around 2θ=31° is There is no peak.

[0332] The diffraction angle at which the diffraction intensity peak was observed (around 2θ = 31°) was the same as that of single-crystal InGaZ nO 4 This coincides with the diffraction angle of the (009) plane in the structure model of the specimen X1 and The above peaks were observed in sample X1 and sample X2, which indicates that the c-axis is oriented in the film thickness direction. The crystal portion having the c-axis orientation is also called the first crystal portion. It can be confirmed that sample X3 has a c-axis orientation from the XRD measurement. It is difficult to determine whether crystals are present.

[0333] [Electron diffraction] Next, the results of electron diffraction measurements performed on samples X1 to X3 will be described. In electron diffraction measurements, the electron beam is incident perpendicularly to the cross section of each sample. The pattern was acquired. The electron beam diameter was set to two values: 1 nmΦ and 100 nmΦ. .

[0334] In electron beam diffraction, not only the diameter of the incident electron beam but also the thickness of the sample is important. The more the electron beam diffraction pattern contains information about the depth direction, the more likely it is that the information will be accurate. In addition to reducing the electron beam diameter, the thickness of the sample in the depth direction can be reduced to obtain a better image. On the other hand, the thickness of the sample in the depth direction is too thin. In this case (for example, when the thickness of the sample in the depth direction is 5 nm or less), only information on extremely fine areas can be obtained. Therefore, if crystals exist in a very small area, the electron beam diffraction pattern obtained The pattern may be similar to that of a single crystal. If this is not the purpose, the thickness of the sample in the depth direction is set to, for example, 10 nm or more and 100 nm or less. Typically, it is preferably 10 nm or more and 50 nm or less.

[0335] 21(B)(C) show the electron diffraction patterns of sample X1, and FIG. 22(B)(C) shows the electron diffraction patterns of sample X2. The electron diffraction patterns of sample 2 are shown in Fig. 23(B) and (C) are shown in Fig. 23(C) and the electron diffraction patterns of sample X3 are shown in Fig. 23(D). Each is shown below.

[0336] In addition, the electrons shown in FIG. 21(B)(C), FIG. 22(B)(C), and FIG. 23(B)(C) The electron diffraction pattern was imaged with the contrast adjusted to make the electron diffraction pattern clear. 21(B)(C), 22(B)(C), and 23(B)( In C), the brightest spot in the center is due to the incident electron beam. This is the center of the line diffraction pattern (also called the direct spot or transmitted wave).

[0337] In addition, as shown in FIG. 21(B), when the diameter of the incident electron beam is set to 1 nmΦ, Since a plurality of spots distributed in a circumferential shape are observed, the oxide semiconductor film is extremely fine. It can be seen that multiple crystal parts with plane orientations in various directions are mixed. As shown in FIG. 21(C), when the diameter of the incident electron beam is 100 nmΦ, The diffraction spots from these multiple crystals are connected together, and the brightness is averaged to form a ring-shaped diffraction pattern. In addition, in Fig. 21(C), two ring-shaped structures with different radii are formed. The diffraction pattern can be confirmed. Here, from the smallest diameter, the first ring, the second ring, It can be seen that the first ring is brighter than the second ring. In addition, two spots of high brightness (first regions) are confirmed at the positions overlapping with the first ring. It is recognized.

[0338] The radial distance from the center of the first ring is 4 In the structural model of This is almost equal to the radial distance from the center of the diffraction spot of the (009) plane in the The first region is a diffraction spot due to the c-axis orientation.

[0339] In addition, as shown in Figure 21(C), a ring-shaped diffraction pattern is observed, In the oxide semiconductor film, there are crystal parts oriented in various directions (hereinafter, referred to as crystal parts having no c-axis orientation). In other words, there exists a new crystal part (also called a new crystal part or a second crystal part).

[0340] The two first regions are arranged symmetrically with respect to the center point of the electron beam diffraction pattern. Since the degrees of symmetry are similar, it is inferred that the two-fold symmetry is present. The two first regions are diffraction spots due to the c-axis orientation. The direction of the line connecting the region and the center coincides with the direction of the c-axis of the crystal part. In the oxide semiconductor film, the c-axis is aligned in the film thickness direction. It can be seen that there are crystalline parts aligned in the same direction.

[0341] Thus, the oxide semiconductor film of sample X1 has a crystal part having a c-axis orientation and a It can be seen that the film is a mixture of crystalline parts having no crystals and crystalline parts having no crystals.

[0342] In the electron beam diffraction patterns shown in Figs. 22(B)(C) and 23(B)(C), The results are almost the same as those of the electron beam diffraction patterns shown in Fig. 21(B)(C). However, the c-axis orientation The brightness of the two spots (first region) due to the above is in the order of sample X1, sample X2, and sample X3. It is suggested that the abundance ratio of crystal parts having c-axis orientation is high in this order.

[0343] [Method for quantifying the crystallinity of oxide semiconductor films] Next, an example of a method for quantifying the crystallinity of an oxide semiconductor film will be described with reference to FIGS. He explains.

[0344] First, an electron beam diffraction pattern is prepared (see FIG. 24(A)).

[0345] Note that in FIG. 24A, the beam diameter is 100 nm for a 100-nm-thick oxide semiconductor film. FIG. 24(B) shows the electron diffraction pattern measured at mΦ. This is an electron beam diffraction pattern after contrast adjustment of the diffraction pattern.

[0346] In FIG. 24(B), two clear spots (first area) are seen above and below the direct spot. These two spots (first region) are InGaZnO 4 Structure model of The diffraction spots corresponding to (00l) in the model, i.e., the crystal parts with c-axis orientation, On the other hand, apart from the first region, there is a region of low luminance approximately concentric with the first region. A red ring-shaped pattern (second region) appears overlapping the electron beam. By setting the diameter to mΦ, the structure of the crystal part (second crystal part) that does not have the c-axis orientation was The intensity of the spots is averaged to form a ring.

[0347] Here, the electron beam diffraction pattern shows diffraction spots due to crystal parts having c-axis orientation. The first region having a diffraction spot due to the second crystal portion and the second region having a diffraction spot due to the second crystal portion are overlapped. Therefore, a line profile including the first region and a line profile including the second region are observed. By acquiring and comparing line profiles, the crystallinity of the oxide semiconductor film can be quantified. It becomes.

[0348] First, a line profile including a first region and a line profile including a second region This will be explained with reference to FIG.

[0349] Figure 25 shows InGaZnO 4 The structure model was irradiated with an electron beam from the (100) plane. The simulated electron diffraction pattern obtained when the sample was irradiated with the electron beam was divided into two parts: area A-A' and area B- 13B' and area C-C' are indicated with auxiliary lines.

[0350] The region A-A' shown in FIG. 25 shows two diffraction patterns caused by the first crystal part having the c-axis orientation. The area B-B' shown in FIG. In the region C-C', a diffraction spot due to the first crystal part having c-axis orientation was observed. The area includes the straight line passing through the direct spot and the area not covered by the direct spot. The angle at which it intersects with B' or area C-C' is around 34°, specifically, between 30° and 38° Preferably, the angle is 32° or more and 36° or less, and more preferably, 33° or more and 35° or less. Good.

[0351] Note that the line profile has a gradient as shown in FIG. 26 depending on the structure of the oxide semiconductor film. FIG. 26 is a diagram for explaining the line profile for each structure, the relative luminance R, and the full width at half maximum (FWHM) of the line profile FIG. 1 is a diagram for explaining the maximum

[0352] The relative luminance R shown in FIG. 26 is the integral intensity of the luminance in the region A-A' relative to the region B -B' divided by the integral intensity of the luminance in the region C-C' The integrated intensity of the luminance in the areas A-A', B-B', and C-C' is In order to eliminate the background caused by the direct spot that appears at the center position, This is what was done.

[0353] By calculating the relative brightness R, the strength of the c-axis orientation can be quantitatively determined. For example, as shown in FIG. 26, in a single crystal oxide semiconductor film, the c-axis alignment in the region A-A′ is The peak intensity of the diffraction spot due to the first crystal part having the orientation is high, and the regions B-B' and In the region C-C', no diffraction spots due to the first crystal part with c-axis orientation were observed. Therefore, the relative brightness R exceeds 1 and becomes extremely large. Only AAC (details on CAAC will be described later), CAAC+Nanocrystal In particular, the order of the crystal orientation is For amorphous and nanocrystals, the relative luminance R is 1. .

[0354] In addition, the higher the periodicity of the crystal structure, the greater the spatial distribution of the first crystal part with c-axis orientation. The spectrum intensity becomes higher and the half-width of the spectrum becomes smaller. The price range is the smallest, CAAC only, CAAC+Nanocrystal, Nanocrystal The half-width increases in the order of stal, and the half-width is very large in amorphous. The profile will be called Hello.

[0355] [Line profile analysis] As described above, the integral intensity of the luminance in the first region and the integral intensity of the luminance in the second region The intensity ratio is important information in terms of estimating the proportion of oriented crystal parts.

[0356] Therefore, from the electron beam diffraction patterns of the samples X1 to X3 shown above, the line profile Analysis was performed using the FT-IR ...

[0357] The line profile analysis results of sample X1 are shown in Fig. 27 (A1) and (A2), and sample X2 The line profile analysis results are shown in Figure 27 (B1) and (B2), and the line profile of sample X3 is shown. The profile analysis results are shown in Figures 27(C1) and (C2), respectively.

[0358] FIG. 27(A1) shows the electron beam diffraction pattern of the region A-A' and the region B-B' shown in FIG. 21(C). FIG. 27(B1) is an electron diffraction pattern showing the region B-B' and the region C-C'. In the electron beam diffraction pattern shown in FIG. 22(C), there are regions A-A', B-B', and C- FIG. 27(C1) is the electron diffraction pattern shown in FIG. 23(C). Electron diffraction pattern showing areas A-A', B-B', and C-C' It's a pattern.

[0359] In addition, the regions A-A', B-B', and C-C' are electron beam diffraction patterns. This can be calculated by normalizing the brightness of the direct spot that appears at the center of the This also allows relative comparisons to be made between samples.

[0360] In addition, when calculating the brightness profile, the brightness caused by inelastic scattering from the sample, etc. Subtracting the components as background allows for more accurate comparisons. Here, the brightness component due to inelastic scattering has a very broad profile in the radial direction. To obtain the image, the brightness of the background may be calculated by linear approximation. Draw straight lines along both sides of the peak, and then select the area on the lower brightness side of the lines. can be subtracted as background.

[0361] Here, the area A-A' is calculated from the data after background subtraction using the method described above. The integrated intensity of the luminance in the regions A, B-B', and C-C' was calculated. The integral intensity of the luminance in the region B-B' or the region C The relative luminance R was calculated by dividing the luminance at -C' by the integrated intensity.

[0362] FIG. 28 shows the relative luminance R of samples X1 to X3. The direct intensities in the luminance profiles shown in Figs. 27(A2), 27(B2), and 27(C2) are The integrated intensity of the brightness in the region A-A' in the spectrum located to the left and right of the spot is divided by the integrated intensity of the brightness in the region B-B', and the product of the brightness in the region A-A' The individual intensities were calculated by dividing the individual intensities by the integrated intensity of brightness in the region C-C'.

[0363] As shown in FIG. 28, the relative luminance of samples X1 to X3 is as follows: Relative luminance of sample X1 R=25.00 Relative luminance of sample X2 R=3.04 Relative luminance of sample X3 R=1.05 The above-mentioned relative luminance R was the average value at the four positions. Thus, the relative luminance R is The order of increasing is sample X1, sample X2, and sample X3.

[0364] The oxide semiconductor film of one embodiment of the present invention is used as a semiconductor film in which a channel of a transistor is formed. In the case where the light source is a reflective film, the relative luminance R is more than 1 and not more than 40, preferably more than 1 and not more than 10, and In this case, it is preferable to use an oxide semiconductor film having an intensity ratio of more than 1 and not more than 3. By using such an oxide semiconductor film as a semiconductor film, the electrical characteristics are highly stable and the gate voltage is It is possible to achieve both high field effect mobility in a low pressure region.

[0365] <2-7. Crystalline fraction> The proportion of crystals in an oxide semiconductor film can be estimated by analyzing cross-sectional TEM images. can be done.

[0366] First, the method of image analysis will be described. A two-dimensional fast Fourier transform (FFT) was performed on the TEM images. The FFT image is then processed to obtain a periodic image. Then, masking is performed to remove the rest of the range. Then, the two-dimensional inverse Fourier transform (IFFT: Inverse Fast Fourier Transform) transform) to obtain an FFT filtered image.

[0367] This allows a real space image to be obtained in which only the crystal part is extracted. The proportion of the crystalline part can be estimated from the area ratio of the area. By subtracting the remaining area from the area of ​​the original image (also called the area of ​​the original image), the area other than the crystal part is The proportion of these parts can be estimated.

[0368] FIG. 29(A1) shows a cross-sectional TEM image of sample X1, and FIG. 29(A2) shows a cross-sectional TEM image of sample X1. The images obtained after image analysis of the images are shown in Fig. 29(B1). The cross-sectional TEM image of sample X2 is shown in FIG. 29(B2). The cross-sectional TEM image of sample X3 is shown in FIG. 29(C1), and the cross-sectional TEM image of sample X4 is shown in FIG. 29(C2). ) show the images obtained after image analysis of the cross-sectional TEM image of sample X3.

[0369] In the image obtained after image analysis, the white areas in the oxide semiconductor film are The areas shown in black correspond to areas containing crystalline parts with orientation, and do not have orientation. It corresponds to a region containing crystalline parts or crystalline parts oriented in various directions.

[0370] From the results shown in FIG. 29(A2), the region including the crystalline part having orientation in the sample X1 is The proportion of the removed area was about 43.1%. In addition, from the results shown in FIG. 29(B2), sample X The proportion of the area excluding the region containing the oriented crystal parts in No. 2 was approximately 61.7%. In addition, from the results shown in FIG. 29(C2), the region including the crystalline part having orientation in sample X3 The proportion of the area excluding the abovementioned areas was approximately 89.5%.

[0371] The proportion of the portion excluding the crystalline portion having the orientation in the oxide semiconductor film estimated in this manner When the ratio is 5% or more and less than 40%, the oxide semiconductor film has extremely high crystallinity. In this case, oxygen vacancies are unlikely to occur, and the electrical properties are very stable, which is preferable. The proportion of the portion other than the crystalline portion having orientation in the solid film is 40% or more and less than 100%, preferably When the ratio of the oriented crystal portion to the oriented crystal portion is 60% or more and 90% or less, the oxide semiconductor film has an oriented crystal portion and an oriented crystal portion. The appropriate proportion of non-crystalline portions ensures both stable electrical properties and high mobility. It is possible.

[0372] Here, it can be clearly confirmed by a cross-sectional TEM image or by image analysis of the cross-sectional TEM image. The region excluding the crystal part is called the Lateral Growth Buffer Region. It can also be called on(LGBR).

[0373] <2-8. Oxygen diffusion into oxide semiconductor films> Next, the results of evaluation of the ease of diffusion of oxygen into the oxide semiconductor film will be described.

[0374] Here, the following three samples (samples Y1 to Y3) were prepared.

[0375] [Sample Y1] First, a 50 nm thick oxide film was formed on a glass substrate using the same method as for sample X1. Next, a silicon oxynitride film with a thickness of about 30 nm was formed on the oxide semiconductor film. A silicon oxide nitride film with a thickness of about 100 nm, a silicon oxide nitride film with a thickness of about 20 nm, In the following description, the oxide semiconductor film is The OS and the silicon oxynitride film may be referred to as GI.

[0376] Next, a heat treatment was performed at 350° C. for 1 hour in a nitrogen atmosphere.

[0377] Then, a 5 nm thick In-Sn-Si oxide film was formed by sputtering.

[0378] Subsequently, oxygen was added to the silicon oxynitride film under the following conditions: Using an ashing device, the substrate temperature was set to 40°C and oxygen gas ( 16 O ) and oxygen gas with a flow rate of 100 sccm ( 18 O) was introduced into the chamber, and the pressure was increased to 15 The parallel parallel plate was installed in the ashing device so that a bias was applied to the substrate side. RF power of 4500 W was supplied between the electrodes of the plate for 600 seconds. 1 8 The reason for using oxygen (O) is that the silicon oxynitride film 16 O) at the principal component level This is to accurately measure the oxygen added by the oxygen addition process. do.

[0379] Next, a silicon nitride film having a thickness of about 100 nm was formed by PECVD.

[0380] [Sample Y2] Sample Y2 is a sample in which the deposition conditions of the oxide semiconductor film of Sample Y1 are different. In the same manner as in the case of sample X2 described above, an oxide semiconductor film having a thickness of about 50 nm was formed. .

[0381] [Sample Y3] Sample Y3 is a sample obtained by changing the deposition conditions of the oxide semiconductor film of Sample Y1. In the same manner as in the case of sample X3 described above, an oxide semiconductor film having a thickness of about 50 nm was formed. .

[0382] Through the above steps, samples Y1 to Y3 were prepared.

[0383] [SIMS analysis] For Samples Y1 to Y3, SIMS (Secondary Ion Mass Spectroscopy) Spectrometry (Spectrometry) analysis 18 The concentration of O was measured. In this study, the samples Y1 to Y3 prepared above were evaluated without heat treatment, and The conditions for heat treatment of samples Y1 to Y3 at 350° C. for 1 hour under a nitrogen atmosphere and sample Y The three conditions are: 1) heat treatment of samples Y1 to Y3 at 450° C. for 1 hour under a nitrogen atmosphere; The matter was decided as follows.

[0384] SIMS measurement results are shown in Fig. 30(A), (B), and (C). Note that Fig. 30(A) is for sample Y FIG. 30(B) is the SIMS measurement result of sample Y1, FIG. 30(C) is the SIMS measurement result of sample Y2, and FIG. 0(C) is the SIMS measurement result of sample Y3.

[0385] In addition, Fig. 30 (A), (B), and (C) show the analysis results of the region including GI and OS. In addition, Figure 30 (A), (B), and (C) show the SIMS analysis (SSDP (S Surface Side Depth Profile (SIMS) Here are the results.

[0386] In addition, in Figure 30(A), (B), and (C), the gray dashed lines indicate the samples that were not heat-treated. The black dashed line is the profile of the sample that was heat treated at 350°C. The black solid line is the profile of the sample that was heat treated at 450°C.

[0387] In each of samples Y1 to Y3, 18 O is diffused, and During the OS 18 It can be seen that O is diffused. In addition, samples Y1, Y2, and Y3 In order, to deeper positions 18 It can be seen that O is diffused. By performing heat treatment at 450℃, the area can be penetrated to a deeper position. 18 It was confirmed that O was spreading. Cut.

[0388] From the above results, it is considered that oriented and non-oriented crystal parts are mixed and that the orientation is not important. An oxide semiconductor film having a low ratio of crystal parts having a low oxygen permeability is a film through which oxygen easily permeates. It can be confirmed that the film is one in which oxygen easily diffuses. It can be confirmed that oxygen in the GI film diffuses into the OS by performing the treatment.

[0389] The above results indicate that the higher the proportion (density) of oriented crystals, the greater the amount of oxygen in the thickness direction. This indicates that oxygen is less likely to diffuse in the thickness direction, and that the lower the density, the easier it is for oxygen to diffuse in the thickness direction. The ease of diffusion of oxygen in an oxide semiconductor film can be considered as follows. Cut.

[0390] An oxide semiconductor that contains a mixture of oriented crystal parts and extremely fine crystal parts that do not have orientation. In the membrane, the non-crystalline regions (LGBR) that can be clearly observed in the cross-sectional observation image are oxygen-rich regions. The oxide semiconductor film is a region where oxygen can easily diffuse, i.e., it can become a diffusion path for oxygen. When there is a sufficient oxygen source nearby, the crystals are oriented through the LGBR. It is believed that oxygen vacancies in the film can be reduced because oxygen is easily supplied to the film. can be.

[0391] For example, an oxide film that is in contact with an oxide semiconductor film and that easily releases oxygen is provided, and heat treatment is performed. As a result, the oxygen released from the oxide film is transported in the thickness direction of the oxide semiconductor film by the LGBR. Then, oxygen is supplied laterally to the oriented crystal part via the LGBR. As a result, the crystal part having the orientation of the oxide semiconductor film and the other region can be formed. Therefore, oxygen is sufficiently distributed in the film, and oxygen vacancies in the film can be effectively reduced.

[0392] For example, if hydrogen atoms that are not bonded to metal atoms exist in the oxide semiconductor film, When oxygen atoms bond with the metal, OH is formed and the metal is fixed. Hydrogen atoms were trapped in oxygen vacancies (Vo) in the oxide semiconductor film by forming the film at low temperature. state (called VoH) by a certain amount (for example, 1×10 17 cm -3By forming O H is suppressed from being generated. In addition, VoH generates carriers, so A certain amount of carriers are present in the film. This results in an oxide film with an increased carrier density. During the film formation, oxygen vacancies are also formed, but the oxygen The defects can be reduced by introducing oxygen through the LGBR as described above. By using this method, the carrier density is relatively high and oxygen vacancies are sufficiently reduced. An oxide semiconductor film can be formed.

[0393] In addition, oxygen vacancies in the oxide semiconductor film can be reduced by suitably introducing oxygen into the oxide semiconductor film. In other words, the oxygen vacancy (V o ) to acid The oxygen vacancy (Vo) is filled by the addition of oxygen. By diffusing oxygen, the oxygen vacancy (Vo) of the transistor is reduced, improving reliability. It is possible.

[0394] In addition, the regions other than the crystalline portions having orientation are extremely fine crystals that do not have orientation during film formation. Since the oxide semiconductor film is made up of crystalline regions, no clear crystal grain boundaries can be observed. The fine crystal parts are located between a plurality of crystal parts having orientation. The heat from the crystallization causes the crystals to grow laterally, bonding with adjacent crystals that have the same orientation. The fine crystals also function as regions for generating carriers. When an oxide semiconductor film having such a structure is applied to a transistor, the field-effect mobility thereof is significantly improved. It is believed that this will significantly improve the

[0395] In addition, an oxide semiconductor film is formed, and an oxide insulating film such as a silicon oxide film is formed thereon. It is preferable to carry out a plasma treatment in an oxygen atmosphere after the deposition. In addition to supplying oxygen to the gas, the hydrogen concentration can be reduced. For example, plasma treatment During the process, fluorine remaining in the chamber may be doped into the oxide semiconductor film. Fluorine exists as negatively charged fluorine atoms and as positively charged water molecules. The electrons bond with the atomic atoms through Coulomb forces to generate HF, which is then oxidized during the plasma treatment. As a result, the hydrogen concentration in the oxide semiconductor film is reduced. In addition, oxygen atoms and hydrogen atoms are bonded to form H 2 As O It may also be released outside the membrane.

[0396] In addition, a structure in which a silicon oxide film (or a silicon oxynitride film) is laminated on an oxide semiconductor film The fluorine in the silicon oxide film bonds with the hydrogen in the film, forming an electrically neutral H Since it can exist as F, it does not affect the electrical properties of the oxide semiconductor film. Although bonds may occur, these are also electrically neutral. Also, HF in the silicon oxide film is It is believed that there is no effect on oxygen diffusion.

[0397] Due to the above-described mechanism, oxygen vacancies in the oxide semiconductor film are reduced, and By reducing hydrogen that is not bonded to metal atoms, reliability can be improved. In addition, when the carrier density of the oxide semiconductor film is higher than a certain level, the electrical characteristics are improved. It is expected to rise.

[0398] <2-9. Method for forming oxide semiconductor film> Next, a method for forming an oxide semiconductor film according to one embodiment of the present invention will be described.

[0399] The oxide semiconductor film of one embodiment of the present invention can be formed by sputtering in an oxygen-containing atmosphere. The film can be formed by the above method.

[0400] As an oxide target that can be used for forming an oxide semiconductor film, In-Ga- The oxides are not limited to Zn-based oxides, but may be, for example, In-M-Zn-based oxides (where M is Al, Ga, Y, or or Sn) can be applied.

[0401] In addition, a sputtering target including a polycrystalline oxide having a plurality of crystal grains is used, When an oxide semiconductor film including a crystal portion is formed, a polycrystalline oxide film is formed. Compared with the case where a thin sputtering target is used, a crystalline oxide semiconductor film can be obtained. It is easy to be.

[0402] A consideration of the mechanism of formation of an oxide semiconductor film will be described below.

[0403] The sputtering target has a plurality of crystal grains, and the crystal grains have a layered structure. When the crystal grains have an interface that is easily cleaved, the sputtering target By bombarding the sputter with ions, the crystal grains are cleaved and the sputtered material is formed into a plate or pellet shape. The resulting plate-like or pellet-like sputtered particles may be ring-shaped particles. It is believed that the nanocrystals are deposited on the substrate to form an oxide semiconductor film containing nanocrystals. In addition, by heating the substrate, the nanocrystals are bonded to each other on the substrate surface, or As the rearrangement proceeds, an oxide semiconductor film including oriented crystal parts is easily formed. It is thought that this will happen.

[0404] Although the method of forming the film by sputtering has been described here, The sputtering method is preferred because it is easy to control the crystallinity. In addition to the laser deposition method, other methods such as pulsed laser deposition (PLD) and plasma enhanced chemical vapor deposition (PEC) are also available. VD) method, thermal CVD (Chemical Vapor Deposition) method, AL D (Atomic Layer Deposition) method, vacuum deposition method, etc. An example of a thermal CVD method is MOCVD (Metal Organic Chemical Vapor Deposition). One example is the cal vapor deposition (Cal Vapor Deposition) method.

[0405] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0406] (Embodiment 3) In this embodiment, a display device including the transistor described in the above embodiment will be An example will be described below with reference to FIGS.

[0407] 31 is a top view showing an example of a display device. The display device 700 shown in FIG. A pixel portion 702 is provided on the first substrate 701, and a source driver is provided on the first substrate 701. A pixel portion 702, a source driver circuit portion 704, a gate driver circuit portion 706, A sealant 712 is disposed so as to surround the path portion 704 and the gate driver circuit portion 706. and a second substrate 705 disposed so as to face the first substrate 701. The first substrate 701 and the second substrate 705 are sealed with a sealant 712. That is, the pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 are The first substrate 701, the sealant 712, and the second substrate 705 seal the entire structure. Although not shown in FIG. 31, a display element is provided between the first substrate 701 and the second substrate 705. can be done.

[0408] The display device 700 is surrounded by a sealant 712 on the first substrate 701. A pixel section 702, a source driver circuit section 704, and a gate driver circuit section 705 are arranged in a region different from the region. and a flexible printed circuit (FPC) terminal section 708 (FPC: Flex Also, an FPC terminal portion 708 is provided. An FPC 716 is connected to the pixel section 702 and the source driver circuit. Various signals are supplied to the path section 704 and the gate driver circuit section 706. 702, a source driver circuit section 704, a gate driver circuit section 706, and an FPC terminal section Signal lines 710 are connected to the terminals 708. Various signals are supplied by the FPC 716. The signals are transmitted through a signal line 710 to a pixel section 702, a source driver circuit section 704, a gate driver A driver circuit portion 706 and an FPC terminal portion 708 are provided.

[0409] The display device 700 may include a plurality of gate driver circuits 706. The device 700 includes a source driver circuit section 704 and a gate driver circuit section 706. Although an example in which the pixel portion 702 is formed on the same first substrate 701 is shown, the present invention is not limited to this configuration. For example, only the gate driver circuit section 706 may be formed on the first substrate 701. Alternatively, only the source driver circuit portion 704 may be formed on the first substrate 701. In this case, the substrate on which the source driver circuit or the gate driver circuit is formed (for example, A driving circuit board formed of a monocrystalline semiconductor film or a polycrystalline semiconductor film is formed on a first substrate 701. The method of connecting the separately formed drive circuit board is not particularly limited. Instead, we use COG (Chip On Glass) method, wire bonding method, etc. can be used.

[0410] The display device 700 also includes a pixel portion 702, a source driver circuit portion 704, and a gate The driver circuit portion 706 includes a plurality of transistors. A transistor having a specific position can be applied.

[0411] The display device 700 can also include various elements, such as: For example, electroluminescence (EL) elements (EL elements including organic and inorganic materials, organic EL elements, inorganic EL elements, LEDs, etc.), light-emitting transistor elements (light-emitting elements that emit light according to electric current) transistors, electron emission elements, liquid crystal elements, electronic ink elements, electrophoretic elements, Rowetting element, plasma display panel (PDP), MEMS (microelectromechanical systems) Electro-mechanical systems) displays (e.g., grating light bars) GLV, Digital Micromirror Device (DMD), Digital Microsha Dispersive Modulation (DMS) element, Interferometric Modulation (IMOD) element ), piezoelectric ceramic displays, etc.

[0412] An example of a display device using an EL element is an EL display. An example of a display device using emission elements is a field emission display (FE D) or SED type flat panel display (SED: Surface-conductio n Electron-emitter Display) and others. An example of such a display device is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display, etc.). Display, reflective LCD display, direct-view LCD display, projection LCD display Examples of display devices using electronic ink elements or electrophoretic elements include: Electronic paper. Semi-transmissive LCDs and reflective LCDs are also used. In this case, a part or the whole of the pixel electrode should function as a reflective electrode. For example, a part or the whole of the pixel electrode may be made of aluminum, silver, etc. In this case, a memory circuit such as an SRAM may be provided under the reflective electrode. This can further reduce power consumption.

[0413] The display method of the display device 700 may be a progressive method or an interlace method. In addition, the color elements controlled by pixels when displaying in color are R It is not limited to the three colors GB (R stands for red, G stands for green, B stands for blue). For example, It may be composed of four pixels: a pixel, a pixel, and a pixel of white (W). As in the column, two colors of RGB form one color element, and different two colors are generated depending on the color element. You can also select colors to configure the color. Or, you can select one or more colors such as yellow, cyan, and magenta for RGB. The size of the display area may be different for each dot of the color element. However, the disclosed invention is not limited to color display devices, and may be used in monochrome display devices. The present invention can also be applied to display devices.

[0414] Also, white light is emitted from the backlight (organic EL element, inorganic EL element, LED, fluorescent lamp, etc.) In order to display full color using (W), a colored layer (also called a color filter) is The colored layer may be, for example, red (R), green (G), blue (B), or red (C). ), yellow (Y), etc. can be used in appropriate combination. In this case, the color reproducibility can be improved compared to when no color layer is used. By disposing a region having a color layer and a region not having a color layer, The white light in the region may be directly used for display. By placing the colored layer over the entire display, the decrease in brightness caused by the colored layer can be reduced during bright display, and power consumption can be reduced by 2. However, in some cases, the emission of light from organic EL elements and inorganic EL elements can be reduced by about 10 to 30%. When using optical elements to display full color, R, G, B, Y, and W are each emitted in different colors. By using a self-luminous element, it is possible to obtain a light emission from a colored layer. In some cases, power consumption can be reduced even further.

[0415] In addition, as a colorization method, a part of the light emitted from the above-mentioned white light is passed through a color filter. In addition to the color filter method, which converts the light into red, green, and blue by filtering the light, A method that uses two colors of light (three-color method), or a method that uses part of the light emitted from the blue light to emit red or A method for converting to green (color conversion method, quantum dot method) may be applied.

[0416] In this embodiment, a liquid crystal element and an EL element are used as display elements. 32 and 34. Note that FIG. 32 shows the area indicated by the dashed line QR in FIG. FIG. 34 is a cross-sectional view of the liquid crystal display device shown in FIG. 31, which is a cross-sectional view taken along the dashed line QR, and shows a configuration in which an EL element is used as a display element. It is.

[0417] First, the common parts shown in FIG. 32 and FIG. 34 will be explained, and then the different parts will be explained. This will be explained below.

[0418] <3-1. Explanation of common parts of display devices> The display device 700 shown in FIG. 32 and FIG. 34 includes a wiring portion 711 and a pixel portion 702. The display panel 700 includes a source driver circuit section 704 and an FPC terminal section 708. The line portion 711 includes a signal line 710. The pixel portion 702 includes a transistor 750 and The source driver circuit portion 704 includes a transistor 752. Yes.

[0419] Transistor 750 and transistor 752 are similar to transistor 100D shown above. The structures of the transistors 750 and 752 are the same as those described above. Other transistors shown in the embodiment of the present invention may be used.

[0420] The transistor used in this embodiment is made of a highly purified oxide film in which the formation of oxygen vacancies is suppressed. The transistor has a semiconductor film. The off-state current of the transistor can be reduced. It is possible to extend the retention time of electrical signals such as signals, and the write interval can be extended when the power is on. This allows the frequency of refresh operations to be reduced, resulting in reduced power consumption. It has the effect of suppressing power.

[0421] In addition, the transistor used in this embodiment has a relatively high field-effect mobility. For example, a transistor capable of such high speed operation can be used for a liquid crystal display. By using this in a display device, the switching transistor in the pixel section and the driver circuit section In other words, the driver transistor can be formed on the same substrate as the driver circuit. Therefore, it is not necessary to use a semiconductor device formed from a silicon wafer or the like. The number of components can be reduced. By using a register, a high quality image can be provided.

[0422] The capacitor 790 is a conductive film that functions as a first gate electrode of the transistor 750. A lower electrode formed through a process of processing the same conductive film as the film, and a transistor 750 a step of processing the same conductive film as the conductive film that functions as the source electrode and the drain electrode. and an upper electrode formed through the lower electrode. The same insulating film as the insulating film that functions as the first gate insulating film of the sta 750 is formed. That is, the capacitor 790 is provided with an insulating film formed through a process. It has a laminated structure in which an insulating film that functions as a dielectric film is sandwiched between the insulating film and the gate electrode.

[0423] 32 and 34, a transistor 750, a transistor 752, and a capacitor A planarization insulating film 770 is provided on the capacitor 790 .

[0424] The planarization insulating film 770 may be made of a polyimide resin, an acrylic resin, or a polyimide amide resin. Heat-resistant organic materials such as benzocyclobutene resin, polyamide resin, and epoxy resin In addition, by stacking multiple insulating films made of these materials, A planarization insulating film 770 may be formed. Alternatively, the planarization insulating film 770 may not be provided. This is also fine.

[0425] 32 and 34, the transistor 750 and the A transistor having the same structure as the transistor 752 included in the source driver circuit portion 704 is used. The configuration used is illustrated above, but is not limited to this. For example, A transistor different from that in the driver circuit section 704 may be used. 02 is a staggered transistor, and the source driver circuit portion 704 is In the pixel portion 702, an inverted staggered transistor is used. A reverse staggered transistor is used, and a staggered transistor is provided in the source driver circuit section 704. The source driver circuit section 704 may be configured as a gate driver. It may also be read as a driver circuit section.

[0426] The signal line 710 is connected to the source and drain electrodes of the transistors 750 and 752. The signal line 710 is formed through the same process as the conductive film that functions as the signal line 710. When materials containing this material are used, signal delays caused by wiring resistance are minimal, making it possible to display images on a large screen. It becomes Noh.

[0427] The FPC terminal portion 708 includes a connection electrode 760, an anisotropic conductive film 780, and an FPC 71. 6. The connection electrode 760 is connected to the source and drain electrodes of the transistors 750 and 752. The connection electrode 760 is formed through the same process as the conductive film that functions as the drain electrode. , and is electrically connected to a terminal of the FPC 716 via an anisotropic conductive film 780 .

[0428] The first substrate 701 and the second substrate 705 may be, for example, a glass substrate. In addition, the first substrate 701 and the second substrate 705 may be flexible substrates. The flexible substrate may be, for example, a plastic substrate. do.

[0429] In addition, a structure 778 is provided between the first substrate 701 and the second substrate 705. The structure 778 is a columnar spacer obtained by selectively etching an insulating film. A device for controlling the distance (cell gap) between the first substrate 701 and the second substrate 705 is provided. In addition, a spherical spacer may be used as the structure 778.

[0430] In addition, on the second substrate 705 side, a light-shielding film 738 functioning as a black matrix and A colored film 736 that functions as a color filter, a light-shielding film 738 that is in contact with the colored film 736, and An insulating film 734 is provided.

[0431] <3-2. Configuration examples of display devices using liquid crystal elements> The display device 700 shown in FIG. 32 includes a liquid crystal element 775. The liquid crystal element 775 includes a conductive film The conductive film 774 is a second substrate 705. The display device 700 shown in FIG. The alignment state of the liquid crystal layer 776 changes depending on the voltage applied to the conductive film 772 and the conductive film 774. By controlling the light transmission or non-transmission, an image can be displayed.

[0432] The conductive film 772 serves as a source electrode and a drain electrode of the transistor 750. The conductive film 772 is formed over the planarization insulating film 770. The conductive film 772 functions as a pixel electrode, that is, one electrode of a display element. The display device 700 shown in FIG. 72 reflects light and displays it through a colored film 736, so-called a reflective color liquid crystal display device. be.

[0433] The conductive film 772 may be a conductive film that transmits visible light or a conductive film that reflects visible light. A conductive film having a reflectivity can be used. For example, a material containing one of the elements indium (In), zinc (Zn), and tin (Sn) As a conductive film that is reflective in visible light, for example, aluminum In this embodiment, the conductive film 772 may be formed of A conductive film that is reflective in visible light is used.

[0434] In FIG. 32, the conductive film 772 functions as a drain electrode of the transistor 750. However, the present invention is not limited to this. For example, the structure shown in FIG. As shown in FIG. 1, a conductive film 772 is sandwiched between a conductive film 777 serving as a connection electrode and a transistor. The drain electrode of the transistor 750 may be electrically connected to the conductive film. Note that the conductive film 777 functions as a second gate electrode of the transistor 750. Since it is formed through the same process of processing the conductive film as the conductive film used, there is no need to add any additional manufacturing steps. It can be formed.

[0435] The display device 700 shown in FIG. 32 is a reflective color liquid crystal display device. However, the present invention is not limited to this. For example, the conductive film 772 may be a conductive film that transmits visible light. Alternatively, a reflective color liquid crystal display device may be used. A so-called semi-transmissive color liquid crystal display is a combination of a transmissive color liquid crystal display. The display device may be a liquid crystal display device.

[0436] An example of a transmission type color liquid crystal display device is shown in FIG. 35. FIG. 35 shows the same as that shown in FIG. This is a cross-sectional view taken along the dashed line QR, and shows a configuration in which liquid crystal elements are used as display elements. In addition, the display device 700 shown in FIG. 35 uses a horizontal electric field method (for example, F In the configuration shown in FIG. 35, the pixel electrode functions as An insulating film 773 is provided over a conductive film 772, and a conductive film 774 is provided over the insulating film 773. In this case, the conductive film 774 functions as a common electrode. An electric field generated between the conductive film 772 and the conductive film 774 through the insulating film 773 causes the liquid The orientation of the crystal layer 776 can be controlled.

[0437] Although not shown in FIG. 32 and FIG. 35, the conductive film 772 or the conductive film 774 An alignment film is provided on either one or both of the surfaces of the liquid crystal layer 776. Although not shown in FIG. 32 and FIG. 35, a polarizing member, a phase difference member, a reflecting member, etc. Optical members (optical substrates) such as a polarizing substrate and a positioning member may be provided as appropriate. Circularly polarized light produced by a retardation substrate may be used. Either may be used.

[0438] When liquid crystal elements are used as display elements, thermotropic liquid crystal, low molecular weight liquid crystal, high molecular weight liquid crystal, For example, a liquid crystal, a polymer-dispersed liquid crystal, a ferroelectric liquid crystal, an antiferroelectric liquid crystal, etc. can be used. Depending on the conditions, the liquid crystal material can have a cholesteric phase, a smectic phase, a cubic phase, or a chiral phase. It shows nematic phase, isotropic phase, etc.

[0439] In addition, when the in-plane switching method is adopted, liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of a cholesteric liquid crystal is increased, the cholesteric The blue phase appears just before the transition from the black phase to the isotropic phase. In order to improve the temperature range, a liquid crystal composition containing a chiral agent of several weight percent or more is used. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent is used in the liquid crystal layer. Since the liquid crystal display has a short rotational angle and is optically isotropic, no alignment treatment is required. Since the rubbing process is unnecessary, electrostatic damage caused by the rubbing process is prevented. This can prevent the occurrence of defects or damage to the liquid crystal display device during the manufacturing process. Furthermore, liquid crystal materials exhibiting a blue phase have little viewing angle dependency.

[0440] In addition, when liquid crystal elements are used as display elements, TN (Twisted Nematic) ) mode, IPS (In-Plane-Switching) mode, FFS (Frin ge Field Switching) mode, ASM (Axially Symme tric aligned Micro-cell) mode, OCB(Optical Compensated Birefringence mode, FLC (Ferrero lectric Liquid Crystal) mode, AFLC (AntiFerr Electrochemical Liquid Crystal (ECC) mode can be used. .

[0441] In addition, normally black type liquid crystal display devices, for example, those using a vertical alignment (VA) mode The vertical alignment mode may be a transmission type liquid crystal display device. For example, MVA (Multi-Domain Vertical Alignment) ) mode, PVA (Patterned Vertical Alignment) mode mode, ASV mode, etc. can be used.

[0442] <3-3. Display devices using light-emitting elements> The display device 700 shown in FIG. 34 includes a light-emitting element 782. The light-emitting element 782 is a conductive film The display device 700 shown in FIG. The EL layer 786 of the light element 782 emits light, thereby displaying an image. The EL layer 786 includes an organic compound or an inorganic compound such as quantum dots.

[0443] Examples of materials that can be used for the organic compound include fluorescent materials and phosphorescent materials. In addition, materials that can be used for quantum dots include colloidal quantum dots. materials, alloy type quantum dot materials, core-shell type quantum dot materials, core type quantum dot materials, In addition, the elements of the 12th and 16th families, the 13th and 15th families, or the 14th and 16th families Materials containing the element group may also be used. Cadmium (Cd), selenium (Se), Zinc (Zn), Sulfur (S), Phosphorus (P), Indium (In), Tellurium (Te), Lead (P b) Quantum with elements such as gallium (Ga), arsenic (As), aluminum (Al), etc. Dot material may also be used.

[0444] In addition, in the display device 700 shown in FIG. An insulating film 730 is provided. The insulating film 730 covers a part of the conductive film 772. 782 has a top emission structure. Therefore, the conductive film 788 has a light transmitting property, and It transmits the light emitted by the L layer 786. In this embodiment, the top emission The structure is exemplified, but is not limited to this. For example, a bottom emission structure in which light is emitted to both the conductive film 772 and the conductive film 788; It can also be applied to al-emission structures.

[0445] A colored film 736 is provided at a position overlapping the light emitting element 782, and a colored film 736 is provided at a position overlapping the insulating film 730. A light-shielding film 738 is provided at the position where the light-shielding film 738 is to be formed, the wiring portion 711, and the source driver circuit portion 704. The colored film 736 and the light-shielding film 738 are covered with an insulating film 734. In addition, the space between the light emitting element 782 and the insulating film 734 is filled with a sealing film 732. In the display device 700 shown in FIG. 1, a configuration in which a colored film 736 is provided is illustrated. For example, when the EL layer 786 is formed by coloring, The film 736 may not be provided.

[0446] <3-4. Example of a configuration in which an input / output device is provided on a display device> Also, the display device 700 shown in FIG. 34 and FIG. 35 may be provided with an input / output device. An example of the force device is a touch panel.

[0447] A configuration in which a touch panel 791 is provided on the display device 700 shown in FIG. 34 and FIG. 35 is shown in FIG. This is shown in Figure 37.

[0448] FIG. 36 is a cross-sectional view of a configuration in which a touch panel 791 is provided on the display device 700 shown in FIG. FIG. 37 is a cross-sectional view of a configuration in which a touch panel 791 is provided on the display device 700 shown in FIG. be.

[0449] First, the touch panel 791 shown in FIG. 36 and FIG. 37 will be described below.

[0450] The touch panel 791 shown in FIG. 36 and FIG. 37 is made of a second substrate 705 and a colored film 736. The touch panel 791 is a so-called in-cell type touch panel that is provided between a colored film It may be formed on the second substrate 705 before forming 736 .

[0451] The touch panel 791 includes a light-shielding film 738, an insulating film 792, an electrode 793, and an electrode 794, an insulating film 795, an electrode 796, and an insulating film 797. When a detection object such as a stylus approaches, the mutual capacitance between electrode 793 and electrode 794 changes. It is possible to detect the change.

[0452] 36 and 37, an electrode 793 and The electrode 796 is formed by passing through an opening in the insulating film 795. The electrode 794 is electrically connected to the two electrodes 793 that sandwich the electrode 794 via the electrodes 793. 37, a configuration in which the region where the electrode 796 is provided is provided in the pixel portion 702 is illustrated. However, the present invention is not limited to this. For example, the light emitting diode 704 may be formed in the source driver circuit section 704.

[0453] The electrodes 793 and 794 are provided in a region overlapping with the light-shielding film 738. As shown in FIG. 1, the electrode 793 is preferably provided so as not to overlap with the light-emitting element 782. As shown in FIG. 37, the electrode 793 is provided so as not to overlap with the liquid crystal element 775. In other words, the electrode 793 overlaps with the light-emitting element 782 and the liquid crystal element 775. In other words, the electrode 793 has a mesh shape. By this configuration, the electrode 793 does not block the light emitted by the light emitting element 782. Alternatively, the electrode 793 may be configured so as not to block light passing through the liquid crystal element 775. Therefore, the reduction in brightness due to the placement of the touch panel 791 is extremely small. Since the number of pixels is small, a display device with high visibility and reduced power consumption can be realized. The pole 794 may be of a similar configuration.

[0454] In addition, since the electrodes 793 and 794 do not overlap with the light-emitting element 782, The electrode 794 may be made of a metal material having a low transmittance of visible light. Since the electrodes 793 and 794 do not overlap with the liquid crystal element 775, In addition, a metal material having a low transmittance of visible light can be used.

[0455] Therefore, compared with electrodes using oxide materials with high visible light transmittance, the electrodes 793 and The resistance of the electrode 794 can be reduced, improving the sensor sensitivity of the touch panel. It is possible.

[0456] For example, the electrodes 793, 794, and 796 may be made of conductive nanowires. The nanowires have an average diameter of 1 nm to 100 nm, preferably 5 nm to 50 nm. The size of the nanoparticles may be 5 nm or less, and more preferably 5 nm or more and 25 nm or less. The wires are metal nanowires such as Ag nanowires, Cu nanowires, or Al nanowires. For example, electrodes 793 and 794 may be used. When Ag nanowires are used for either 94 or 796, or for all of them, the The light transmittance is to be 89% or more, and the sheet resistance is to be 40Ω / □ or more and 100Ω / □ or less. can.

[0457] 36 and 37 show examples of the configuration of an in-cell type touch panel. However, the present invention is not limited to this. For example, a so-called on-cell type transistor formed on the display device 700 may be used. A so-called out-cell type touch panel that is attached to the display device 700. It is also possible to use the following.

[0458] In this manner, the display device according to one embodiment of the present invention can be used in combination with various types of touch panels. It can be used.

[0459] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0460] (Embodiment 4) In this embodiment, a display device including a semiconductor device according to one embodiment of the present invention will be described with reference to FIG. This will be used to explain.

[0461] <4. Circuit configuration of display device> The display device shown in FIG. 38(A) has a region having pixels of a display element (hereinafter, referred to as a pixel portion 502). ) and a circuit section ( hereinafter referred to as a drive circuit section 504) and a circuit having a function of protecting the element (hereinafter referred to as a protection circuit 50 6) and a terminal portion 507. Note that the protection circuit 506 is not provided. This is also fine.

[0462] A part or the whole of the driver circuit portion 504 is formed on the same substrate as the pixel portion 502. This makes it possible to reduce the number of parts and terminals. When a part or the whole of the pixel portion 502 is not formed on the same substrate, the driving circuit A part or the whole of the path portion 504 is COG or TAB (Tape Automated Band). It can be implemented by using the onding.

[0463] The pixel section 502 is arranged in X rows (X is a natural number of 2 or more) and Y columns (Y is a natural number of 2 or more). The display device has a circuit for driving a plurality of display elements (hereinafter, referred to as pixel circuit 501), The path section 504 is a circuit (hereinafter, a gate driver) that outputs a signal (scanning signal) for selecting a pixel. 504a) to supply a signal (data signal) for driving the display element of the pixel. The pixel circuit 504 includes a driver circuit such as a circuit (hereinafter, referred to as a source driver 504b).

[0464] The gate driver 504a includes a shift register and the like. A signal for driving the shift register is input via a terminal unit 507, and a signal is output. For example, a start pulse signal, a clock signal, etc. are input to the gate driver 504a. The gate driver 504a outputs a pulse signal. The gate has a function of controlling the potential of the scanning lines GL_1 to GL_X. A plurality of drivers 504a are provided, and the scanning lines GL_1 to Alternatively, the gate driver 504a may control the GL_X by dividing it. However, the gate driver 50 has a function of supplying 4a may also provide another signal.

[0465] The source driver 504b includes a shift register and the like. Through the terminal section 507, a signal for driving the shift register as well as a source of a data signal are input. The source driver 504b receives a signal (image signal) that is to be displayed on the pixel circuit based on the image signal. The source driver 504b has a function of generating a data signal to be written to the source driver 501. A data signal is generated according to a pulse signal obtained by inputting a start pulse, a clock signal, etc. The source driver 504b has a function of controlling the output of a data signal. The potential of the wiring (hereinafter, referred to as data lines DL_1 to DL_Y) connected to the data line DL_Y is controlled by the Alternatively, the source driver 504b may have a function of supplying an initialization signal. However, the present invention is not limited to this, and the source driver 504b may also supply other signals. It is possible.

[0466] The source driver 504b is configured using, for example, a plurality of analog switches. The source driver 504b sequentially turns on a number of analog switches, The image signal can be time-division-divided and output as a data signal. Also, a shift register, etc. This may be used to configure the source driver 504b.

[0467] Each of the plurality of pixel circuits 501 is connected to one of the plurality of scanning lines GL to which a scanning signal is applied. A pulse signal is inputted through the data line DL, and a data signal is given through one of the data lines DL. A data signal is input to each of the pixel circuits 501. 504a controls writing and holding of data of the data signal. For example, The second pixel circuit 501 is connected to a gate driver GL_m (where m is a natural number equal to or smaller than X) via a scanning line GL_m. A pulse signal is input from 504a, and the data line DL_n ( A data signal is input from the source driver 504b via a source driver 504c (n is a natural number equal to or smaller than Y).

[0468] The protection circuit 506 shown in FIG. 38(A) is, for example, a gate driver 504a and a pixel circuit 5 01. Alternatively, the protection circuit 506 is connected to the scanning line GL, which is the wiring between the source driver The data line DL is connected between the driver 504b and the pixel circuit 501. The protection circuit 506 can be connected to a wiring between the gate driver 504a and the terminal unit 507. Alternatively, the protection circuit 506 may be a wiring between the source driver 504b and the terminal unit 507. The terminal unit 507 can be connected to a power supply and a power supply line from an external circuit to the display device. This refers to the part provided with terminals for inputting control signals and image signals.

[0469] When a potential outside a certain range is applied to the wiring to which the protection circuit 506 is connected, the protection circuit This is a circuit that brings one wire into electrical continuity with another wire.

[0470] As shown in FIG. 38A, a protection circuit 50 is provided in each of a pixel section 502 and a driver circuit section 504. 6, ESD (Electro Static Discharge: This can improve the resistance of the display device to overcurrent caused by electrostatic discharge (ESD) and the like. However, the configuration of the protection circuit 506 is not limited to this. For example, A configuration in which a protection circuit 506 is connected, or a protection circuit 506 is connected to the source driver 504b Alternatively, a protection circuit 506 may be connected to the terminal portion 507. It can also be written as:

[0471] In FIG. 38(A), the gate driver 504a and the source driver 504b Therefore, although an example in which the driver circuit portion 504 is formed is shown, the present invention is not limited to this configuration. For example, only the gate driver 504a is formed, and a source driver circuit is formed separately. A substrate (for example, a drive circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film) is It may also be configured to be equipped with

[0472] In addition, the pixel circuits 501 shown in FIG. 38(A) may have a configuration shown in FIG. 38(B), for example. It can be said that:

[0473] The pixel circuit 501 shown in FIG. 38B includes a liquid crystal element 570, a transistor 550, and a capacitor. The transistor 550 may be any of the transistors described in the previous embodiment. can be applied.

[0474] The potential of one of the pair of electrodes of the liquid crystal element 570 is appropriately set according to the specifications of the pixel circuit 501. The alignment state of the liquid crystal element 570 is set by the written data. A common potential is applied to one of a pair of electrodes of the liquid crystal element 570 in each of the pixel circuits 501. A common potential may be applied to the pair of liquid crystal elements 570 of the pixel circuits 501 in each row. A different potential may be applied to one of the electrodes.

[0475] For example, the display device including the liquid crystal element 570 can be driven in a TN mode, an STN mode, or the like. Mode, VA mode, ASM (Axially Symmetric Aligned M icro-cell mode, OCB (Optically Compensated Birefringence mode, FLC (Ferroelectric Liquid id Crystal) mode, AFLC (AntiFerroelectric Li quid Crystal) mode, MVA mode, PVA (Patterned Ve Vertical Alignment mode, IPS mode, FFS mode, or TBA (Transverse Bend Alignment) mode, etc. may also be used. In addition to the above-mentioned driving method, the display device can be driven by an ECB (Electric Carrier Bipolar Transistor) or the like. Ally Controlled Birefringence mode, PDLC(P Oligomeric Dispersed Liquid Crystal (PNLC) mode (Polymer Network Liquid Crystal) mode, guest hole However, there are various types of liquid crystal elements and their driving methods, and they are not limited to these. A variety of different types of sensors can be used.

[0476] In the pixel circuit 501 in the mth row and the nth column, One of the electrodes is electrically connected to the data line DL_n, and the other is a pair of electrodes of the liquid crystal element 570. The gate electrode of the transistor 550 is electrically connected to the other of the scan lines G L_m. The transistor 550 can be turned on or off. Thus, the write control circuit 100 has a function of controlling the writing of data of the data signal.

[0477] One of a pair of electrodes of the capacitor 560 is connected to a wiring to which a potential is supplied (hereinafter, a potential supply line VL ) and the other is electrically connected to the other of the pair of electrodes of the liquid crystal element 570. The value of the potential of the potential supply line VL is set appropriately according to the specifications of the pixel circuit 501. The capacitor 560 functions as a storage capacitor for storing written data.

[0478] For example, in a display device having the pixel circuit 501 shown in FIG. The pixel circuits 501 in each row are sequentially selected by a gate driver 504a shown in FIG. 550 is turned on to write data of the data signal.

[0479] In the pixel circuit 501 in which data has been written, the transistor 550 is turned off. By repeating this process row by row, an image can be displayed.

[0480] In addition, the pixel circuits 501 shown in FIG. 38(A) may have a configuration shown in FIG. 38(C), for example. It can be said that:

[0481] The pixel circuit 501 shown in FIG. 38C includes transistors 552 and 554 and a capacitance element. The transistor 552 and the transistor 554 The transistor described in the above embodiment can be used for either or both of the above. .

[0482] A data signal is applied to one of the source and drain electrodes of the transistor 552. The transistor 5 is electrically connected to a wiring (hereinafter, referred to as a data line DL_n). The gate electrode 52 is connected to a wiring (hereinafter, referred to as a scanning line GL_m) to which a gate signal is applied. are electrically connected.

[0483] Transistor 552 is turned on or off to transfer the data of the data signal. It has the function of controlling the writing of data.

[0484] One of a pair of electrodes of the capacitor 562 is connected to a wiring to which a potential is applied (hereinafter, a potential supply line VL _a), and the other is electrically connected to the source electrode and drain electrode of the transistor 552. The second electrode is electrically connected to the other of the first and second electrodes.

[0485] The capacitor 562 functions as a storage capacitor for storing written data.

[0486] One of the source electrode and the drain electrode of the transistor 554 is connected to the potential supply line VL_a. In addition, the gate electrode of the transistor 554 is electrically connected to the It is electrically connected to the other of the source electrode and the drain electrode.

[0487] One of the anode and the cathode of the light-emitting element 572 is electrically connected to the potential supply line VL_b. The other one is electrically connected to the other of the source electrode and drain electrode of the transistor 554. will be done.

[0488] The light-emitting element 572 may be, for example, an organic electroluminescence element (also called an organic EL element). However, the light-emitting element 572 is not limited to this. Alternatively, an inorganic EL element made of an inorganic material may be used.

[0489] A high power supply potential VDD is applied to one of the potential supply lines VL_a and VL_b. and the other is supplied with a low power supply potential VSS.

[0490] In a display device having the pixel circuit 501 of FIG. 38(C), for example, The pixel circuits 501 in each row are sequentially selected by the gate driver 504a, and the transistors 552 are turned on. The data signal is written by turning it on.

[0491] In the pixel circuit 501 to which the data has been written, the transistor 552 is turned off. Furthermore, the transistor 554 is in a holding state in response to the potential of the written data signal. The amount of current flowing between the source electrode and the drain electrode is controlled, and the light emitting element 572 The light is emitted with a brightness that corresponds to the flow rate. By performing this process row by row, an image can be displayed.

[0492] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0493] (Embodiment 5) In this embodiment, a display module and an electronic device each including a semiconductor device according to one embodiment of the present invention will be described. This will be described with reference to FIGS. 39 to 42.

[0494] <5-1. Display module> The display module 7000 shown in FIG. 39 includes an upper cover 7001 and a lower cover 7002. Between them, touch panel 7004 connected to FPC 7003 and A display panel 7006, a backlight 7007, a frame 7009, and a printed circuit board 701 0, has battery 7011.

[0495] The semiconductor device of one embodiment of the present invention can be used for the display panel 7006, for example.

[0496] The upper cover 7001 and the lower cover 7002 are connected to the touch panel 7004 and the display panel The shape and dimensions can be changed as appropriate to match the size of 7006.

[0497] The touch panel 7004 is a resistive or capacitive touch panel. The display panel 7006 may be overlapped with the opposing substrate (sealing substrate). It is also possible to provide the display panel 7 with a touch panel function. It is also possible to provide an optical sensor in each pixel of the display panel 006 to make it into an optical touch panel.

[0498] The backlight 7007 has a light source 7008. In FIG. In the above embodiment, the light source 7008 is disposed on the light source 7007. However, the present invention is not limited to this. For example, a light source 7008 is arranged at the end of a backlight 7007, and a light diffusion plate is further used. In addition, when a self-luminous light-emitting element such as an organic EL element is used, or when a reflective In the case of a liquid crystal panel, the backlight 7007 may not be provided.

[0499] The frame 7009 protects the display panel 7006 and also supports the movement of the printed circuit board 7010. It also functions as an electromagnetic shield to block electromagnetic waves generated by the operation of the frame. The frame 7009 may also function as a heat sink.

[0500] The printed circuit board 7010 includes a power supply circuit, a signal circuit for outputting a video signal, and a clock signal. The power supply circuit is provided with a signal processing circuit. Alternatively, the power source may be a battery 7011 provided separately. , this can be omitted when using a commercial power source.

[0501] In addition, the display module 7000 includes components such as a polarizing plate, a retardation plate, and a prism sheet. It may be added.

[0502] <5-2.Electronic equipment 1> Next, examples of electronic devices are shown in FIGS.

[0503] FIG. 40(A) shows the appearance of the camera 8000 with the viewfinder 8100 attached. This is a diagram.

[0504] The camera 8000 includes a housing 8001, a display unit 8002, an operation button 8003, and a shutter. The camera 8000 has a button 8004 and the like. The camera 8000 also has a detachable lens 8006. It is attached.

[0505] In this example, a camera 8000 is used, and a lens 8006 is detached from a housing 8001 and replaced. However, the lens 8006 and the housing may be integrated together.

[0506] The camera 8000 can capture an image by pressing the shutter button 8004. The display unit 8002 also functions as a touch panel. It is also possible to capture an image by doing so.

[0507] The housing 8001 of the camera 8000 has a mount having electrodes, and a finder 810 In addition to 0, strobe devices etc. can also be connected.

[0508] The finder 8100 includes a housing 8101, a display unit 8102, a button 8103, and the like. .

[0509] The housing 8101 has a mount that engages with the mount of the camera 8000, The mount can be attached to the camera 8000. The mount also includes an electrode The image received from the camera 8000 through the electrode is displayed on the display unit 8102. It is possible to do so.

[0510] The button 8103 functions as a power button. The 8102 display can be switched on and off.

[0511] The display unit 8002 of the camera 8000 and the display unit 8102 of the viewfinder 8100 are The display device according to one embodiment of the present invention can be applied.

[0512] In FIG. 40A, the camera 8000 and the finder 8100 are treated as separate electronic devices. These are configured to be removable, but the camera 8000 has a housing 8001 equipped with a display device. The camera may have a built-in viewfinder that can be used to capture images.

[0513] FIG. 40B is a diagram showing the external appearance of the head mounted display 8200.

[0514] The head mounted display 8200 includes a mounting part 8201, a lens 8202, and a main body 82 8203, a display unit 8204, a cable 8205, etc. It has a built-in 8206 battery.

[0515] A cable 8205 supplies power from a battery 8206 to the main body 8203. 03 is equipped with a wireless receiver and the like, and image information such as image data received is displayed on a display unit 8204. In addition, the camera installed in the main body 8203 can record the movement of the user's eyeballs and eyelids. The system captures the user's gaze and calculates the coordinates of the user's gaze based on that information. It can be used as an input means.

[0516] Furthermore, the mounting unit 8201 may be provided with a plurality of electrodes at positions that come into contact with the user. The main body 8203 detects the current flowing through the electrodes in response to the movement of the user's eyeball, The device may have a function of recognizing the user's viewpoint. Also, the device may have a function of detecting the current flowing through the electrode. By doing so, the mounting unit 820 may have a function of monitoring the pulse of the user. The sensor 1 may have various sensors such as a temperature sensor, a pressure sensor, and an acceleration sensor. The device may have a function of displaying the user's biological information on the display unit 8204. The image displayed on the display unit 8204 is changed according to the movement of the part. Good too.

[0517] The display device of one embodiment of the present invention can be applied to the display portion 8204.

[0518] 40(C), (D), and (E) are diagrams showing the appearance of the head mounted display 8300. The head mounted display 8300 includes a housing 8301, a display unit 8302, and a backlight. The optical element has a band-shaped fixture 8304 and a pair of lenses 8305.

[0519] A user can view the display on the display unit 8302 through the lens 8305 . It is preferable to arrange the display portion 8302 in a curved manner. By placing the device in the position shown in FIG. Although the configuration in which one display unit 8302 is provided has been illustrated, the present invention is not limited to this. For example, Two display units 8302 may be provided. In this case, one display unit is provided for each eye of the user. If the display unit is arranged in such a way that a 3D display using parallax is possible, do.

[0520] Note that the display device of one embodiment of the present invention can be applied to the display portion 8302. A display device including the semiconductor device of one embodiment of the present invention has extremely high definition. Even if the image is magnified using the lens 8305, the pixels are not visible to the user, and the image is more This makes it possible to display images with a higher sense of reality.

[0521] <5-3.Electronic equipment 2> Next, an example of an electronic device different from the electronic devices shown in FIG. 40(A) to FIG. 40(E) will be described. 1(A) to 41(G).

[0522] The electronic device shown in FIG. 41A to FIG. 41G includes a housing 9000, a display portion 9001, a switch A speaker 9003, an operation key 9005 (including a power switch or an operation switch), a connection terminal Child 9006, sensor 9007 (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, Light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, current, voltage, power, radiation, (including functions for measuring flow rate, humidity, gradient, vibration, odor, or infrared rays), 9008, etc.

[0523] The electronic devices shown in FIGS. 41A to 41G have various functions. Function to display various information (still images, videos, text images, etc.) on the display unit, touch panel function , calendar, date or time display functions, various software (programs) A function for controlling processing by wireless communication, a function for controlling various computers by using wireless communication, Functions for connecting to a network and transmitting or receiving various data using wireless communication functions A function to read out a program or data recorded on a recording medium and display it on the display unit. The electronic devices shown in FIGS. The functions that can be possessed by the can be not limited to these, and can have various functions. Although not shown in FIG. 41(A) to FIG. 41(G), the electronic device may have a plurality of display units. The electronic device may be provided with a camera or the like to capture still images. , the function to shoot videos, and save the captured images to a recording medium (external or built-in to the camera) The camera may have a function of capturing an image on a display unit, a function of displaying a captured image on a display unit, etc.

[0524] The electronic devices shown in FIGS. 41A to 41G will be described in detail below.

[0525] FIG. 41A is a perspective view showing a television device 9100. 100 is a display unit 9001 with a large screen of, for example, 50 inches or more or 100 inches or more. It is possible to incorporate.

[0526] FIG. 41B is a perspective view showing a portable information terminal 9101. For example, the device has one or more functions selected from a telephone, a notebook, an information viewing device, etc. Specifically, the mobile information terminal 9101 can be used as a smartphone. A speaker, a connection terminal, a sensor, and the like may be provided. Image information can be displayed on multiple sides of the screen. For example, three operation buttons 9050 ( Operation icons or simply icons) can be displayed on one side of the display unit 9001. Also, information 9051 shown in a dashed rectangle can be displayed on the other side of the display unit 9001. Examples of information 9051 include e-mail and social networking sites (SNS). Display to notify of incoming calls, e-mails, SNS, etc. Subject, sender name of email or SNS, date and time, time, remaining battery level, antenna reception Or, instead of information 9051, Alternatively, operation buttons 9050 and the like may be displayed.

[0527] FIG. 41C is a perspective view showing a portable information terminal 9102. , and has a function of displaying information on three or more faces of the display unit 9001. An example is shown in which information 9053 and information 9054 are displayed on different sides. The user of the portable information terminal 9102 holds the portable information terminal 9102 in the breast pocket of the clothes. In this state, the display (information 9053 in this case) can be confirmed. The telephone number or name of the caller is displayed on the mobile information terminal 9102 so that it can be observed from above. The user can read the display without taking the mobile information terminal 9102 out of his pocket. You can check the number and decide whether to answer the call or not.

[0528] 41(D) is a perspective view showing a wristwatch-type portable information terminal 9200. The 9200 is used for mobile phone calls, e-mail, document browsing and writing, music playback, and Internet communications. It is possible to execute various applications such as computer games. The display unit 9001 has a curved display surface, and displays information along the curved display surface. In addition, the portable information terminal 9200 can perform short-distance wireless communication according to a communication standard. For example, by communicating with a wireless headset, The mobile information terminal 9200 also has a connection terminal 9006. It has a connector and can directly exchange data with other information terminals. Charging can also be performed via the connection terminal 9006. Power may also be supplied wirelessly without going through 6.

[0529] 41(E), (F), and (G) are perspective views showing a foldable portable information terminal 9201. FIG. 41E is a perspective view of the portable information terminal 9201 in an unfolded state. (F) shows the mobile information terminal 9201 being changed from one of the unfolded and folded states to the other. FIG. 41(G) is a perspective view of the portable information terminal 9201 in a folded state. The portable information terminal 9201 is highly portable when folded and is unfolded. When the display is turned on, the seamless, wide display area provides excellent visibility of the display. The display unit 9001 of the display device 9001 is made up of three housings 9000 connected by hinges 9055. The two housings 9000 are supported by the hinge 9055. The portable information terminal 9201 can be reversibly transformed from an unfolded state to a folded state. For example, the portable information terminal 9201 can be bent with a radius of curvature of 1 mm or more and 150 mm or less. It can be done.

[0530] Next, the electronic device shown in FIG. 40(A) to FIG. 40(E) and the electronic device shown in FIG. An example of an electronic device different from the electronic device shown in FIG. 42(A) and (B) is shown in FIG. 42(A). FIG. 42(B) is a perspective view of a display device having a plurality of display panels. FIG. 42(B) is a perspective view of a state in which a plurality of display panels are rolled up. FIG. 2 is a perspective view of the device in an unfolded state.

[0531] The display device 9500 shown in FIG. 42(A) and (B) includes a plurality of display panels 9501 and a shaft portion 9 511 and a bearing portion 9512. The display panels 9501 have a display area 9502 and a light-transmitting region 9503.

[0532] In addition, the display panels 9501 are flexible. The filters 9501 are arranged so that they partially overlap each other. For example, A light-transmitting region 9503 of the display panel 9501 can be overlapped. By using the display panel 9501, a large-screen display device can be provided. The display panel 9501 can be rolled up depending on the situation, making it a versatile display. The display device may be a display device.

[0533] In addition, in FIG. 42(A) and (B), the display area 9502 is adjacent to the display panel 950 1 shows a state in which the display panels are spaced apart from each other, but this is not limited thereto. For example, the display panels 9 By overlapping the display areas 9502 of 501 without any gaps, a continuous display area 9502 is created. You may do so.

[0534] The electronic device described in this embodiment has a display unit for displaying some information. However, the semiconductor device of one embodiment of the present invention is an electronic device that does not have a display portion. This can also be applied to vessels.

[0535] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination. EXAMPLES

[0536] In this example, a method for forming an oxide semiconductor film that can be used for a semiconductor device of one embodiment of the present invention will be described. The crystallinity was evaluated. In this example, Sample A1 and Sample A2 were prepared.

[0537] [Sample A1] Sample A1 is a sample in which an oxide semiconductor film having a thickness of 100 nm is formed on a glass substrate. The oxide semiconductor film of Sample A1 was formed under the following conditions: the substrate temperature was room temperature, and the flow rate was 180 sc. Argon gas at a flow rate of 20 sccm and oxygen gas at a flow rate of 20 sccm were placed in the chamber of the sputtering device. The pressure was set to 0.6 Pa, and a metal oxide having indium, gallium, and zinc was introduced into the The ion beam was applied to a 2.5kW ion source for a Zn-In oxide target (In:Ga:Zn=4:2:4.1 [atomic ratio]). The above gas flow ratio is the ratio of oxygen flow to the total gas flow. The oxygen flow rate ratio is sometimes referred to as the oxygen flow rate ratio based on the ratio of the amount of oxygen. The elemental flow ratio is 10%.

[0538] [Sample A2] Sample A2 is a sample in which an oxide semiconductor film having a thickness of 100 nm is formed on a glass substrate. The oxide semiconductor film of Sample A2 was formed under the following conditions: the substrate temperature was room temperature, and the flow rate was 200 sc. cm of oxygen gas was introduced into the chamber of the sputtering device, and the pressure was set to 0.6 Pa. A metal oxide target having indium, gallium, and zinc (In:Ga:Zn= The formation was achieved by applying 2.5 kW of AC power to a 4:2:4.1 (atomic ratio) The oxygen flow rate ratio in the preparation conditions for sample A2 was 100%.

[0539] As described above, the oxygen flow rate during the formation of the oxide semiconductor film in Sample A1 and Sample A2 is The glass substrates used for samples A1 and A2 were 60 A large glass substrate measuring 0.0 mm x 720 mm was used, and the thickness of the glass substrate was set to 0.7 mm. The value was m.

[0540] [XRD measurement] Next, the crystallinity of the oxide semiconductor films formed in Samples A1 and A2 was examined. The crystallinity was evaluated by XRD measurement.

[0541] Figure 43(A) shows the XRD measurement results for sample A1, and Figure 43(B) shows the XRD measurement results for sample A2. The results are shown in Table 1. The XRD measurements were performed at three points on the glass substrate of each sample. Measurements were performed on the

[0542] In XRD measurement, the powder method (also called the θ-2θ method), which is a type of out-of-plane method, is used. The θ-2θ method involves changing the incidence angle of the X-rays and This method measures X-ray diffraction intensity by setting the angle of the detector to the same as the angle of incidence. In 3(A) and (B), the vertical axis indicates the diffraction intensity in arbitrary units, and the horizontal axis indicates the angle 2θ. In addition, in Fig. 43(A) and (B), three XRD profiles are arranged side by side. This is shown.

[0543] As shown in FIG. 43(A), in the sample A1, the diffraction intensity peak near 2θ=31° The diffraction intensity peak near 2θ=31° is very small, or On the other hand, as shown in FIG. 43(B), the diffraction intensity peak is not observed near 2θ=31°. In sample A2, a diffraction intensity peak is clearly observed near 2θ=31°.

[0544] The diffraction angle at which the diffraction intensity peak was observed (around 2θ = 31°) was the same as that of single-crystal InGaZ nO 4 This coincides with the diffraction angle of the (009) plane in the structure model of sample A2. Since the above peak is observed in the film, it is considered that the c-axis is oriented in the film thickness direction. On the other hand, for sample A1, the XRD measurement showed that the c-axis orientation It is difficult to determine whether the crystals have the above structure.

[0545] From this result, it can be seen that the oxide semiconductor film can be formed by changing the oxygen flow rate during the formation of the oxide semiconductor film. It was confirmed that the crystallinity of the oxide semiconductor film can be changed by adding oxygen during the formation of the oxide semiconductor film. It was suggested that an oxide semiconductor film with higher crystallinity can be formed as the flow rate ratio is larger.

[0546] The configuration shown in this embodiment may be used in appropriate combination with other embodiments or mode of implementation. It is possible. EXAMPLES

[0547] In this example, an In-Ga-Zn oxide film was formed using the method shown in the above embodiment. This paper describes the results of elemental analysis and evaluation of crystallinity of IGZO film (hereinafter referred to as IGZO film). do.

[0548] In the sample B1 according to the present embodiment, In-Ga-Zn oxide (atomic ratio In:Ga:Zn= 4:2:4.1) target was used for sputtering, aiming for a film thickness of 100 nm. An IGZO film was formed on a glass substrate. The IGZO film was formed using argon gas at 180scc. The pressure was controlled at 0.6 Pa in an atmosphere containing 20 sccm of oxygen gas and 20 sccm of SiO. The temperature was kept at 40° C. and an AC power of 2.5 kW was applied.

[0549] The cross section of the IGZO film of sample B1 was analyzed by energy dispersive X-ray spectroscopy (EDX :Energy Dispersive X-ray spectroscopy The EDX measurements were performed using an atomic resolution analytical electron microscope (JEM) manufactured by JEOL Ltd. Using the -ARM200F, an electron beam with an acceleration voltage of 200 kV and a beam diameter of approximately 0.1 nmφ was irradiated. The elemental analysis was performed using the energy dispersive X-ray analyzer JED-2300T. A Si drift detector was used to detect the X-rays emitted from sample B1.

[0550] In EDX measurement, each point in the analysis area of ​​the sample B1 is irradiated with an electron beam. The energy and frequency of the characteristic X-rays of the sample are measured, and the EDX spectrum corresponding to each point is obtained. In this embodiment, the peaks of the EDX spectrum at each point are determined as In atoms, Ga atoms, Zn atoms, The electrons in the 1 and 2 atoms are assigned to the transitions, and the ratio of each atom at each point is calculated. By carrying out this procedure for the analysis area of ​​sample B1, the distribution of the ratio of each atom was shown. The EDX mapping can be obtained.

[0551] The EDX mapping of In atoms in the cross section of the IGZO film of sample B1 is shown in Figure 44. The EDX mapping shown in Figure 4 shows the ratio of In atoms at each point in the IGZO film [atomic The darker areas in Figure 44 have a lower ratio of In atoms, at least 10 The relatively light-colored areas in Figure 44 have a high ratio of In atoms. The maximum is 25.21 atomic%.

[0552] In the EDX mapping shown in Figure 44, a distribution of light and dark can be seen in the image, and the cross section of the IGZO film In the EDX mapping, the In atoms are segregated in the region where the color is relatively bright. The light areas are often roughly circular or roughly elliptical. There are also areas formed by connecting elliptical areas. In other words, roughly circular or roughly elliptical It can be said that the circular areas are formed in a mesh pattern. This is a region where In is present at a high concentration, and corresponds to region A shown in the above embodiment. Area A is not large enough to cross or transverse the analysis area, and is surrounded by relatively dark areas. The region is surrounded by a region (corresponding to region B in the above embodiment) and is formed in an island shape. In addition, between area A and area B, an area with intermediate color intensity is formed. The boundary of area B is unclear in some parts. Also, the diameter of area A, which is roughly circular or roughly elliptical, is Most areas are in the range of 0.1nm to 5nm.

[0553] Thus, the IGZO film of sample B1 has an in-rich region A and an in-poor region B. Region A and region B are formed in a complex oxide semiconductor. Since the field effect of region A contributes to the mobility and region B contributes to the switching characteristics of the transistor, By using a complex oxide semiconductor, it is possible to fabricate a transistor with good electrical characteristics. can.

[0554] In addition, by forming region A in an island shape surrounded by region B, The source and drain of the transistor are connected through region A, which suppresses the increase in the off-current. do.

[0555] Next, unlike sample B1, argon gas 140 sccm and oxygen gas 60 sccm The IGZO film was formed in an atmosphere containing , with the substrate temperature at 170 °C, to produce sample C1. Other deposition conditions for the IGZO film of sample C1 were the same as those for sample B1.

[0556] Bright Field-Scanning Electron Microscopy (BF-STEM) of cross sections of samples B1 and C1. nning Transmission Electron Microscopy) Image The BF-STEM image of sample B1 is shown in Figure 45(A). The BF-STEM image of sample C1 is shown in FIG.

[0557] As shown in FIG. 45(A), in the IGZO film of sample B1, the area is small, but the layered crystal part In contrast, in Figure 45(B), crystal parts with c-axis orientation are also seen. In the IGZO film of sample C1 shown in Fig. 2, a layered crystalline part was formed over a larger area than in sample B1. As shown above, in the IGZO film of sample B1, where segregation of In atoms is observed, layered In atoms are also present. In addition, the oxygen flow rate during IGZO deposition was increased and the substrate temperature was raised. It was suggested that this could improve the crystallinity of the IGZO film.

[0558] Furthermore, we prepared samples with IGZO films by setting the oxygen flow rate and substrate temperature under various conditions. The deposition conditions for the sample IGZO film were oxygen flow ratio of 10 % (oxygen gas 20sccm, argon gas 180sccm), 30% (oxygen gas 60sccm cm, argon gas 140sccm), 50% (oxygen gas 100sccm, argon gas 100sccm), 70% (oxygen gas 140sccm, argon gas 60sccm) The substrate temperature was set to room temperature, 130°C, or 100% (oxygen gas 200sccm). The deposition temperature was set to 170° C. Other deposition conditions for the IGZO film of each sample were the same as those for sample B1.

[0559] The crystallinity of the IGZO film of each sample was evaluated using XRD measurement. The powder method (also called the θ-2θ method), which is a type of t-of-plane method, was used. In the θ method, the incidence angle of the X-ray is changed and the angle of the detector placed opposite the X-ray source is also changed. This is a method for measuring X-ray diffraction intensity by setting the angle of incidence to the same as the incident angle.

[0560] The XRD measurement results of each sample are shown in Figure 46(A). As shown in Figure 46(B), Measurements were taken at three points in the glass substrate.

[0561] In FIG. 46(A), the vertical axis indicates the diffraction intensity in arbitrary units, and the horizontal axis indicates the angle 2θ. In addition, in FIG. 46(A), three X points corresponding to the three points in FIG. 46(B) are The RD profiles are shown side by side.

[0562] As shown in FIG. 46(A), in the IGZO film formed under the same film forming conditions as the sample B1, 2θ The diffraction intensity peak near 2θ=31° is difficult to confirm, or the diffraction intensity near 2θ=31° is The peak is extremely small or there is no peak in the diffraction intensity around 2θ=31°. In the IGZO film formed under the same conditions as sample C1, a diffraction intensity peak was observed around 2θ=31°. The problem is clearly identified.

[0563] The diffraction angle at which the diffraction intensity peak was observed (around 2θ = 31°) was the same as that of single-crystal InGaZ nO 4 This coincides with the diffraction angle of the (009) plane in the structure model of the specimen C1. Since the above peak was observed in the IGZO film grown under similar conditions, it is considered that the c-axis orientation It can be seen that the crystals contain

[0564] On the other hand, for the IGZO film formed under the same conditions as sample B1, the XRD measurements showed that It is difficult to judge whether the crystals have axial orientation. As shown in Fig. 45(A), by taking BF-STEM images, it is possible to obtain a detailed image of a microscopic area. Crystals with c-axis orientation can be confirmed.

[0565] In addition, as shown in FIG. 46(A), the larger the oxygen flow rate during the deposition of the IGZO film, the The higher the temperature of the substrate, the sharper the peak of the XRD profile. The higher the oxygen flow rate during deposition of the GZO film or the higher the substrate temperature, the higher the crystallinity. This suggests that IGZO films can be produced.

[0566] The configuration shown in this embodiment may be used in appropriate combination with other embodiments or mode of implementation. It is possible. [Explanation of symbols]

[0567] 100 transistors 100A Transistor 100B Transistor 100C transistor 100D Transistor 102 Substrate 104 Conductive film 106 Insulating film 108 Oxide semiconductor film 108_1 Oxide semiconductor film 108_1_0 Oxide semiconductor film 108_2 Oxide semiconductor film 108_2_0 Oxide semiconductor film 108_3 Oxide semiconductor film 108_3_0 Oxide semiconductor film 112 Conductive film 112a Conductive film 112a_1 Conductive film 112a_2 Conductive film 112a_3 Conductive film 112b Conductive film 112b_1 Conductive film 112b_2 Conductive film 112b_3 Conductive film 114 Insulating film 116 Insulating film 118 Insulating film 120 Conductive film 120a Conductive film 120b Conductive film 141a opening 141b opening 142a opening 142b opening 191 Target 192 Plasma 193 Target 194 Plasma 501 Pixel circuit 502 Pixel section 504 Drive circuit section 504a Gate Driver 504b source driver 506 Protection circuit 507 Terminal section 550 Transistor 552 Transistor 554 Transistor 560 Capacitive element 562 Capacitive element 570 Liquid crystal element 572 Light emitting element 700 Display device 701 First Substrate 702 Pixel section 704 Source driver circuit section 705 Second Board 706 Gate driver circuit section 708 FPC terminal section 710 Signal Line 711 Wiring section 712 Sealing material 716 FPC 730 Insulating film 732 Sealing film 734 Insulating film 736 Colored film 738 Light-shielding film 750 Transistors 752 Transistor 760 Connection electrode 770 Planarizing Insulating Film 772 Conductive Film 773 Insulating Film 774 Conductive Film 775 Liquid crystal elements 776 Liquid crystal layer 777 Conductive Film 778 Structure 780 Anisotropic Conductive Film 782 Light emitting element 786 EL layer 788 Conductive Film 790 Capacitive element 791 Touch Panel 792 Insulating film 793 Electrode 794 Electrode 795 Insulating Film 796 Electrode 797 Insulating Film 2500a Target 2500b target 2501 Deposition chamber 2510a Backing Plate 2510b backing plate 2520 Target Holder 2520a Target Holder 2520b target holder 2530a Magnet Unit 2530b Magnet Unit 2530N1 Magnet 2530N2 Magnet 2530S Magnet 2532 Magnet holder 2542 Parts 2560 Board 2570 PCB Holder 2580a magnetic field lines 2580b Magnetic field lines 7000 Display Module 7001 Top cover 7002 Lower cover 7003 FPC 7004 Touch Panel 7005 FPC 7006 Display Panel 7007 Backlight 7008 Light source 7009 Frame 7010 Printed Circuit Board 7011 Battery 8000 Camera 8001 Case 8002 Display section 8003 Operation button 8004 Shutter button 8006 Lens 8100 Finder 8101 Case 8102 Display section 8103 Button 8200 Head Mounted Display 8201 Mounting part 8202 Lens 8203 Main unit 8204 Display section 8205 Cable 8206 Battery 8300 Head Mounted Display 8301 Case 8302 Display section 8304 Fixtures 8305 Lens 9000 Chassis 9001 Display section 9003 Speaker 9005 Operation key 9006 Connection terminal 9007 Sensor 9008 Microphone 9050 Operation button 9051 Information 9052 Information 9053 Information 9054 Information 9055 Hinge 9100 Television equipment 9101 Portable information terminal 9102 Portable information terminal 9200 Mobile Information Terminal 9201 Portable information terminals 9500 display device 9501 Display Panel 9502 Display area 9503 area 9511 Shaft 9512 Bearing section

Claims

1. A pixel having a first transistor, a second transistor, and a light-emitting element, one of a source and a drain of the first transistor is electrically connected to a gate of the second transistor; one of a source and a drain of the second transistor is electrically connected to the light emitting element; the first transistor includes a gate electrode, a first oxide semiconductor film overlapping with the gate electrode, and a pair of electrodes electrically connected to the first oxide semiconductor film; The first oxide semiconductor film is In ａ M ｂ Zinc ｃ O ｄ (M represents Al, Ga, Y, or Sn, and a, b, c, and d represent any number); and In ｘ Zinc ｙ O ｚ (x, y, and z are any numbers), and a complex oxide semiconductor having a mixture of A display device, wherein the plurality of second regions are irregularly distributed or scattered throughout the first region.

2. In claim 1, The second region comprises Al, Ga, Y, or Sn.

3. In claim 1 or 2, a second oxide semiconductor film over the first oxide semiconductor film; the second oxide semiconductor film contains In, M (M is Al, Ga, Y, or Sn), and Zn.

4. In claim 3, The display device, wherein the first oxide semiconductor film has a region having lower crystallinity than the second oxide semiconductor film.

Images