Chip component mounting structure
By designing a thick back electrode in the chip assembly and adjusting its spacing with the circuit board land, the problem of damaged chip impedance solder connection and peeling of back electrode under thermal shock is solved, and thermal stress resistance and reliability are improved.
Patent Information
- Application Number
- JP2021040509
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-03-12
- Publication Date
- 2025-05-16
- Estimated Expiration
- 2041-03-12
AI Technical Summary
Existing chip impedances are prone to problems of solder connection damage and back electrode stripping under thermal shock, especially when high-strength copper-free solder is used, thermal stress cannot be absorbed by the solder and transmitted to the back electrode, resulting in connection failure.
An installation structure of a chip assembly is designed in which the back electrode forms a thick layer portion at both ends of the chip assembly and extends part of the back electrode to the inside of the circuit board by welding, thereby adjusting the spacing between the back electrode and the circuit board land so that it reduces the risk of peeling when thermally impacted.
By adjusting the spacing between the back electrode and the circuit board land and increasing the thick layer portion of the back electrode, the influence of thermal stress on the peeling of the back electrode is effectively reduced, and the durability and reliability of the chip assembly under thermal shock is improved.
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Abstract
Description
[Technical field]
[0001] The present invention relates to a surface-mount type chip component that is solder-bonded to a land on a circuit board. [Background technology]
[0002] A chip resistor, which is an example of a chip component, is mainly composed of a rectangular insulating substrate, a pair of surface electrodes arranged opposite each other with a predetermined distance between them on the main surface (front surface) of the insulating substrate, a resistor bridging the pair of surface electrodes, a protective layer covering the resistor, a pair of back surface electrodes arranged opposite each other with a predetermined distance between them on the back surface of the insulating substrate, a pair of end electrodes formed on both end surfaces of the insulating substrate so as to bridge the front and back electrodes, and a pair of external electrodes formed by plating the outer surfaces of these end electrodes.
[0003] A chip resistor configured in this way is surface-mounted by mounting a back electrode on a land provided on a circuit board and soldering it, but if the chip resistor is repeatedly exposed to changes in the thermal environment after mounting (hereinafter referred to as heat shock), the solder joint is damaged by thermal stress and becomes susceptible to cracking. If a crack occurs in the solder joint due to heat shock, in the worst case scenario, it may lead to poor conductivity, since the solder joint is the point that electrically and mechanically connects the back electrode of the chip resistor and the land of the circuit board.
[0004] Therefore, as described in Patent Document 1, a chip resistor has been proposed in which the back electrode is composed of a first electrode layer made of fired silver and a second electrode layer made of fired silver laminated at a position off the edge of the first electrode layer, and solder-joined to an external electrode covering such a back electrode. In such a conventional chip resistor, a step is formed in the portion from the side surface of the second electrode layer to the surface of the first electrode layer, and a step portion corresponding to this step is also formed in the external electrode, so that the thickness of the solder joint is increased in the step portion to utilize the flexibility of the solder to alleviate thermal stress during heat shock. [Prior art documents] [Patent documents]
[0005] [Patent Document 1] JP 2013-74044 A Summary of the Invention [Problem to be solved by the invention]
[0006] However, with the trend toward longer life and maintenance-free products in the automotive market in recent years, there is a demand for further improvements in heat shock resistance, and problems may occur with the mounting structure of chip resistors as described in Patent Document 1. For example, when chip resistors are mounted using lead-free solder known as high-strength solder, the material used results in a rigid solder joint, and thermal stress during heat shock is not absorbed by the solder but is transmitted to the back electrode, which may cause damage to the solder joint (solder cracks) or peeling (delamination) of the back electrode.
[0007] The present invention has been made in view of the above-mentioned state of the art, and has an object to provide a mounting structure for chip components that is highly resistant to heat shock. [Means for solving the problem]
[0008] In order to achieve the above object, one aspect of the present invention is a mounting structure for a chip component comprising a pair of back surface electrodes formed at both longitudinal ends of a back surface of a rectangular parallelepiped insulating substrate, and end surface electrodes connected to the back surface electrodes formed at both longitudinal ends of the insulating substrate, the chip component being mounted on a pair of lands provided on a circuit board with the pair of back surface electrodes facing downward, and the end surface electrodes and the back surface electrode being connected to the corresponding lands via solder, a thick portion having a top portion on the land side is formed on the rear surface electrode, and the top portion of the thick portion is located directly above an inner end of the land, The distance between the pair of rear electrodes is set shorter than the distance between the pair of lands, and a portion of the rear electrode is arranged protruding inward from the corresponding land.
[0009] In the mounting structure of a chip component configured in this manner, a portion of the back electrode formed on the chip component is solder-joined in a state in which it protrudes inward beyond the corresponding land on the circuit board, and the inner end of the back electrode, which could be the starting point for peeling, is not located directly above the inner end of the land, so that even if thermal stress during a heat shock acts on the back electrode, the back electrode can be prevented from peeling off from the back surface of the insulating substrate. Moreover, a thick portion with its apex on the land side is formed on the rear surface electrode, and the apex of this thick portion is located directly above the inner end of the land where thermal stress is likely to concentrate during a heat shock, so peeling of the rear surface electrode can be reliably prevented.
[0010] In the above configuration, the rear electrode may be baked silver, but if the rear electrode is formed from a resin material containing conductive particles formed as a thick film on the rear surface of the insulating substrate, the flexibility of the rear electrode can be utilized to alleviate thermal stress during heat shock, even in the case of a rigid solder joint using high-strength solder.
[0011] Another aspect of the present invention is a mounting structure for a chip component comprising a pair of back electrodes formed at both longitudinal ends of a back surface of a rectangular parallelepiped insulating substrate, and end surface electrodes connected to the back surface electrodes formed at both longitudinal ends of the insulating substrate, the chip component being mounted on a pair of lands provided on a circuit board with the pair of back surface electrodes facing downward, and the end surface electrodes and the back surface electrodes being connected to the corresponding lands via solder, the back surface electrodes being rectangular in plan view and located on the inner side away from the end surface of the insulating substrate. and a plurality of second electrode portions arranged in a divided manner in the short direction of the insulating substrate, sandwiching a cutout portion between an end face of the insulating substrate and the first electrode portion, the distance between the pair of rear electrodes being set shorter than the separation distance between the pair of lands, and a portion of the rear electrode being arranged so as to protrude inward from the corresponding land, the rear electrode being made of a resin material containing conductive particles formed into a thick film on the rear surface of the insulating substrate, and the first electrode portion being formed with a thick portion with the land side as its apex.
[0012] In the mounting structure of the chip component configured in this manner, a part of the back electrode formed on the chip component is soldered in a state of protruding inward from the corresponding land of the circuit board, and since the inner end of the back electrode, which is the starting point of peeling, does not exist directly above the inner end of the land, even if thermal stress during a heat shock acts on the back electrode, the back electrode can be prevented from peeling off from the back surface of the insulating substrate. Moreover, since the back electrode is made of a resin material containing conductive particles, and a thick portion with the land side as the apex is formed on the first electrode portion of such a back electrode, the thick portion can be formed on the back electrode by one printing application using the surface tension of the resin paste that is the material of the back electrode. Effect of the Invention
[0014] According to the present invention, it is possible to provide a mounting structure for chip components that has high resistance to heat shock. [Brief description of the drawings]
[0015] [Figure 1] 1 is a cross-sectional view showing a mounting structure of a chip resistor according to a first embodiment. [Diagram 2] FIG. 11 is a cross-sectional view showing a mounting structure of a chip resistor according to a second embodiment. [Diagram 3] FIG. 11 is a plan view of a chip resistor used in the mounting structure of the second embodiment. [Figure 4] FIG. 4 is a cross-sectional view taken along line IV-IV in FIG. [Diagram 5] FIG. 4 is a cross-sectional view taken along line VV in FIG. [Figure 6] 4 is an explanatory diagram showing a back surface electrode provided on the chip resistor. FIG. [Figure 7]3A to 3C are cross-sectional views showing a manufacturing process of the chip resistor. [Figure 8] 3A to 3C are cross-sectional views showing a manufacturing process of the chip resistor. [Figure 9] 4 is a flowchart showing a manufacturing process of the chip resistor. [Figure 10] FIG. 11 is a cross-sectional view showing a mounted state of the chip resistor according to the third embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0016] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
[0017] 1 is a cross-sectional view showing a mounting structure of a chip resistor according to a first embodiment, and as shown in the figure, a chip resistor 1 is solder-bonded to lands 31 of a circuit board 30. The circuit board 30 is made of a rigid board such as a glass epoxy board, and lands 31 made of a conductor such as copper foil are provided on its surface. The lands 31 are solder connection pads for a circuit pattern (not shown) provided on the circuit board 30, and external electrodes 9 (described later) of the chip resistor 1 are connected to a pair of lands 31 via solder 32.
[0018] Chip resistor 1, which is a chip component, is composed of an insulating substrate 2 having a rectangular parallelepiped shape, a pair of back electrodes 3 provided at both longitudinal ends of the back surface of insulating substrate 2, a pair of surface electrodes 4 provided at both longitudinal ends of the front surface of insulating substrate 2, a resistor 5 provided on the front surface of insulating substrate 2 by overlapping both ends of the pair of surface electrodes 4, a pair of end electrodes 6 having a U-shaped cross section provided on both longitudinal end surfaces of insulating substrate 2 so as to bridge back electrode 3 and front electrode 4, a two-layer protective layer (undercoat layer 7 and overcoat layer 8) covering resistor 5, and a pair of two-layer external electrodes (Ni plating layer and Sn plating layer) 9 formed by plating the outer surfaces of end electrodes 6 and back electrode 3.
[0019] The insulating substrate 2 is a ceramic substrate whose main component is alumina. The pair of back electrodes 3 are formed by screen printing a resin paste containing conductive particles such as Ag, Ni, and carbon on the back surface of the large substrate and then heating and hardening it. The pair of front electrodes 4 are formed by screen printing an Ag-based paste on the front surface of the large substrate, then drying and firing it. The resistor 5, which is a functional element, is formed by screen printing a resistor paste such as ruthenium oxide on the front surface of the large substrate, then drying and firing it, and both ends of the resistor 5 in the longitudinal direction overlap the pair of front electrodes 4. Although not shown in the figure, the resistor 5 has a trimming groove formed therein for adjusting the resistance value.
[0020] The pair of end electrodes 6 are formed by sputtering nickel (Ni) / chromium (Cr) or the like, and these end electrodes 6 provide electrical continuity between the back electrode 3 and the front electrode 4, which are separated from each other via the end faces of the insulating substrate 2. The end electrodes 6 extend beyond the boundary between the front electrode 4 and the overcoat layer 8 to the side ends of the overcoat layer 8, and the flat upper surface of the overcoat layer 8 is exposed and not covered by the end electrodes 6.
[0021] The undercoat layer 7 and overcoat layer 8 constitute a two-layer protective film. The undercoat layer 7 is formed by screen-printing a glass paste, followed by drying and baking, and this undercoat layer 7 is formed so as to cover the resistor element 5 before the trimming groove is formed. The overcoat layer 8 is formed by screen-printing an epoxy resin paste, followed by heat curing (baking), and the overcoat layer 8 is formed so as to cover the undercoat layer 7 after the trimming groove is formed.
[0022] The pair of external electrodes 9 has a two-layer structure consisting of a barrier layer and an external connection layer, of which the barrier layer is a Ni plating layer formed by electrolytic plating, and the external connection layer is a Sn plating layer formed by electrolytic plating. These external electrodes 9 cover the entire surface of the end electrode 6.
[0023] The chip resistor 1 configured in this manner is mounted on a land 31 provided on a circuit board 30 with the back electrode 3 facing downward, as shown in FIG. 1, and is surface-mounted by joining a pair of external electrodes 9 covering the end electrode 6 and the back electrode 3 to the corresponding lands 31 via solder 32, respectively.
[0024] Here, the thermal stress in the heat shock occurs when the circuit board 30 expands and contracts due to the large difference in physical properties such as the linear expansion coefficient and Young's modulus between the insulating substrate 2 of the chip resistor 1 and the circuit board 30. At this time, stress is concentrated between the inner end of the land 31 and the insulating substrate 2, and if the inner end of the back electrode 3 is located directly above the inner end of the land 31, the inner end of the back electrode 3 will be the starting point and peeling will occur from the back electrode 3 and the back surface of the insulating substrate 2. However, in the mounting structure of the chip resistor 1 according to this embodiment, the separation distance L1 between the pair of back electrodes 3 on the back surface of the insulating substrate 2 is set shorter than the separation distance L2 between the pair of lands 31, and the inner end of the back electrode 3 protrudes inward from the corresponding land 31. In this manner, the inner end of the back electrode 3 is positioned at a position shifted inward from the inner end of the land 31, and the inner end of the back electrode 3, which is the starting point for peeling, does not exist directly above the inner end of the land 31, resulting in an implementation structure in which the back electrode 3 can be prevented from peeling off from the back surface of the insulating substrate 2 even if thermal stress during a heat shock acts on the back electrode 3.
[0025] As described above, in the mounting structure of the chip resistor 1 according to the first embodiment, the separation distance L1 between the pair of back electrodes 3 on the back surface of the insulating substrate 2 is set shorter than the separation distance L2 between the pair of lands 31, and the inner ends of the back electrodes 3 are soldered in a state where they protrude inward from the corresponding lands 31, so that the surface portion of the back electrode 3 is located directly above the inner ends of the lands 31, and the inner ends of the back electrode 3, which are the starting points for peeling, are not located directly above the inner ends of the lands 31. This makes it possible to prevent the back electrode 3 from peeling off from the back surface of the insulating substrate 2, even if thermal stress during a heat shock acts on the back electrode 3.
[0026] Furthermore, since the rear electrode 3 of the chip resistor 1 is formed from a resin material containing conductive particles such as carbon, even if the solder 32 is a high-strength solder with a large Young's modulus and forms a rigid solder joint, the flexibility of the rear electrode 3 is utilized to alleviate thermal stress during heat shock, thereby making it possible to prevent solder cracks caused by thermal stress.
[0027] FIG. 2 is a cross-sectional view showing the mounting structure of a chip resistor according to the second embodiment, FIG. 3 is a plan view of a chip resistor 20 used in the mounting structure of the second embodiment, FIG. 4 is a cross-sectional view along line IV-IV in FIG. 3, and FIG. 5 is a cross-sectional view along line VV in FIG. 3, with the same symbols used for parts corresponding to FIG. 1.
[0028] The mounting structure of the second embodiment differs from the mounting structure of the first embodiment in the structure of the back electrode 3 of the chip resistor 20 mounted on the circuit board 30, and the other configurations are basically the same. That is, the chip resistor 20 is composed of a rectangular parallelepiped insulating substrate 2, a pair of back electrodes 3 provided at both longitudinal ends of the back surface of the insulating substrate 2, a pair of front electrodes 4 provided at both longitudinal ends of the front surface of the insulating substrate 2, a resistor 5 provided on the front surface of the insulating substrate 2 by overlapping both ends of the pair of front electrodes 4, a pair of end electrodes 6 provided on both longitudinal end surfaces of the insulating substrate 2 with a U-shaped cross section so as to bridge the back electrode 3 and the front electrode 4, a two-layered protective layer (undercoat layer 7 and overcoat layer 8) that covers the resistor 5, and a pair of two-layered external electrodes (Ni plating layer and Sn plating layer) 9 formed by plating the outer surfaces of the end electrodes 6 and the back electrode 3.
[0029] In the chip resistor 20 configured in this manner, the components other than the back surface electrode 3 are the same as those of the chip resistor 1 according to the first embodiment, so a duplicated description will be omitted, and the back surface electrode 3 will be described in detail below.
[0030] 6 is an explanatory diagram showing the back electrode 3 formed on the back surface of the insulating substrate 2, with the end electrodes 6 and external electrodes 9 omitted to make the shape of the back electrode 3 easier to understand. As shown in FIG. 6, the back electrode 3 is formed in a channel shape (U-shape) when viewed in a plan view, and has a first electrode portion 3a that is rectangular in plan view and located on the inner side away from the end face of the insulating substrate 2, and two second electrode portions 3b that are separated and arranged in the short direction of the insulating substrate 2 with a notch portion 3c between the end face of the insulating substrate 2 and the first electrode portion 3a. The notch portion 3c is a non-coated portion where the resin material of the back electrode 3 is not printed, and the first electrode portion 3a and the two second electrode portions 3b are continuous in a U-shape so as to surround the notch portion 3c.
[0031] Here, the cross-sectional shape of the portion of the first electrode portion 3a enclosed by the dotted line S is an arch shape (semi-cylindrical) whose height gradually increases from both ends to the center along the longitudinal direction of the insulating substrate 2, and this arch shape makes the first electrode portion 3a a thick portion having a greater thickness than the second electrode portion 3b. Note that such an arch-shaped first electrode portion 3a can be easily formed by applying the resin paste, which is the material of the back electrode 3, once, utilizing the surface tension of the resin paste.
[0032] Next, a method for manufacturing the chip resistor 20 configured as described above will be described with reference to Fig. 7 to Fig. 9. Fig. 7 and Fig. 8 are cross-sectional views showing the manufacturing process of the chip resistor 20, and Fig. 9 is a flowchart showing the manufacturing process of the chip resistor 20.
[0033] First, as shown in step S1 of Fig. 9, a sheet-like large-sized substrate 20A from which a large number of insulating substrates 2 are to be cut is prepared (large-sized substrate preparation process). This large-sized substrate 20A is provided with primary division grooves and secondary division grooves (neither shown) that extend in a lattice shape, and each of the squares divided by these division grooves becomes one chip formation area. Note that Figs. 7 and 8 show cross-sectional views corresponding to one chip formation area, but in reality, the various processes described below are performed collectively on a large-sized substrate 20A corresponding to many chip formation areas.
[0034] That is, in step S2 of FIG. 9, an Ag-based paste is screen-printed in the area sandwiched between the secondary division grooves on the surface of the large-format substrate 20A so as to straddle each of the primary division grooves, and then dried and fired to form surface electrodes 4 facing each other across the chip formation area on the surface of the large-format substrate 20A, as shown in FIG. 7(a) (surface electrode formation process).
[0035] Next, in step S3 of FIG. 9, a resistor paste such as ruthenium oxide is screen-printed on the surface of the large-sized substrate 10, and then dried and fired to form a resistor 5 spanning a pair of surface electrodes 4, as shown in FIG. 7(b) (resistor formation process).
[0036] 9, a glass paste is screen-printed, dried, and fired to form an undercoat layer 7 covering the resistor 5 as shown in Fig. 7(c) (undercoat layer forming step). Thereafter, a trimming groove (not shown) is formed in the resistor 5 from above the undercoat layer 7 to adjust the resistance value.
[0037] 9, an epoxy resin paste is screen-printed on the undercoat layer 7 and then heat-cured to form an overcoat layer 8 that covers a part of the surface electrode 4 and the entire resistor 5, as shown in Fig. 7(d) (overcoat layer formation step). The undercoat layer 7 and overcoat layer 8 form a two-layer protective layer that covers the resistor 5.
[0038] Next, in step S6 of Figure 9, a resin paste containing conductive particles (e.g., Ag) is screen-printed and heated to straddle each of the primary division grooves in the area sandwiched between the secondary division grooves on the back surface of the large-format substrate 10, thereby forming back surface electrodes 3 facing each other across the primary division grooves in each chip formation area on the back surface of the large-format substrate 20A, as shown in Figure 7(e) (back surface electrode formation process).
[0039] As shown in Fig. 6, the back electrode 3 has a first electrode portion 3a located on the inner side of the chip formation region away from the primary division groove, and two second electrode portions 3b arranged along the secondary division groove with a notch portion 3c between the primary division groove and the first electrode portion 3a, and is formed as a channel-shaped (U-shaped) planar shape at both ends of the longitudinal direction of each chip formation region. That is, the notch portion 3c is a non-applied portion where the resin paste is not printed, and the two second electrode portions 3b and the first electrode portion 3a extending parallel to each other are continuous in a U-shape so as to surround the notch portion 3c. And, even if the back electrode 3 having such a shape has a single-layer structure in which the resin paste is applied only once, the maximum height of the first electrode portion 3a becomes higher than the maximum height of the second electrode portion 3b due to the surface tension of the resin paste, and a thick portion having an arch-shaped cross section can be easily formed in the first electrode portion 3a.
[0040] The steps up to this point are a batch process for the large-sized substrate 20A, but next, the large-sized substrate 20A is primarily broken (primarily divided) along the primary division groove to obtain the rectangular substrate 20B. At this time, a notch 3c, which is a non-applied portion of the resin paste, is formed between both second electrode portions 3b of the back electrode 3, and this notch 3c is located on the primary division groove, so that the breaking property can be improved when the large-sized substrate 20A is primarily broken.
[0041] Thereafter, in step S7 of Fig. 9, Ni-Cr is sputtered onto the divided surfaces of the rectangular substrate 20B to form end electrodes 6 that connect the front electrode 4 and the back electrode 3 on both end surfaces of the rectangular substrate 20B as shown in Fig. 8(f) (end electrode forming step). The end electrodes 6 cover the back surface of the rectangular substrate 20B exposed from the cutout portion 3c and both second electrode portions 3b of the back electrode 3 except for the first electrode portion 3a.
[0042] Next, the rectangular substrate 20B is secondarily broken (secondarily divided) along the secondary dividing grooves to obtain individual chips 20C having the same size as the chip resistor 20.
[0043] 9, electrolytic plating is applied to the individual chip units 20C to form external electrodes 9 made of Ni and Sn plating layers on the entire surfaces of the end electrodes 6 and the surfaces of the first electrode portions 3a of the back electrodes 3 as shown in FIG 8(g) (external electrode forming step). This completes the chip resistor 20 as shown in FIGS. 3 to 5.
[0044] The chip resistor 20 manufactured in this manner is mounted on the land 31 of the circuit board 30 with the back electrode 3 facing downward, as shown in FIG. 2, and is surface-mounted by joining a pair of external electrodes 9 to the corresponding lands 31 via solder 32, respectively.
[0045] In the mounting structure of the chip resistor 20 according to the second embodiment, similarly to the first embodiment, the separation distance L1 between the pair of back electrodes 3 on the back surface of the insulating substrate 2 is set shorter than the separation distance L2 between the pair of lands 31, and the inner end of the back electrode 3 protrudes inward from the corresponding land 31. In this manner, the inner end of the back electrode 3 is disposed at a position shifted inward from the inner end of the land 31, and the inner end of the back electrode 3, which is the starting point of peeling, does not exist directly above the inner end of the land 31. Therefore, even if thermal stress during a heat shock acts on the back electrode 3, the back electrode 3 can be prevented from peeling off from the back surface of the insulating substrate 2.
[0046] In addition, in the mounting structure of the chip resistor 20 according to the second embodiment, the back electrode 3 of the chip resistor 20 has a first electrode portion 3a (thick portion) having an arch-shaped cross section with the land 31 side as its apex, so that the flexibility of the back electrode 3 is improved by the first electrode portion 3a (thick portion) having a large thickness, and the thermal stress acting on the back electrode 3 during a heat shock can be effectively alleviated. Moreover, since the apex of the first electrode portion 3a is located directly above the inner end of the land 31 where the thermal stress during a heat shock is likely to concentrate, the thermal stress during a heat shock is efficiently absorbed by the thick portion of the first electrode portion 3a, and peeling of the back electrode 3 can be reliably prevented.
[0047] Furthermore, in the mounting structure of the chip resistor 20 of the second embodiment, the back electrode 3 of the chip resistor 20 mounted on the circuit board 30 has a first electrode portion 3a that is rectangular in plan view and located on the inner side away from the end face of the insulating substrate 2, and two second electrode portions 3b that are arranged in a separated manner in the short direction of the insulating substrate 2, sandwiching a cutout portion 3c that exists between the end face of the insulating substrate 2 and the first electrode portion 3a, and is formed into a channel shape overall, so that the surface tension of the resin paste that is the material of the back electrode 3 can be utilized to form a thick-walled first electrode portion 3a on the back electrode 3 by printing and applying it once.
[0048] In the second embodiment, a thick portion (first electrode portion 3a) is formed on the inner end side of the back electrode 3, and the top of this thick portion is positioned directly above the inner end of the land 31, but the location where the thick portion is formed on the back electrode 3 is not limited to the inner end side. For example, as in the mounting structure of the chip resistor according to the third embodiment shown in Fig. 10, a second electrode portion 3b having a thin film thickness may be formed on the inner side away from the end face of the insulating substrate 2, and a first electrode portion 3a having a thick portion may be formed on the outer end side of the back electrode 3, or a thick portion (first electrode portion 3a) may be formed near the center of the back electrode 3.
[0049] In addition, in each of the above embodiments, the present invention has been described as being applied to a chip resistor having a resistor as a functional element, but the present invention can also be applied to chip components having functional elements other than resistors, such as inductors and capacitors. [Explanation of symbols]
[0050] 1,20 Chip resistors (chip components) 2. Insulating substrate 3 Back electrode 3a 1st electrode part (thick wall part) 3b Second electrode part 3c Notch 4 Surface electrode 5 Resistors (functional elements) 6 End electrode 7 Undercoat layer 8 Overcoat Layer 9 External electrode 20A large board 20B Strip-shaped board 20C Chip only 30 Circuit Board 31 Rand 32 Solder
Claims
1. A mounting structure for a chip component comprising a pair of back electrodes formed at both longitudinal ends of a back surface of a rectangular parallelepiped insulating substrate, and end surface electrodes connected to the back surface electrodes formed at both longitudinal ends of the insulating substrate, the chip component being mounted on a pair of lands provided on a circuit board with the pair of back surface electrodes facing downward, and the end surface electrodes and the back surface electrode being connected to the corresponding lands via solder, a thick portion having a top portion on the land side is formed on the rear surface electrode, and the top portion of the thick portion is located directly above an inner end of the land, A mounting structure for a chip component, characterized in that the distance between the pair of rear electrodes is set shorter than the distance between the pair of lands, and a portion of the rear electrodes is arranged so as to protrude inward beyond the corresponding land.
2. 2. The chip component mounting structure according to claim 1, wherein the back electrode is made of a resin material containing conductive particles and formed as a thick film on the back surface of the insulating substrate.
3. A mounting structure for a chip component comprising a pair of back electrodes formed at both longitudinal ends of the back surface of a rectangular parallelepiped insulating substrate, and end surface electrodes connected to the back surface electrodes formed at both longitudinal ends of the insulating substrate, the chip component being mounted on a pair of lands provided on a circuit board with the pair of back surface electrodes facing downward, and the end surface electrodes and the back surface electrode being connected to the corresponding lands via solder, the back surface electrode is composed of a first electrode portion having a rectangular shape in a plan view, which is located on an inner side away from an end face of the insulating substrate, and a plurality of second electrode portions which are arranged in a divided manner in a short-side direction of the insulating substrate with a cutout portion between the end face of the insulating substrate and the first electrode portion, a distance between the pair of rear electrodes is set shorter than a distance between the pair of lands, and a portion of the rear electrodes is disposed in a state of protruding inward from the corresponding land, A mounting structure for a chip component, characterized in that the back electrode is made of a resin material containing conductive particles formed as a thick film on the back surface of the insulating substrate, and a thick portion is formed in the first electrode portion with the land side as its top.
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