Terahertz module

Abstract

This terahertz module comprises: a terahertz chip (10) including an active element that emits terahertz waves; and a dielectric substrate (50) connected to the terahertz chip (10). The terahertz chip (10) includes a semiconductor substrate (1). An active element (20) is disposed on the upper surface of the semiconductor substrate (1). Of a plurality of side surfaces of the dielectric substrate (50), a first side surface (SP) has a part in which a cut section (CS) is formed from the upper side to the lower side of the first side surface (SP). The terahertz chip (10) is fitted in such an orientation that the upper surface of the semiconductor substrate (1) is parallel to the first side surface (SP), and the semiconductor substrate (1) is disposed on the inner side of the cut section (CS).

Description

Technical Field

[0001] The present disclosure relates to a terahertz module.

Background Art

[0002] In recent years, information communication applications using electromagnetic waves, such as mobile phones, have been advancing. As values characterizing electromagnetic waves, there are frequency and wavelength. Generally, since it is possible to transmit a larger amount of information as the frequency is higher, the use of electromagnetic waves (millimeter waves) in the 28 GHz band or 39 GHz band is being considered in 5G, which is the standard for next-generation mobile phones. On the other hand, research on terahertz waves, which are electromagnetic waves of higher frequencies aimed at realizing ultra-high-speed wireless communication beyond 5G, has been progressing. For the practical application of an application system using terahertz waves, the development of a terahertz wave generator and detector using an electronic device capable of miniaturization and integration is expected.

[0003] For example, Non-Patent Document 1 discloses a configuration in which a terahertz chip is connected to a waveguide of a photonic crystal, which is a dielectric substrate, via a metal mode conversion mechanism. In this configuration, it has been reported that a coupling efficiency of up to 90% can be obtained between the terahertz chip and the dielectric substrate in the 0.3 THz band.

Prior Art Documents

Non-Patent Documents

[0004]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] In Non-Patent Document 1, it is necessary to make the thickness of the terahertz chip about half of the thickness of the photonic crystal. However, it is not easy to thin-film process the terahertz chip to such a thickness.

[0006] Therefore, an object of the present disclosure is to provide a terahertz module capable of obtaining high coupling efficiency between a terahertz chip and a dielectric substrate without thinning the terahertz chip.

Means for Solving the Problems

[0007] The terahertz module of the present disclosure includes a terahertz chip including an active element that emits terahertz waves, and a dielectric substrate coupled to the terahertz chip. The terahertz chip includes a semiconductor substrate, and the active element is disposed on the upper surface of the semiconductor substrate. A cut portion extending from the upper side to the lower side of the first side surface is formed in a part of the first side surface among the plurality of side surfaces of the dielectric substrate. The terahertz chip is fitted in such a direction that the upper surface of the semiconductor substrate is parallel to the first side surface and the semiconductor substrate is disposed on the back side of the cut portion.

[0008] Preferably, the cut portion has a surface parallel to the first side surface. The lower surface of the semiconductor substrate of the terahertz chip contacts the surface of the cut portion parallel to the first side surface.

[0009] Preferably, the thickness of the terahertz chip is the same as the depth of the cut portion. Preferably, the thickness of the terahertz chip is larger than the depth of the cut portion.

[0010] Preferably, the dielectric substrate is a photonic crystal. Preferably, a waveguide for the terahertz wave is formed in the photonic crystal in a direction perpendicular to the upper surface of the semiconductor substrate.

[0011] Preferably, a filter for passing or removing a predetermined frequency component of the terahertz wave is formed in the photonic crystal.

[0012] Preferably, a planar lens for condensing terahertz waves radiated from the active element is formed in the photonic crystal.

[0013] Preferably, a plurality of terahertz chips arranged in a row are coupled to the photonic crystal.

[0014] Preferably, the active element is a resonant tunneling diode.

Advantages of the Invention

[0015] According to the terahertz module of the present disclosure, a high coupling efficiency can be obtained between the terahertz chip and the dielectric substrate without thinning the terahertz chip.

Brief Description of the Drawings

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Embodiments for Carrying Out the Invention

[0017] Hereinafter, embodiments will be described with reference to the drawings. [Conventional Structure] The structure described in Non-Patent Document 1 will be described.

[0018] FIG. 1 is a perspective view of a terahertz chip 192 described in Non-Patent Document 1. FIG. 2 is a top view of the terahertz chip 192 described in Non-Patent Document 1. FIG. 3 is a diagram showing the terahertz module described in Non-Patent Document 1.

[0019] The RTD (Resonant Tunneling Diode) oscillates high-frequency electromagnetic waves (terahertz waves) in the terahertz band. The RTD can also operate as an ultra-high-sensitivity detector. The MIM (Metal Insulator Metal) operates as a mirror that reflects terahertz waves. The terahertz module is configured by coupling the terahertz chip 192 and the photonic crystal.

[0020] The conductive paths 139a and 139b exhibit a tapered shape in which the dimension in the y direction increases as they go in the x direction. This eliminates problems due to differences in the scale of the waveguides of the terahertz chip and the photonic crystal, and a high coupling rate can be obtained.

[0021] To reduce symmetry and radiation loss, the InP substrate 191 is disposed on the surface of the terahertz chip 192.

[0022] To obtain a high coupling rate, it is necessary to set the thickness d of the terahertz chip 192 to about half (100 μm) of the thickness of the photonic crystal (200 μm). This is because the coupling efficiency is maximized at the center in the thickness direction of the photonic crystal. When the frequency of the terahertz wave is increased, the wavelength of the terahertz wave becomes shorter, so the thickness d of the terahertz chip 192 must be decreased, and it is not easy to process.

[0023] [Embodiment 1] The terahertz module configuration will be described with reference to FIGS. 4 to 8.

[0024] FIG. 4 is a diagram showing the appearance of the terahertz chip 10. The terahertz chip 10 has a width w, a length L, and a thickness d. The direction of the width w of the terahertz chip 10 is the x direction, the direction of the length L of the terahertz chip 10 is the y direction, and the direction of the thickness d of the terahertz chip 10 is the z direction.

[0025] In the terahertz chip 10, the RTD 20 and the slot 30 are arranged on the upper surface (front surface) of the InP substrate 1 which is a semiconductor substrate. As shown in FIG. 4, terahertz waves are propagated in the thickness direction (-z direction) of the terahertz chip.

[0026] The bottom surface of the terahertz chip 10 is the lower surface (back surface) of the InP substrate 1. FIG. 5 is a view when the terahertz chip 10 is viewed from the upper side to the lower side direction (-z direction). FIG. 6 is an enlarged view of the vicinity of the RTD 20 in FIG. 5.

[0027] In the thickness direction (z direction), between the upper electrode 4 and the lower electrode 2, in the y direction, shunt resistors SR1 and SR2 are formed in a region crossing the upper electrode 4 and the lower electrode 2. The shunt resistors SR1 and SR2 have a function of suppressing parasitic oscillation.

[0028] In the thickness direction (z direction), below the upper electrode 4, the slot 30 and the RTD 20 are formed.

[0029] In the thickness direction (z direction), between the upper electrode 4 and the lower electrode 2, in the y direction, MIM capacitors 6a and 6b are formed at a portion where the upper electrode 4 and the lower electrode 2 overlap.

[0030] FIG. 7 is a cross-sectional view taken along the line I-I in FIG. 6. The direction perpendicular to the surface (upper surface and lower surface) of the InP substrate 1 is the z direction.

[0031] The RTD20 is disposed on the upper surface of an InP substrate 1 which is a semiconductor substrate, and includes a GaInAs layer 91a doped with n-type impurities at a high concentration, a GaInAs layer 92a doped with n-type impurities and disposed on the upper surface of the GaInAs layer 91a, an undoped GaInAs layer 93a disposed on the upper surface of the GaInAs layer 92a, an AlAs layer 94a disposed on the upper surface of the GaInAs layer 93a, a GaInAs layer 95 disposed on the upper surface of the AlAs layer 94a, an AlAs layer 94b disposed on the upper surface of the GaInAs layer 95, an undoped GaInAs layer 93b disposed on the upper surface of the AlAs layer 94b, a GaInAs layer 92b doped with n-type impurities and disposed on the upper surface of the GaInAs layer 93b, and a GaInAs layer 91b doped with n-type impurities at a high concentration and disposed on the upper surface of the GaInAs layer 92b.

[0032] On the side of the RTD20, SiO 2 films 98a and 98b are deposited. The upper electrode 4 is disposed on the upper surface of the GaInAs layer 91b.

[0033] The lower electrode 2 is disposed on the upper surface of the GaInAs layer 91a and the upper surface of the InP substrate 1. Here, the thickness of each layer is, for example, as follows, but is not limited thereto.

[0034] The thicknesses of the n+-type GaInAs layers 91a and 91b are, for example, about 400 nm and about 15 nm, respectively. The thicknesses of the n-type GaInAs layers 92a and 92b are substantially equal, for example, about 25 nm. The thicknesses of the undoped GaInAs layers 93a and 93b are about 2 nm and about 20 nm. The thicknesses of the AlAs layers 94a and 94b are equal, for example, about 1.1 nm. The thickness of the GaInAs layer 95 is, for example, about 4.5 nm. The thickness of the InP substrate 1 is about several hundred μm.

[0035] The upper electrode 4 and the lower electrode 2 are both made of, for example, a metal laminated structure of Au / Pd / Ti or Au / Ti. The Ti layer is a buffer layer for improving the contact state with the semi-insulating InP substrate 1. The thickness of each part of the upper electrode 4 and the lower electrode 2 is, for example, about several 100 nm, and as a whole, a flattened laminated structure is obtained. The upper electrode 4 and the lower electrode 2 can both be formed by a vacuum evaporation method, a sputtering method, or the like.

[0036] As described above, the RTD 20 is disposed on the upper surface of the InP substrate 1. The RTD 20 forms a resonator between the lower electrode 2 and the upper electrode 4. The electromagnetic wave radiated from the RTD 20 has a surface emission radiation pattern in a direction perpendicular to the upper surface of the InP substrate 1.

[0037] FIG. 8 is a cross-sectional view taken along line II-II of FIG. 6. The MIM capacitors 6a and 6b are located between the upper electrode 4 and the lower electrode 2 in the thickness direction (z direction), and are arranged in a portion where the upper electrode 4 and the lower electrode 2 overlap in the y direction, and are formed by the SiO 2 film 98.

[0038] FIG. 9 is a diagram showing the dielectric substrate 50 of Embodiment 1. The dielectric substrate 50 can realize functions such as a polarization function of terahertz waves, a frequency filter function, and a planar lens. The dielectric substrate 50 is constituted by, for example, a dielectric such as a photonic crystal. Since the circuit device developed on the dielectric substrate 50 does not use metal wiring, a low-loss system can be realized in the high-frequency terahertz band.

[0039] The thickness of the dielectric substrate 50 is Sd. A cut portion CS is formed in a first side surface SP of the plurality of side surfaces of the dielectric substrate 50. The cut portion CS is formed in a direction perpendicular to the first side surface SP from the upper side US to the lower side LS of the first side surface SP.

[0040] The cut portion CS has a cuboid shape. The length of the cut portion CS is L, the width is w, and the depth is d2. w = Sd, and d2 < d. The cut portion CS has a surface 71P, a surface 72P, and a surface 73P. The surface 71P is parallel to the first side surface SP. The surfaces 72P and 73P are perpendicular to the first side surface SP.

[0041] FIG. 10 is a diagram showing a terahertz module in Embodiment 1. The terahertz module includes a terahertz chip 10 and a dielectric substrate 50 coupled to the terahertz chip 10.

[0042] The terahertz chip 10 is fitted into the cut portion CS of the dielectric substrate 50. The terahertz chip 10 is fitted in such a direction that the upper surface of the InP substrate 1 is parallel to the first side surface SP of the cut portion CS and the InP substrate 1 is disposed on the inner side of the cut portion CS. The bottom surface (the lower surface (the back surface) of the InP substrate 1) of the terahertz chip 10 contacts the surface 71P. The two side surfaces of the terahertz chip 10 contact the two surfaces 72P and 73P of the cut portion CS, respectively.

[0043] The thickness d of the terahertz chip 10 is larger than the depth d2 of the cut portion CS. Therefore, the uppermost surface of the terahertz chip 10 is disposed outside the dielectric substrate 50.

[0044] In this embodiment, the thickness of the terahertz chip 10 can be arbitrarily set. Since the thickness direction of the terahertz chip 10 is the same as the surface direction of the dielectric substrate 50, there is no need to thin the terahertz chip 10.

[0045] According to the simulation results, it is shown that the terahertz module of this embodiment can obtain a coupling efficiency of 90% in the same manner as the terahertz module of the conventional example.

[0046] FIG. 11 is a diagram showing an example of a mounting method of the terahertz module of Embodiment 1. The portion of the groove 84 of the dielectric substrate 50 corresponds to the first side surface SP. Although not shown, a cut portion CS is formed in the first side surface SP, and the terahertz chip 10 is fitted therein.

[0047] The microwave circuit board 80 includes a metal layer 80a and a resin layer 80b. Signals and voltages are transmitted from the coaxial connector 70 to the metal layer 80a of the microwave circuit board 80. These signals and voltages are further sent to the terahertz chip 10 through the bonding wire 90.

[0048] As described above, according to the present embodiment, by fitting the terahertz chip into the cut portion formed on the side surface of the dielectric substrate and coupling the terahertz chip and the dielectric substrate, a high coupling efficiency can be obtained between the terahertz chip and the dielectric substrate without thinning the terahertz chip.

[0049] [Embodiment 2] FIG. 12 is a diagram showing the dielectric substrate 50 of Embodiment 2.

[0050] The thickness of the dielectric substrate 50 is Sd. A cut portion CS is formed on the first side surface SP of the dielectric substrate 50. The cut portion CS is formed in a direction perpendicular to the first side surface SP from the upper side US to the lower side LS of the first side surface SP.

[0051] The cut portion CS has a rectangular parallelepiped shape. The length of the cut portion CS is L, the width is w, and the depth is d. w = Sd. The cut portion CS has a surface 74P, a surface 75P, and a surface 76P. The surface 74P is parallel to the first side surface SP. The surfaces 75P and 76P are perpendicular to the first side surface SP.

[0052] FIG. 13 is a diagram showing the terahertz module in Embodiment 2. The terahertz module includes a terahertz chip 10 and a dielectric substrate 50 coupled to the terahertz chip 10.

[0053] The terahertz chip 10 is fitted into the cut portion CS of the dielectric substrate 50. The terahertz chip 10 is fitted in such a direction that the upper surface of the InP substrate 1 is parallel to the first side surface SP of the cut portion CS and the InP substrate 1 is disposed on the back side of the cut portion CS. The bottom surface (the lower surface (the back surface) of the InP substrate 1) of the terahertz chip 10 contacts the surface 74P. The two side surfaces of the terahertz chip 10 contact the two surfaces 75P and 76P of the cut portion CS, respectively.

[0054] The thickness d of the terahertz chip 10 is equal to the depth d of the cut portion CS. Therefore, the uppermost surface of the terahertz chip 10 is connected to the first side surface SP of the dielectric substrate 50.

[0055] Also in this embodiment, similar to the first embodiment, the thickness of the terahertz chip 10 can be arbitrarily set. Since the thickness direction of the terahertz chip 10 is the same as the surface direction of the dielectric substrate 50, there is no need to thin the terahertz chip 10.

[0056] [Embodiment 3] FIG. 14 is a diagram showing a terahertz module according to the third embodiment.

[0057] Similar to the second embodiment, the terahertz chip 10 is fitted into the cut portion CS of the dielectric substrate 50. A bowtie antenna is formed on the terahertz chip 10.

[0058] The terahertz chip 10 includes antenna electrodes 4B and 2B, first transmission lines (slots) 40S and 20S, an RTD 20, second transmission lines (slots) 40F and 20F, pad electrodes 40P and 20P, and a low-pass filter 9.

[0059] The antenna electrodes 4B and 2B can transmit and receive terahertz waves to and from free space. The first transmission lines 40S and 20S are connected to the antenna electrodes 4B and 2B and can transmit terahertz waves.

[0060] The main electrodes of RTD20 are respectively connected to the first transmission lines 40S and 20S. The second transmission lines 40F and 20F are connected to RTD20 and can transmit terahertz waves.

[0061] The pad electrodes 40P and 20P are connected to the second transmission lines 40F and 20F. The low-pass filter 9 is connected to the pad electrodes 40P and 20P.

[0062] By impedance conversion of the first transmission lines 40S and 20S, impedance matching can be achieved between the antenna electrodes 4B and 2B and RTD20. The pad electrodes 20P and 40P can form bias power supply and data signal supply electrodes.

[0063] The low-pass filter 9 may include a MIM reflector. A resistance element connected between the pad electrode 40P and the pad electrode 20P may be provided. The resistance element may include a metal wiring. The metal wiring may include bismuth, nickel, titanium, or platinum.

[0064] The distance between the antenna electrodes 4B and 2B of the bowtie antenna is substantially equal to the distance between the transmission lines (slot lines).

[0065] The cross-section of RTD20 is the same as that described in FIG. 7 of Embodiment 1. Even when the terahertz chip includes a bowtie antenna instead of the slot antenna of Embodiment 1, the same effects as in Embodiment 1 can be obtained.

[0066] [Embodiment 4] In this embodiment, an application example of the terahertz module described in the above embodiment will be described.

[0067] As the dielectric substrate 50, a photonic crystal B1 can be used. FIG. 15 is a perspective view of the photonic crystal B1. FIG. 16 is a plan view of the photonic crystal B1. FIG. 17 is a cross-sectional view of the photonic crystal B1.

[0068] The photonic crystal B1 is, for example, referred to as a two-dimensional photonic crystal slab. The photonic crystal B1 is composed of, for example, a semiconductor material. Examples of the semiconductor material constituting the photonic crystal B1 include Si, GaAs, InP, GaN, GaInAsP / InP, InGaAs / GaAs, GaAlAs / GaAs, GaInNAs / GaAs, GaAlInAs / InP, AlGaInP / GaAs, and GaInN / GaN. In FIGS. 15 and 16, the planar shape of the photonic crystal B1 is rectangular, but it may be trapezoidal or other shapes.

[0069] The photonic crystal B1 has a front surface 41 and a back surface 42. Both the front surface 41 and the back surface 42 are flat. The terahertz chip 10 is fitted into a cut portion (not shown) of the first side surface SP of the photonic crystal B1.

[0070] The photonic crystal B1 includes a plurality of lattice points 31. The plurality of lattice points 31 diffract terahertz waves in the photonic band gap band of the photonic band structure of the photonic crystal B1. The plurality of lattice points 31 are periodically arranged in the XY plane of the photonic crystal B1. Each of the plurality of lattice points 31 is composed of, for example, a hole. As shown in FIG. 17, the hole penetrates the photonic crystal B1 and extends from the front surface 41 to the back surface 42. In FIGS. 15 and 16, the shape of the hole is circular, but it may be polygonal or elliptical. Also, in FIGS. 15 and 16, a periodic array of a square lattice is shown, but a two-dimensional periodic array such as a rectangular lattice, a triangular lattice, or a honeycomb lattice may be used.

[0071] By adjusting the lattice constant of the lattice points 31, the refractive index of the terahertz wave can be changed. Thereby, the propagation path of the terahertz wave can be controlled. For example, the transmission path can be made straight, bent, branched (split), crossed, or directionally coupled (combined). In addition, the photonic crystal B1 can integrate planar non-linear optical elements such as a compact transmission line, filter, lens, and antenna that utilize a refractive index confinement structure.

[0072] Hereinafter, five application examples using the photonic crystal B1 as the dielectric substrate 50 will be described.

[0073] FIG. 18 is a diagram showing a first application example of the terahertz module. The dielectric substrate 50 can form a dielectric waveguide 110 for terahertz waves by adjusting the lattice constant of the lattice points 31 to form a refractive index distribution. The dielectric waveguide 110 is formed vertically on the upper and lower surfaces of the InP substrate 1. The upper and lower surfaces of the InP substrate 1 are parallel to the first side surface SP of the dielectric substrate 50, the surface 71P of the cut portion CS, and the surface 74P of the cut portion CS.

[0074] FIG. 19 is a diagram showing a second application example of the terahertz module. The dielectric substrate 50 can form a planar lens 112 by adjusting the lattice constant of the lattice points to form a refractive index distribution. As shown in FIG. 19, the terahertz waves radiated from the terahertz chip 10 are focused by the planar lens 112.

[0075] Note that the dielectric substrate 50 can form a mirror that reflects terahertz waves, or a filter that passes or removes specified frequency components of terahertz waves, instead of the planar lens 112, by adjusting the lattice constant of the lattice points.

[0076] FIG. 20 is a diagram showing a third application example of the terahertz module. A plurality of terahertz chips 10 are arranged in a row and coupled to a photonic crystal, thereby forming a terahertz chip array. The plurality of terahertz chips 10 emit terahertz waves of different frequencies from each other due to differences in driving voltages. The terahertz waves emitted from the plurality of terahertz chips 10 are condensed by a planar lens 112 and output through an output waveguide 119.

[0077] FIG. 21 is a diagram showing a fourth application example of the terahertz module. Frequency multiplexing can be realized by a filter formed in a photonic crystal. Depending on the frequency, multiplexing or demultiplexing is possible.

[0078] The plurality of terahertz chips 10 emit terahertz waves of different frequencies from each other. The terahertz waves emitted from the plurality of terahertz chips 10 are demultiplexed by a demultiplexer 181 and sent to a plurality of waveguides 183. The terahertz waves of a plurality of frequencies output from the plurality of waveguides 183 are multiplexed by a multiplexer 182. The multiplexed terahertz waves are output to an antenna.

[0079] FIG. 22 is a diagram showing a fifth application example of the terahertz module. A resonator 117, a coupler 133, a mixer 132, and an absorber 134 are formed in the photonic crystal.

[0080] The local oscillator 131 includes an array in which a plurality of terahertz chips 10 are arranged in a row, a synthetic lens 115, and a resonator 117 having a high Q value.

[0081] A part of the local oscillation signal LO emitted from the local oscillator 131 is sent to the absorber 134, and the rest is sent to the coupler 133. The absorber 134 can prevent the local oscillation signal LO from being reflected.

[0082] The coupler 133 sends the local oscillation signal LO to the mixer 132 and does not pass the modulation signal RF output from the mixer 132.

[0083] The mixer 132 generates a modulated signal RF by mixing an intermediate frequency signal IF and a local oscillation signal LO, and radiates it to the antenna.

[0084] [Simulation] Next, the results of the simulation will be described.

[0085] FIG. 23 is a diagram showing the simulation results. In FIG. 23, the transmittance when the microwave circuit board 80 shown in FIG. 11 is provided and the transmittance when the microwave circuit board 80 is not provided are shown. As shown in FIG. 23, the difference between the two is about 1 dB. It is shown that the influence on the transmittance by providing the microwave circuit board 80 is sufficiently small.

[0086] [Modification Example] The present disclosure is not limited to the above-described embodiments. For example, the following modification examples are also included.

[0087] (1) In the above-described embodiment, an RTD is used as an example of the active element, but other diodes or transistors can also be used. For example, as the active element, a Tunnel Transit Time (TUNNETT) diode, an Impact Ionization Avalanche Transit Time (IMPATT) diode, a GaAs-based field effect transistor (FET), a GaN-based FET, a high electron mobility transistor (HEMT), a heterojunction bipolar transistor (HBT), or a complementary metal-oxide-semiconductor (CMOS) FET can also be used.

[0088] (2) The terahertz chip is shown with an example where the first tunnel barrier layer / quantum well (QW) layer / second tunnel barrier layer has a structure of AlAs / GaInAs / AlAs, but it is not limited to such a material system. For example, an example where the first tunnel barrier layer / quantum well layer / second tunnel barrier layer has a structure of AlGaAs / GaAs / AlGaAs may also be possible. Also, an example where the first tunnel barrier layer / quantum well layer / second tunnel barrier layer has a structure of AlGaN / GaN / AlGaN may also be possible. Further, an example where the first tunnel barrier layer / quantum well layer / second tunnel barrier layer has a structure of SiGe / Si / SiGe may also be possible.

[0089] (3) In the above embodiment, the terahertz chip is provided with a slot antenna or a bowtie antenna, but it is not limited thereto. The antenna provided in the terahertz chip may have any shape as long as the radio wave (terahertz wave) is radiated in the vertical direction of the substrate. For example, the terahertz chip may be provided with a planar antenna such as a patch antenna, a dipole antenna, or a ring antenna.

[0090] The embodiments disclosed this time should be considered as illustrative in all respects and not restrictive. The scope of the present disclosure is shown not by the above description but by the claims, and it is intended that all modifications within the meaning and scope equivalent to the claims are included.

Explanation of Reference Numerals

[0091] 1,191 InP substrate, 2 lower electrode, 4 upper electrode, 4B antenna electrode, 6a, 6b MIM capacitor, 9 low-pass filter, 10, 192 terahertz chip, 20 RTD, 30 slot, 20P, 40P pad electrode, 31 lattice point, 40F second transmission line, 40S first transmission line, 41 surface, 42 back surface, 50 dielectric substrate, 70 coaxial connector, 71P, 72P, 73P, 74P, 75P, 76P plane, 80 microwave circuit board, 80a metal layer of microwave circuit board, 80b resin layer of microwave circuit board, 84 groove, 90 bonding wire, 91a, 91b, 92a, 92b, 93a, 93b, 94a, 94b, 95 layer, 98, 98a, 98b SiO 2 film, 110 dielectric waveguide, 112 planar lens, 115 synthetic lens, 117 resonator, 119 output waveguide, 131 local oscillator, 132 mixer, 133 coupler, 134 absorber, 139a, 139b conductive path, 181 demultiplexer, 182 multiplexer, 183 waveguide, B1 photonic crystal, CS cutout, LS lower side, SP side, SR1, SR2 shunt resistor, US upper side.

Claims

1. A terahertz module comprising a terahertz chip including an active element that emits terahertz waves, and a dielectric substrate coupled to the terahertz chip, wherein the terahertz chip includes a semiconductor substrate, and the active element is disposed on an upper surface of the semiconductor substrate, a cut portion extending from an upper side to a lower side of a first side among a plurality of sides of the dielectric substrate is formed in a part of the first side, the terahertz chip is fitted in such a direction that the upper surface of the semiconductor substrate is parallel to the first side and the semiconductor substrate is disposed on a back side of the cut portion, wherein a thickness of the terahertz chip is the same as a depth of the cut portion.

2. A terahertz module comprising a terahertz chip including an active element that emits terahertz waves, and a dielectric substrate coupled to the terahertz chip, wherein the terahertz chip includes a semiconductor substrate, and the active element is disposed on an upper surface of the semiconductor substrate, a cut portion extending from an upper side to a lower side of a first side among a plurality of sides of the dielectric substrate is formed in a part of the first side, the terahertz chip is fitted in such a direction that the upper surface of the semiconductor substrate is parallel to the first side and the semiconductor substrate is disposed on a back side of the cut portion, wherein a thickness of the terahertz chip is larger than a depth of the cut portion.

3. The cut portion has a surface parallel to the first side, The terahertz module according to claim 1 or 2, wherein a lower surface of the semiconductor substrate contacts the surface of the cut portion parallel to the first side.

4. The terahertz module according to any one of claims 1 to 3, wherein the dielectric substrate is a photonic crystal.

5. In the photonic crystal, a waveguide for the terahertz wave is formed in a direction perpendicular to an upper surface of the semiconductor substrate. The terahertz module according to claim 4.

6. In the photonic crystal, a filter that passes or removes a defined frequency component of the terahertz wave is formed. The terahertz module according to claim 4.

7. In the photonic crystal, a planar lens that condenses the terahertz wave radiated from the active element is formed. The terahertz module according to claim 4.

8. The terahertz module according to claim 4, wherein a plurality of the terahertz chips arranged in a column are coupled to the photonic crystal.

9. The terahertz module according to any one of claims 1 to 8, wherein the active element is a resonant tunneling diode.

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