Semiconductor device and method of manufacturing the same

Abstract

To provide a technique capable of improving the power cycle tolerance while improving the humidity resistance in a semiconductor device.SOLUTION: A semiconductor device comprises: a semiconductor substrate 1 which has an upper surface and a lower surface on the opposite side of the upper surface and in which an effective region 2 in which the current flows and a termination region 7 formed so as to surround the outer peripheral side of the effective region 2 are provided; an oxide film 4 which is provided so as to cover the upper surface in contact with the upper surface of the termination region 7; an organic insulation film 6 which includes an insulation material and is provided so as to cover a portion excluding the peripheral part of the oxide film 4; and at least one of a groove 8 which is recessed downward and a ridge 10 which protrudes upward in the portion of the oxide film 4 covered by the organic insulation film 6. The width of the groove 8 includes a portion which becomes smaller toward the upper side, and the width of the ridge 10 includes a portion which becomes larger toward the upper side.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing the semiconductor device.

Background Art

[0002] In a semiconductor device, an oxide film is provided on the upper surface of a semiconductor substrate, and polyimide is provided thereon. However, since the adhesion between the oxide film and the polyimide is weak, when continuously exposed to high humidity, moisture progresses from the interface between the polyimide and the oxide film in the terminal region over time. For this reason, there has been a problem that electric field concentration occurs between the outermost guard ring and the channel stopper.

[0003] On the other hand, a semiconductor device has been proposed in which by providing a groove on the upper surface of the semiconductor substrate in the terminal region, the moisture resistance can be improved without lengthening the terminal region (see, for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] However, in the technique described in Patent Document 1, since the groove provided in the terminal region has a rectangular shape, the adhesion is weak with respect to peeling in the vertical direction, and when a thermal stress is applied to the chip such as in a power cycle, there has been a problem that peeling occurs in the vertical direction.

[0006] Therefore, an object of the present disclosure is to provide a technique capable of improving the power cycle tolerance while improving the moisture resistance in a semiconductor device.

Means for Solving the Problems

[0007] The semiconductor device according to the present disclosure has a first main surface and a second main surface which is the surface opposite to the first main surface, and is defined by a semiconductor substrate in which an active region through which current flows and a termination region formed so as to surround the outer peripheral side of the active region are defined, an oxide film provided in contact with the first main surface of the termination region so as to cover the first main surface, a surface protection film containing an insulating material and provided so as to cover a portion excluding the peripheral edge portion of the oxide film, and at least one of a concave portion recessed downward or a convex portion protruding upward in a portion of the oxide film covered by the surface protection film, the width of the concave portion having a portion that becomes smaller upward, and the width of the convex portion having a portion that becomes larger upward.

Effects of the Invention

[0008] According to the present disclosure, the adhesion between the surface protection film and the semiconductor substrate is improved, and the creepage distance from the outer peripheral end of the surface protection film to, for example, a guard ring on the inner peripheral side becomes longer, so that the moisture resistance of the semiconductor device is improved. Further, due to the anchor effect caused by the concave portion or the convex portion, the adhesion in the vertical direction in the semiconductor device is improved, so that the power cycle tolerance of the semiconductor device is improved.

Brief Description of the Drawings

[0009]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Embodiments for Carrying Out the Invention

[0010] <Embodiment 1> <Configuration of Semiconductor Device> Embodiment 1 will be described below with reference to the drawings. FIG. 1 is a top view of a semiconductor device according to Embodiment 1. FIG. 2 is a cross-sectional view taken along line A-A of FIG. 1.

[0011] As shown in FIGS. 1 and 2, the semiconductor device includes a semiconductor substrate 1 in which an active region 2 and a termination region 7 are defined, an oxide film 4, an insulating protective film 5, an organic insulating film 6 as a surface protective film, and a groove 8 as a recess recessed downward.

[0012] As shown in FIG. 1, an active region 2 through which current flows is defined in the central portion of the semiconductor substrate 1. A transistor or a diode (not shown) is provided in the active region 2. The semiconductor substrate 1 has an upper surface as a first main surface and a lower surface as a second main surface opposite to the first main surface. A plurality (for example, three) of guard rings 3 are provided on the upper surface of the semiconductor substrate 1 so as to surround the active region 2.

[0013] As shown in FIG. 2, an oxide film 4 is provided on the upper surface of the semiconductor substrate 1. Specifically, the oxide film 4 is provided in contact with and covering the upper surface of the semiconductor substrate 1 in the termination region 7. The semiconductor substrate 1 is a silicon substrate, and the oxide film 4 is a silicon oxide film. The plurality of guard rings 3 are selectively provided on a part of the upper surface of the oxide film 4. The insulating protective film 5 is selectively provided on a part of the upper surface of the oxide film 4 so as to cover the guard rings 3.

[0014] The semiconductor substrate 1 in the wafer state is diced and processed into a chip shape, and the diced portion is the outer peripheral end of the semiconductor substrate 1, that is, the end of the chip. The organic insulating film 6 is selectively provided on a part of the upper surface of the oxide film 4 so as to cover the insulating protective film 5. Specifically, the organic insulating film 6 contains an insulating material and is provided so as to cover a portion excluding the peripheral edge portion of the oxide film 4. The organic insulating film 6 is, for example, polyimide. In the end region 7 between the outermost guard ring 3 and the outer peripheral end of the semiconductor substrate 1, the organic insulating film 6 is in direct contact with the oxide film 4. The organic insulating film 6 is not provided up to the peripheral edge portion of the semiconductor substrate 1.

[0015] In the present embodiment, at least one groove 8 is provided on the upper surface of the semiconductor substrate 1 in the end region 7. In the present embodiment, the case where a plurality of grooves 8 are provided will be described. The organic insulating film 6 is embedded in the groove 8, and the width of the groove 8 has a portion that becomes smaller upward. The width of the groove 8 is the lateral width in FIG. 2. The groove 8 includes a first recess 1a in which the internal space provided on the upper surface of the semiconductor substrate 1 has a trapezoidal cross-sectional shape, and a second recess 4a provided on the surface of the first recess 1a and formed of the oxide film 4 and having a trapezoidal cross-sectional shape.

[0016] Next, the top view shape of the groove 8 will be described. FIG. 3 is a partial top view showing an example of a region corresponding to FIG. 2. FIG. 4 is a partial top view showing another example of a region corresponding to FIG. 2.

[0017] As shown in FIG. 3, the plurality of grooves 8 extend parallel to the entire circumference of the top view contour of the organic insulating film 6. That is, the plurality of grooves 8 are provided so as to be parallel to the end of the chip in top view and are formed in a stripe shape.

[0018] Alternatively, as shown in FIG. 4, the plurality of grooves 8 may be formed in a checkerboard pattern instead of a stripe pattern in top view over the entire circumference of the organic insulating film 6.

[0019] <Method of forming groove> Next, a method for forming the groove 8 will be described. First, an oxide film 4 is formed on the upper surface of the semiconductor substrate 1. Next, a first recess 1a is formed by performing trench etching from the upper surface of the oxide film 4. By adjusting the etching conditions, a first recess 1a having a portion whose width decreases upward is formed. Alternatively, instead of trench etching, it is also possible to form a first recess 1a having a portion whose width decreases upward by adjusting the doping amount of nitrogen in the drift layer.

[0020] Next, an oxide film 4 is formed on the surface of the first recess 1a by using thermal oxidation to form a second recess 4a. Since the second recess 4a is formed in accordance with the shape of the first recess 1a, the width of the second recess 4a also has a portion that decreases upward.

[0021] <Effect> As described above, the semiconductor device according to Embodiment 1 has a lower surface that is a surface opposite to the upper surface, and a semiconductor substrate 1 in which an effective region 2 through which current flows and a termination region 7 formed so as to surround the outer peripheral side of the effective region 2 are defined, an oxide film 4 provided in contact with the upper surface of the termination region 7 so as to cover the upper surface, an organic insulating film 6 containing an insulating material and provided so as to cover a portion excluding the peripheral edge of the oxide film 4, and in a portion of the oxide film 4 covered by the organic insulating film 6, a groove 8 as a recess recessed downward, and the width of the groove 8 has a portion that decreases upward. Further, the organic insulating film 6 contains polyimide.

[0022] Since moisture penetrates from the outer peripheral end of the organic insulating film 6 and progresses along the groove 8, the creepage distance until the moisture reaches the outermost guard ring 3 becomes long. Further, the groove 8 is filled with the organic insulating film 6, and by improving the adhesion between the organic insulating film 6 and the oxide film 4, the adhesion between the organic insulating film 6 and the semiconductor substrate 1 is improved. Since the progress of moisture from the outer peripheral end of the organic insulating film 6 can be suppressed, the moisture resistance of the semiconductor device is improved.

[0023] Furthermore, since the width of the groove 8 has a portion that becomes smaller toward the upper side, the anchor effect caused by the groove 8 improves the vertical adhesion in the semiconductor device, thereby improving the power cycle tolerance of the semiconductor device.

[0024] Also, since the terminal region 7 can be shortened, the chip size becomes smaller, and the manufacturing cost of the semiconductor device can be reduced.

[0025] Also, the groove 8 is composed of a first recess 1a having a trapezoidal cross-sectional shape of the internal space provided on the upper surface of the semiconductor substrate 1, and a second recess 4a provided on the surface of the first recess 1a and having a trapezoidal cross-sectional shape of the internal space made of the oxide film 4. Further, in the method of manufacturing a semiconductor device according to Embodiment 1, the groove 8 is composed of the first recess 1a and the second recess 4a, and the method of manufacturing a semiconductor device includes a step (a) of forming the first recess 1a having a trapezoidal cross-sectional shape of the internal space provided on the upper surface of the semiconductor substrate 1, and a step (b) of forming the second recess 4a provided on the surface of the first recess 1a and having a trapezoidal cross-sectional shape of the internal space made of the oxide film 4.

[0026] Therefore, in the existing trench etching process, since the first recess 1a can be formed, it is possible to form the groove 8 by simply adding the step (b) of forming the second recess 4a on the surface of the first recess 1a to the existing process. Thereby, improvement in the moisture resistance and power cycle tolerance in the semiconductor device can be easily realized.

[0027] Also, the recess is a groove 8 that extends parallel to the top view contour of the organic insulating film 6. Therefore, since the moisture that has entered from the outer peripheral end of the organic insulating film 6 progresses toward the center of the semiconductor substrate 1, by providing the groove 8 that extends in a direction orthogonal to the progress direction of the moisture, that is, in a direction parallel to the top view contour of the organic insulating film 6, the creepage distance from the outer peripheral end of the organic insulating film 6 to the active region 2 can be increased.

[0028] In addition, since the grooves 8 are formed in a grid pattern in a top view, the contact area between the organic insulating film 6 and the semiconductor substrate 1 in the terminal region 7 increases, further improving the adhesion between the organic insulating film 6 and the semiconductor substrate 1.

[0029] <Embodiment 2> Next, a semiconductor device according to Embodiment 2 will be described. FIG. 5 is a diagram corresponding to FIG. 2 of Embodiment 2. In Embodiment 2, the same components as those described in Embodiment 1 are denoted by the same reference numerals and the description thereof is omitted.

[0030] <Configuration of Semiconductor Device> As shown in FIG. 5, in Embodiment 2, the oxide film 4 inside and around the groove 8 is covered with a contact film 9 as a first contact film. The contact film 9 is a deposited oxide film. The groove 8 is composed of a first recess 1a, a second recess 4a, and a third recess 9a. The first recess 1a is provided on the upper surface of the semiconductor substrate 1 and has a rectangular cross-sectional shape of the internal space. The second recess 4a is provided on the surface of the first recess 1a and has a rectangular cross-sectional shape of the internal space made of the oxide film 4. The third recess 9a is provided on the surface of the second recess 4a and has a trapezoidal cross-sectional shape of the internal space made of the contact film 9. Specifically, the width of the third recess 9a has a portion that becomes smaller toward the upper side. The width of the third recess 9a is the horizontal width in FIG. 5.

[0031] <Method of Forming Groove> Next, a method of forming the groove 8 will be described. First, an oxide film 4 is formed on the upper surface of the semiconductor substrate 1. Next, by performing trench etching from the upper surface of the oxide film 4, a first recess 1a having a rectangular cross-sectional shape of the internal space is formed. Alternatively, instead of trench etching, it is also possible to form the first recess 1a by adjusting the doping amount of nitrogen in the drift layer.

[0032] Next, by forming an oxide film 4 on the surface of the first recess 1a using thermal oxidation, a second recess 4a having a rectangular cross-sectional shape of the internal space is formed. Next, a deposited oxide film is deposited on the surface of the oxide film 4 by CVD method to form an adhesion film 9, thereby forming a third recess 9a having a trapezoidal cross-sectional shape of the internal space on the surface of the second recess 4a.

[0033] <Effect> As described above, in the semiconductor device according to Embodiment 2, similar to the case of Embodiment 1, since the width of the groove 8 has a portion that becomes smaller upward, it is possible to improve the power cycle tolerance while improving the moisture resistance.

[0034] Further, the groove 8 is composed of a first recess 1a provided on the upper surface of the semiconductor substrate 1 and having a rectangular cross-sectional shape of the internal space, a second recess 4a provided on the surface of the first recess 1a and made of an oxide film 4 and having a rectangular cross-sectional shape of the internal space, and a third recess 9a provided on the surface of the second recess 4a and made of an adhesion film 9 and having a trapezoidal cross-sectional shape of the internal space. The adhesion film 9 contains a deposited oxide film. Also, in the manufacturing method of the semiconductor device according to Embodiment 2, the groove 8 is composed of the first recess 1a, the second recess 4a, and the third recess 9a, and the manufacturing method of the semiconductor device includes a step (c) of forming a first recess 1a provided on the upper surface of the semiconductor substrate 1 and having a rectangular cross-sectional shape of the internal space, a step (d) of forming a second recess 4a provided on the surface of the first recess 1a and made of an oxide film 4 and having a rectangular cross-sectional shape of the internal space, and a step (e) of forming a third recess 9a provided on the surface of the second recess 4a and made of an adhesion film 9 and having a trapezoidal cross-sectional shape of the internal space.

[0035] The deposited oxide film is generally used as an interlayer film in semiconductor devices, and the deposited oxide film formation process is generally adopted in the manufacturing process of semiconductor devices. In Embodiment 2, by forming a deposited oxide film after trench etching, it is possible to easily form the groove 8 having an anchor effect by diverting existing processes.

[0036] <Embodiment 3> Next, a semiconductor device according to Embodiment 3 will be described. FIG. 6 is a diagram corresponding to FIG. 2 of Embodiment 3. FIGS. 7(a) to (c) are cross-sectional views showing a method of forming the ridges 10 in Embodiment 3. In Embodiment 3, the same components as those described in Embodiments 1 and 2 are denoted by the same reference numerals and the description thereof is omitted.

[0037] <Configuration of Semiconductor Device> As shown in FIG. 6, in Embodiment 3, at least one ridge 10 is provided between the oxide film 4 and the organic insulating film 6 in the termination region 7 of the semiconductor substrate 1. In the present embodiment, a case where a plurality (for example, two) of ridges 10 are provided will be described. Here, the ridge 10 corresponds to a convex portion protruding upward. The ridge 10 is provided between the oxide film 4 and the organic insulating film 6 and is made of a second adhesion film including a deposited oxide film or a polysilicon film. The adhesion between the second adhesion film constituting the ridge 10 and the organic insulating film 6 is higher than the adhesion between the organic insulating film 6 and the oxide film 4. The width of the ridge 10 has a portion that increases upward. The width of the ridge 10 is the lateral width in FIG. 6.

[0038] Although not shown, the plurality of ridges 10 extend parallel to the entire circumference of the top view contour of the organic insulating film 6. That is, the plurality of ridges 10 are provided so as to be parallel to the terminal of the chip in top view and are formed in a stripe shape. Alternatively, the plurality of ridges 10 may be formed in a checkerboard pattern instead of a stripe shape in top view over the entire circumference of the organic insulating film 6.

[0039] <Method of Forming Ridges> Next, a method for forming the ridge 10 will be described with reference to FIGS. 7(a) to 7(c). A primary pattern 10a of a second conformal film having the shape of the ridge 10 is formed on the oxide film 4 provided on the upper surface of the semiconductor substrate 1. The primary pattern 10a is made of a deposited oxide film. Next, a deposited oxide film 10b (see FIG. 7(a)) or a polysilicon film 10c (see FIG. 7(b)) as a secondary pattern is formed on the portion excluding the lower surface of the primary pattern 10a. At this time, by adjusting the film formation conditions, the deposited oxide film 10b or the polysilicon film 10c formed on the side surface of the primary pattern is formed so that the upper part is thicker than the lower part. As a result, as shown in FIG. 7(b), a ridge 10 having a cross-sectional shape in which the width increases upward is formed.

[0040] Also, when the polysilicon film 10c is formed, as shown in FIG. 7(c), after the resist, reactive ion etching may be performed to remove the polysilicon film 10c formed on the upper surface of the ridge 10 and the upper surface of the oxide film 4.

[0041] <Effect> As described above, the semiconductor device according to Embodiment 3 includes, instead of the groove 8 in the case of Embodiment 1, a ridge 10 as a convex portion protruding upward in the portion of the oxide film 4 covered with the organic insulating film 6, and the width of the ridge 10 has a portion that increases upward. Therefore, it is possible to improve the power cycle tolerance while improving the moisture resistance.

[0042] Also, the ridge 10 is provided between the oxide film 4 and the organic insulating film 6 and is made of a second conformal film. The second conformal film includes a deposited oxide film or a polysilicon film. Since the adhesion between the second conformal film constituting the ridge 10 and the organic insulating film 6 is higher than the adhesion between the organic insulating film 6 and the oxide film 4, it is possible to improve the moisture resistance and the power cycle tolerance compared to the case of Embodiment 1.

[0043] Further, the convex portion is the ridge 10 that extends parallel to the top view contour of the organic insulating film 6. Therefore, since the moisture that has penetrated from the outer peripheral end of the organic insulating film 6 progresses toward the center of the semiconductor substrate 1, by providing the ridge 10 that extends in a direction orthogonal to the progress direction of the moisture, that is, in a direction parallel to the top view contour of the organic insulating film 6, the creepage distance from the outer peripheral end of the organic insulating film 6 to the active region 2 can be increased.

[0044] In addition, since the ridges 10 are formed in a checkerboard pattern in top view, the contact area between the organic insulating film 6 and the semiconductor substrate 1 in the terminal region 7 increases, so the adhesion between the organic insulating film 6 and the semiconductor substrate 1 is further improved.

[0045] <Embodiment 4> Next, a semiconductor device according to Embodiment 4 will be described. FIG. 8 is an equivalent diagram of FIG. 2 in Embodiment 4. In Embodiment 4, the same components as those described in Embodiments 1 to 3 are denoted by the same reference numerals and the description thereof is omitted.

[0046] <Configuration of Semiconductor Device> As shown in FIG. 8, in Embodiment 4, the configuration combines Embodiment 1 and Embodiment 3. At least one groove 8 is provided on the upper surface of the terminal region 7 in the semiconductor substrate 1. Further, at least one ridge 10 is provided between the oxide film 4 and the organic insulating film 6 in the terminal region 7 of the semiconductor substrate 1.

[0047] <Method for Forming Groove and Ridge> The groove 8 is formed in the same manner as in the case of Embodiment 1, and the ridge 10 is formed in the same manner as in the case of Embodiment 3, so the description thereof is omitted here.

[0048] <Effect> As described above, the semiconductor device according to the fourth embodiment includes, in the portion of the oxide film 4 covered with the organic insulating film 6, a groove 8 as a recess that is recessed downward and a ridge 10 as a protrusion that protrudes upward. The width of the groove 8 has a portion that becomes smaller toward the upper side, and the width of the ridge 10 has a portion that becomes larger toward the upper side.

[0049] As a result, the interface where moisture progresses becomes uneven, and without increasing the length of the termination region 7, the creepage distance until the moisture reaches the outermost guard ring 3 can be made even longer than in the case of the first embodiment. Also, since the contact area between the organic insulating film 6 and the oxide film 4 increases, the moisture resistance can be further improved compared to the case of the first embodiment.

[0050] <Modifications of the First to Fourth Embodiments> In the first to fourth embodiments, it has been described that the semiconductor substrate 1 is made of silicon. However, the semiconductor substrate 1 is not limited to being made of silicon, and may be made of a wide-bandgap semiconductor having a larger bandgap than silicon. The wide-bandgap semiconductor includes, for example, silicon carbide, gallium nitride-based materials, or diamond. Since the wide-bandgap semiconductor is designed to have a high electric field strength at the interface, by adopting the configurations of the first to fourth embodiments for a semiconductor device including the semiconductor substrate 1 made of a wide-bandgap semiconductor, the effects obtained from these become more remarkable and are particularly effective.

[0051] It should be noted that the respective embodiments can be freely combined, or the respective embodiments can be appropriately modified or omitted.

[0052] Hereinafter, various aspects of the present disclosure will be summarized and described as appendices.

[0053] (Appendix 1) A semiconductor substrate having a first main surface and a second main surface that is a surface opposite to the first main surface, and having defined therein an active region through which current flows and a termination region formed so as to surround the outer peripheral side of the active region, An oxide film provided in contact with the first main surface of the terminal region and covering the first main surface; A surface protection film containing an insulating material and provided to cover a portion excluding the peripheral portion of the oxide film; In the portion of the oxide film covered by the surface protection film, at least one of a concave portion recessed downward or a convex portion protruding upward; The width of the concave portion has a portion that becomes smaller toward the upper side; A semiconductor device, wherein the width of the convex portion has a portion that becomes larger toward the upper side.

[0054] (Appendix 2) The semiconductor device according to Appendix 1, wherein the concave portion is composed of a first concave portion provided on the first main surface of the semiconductor substrate and having a trapezoidal cross-sectional shape, and a second concave portion provided on the surface of the first concave portion and made of the oxide film and having a trapezoidal cross-sectional shape.

[0055] (Appendix 3) The semiconductor device according to Appendix 1, wherein the concave portion is composed of a first concave portion provided on the first main surface of the semiconductor substrate and having a rectangular cross-sectional shape, a second concave portion provided on the surface of the first concave portion and made of the oxide film and having a rectangular cross-sectional shape, and a third concave portion provided on the surface of the second concave portion and made of a first adhesion film and having a trapezoidal cross-sectional shape.

[0056] (Appendix 4) The semiconductor device according to Appendix 3, wherein the first adhesion film contains a deposited oxide film.

[0057] (Appendix 5) The semiconductor device according to Appendix 1, wherein the convex portion is provided between the oxide film and the surface protection film and is made of a second adhesion film.

[0058] (Appendix 6) The semiconductor device according to Appendix 5, wherein the second adhesion film contains a deposited oxide film or a polysilicon film.

[0059] (Appendix 7) The concave portion is a groove that extends parallel to the top view contour of the surface protection film. The semiconductor device according to any one of Appendices 1 to 6, wherein the convex portion is a ridge that extends parallel to the top view contour of the surface protection film.

[0060] (Appendix 8) The semiconductor device according to any one of Appendices 1 to 6, wherein the concave portion and the convex portion are formed in a checkerboard pattern in top view.

[0061] (Appendix 9) The semiconductor device according to any one of Appendices 1 to 8, wherein the surface protection film contains polyimide.

[0062] (Appendix 10) The semiconductor device according to any one of Appendices 1 to 9, wherein the semiconductor substrate is composed of a wide bandgap semiconductor containing silicon carbide, gallium nitride, or diamond.

[0063] (Appendix 11) A method for manufacturing a semiconductor device, which is a method for manufacturing the semiconductor device according to Appendix 1, wherein the concave portion is composed of a first concave portion and a second concave portion, The method for manufacturing a semiconductor device includes: (a) a step of forming the first concave portion having a trapezoidal cross-sectional shape in the internal space provided on the first main surface of the semiconductor substrate; (b) a step of forming the second concave portion provided on the surface of the first concave portion and having a trapezoidal cross-sectional shape in the internal space made of the oxide film. A method for manufacturing a semiconductor device, comprising the above steps.

[0064] (Appendix 12) A method for manufacturing a semiconductor device, which is a method for manufacturing the semiconductor device according to Appendix 1, wherein the concave portion is composed of a first concave portion, a second concave portion, and a third concave portion, The method for manufacturing a semiconductor device includes: (c) A step of forming the first concave portion provided on the first main surface of the semiconductor substrate, the internal space of which has a rectangular cross-sectional shape. (d) A step of forming the second concave portion provided on the surface of the first concave portion and made of the oxide film, the internal space of which has a rectangular cross-sectional shape. (e) A step of forming the third concave portion provided on the surface of the second concave portion and made of the first adhesion film, the internal space of which has a trapezoidal cross-sectional shape. A method for manufacturing a semiconductor device, comprising the above steps.

[0065] (Appendix 13) A method for manufacturing a semiconductor device for manufacturing the semiconductor device according to Appendix 5, comprising: (f) A step of forming a primary pattern of the second adhesion film on the first main surface side of the semiconductor substrate. (g) A step of forming a secondary pattern of the second adhesion film on the primary pattern to form the convex portion on the first main surface side of the semiconductor substrate. A method for manufacturing a semiconductor device, comprising the above steps.

Explanation of Reference Numerals

[0066] 1 Semiconductor substrate, 1a First concave portion, 2 Active region, 4 Oxide film, 4a Second concave portion, 6 Organic insulating film, 7 Terminal region, 8 Groove, 9 Adhesion film, 9a Third concave portion, 10 Ridge.

Claims

1. A semiconductor substrate having a first main surface and a second main surface which is a surface opposite to the first main surface, and having a defined active region through which current flows and a termination region formed so as to surround the outer peripheral side of the active region; An oxide film provided in contact with the first main surface of the termination region so as to cover the first main surface; A surface protection film containing an insulating material and provided so as to cover a portion excluding the peripheral portion of the oxide film; At least one of a concave portion recessed downward or a convex portion protruding upward in a portion of the oxide film covered by the surface protection film; The width of the concave portion has a portion that becomes smaller upward; A semiconductor device, wherein the width of the convex portion has a portion that becomes larger upward.

2. The semiconductor device according to claim 1, wherein the concave portion is composed of a first concave portion having a trapezoidal cross-sectional shape of an internal space provided on the first main surface of the semiconductor substrate and a second concave portion provided on the surface of the first concave portion and having a trapezoidal cross-sectional shape of an internal space made of the oxide film.

3. The semiconductor device according to claim 1, wherein the concave portion is composed of a first concave portion having a rectangular cross-sectional shape of an internal space provided on the first main surface of the semiconductor substrate, a second concave portion provided on the surface of the first concave portion and having a rectangular cross-sectional shape of an internal space made of the oxide film, and a third concave portion provided on the surface of the second concave portion and having a trapezoidal cross-sectional shape of an internal space made of a first adhesion film.

4. The semiconductor device according to claim 3, wherein the first adhesion film includes a deposited oxide film.

5. The semiconductor device according to claim 1, wherein the convex portion is provided between the oxide film and the surface protection film and is made of a second adhesion film.

6. The semiconductor device according to claim 5, wherein the second adhesion film includes a deposited oxide film or a polysilicon film.

7. The semiconductor device according to claim 1, wherein the concave portion is a groove extending parallel to the top view contour of the surface protection film, and The convex portion is a ridge extending parallel to the top view contour of the surface protection film.

8. The semiconductor device according to claim 1, wherein the concave portion and the convex portion are formed in a checkerboard pattern in top view.

9. The semiconductor device according to claim 1, wherein the surface protection film contains polyimide.

10. The semiconductor device according to claim 1, wherein the semiconductor substrate is composed of a wide bandgap semiconductor including silicon carbide, gallium nitride, or diamond.

11. A method of manufacturing a semiconductor device for manufacturing the semiconductor device according to claim 1, wherein the recess is composed of a first recess and a second recess, The method of manufacturing the semiconductor device is, (a) forming the first recess having a trapezoidal cross-sectional shape in the internal space provided on the first main surface of the semiconductor substrate; (b) forming the second recess provided on the surface of the first recess and having a trapezoidal cross-sectional shape in the internal space made of the oxide film; A method of manufacturing a semiconductor device, comprising:

12. A method of manufacturing a semiconductor device for manufacturing the semiconductor device according to claim 1, wherein the recess is composed of a first recess, a second recess, and a third recess, The method of manufacturing the semiconductor device is, (c) forming the first recess having a rectangular cross-sectional shape in the internal space provided on the first main surface of the semiconductor substrate; (d) forming the second recess provided on the surface of the first recess and having a rectangular cross-sectional shape in the internal space made of the oxide film; (e) forming the third recess provided on the surface of the second recess and having a trapezoidal cross-sectional shape in the internal space made of a first adhesion film; A method of manufacturing a semiconductor device, comprising:

13. A method of manufacturing a semiconductor device for manufacturing the semiconductor device according to claim 5, (f) forming a primary pattern of the second adhesion film on the first main surface side of the semiconductor substrate; (g) forming a secondary pattern of the second adhesion film on the primary pattern to form the convex portion on the first main surface side of the semiconductor substrate; A method of manufacturing a semiconductor device, comprising:

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