Semiconductor device

Abstract

To reduce the resistance of an edge termination structure part while protecting a gate oxide film.SOLUTION: A semiconductor device includes a semiconductor substrate including a bulk donor, an active part provided to the semiconductor substrate, and an edge termination structure part provided between the active part and an end side of the semiconductor substrate on an upper surface of the semiconductor substrate. The active part includes a first high-concentration region containing hydrogen and having higher donor concentration than the bulk donor concentration. The edge termination structure part includes a second high-concentration region provided in a wider range than the first high-concentration region in a depth direction of the semiconductor substrate, containing hydrogen, and having higher donor concentration than the bulk donor concentration.SELECTED DRAWING: Figure 4

Description

Technical Field

[0001] The present invention relates to a semiconductor device.

Background Art

[0002] Conventionally, a technique is known in which hydrogen is implanted into a semiconductor substrate at a predetermined depth and diffused, so that the lattice defects formed in the implantation depth and diffusion region are combined with hydrogen to be donorized, and the doping concentration can be increased (see, for example, Patent Document 1). Patent Document 1: WO2011 / 52787

Summary of the Invention

Problems to be Solved by the Invention

[0003] In a semiconductor substrate, there may be provided an active portion where transistors and the like are provided, and an edge termination structure portion including a guard ring or the like is provided outside the active portion. The active portion is provided with a structure that preferably does not allow hydrogen to pass through, such as a gate oxide film. For this reason, in the depth direction, the range in which a region having a high doping concentration can be formed is limited. On the other hand, in the edge termination structure portion, it becomes difficult to improve the breakdown voltage as the region having a low doping concentration remains.

Means for Solving the Problems

[0004] In order to solve the above problems, in a first aspect of the present invention 、 a semiconductor device is provided. The semiconductor device may include a base region of a second conductivity type provided on the upper surface side of the semiconductor substrate. Any of the semiconductor devices may include a low-concentration region of a first conductivity type provided below the base region. Any of the semiconductor devices may include an accumulation region of a first conductivity type provided between the base region and the low-concentration region. Any of the semiconductor devices may include an edge termination structure portion in which a high-concentration region of a first conductivity type having a doping concentration higher than that of the low-concentration region is selectively exposed on the upper surface of the semiconductor substrate.

[0005] In any of the semiconductor devices, the low-concentration region may have a doping concentration that is the bulk donor concentration.

[0006] In any of the semiconductor devices, the doping concentration of the accumulation region may be higher than that of the high-concentration region.

[0007] Any of the semiconductor devices may include a buffer region as a field stop layer provided below the low-concentration region. Any of the semiconductor devices may include a collector region of a second conductivity type provided between the lower surface of the semiconductor substrate and the buffer region. In any of the semiconductor devices, the doping concentration of the high-concentration region may be lower than the peak value of the doping concentration in the buffer region.

[0008] In any of the semiconductor devices, the high-concentration region may be provided from the upper end of the buffer region to the upper surface of the semiconductor substrate.

[0009] In any of the semiconductor devices, the edge termination structure portion may include a channel stopper provided to be exposed on the upper surface and the side surface at the edge of the semiconductor substrate, and a plurality of guard rings of a second conductivity type provided inside the channel stopper in a top view. In any of the semiconductor devices, the high-concentration region may be provided between two of the guard rings.

[0010] In any of the semiconductor devices, the high-concentration region may also be provided between the channel stopper and the guard ring.

[0011] In any of the semiconductor devices, the doping concentration of the high-concentration region may be lower than the peak values of the doping concentrations of the guard ring and the channel stopper.

[0012] Any of the semiconductor devices described above may have a trench portion that penetrates the base region. Any of the semiconductor devices described above may include a well region of the second conductivity type that is provided deeper than the trench portion and has a doping concentration higher than that of the base region. In any of the semiconductor devices described above, the well region may be located between the accumulation region and the high-concentration region in the arrangement direction of the trench portions.

[0013] In any of the semiconductor devices described above, the side surface of the high-concentration region may be in contact with the well region and the low-concentration region.

[0014] In any of the semiconductor devices described above, the variation range of the doping concentration of the high-concentration region over the entire depth direction may be within ±50%. In any of the semiconductor devices described above, the high-concentration region may contain hydrogen. Any of the semiconductor devices described above may further include an active portion provided on the semiconductor substrate. In any of the semiconductor devices described above, the active portion may include the base region, the low-concentration region, and the accumulation region. In any of the semiconductor devices described above, the edge termination structure portion may be disposed outside the accumulation region in a top view and may be provided between the active portion and the edge of the semiconductor substrate.

[0015] Note that the above summary of the invention does not list all the necessary features of the present invention. Also, sub-combinations of these feature groups can also be inventions.

Brief Description of the Drawings

[0016]

Figure 1

Figure 2

Figure 3

Figure 4

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Figure 10

Figure 11

Embodiments for Carrying Out the Invention

[0017] Hereinafter, the present invention will be described through embodiments of the invention. However, the following embodiments do not limit the invention according to the claims. Also, not all combinations of features described in the embodiments are essential for the solution means of the invention.

[0018] In this specification, one side in the direction parallel to the depth direction of the semiconductor substrate is referred to as "upper", and the other side is referred to as "lower". Of the two main surfaces of a substrate, layer, or other member, one surface is referred to as the upper surface and the other surface is referred to as the lower surface. The directions of "upper" and "lower" are not limited to the direction of gravity or the direction at the time of mounting the semiconductor device.

[0019] In this specification, technical matters may be described using orthogonal coordinate axes of the X-axis, Y-axis, and Z-axis. The orthogonal coordinate axes only specify the relative positions of the components and do not limit a specific direction. For example, the Z-axis does not limit and indicate the height direction with respect to the ground. Note that the +Z-axis direction and the -Z-axis direction are opposite directions. When described as the Z-axis direction without specifying positive or negative, it means directions parallel to the +Z-axis and -Z-axis.

[0020] In this specification, orthogonal axes parallel to the upper surface and the lower surface of the semiconductor substrate are the X-axis and the Y-axis. Also, an axis perpendicular to the upper surface and the lower surface of the semiconductor substrate is the Z-axis. In this specification, the direction of the Z-axis may sometimes be referred to as the depth direction. Also, in this specification, including the X-axis and the Y-axis, a direction parallel to the upper surface and the lower surface of the semiconductor substrate may sometimes be referred to as the horizontal direction.

[0021] When referred to as "identical" or "equal" in this specification, it may include cases having errors due to manufacturing variations or the like. The error is, for example, within 10%.

[0022] In this specification, the conductivity type of the doped region doped with impurities is described as P-type or N-type. In this specification, impurities may particularly mean either an N-type donor or a P-type acceptor, and may be described as dopants. In this specification, doping means introducing a donor or an acceptor into a semiconductor substrate to form a semiconductor having an N-type conductivity type or a P-type conductivity type.

[0023] In this specification, the doping concentration means the concentration of donors or acceptors in the thermal equilibrium state. In this specification, the net doping concentration means the net concentration obtained by adding the donor concentration as the concentration of positive ions and the acceptor concentration as the concentration of negative ions, including the polarity of the charges. As an example, when the donor concentration is N D and the acceptor concentration is N A , the net doping concentration at any position is N D - N A . In this specification, the net doping concentration may sometimes be simply described as the doping concentration.

[0024] Donors have the function of supplying electrons to the semiconductor. Acceptors have the function of receiving electrons from the semiconductor. Donors and acceptors are not limited to the impurities themselves. For example, VOH defects formed by the combination of vacancies (V), oxygen (O), and hydrogen (H) present in the semiconductor function as donors that supply electrons. In this specification, VOH defects may sometimes be referred to as hydrogen donors.

[0025] When described as P+ type or N+ type in this specification, it means that the doping concentration is higher than that of P-type or N-type. When described as P- type or N- type, it means that the doping concentration is lower than that of P-type or N-type. Also, when described as P++ type or N++ type in this specification, it means that the doping concentration is higher than that of P+ type or N+ type.

[0026] In this specification, the chemical concentration refers to the atomic density of impurities measured regardless of the electrically activated state. The chemical concentration can be measured, for example, by secondary ion mass spectrometry (SIMS). The net doping concentration described above can be measured by voltage - capacitance measurement (CV method). Also, the carrier concentration measured by spreading resistance measurement (SR method) may be used as the net doping concentration. The carrier concentration measured by the CV method or the SR method may be a value in the thermal equilibrium state. Also, in the N - type region, since the donor concentration is sufficiently larger than the acceptor concentration, the carrier concentration in the region may be used as the donor concentration. Similarly, in the P - type region, the carrier concentration in the region may be used as the acceptor concentration. In this specification, the doping concentration in the N - type region may be referred to as the donor concentration, and the doping concentration in the P - type region may be referred to as the acceptor concentration.

[0027] Also, when the concentration distribution of donors, acceptors or net doping has a peak, the peak value may be used as the concentration of donors, acceptors or net doping in the region. In cases where the concentration of donors, acceptors or net doping is substantially uniform, etc., the average value of the concentration of donors, acceptors or net doping in the region may be used as the concentration of donors, acceptors or net doping.

[0028] The carrier concentration measured by the SR method may be lower than the concentration of donors or acceptors. In the range where current flows when measuring the spreading resistance, the carrier mobility of the semiconductor substrate may be lower than the value in the crystalline state. The decrease in carrier mobility occurs due to the scattering of carriers caused by the disorder of the crystal structure (disorder) such as lattice defects.

[0029] The concentration of donors or acceptors calculated from the carrier concentration measured by the CV method or the SR method may be lower than the chemical concentration of the element indicating the donor or acceptor. As an example, in a silicon semiconductor, the donor concentration of phosphorus or arsenic that acts as a donor, or the acceptor concentration of boron that acts as an acceptor, is about 99% of these chemical concentrations. On the other hand, the donor concentration of hydrogen that acts as a donor in a silicon semiconductor is about 0.1% to 10% of the chemical concentration of hydrogen.

[0030] FIG. 1 is a top view showing an example of a semiconductor device 100 according to an embodiment of the present invention. In FIG. 1, the positions of the respective members projected onto the upper surface of the semiconductor substrate 10 are shown. In FIG. 1, only some members of the semiconductor device 100 are shown, and some members are omitted.

[0031] The semiconductor device 100 includes a semiconductor substrate 10. The semiconductor substrate 10 is a substrate formed of a semiconductor material. As an example, the semiconductor substrate 10 is a silicon substrate. The semiconductor substrate 10 has side edges 102 in a top view. When simply referred to as a top view in this specification, it means viewing from the upper surface side of the semiconductor substrate 10. The semiconductor substrate 10 of this example has two sets of side edges 102 facing each other in a top view. In FIG. 1, the X-axis and the Y-axis are parallel to any of the side edges 102. Also, the Z-axis is perpendicular to the upper surface of the semiconductor substrate 10.

[0032] An active portion 160 is provided in the semiconductor substrate 10. The active portion 160 is a region where a main current flows in the depth direction between the upper surface and the lower surface of the semiconductor substrate 10 when the semiconductor device 100 operates. An emitter electrode is provided above the active portion 160 but is omitted in FIG. 1.

[0033] The active part 160 is provided with at least one of a transistor part 70 including transistor elements such as IGBTs and a diode part 80 including diode elements such as a freewheeling diode (FWD). In the example of FIG. 1, the transistor part 70 and the diode part 80 are alternately arranged along a predetermined arrangement direction (the X-axis direction in this example) on the upper surface of the semiconductor substrate 10. In other examples, only one of the transistor part 70 and the diode part 80 may be provided in the active part 160.

[0034] In FIG. 1, the symbol "I" is attached to the region where the transistor part 70 is arranged, and the symbol "F" is attached to the region where the diode part 80 is arranged. In this specification, the direction perpendicular to the arrangement direction in the top view may be referred to as the extending direction (the Y-axis direction in FIG. 1). The transistor part 70 and the diode part 80 may each have a longitudinal direction in the extending direction. That is, the length of the transistor part 70 in the Y-axis direction is larger than the width in the X-axis direction. Similarly, the length of the diode part 80 in the Y-axis direction is larger than the width in the X-axis direction. The extending direction of the transistor part 70 and the diode part 80 may be the same as the longitudinal direction of each trench part described later.

[0035] The diode part 80 has an N+-type cathode region in the region in contact with the lower surface of the semiconductor substrate 10. In this specification, the region where the cathode region is provided is referred to as the diode part 80. That is, the diode part 80 is the region overlapping the cathode region in the top view. On the lower surface of the semiconductor substrate 10, a P+-type collector region may be provided in the region other than the cathode region. In this specification, the extended region 81 obtained by extending the diode part 80 in the Y-axis direction up to the gate wiring described later may also be included in the diode part 80. A collector region is provided on the lower surface of the extended region 81.

[0036] The transistor part 70 has a P+-type collector region in the region in contact with the lower surface of the semiconductor substrate 10. Further, the transistor part 70 has a gate structure including an N-type emitter region, a P-type base region, a gate conductive part, and a gate insulating film periodically arranged on the upper surface side of the semiconductor substrate 10.

[0037] The semiconductor device 100 may have one or more pads above the semiconductor substrate 10. The semiconductor device 100 in this example has a gate pad 112. The semiconductor device 100 may have pads such as an anode pad, a cathode pad, and a current detection pad. Each pad is disposed in the vicinity of the end side 102. The vicinity of the end side 102 refers to the region between the end side 102 and the emitter electrode in a top view. When the semiconductor device 100 is mounted, each pad may be connected to an external circuit via a wiring such as a wire.

[0038] A gate potential is applied to the gate pad 112. The gate pad 112 is electrically connected to the conductive portion of the gate trench portion of the active portion 160. The semiconductor device 100 includes a gate wiring that connects the gate pad 112 and the gate trench portion. In FIG. 1, the gate wiring is hatched with diagonal lines.

[0039] The gate wiring in this example has an outer peripheral gate wiring 130 and an active side gate wiring 131. The outer peripheral gate wiring 130 is disposed between the active portion 160 and the end side 102 of the semiconductor substrate 10 in a top view. The outer peripheral gate wiring 130 in this example surrounds the active portion 160 in a top view. The region surrounded by the outer peripheral gate wiring 130 in a top view may be regarded as the active portion 160. Further, the outer peripheral gate wiring 130 is connected to the gate pad 112. The outer peripheral gate wiring 130 is disposed above the semiconductor substrate 10. The outer peripheral gate wiring 130 may be a metal wiring containing aluminum or the like.

[0040] The active side gate wiring 131 is provided in the active portion 160. By providing the active side gate wiring 131 in the active portion 160, the variation in the wiring length from the gate pad 112 can be reduced for each region of the semiconductor substrate 10.

[0041] The active side gate wiring 131 is connected to the gate trench portion of the active portion 160. The active side gate wiring 131 is disposed above the semiconductor substrate 10. The active side gate wiring 131 may be a wiring formed of a semiconductor such as polysilicon doped with impurities.

[0042] The active side gate wiring 131 may be connected to the outer peripheral gate wiring 130. The active side gate wiring 131 in this example is provided to extend in the X-axis direction so as to cross the active portion 160 from one outer peripheral gate wiring 130 to the other outer peripheral gate wiring 130 at approximately the center in the Y-axis direction. When the active portion 160 is divided by the active side gate wiring 131, the transistor portions 70 and the diode portions 80 may be alternately arranged in the X-axis direction in each divided region.

[0043] Further, the semiconductor device 100 may include a temperature sensing portion (not shown) which is a PN junction diode formed of polysilicon or the like, and a current detecting portion (not shown) that simulates the operation of the transistor portion provided in the active portion 160.

[0044] The semiconductor device 100 in this example includes an edge termination structure portion 90 between the active portion 160 and the end side 102 in a top view. The edge termination structure portion 90 in this example is disposed between the outer peripheral gate wiring 130 and the end side 102. The edge termination structure portion 90 alleviates the electric field concentration on the upper surface side of the semiconductor substrate 10. The edge termination structure portion 90 may include at least one of a guard ring, a field plate, and RESURF provided annularly surrounding the active portion 160.

[0045] FIG. 2 is an enlarged view of region A in FIG. 1. Region A is a region including the transistor portion 70, the diode portion 80, and the active side gate wiring 131. The semiconductor device 100 of this example includes a gate trench portion 40, a dummy trench portion 30, a well region 11, an emitter region 12, a base region 14, and a contact region 15 provided inside the upper surface side of the semiconductor substrate 10. The gate trench portion 40 and the dummy trench portion 30 are each an example of a trench portion. Further, the semiconductor device 100 of this example includes an emitter electrode 52 and an active side gate wiring 131 provided above the upper surface of the semiconductor substrate 10. The emitter electrode 52 and the active side gate wiring 131 are provided separately from each other.

[0046] An interlayer insulating film is provided between the emitter electrode 52 and the active side gate wiring 131 and the upper surface of the semiconductor substrate 10, but is omitted in FIG. 2. Contact holes 54 are provided through the interlayer insulating film of this example. In FIG. 2, each contact hole 54 is hatched with oblique lines.

[0047] The emitter electrode 52 is provided above the gate trench portion 40, the dummy trench portion 30, the well region 11, the emitter region 12, the base region 14, and the contact region 15. The emitter electrode 52 contacts the emitter region 12, the contact region 15, and the base region 14 on the upper surface of the semiconductor substrate 10 through the contact hole 54. Further, the emitter electrode 52 is connected to the dummy conductive portion in the dummy trench portion 30 through a contact hole provided in the interlayer insulating film. The emitter electrode 52 may be connected to the dummy conductive portion of the dummy trench portion 30 at the tip of the dummy trench portion 30 in the Y-axis direction.

[0048] The active side gate wiring 131 is connected to the gate trench portion 40 through a contact hole provided in the interlayer insulating film. The active side gate wiring 131 may be connected to the gate conductive portion of the gate trench portion 40 at the tip portion 41 of the gate trench portion 40 in the Y-axis direction. The active side gate wiring 131 is not connected to the dummy conductive portion in the dummy trench portion 30.

[0049] The emitter electrode 52 is formed of a material containing metal. In FIG. 2, the range where the emitter electrode 52 is provided is shown. For example, at least a part of the emitter electrode 52 is formed of aluminum or an aluminum-silicon alloy, such as a metal alloy like AlSi, AlSiCu, etc. The emitter electrode 52 may have a barrier metal formed of titanium, a titanium compound, etc. under the region formed of aluminum or the like. Further, in the contact hole, a plug formed by embedding tungsten or the like so as to be in contact with the barrier metal and aluminum or the like may be provided.

[0050] The well region 11 is provided overlapping the active side gate wiring 131. The well region 11 is also provided extending with a predetermined width in a range where it does not overlap the active side gate wiring 131. The well region 11 in this example is provided away from the Y-axis direction end of the contact hole 54 toward the active side gate wiring 131. The well region 11 is a region of the second conductivity type having a higher doping concentration than the base region 14. The base region 14 in this example is of P-type, and the well region 11 is of P+ type.

[0051] Each of the transistor section 70 and the diode section 80 has a plurality of trench sections arranged in the array direction. In the transistor section 70 of this example, one or more gate trench sections 40 and one or more dummy trench sections 30 are alternately provided along the array direction. In the diode section 80 of this example, a plurality of dummy trench sections 30 are provided along the array direction. The diode section 80 of this example is not provided with a gate trench section 40.

[0052] The gate trench section 40 of this example may have two straight portions 39 (portions of the trench that are linear along the extending direction) extending along the extending direction perpendicular to the array direction, and a tip portion 41 connecting the two straight portions 39. The extending direction in FIG. 2 is the Y-axis direction.

[0053] At least a part of the tip portion 41 is preferably provided in a curved shape in a top view. By connecting the ends of the two linear portions 39 in the Y-axis direction with the tip portion 41, the electric field concentration at the ends of the linear portion 39 can be alleviated.

[0054] In the transistor portion 70, the dummy trench portion 30 is provided between the respective linear portions 39 of the gate trench portion 40. One dummy trench portion 30 may be provided between the respective linear portions 39, or a plurality of dummy trench portions 30 may be provided. The dummy trench portion 30 may have a linear shape extending in the extending direction, and may have a linear portion 29 and a tip portion 31 similar to the gate trench portion 40. The semiconductor device 100 shown in FIG. 2 includes both a linear dummy trench portion 30 having no tip portion 31 and a dummy trench portion 30 having a tip portion 31. The direction in which the linear portion 39 of the gate trench portion 40 or the linear portion 29 of the dummy trench portion 30 extends long in the extending direction is defined as the longitudinal direction of the trench portion. The longitudinal direction of the gate trench portion 40 or the dummy trench portion 30 may coincide with the extending direction. In this example, the extending direction and the longitudinal direction are the Y-axis direction. The arrangement direction in which a plurality of gate trench portions 40 or dummy trench portions 30 are arranged is defined as the short-side direction of the trench portion. The short-side direction may coincide with the arrangement direction. Also, the short-side direction may be perpendicular to the longitudinal direction. In this example, the longitudinal direction and the short-side direction are perpendicular. In this example, the arrangement direction and the short-side direction are the X-axis direction.

[0055] The diffusion depth of the well region 11 may be deeper than the depths of the gate trench portion 40 and the dummy trench portion 30. The ends of the gate trench portion 40 and the dummy trench portion 30 in the Y-axis direction are provided in the well region 11 in a top view. That is, at the ends of each trench portion in the Y-axis direction, the bottom in the depth direction of each trench portion is covered by the well region 11. Thereby, the electric field concentration at the bottom of each trench portion can be alleviated.

[0056] In the array direction, mesa portions are provided between the respective trench portions. The mesa portion refers to a region sandwiched by the trench portions inside the semiconductor substrate 10. As an example, the upper end of the mesa portion is the upper surface of the semiconductor substrate 10. The depth position of the lower end of the mesa portion is the same as the depth position of the lower end of the trench portion. The mesa portion in this example is provided so as to extend in the extending direction (Y-axis direction) along the trench portion on the upper surface of the semiconductor substrate 10. In this example, a mesa portion 60 is provided in the transistor portion 70, and a mesa portion 61 is provided in the diode portion 80. When simply referred to as a mesa portion in this specification, it refers to each of the mesa portion 60 and the mesa portion 61.

[0057] A base region 14 is provided in each mesa portion. Among the base regions 14 exposed on the upper surface of the semiconductor substrate 10 in the mesa portion, the region closest to the active side gate wiring 131 is defined as the base region 14-e. In FIG. 2, the base region 14-e disposed at one end in the extending direction of each mesa portion is shown, but the base region 14-e is also disposed at the other end of each mesa portion. In each mesa portion, at least one of an emitter region 12 of a first conductivity type and a contact region 15 of a second conductivity type may be provided in a region sandwiched by the base region 14-e in a top view. The emitter region 12 in this example is of N+ type, and the contact region 15 is of P+ type. The emitter region 12 and the contact region 15 may be provided between the base region 14 and the upper surface of the semiconductor substrate 10 in the depth direction.

[0058] The mesa portion 60 of the transistor portion 70 has an emitter region 12 exposed on the upper surface of the semiconductor substrate 10. The emitter region 12 is provided in contact with the gate trench portion 40. The mesa portion 60 in contact with the gate trench portion 40 may be provided with a contact region 15 exposed on the upper surface of the semiconductor substrate 10.

[0059] Each of the contact region 15 and the emitter region 12 in the mesa portion 60 is provided from one trench portion in the X-axis direction to the other trench portion. As an example, the contact region 15 and the emitter region 12 of the mesa portion 60 are alternately arranged along the extending direction (Y-axis direction) of the trench portion.

[0060] In other examples, the contact region 15 and the emitter region 12 of the mesa portion 60 may be provided in a stripe shape along the extending direction (Y-axis direction) of the trench portion. For example, the emitter region 12 is provided in a region in contact with the trench portion, and the contact region 15 is provided in a region sandwiched by the emitter regions 12.

[0061] The emitter region 12 is not provided in the mesa portion 61 of the diode portion 80. The base region 14 and the contact region 15 may be provided on the upper surface of the mesa portion 61. The contact region 15 may be provided in contact with each of the base regions 14-e in a region sandwiched by the base regions 14-e on the upper surface of the mesa portion 61. The base region 14 may be provided in a region sandwiched by the contact regions 15 on the upper surface of the mesa portion 61. The base region 14 may be arranged in the entire region sandwiched by the contact regions 15.

[0062] A contact hole 54 is provided above each mesa portion. The contact hole 54 is arranged in a region sandwiched by the base regions 14-e. The contact hole 54 in this example is provided above each of the contact region 15, the base region 14, and the emitter region 12. The contact hole 54 is not provided in a region corresponding to the base region 14-e and the well region 11. The contact hole 54 may be arranged at the center in the arrangement direction (X-axis direction) of the mesa portion 60.

[0063] In the diode section 80, an N+-type cathode region 82 is provided in a region adjacent to the lower surface of the semiconductor substrate 10. On the lower surface of the semiconductor substrate 10, a P+-type collector region 22 may be provided in a region where the cathode region 82 is not provided. The cathode region 82 and the collector region 22 are provided between the lower surface 23 of the semiconductor substrate 10 and the buffer region 20. In FIG. 2, the boundary between the cathode region 82 and the collector region 22 is indicated by a dotted line.

[0064] The cathode region 82 is arranged away from the well region 11 in the Y-axis direction. Thereby, a distance between the P-type region (well region 11) having a relatively high doping concentration and formed to a deep position and the cathode region 82 is ensured, and the breakdown voltage can be improved. The end portion of the cathode region 82 in the Y-axis direction in this example is arranged farther from the well region 11 than the end portion of the contact hole 54 in the Y-axis direction. In other examples, the end portion of the cathode region 82 in the Y-axis direction may be arranged between the well region 11 and the contact hole 54.

[0065] FIG. 3 is a diagram showing an example of the b-b cross section in FIG. 2. The b-b cross section is an XZ plane passing through the emitter region 12 and the cathode region 82. The semiconductor device 100 in this example has, in the cross section, the semiconductor substrate 10, the interlayer insulating film 38, the emitter electrode 52, and the collector electrode 24. The semiconductor substrate 10 has an upper surface 21 and a lower surface 23. The upper surface 21 and the lower surface 23 are two main surfaces of the semiconductor substrate 10. In this specification, the orthogonal axes in a plane parallel to the upper surface 21 and the lower surface 23 are the X-axis and the Y-axis, and the axis perpendicular to the upper surface 21 and the lower surface 23 is the Z-axis.

[0066] The interlayer insulating film 38 is provided on the upper surface of the semiconductor substrate 10. The interlayer insulating film 38 is a film including at least one layer of an insulating film such as a silicate glass to which impurities such as boron or phosphorus are added, a thermal oxide film, and other insulating films. The contact hole 54 described in FIG. 2 is provided in the interlayer insulating film 38.

[0067] The emitter electrode 52 is provided above the interlayer insulating film 38. The emitter electrode 52 is in contact with the upper surface 21 of the semiconductor substrate 10 through the contact hole 54 of the interlayer insulating film 38. The collector electrode 24 is provided on the lower surface 23 of the semiconductor substrate 10. The emitter electrode 52 and the collector electrode 24 are formed of a metal material such as aluminum. In this specification, the direction (Z-axis direction) connecting the emitter electrode 52 and the collector electrode 24 is referred to as the depth direction.

[0068] The semiconductor substrate 10 has an N-type drift region 18. The drift region 18 is provided in each of the transistor portion 70 and the diode portion 80.

[0069] In the mesa portion 60 of the transistor portion 70, an N+-type emitter region 12 and a P-type base region 14 are provided in order from the upper surface 21 side of the semiconductor substrate 10. A drift region 18 is provided below the base region 14. An N+-type accumulation region 16 may be provided in the mesa portion 60. The accumulation region 16 is disposed between the base region 14 and the drift region 18.

[0070] The emitter region 12 is exposed on the upper surface 21 of the semiconductor substrate 10 and is provided in contact with the gate trench portion 40. The emitter region 12 may be in contact with the trench portions on both sides of the mesa portion 60. The emitter region 12 has a higher doping concentration than the drift region 18.

[0071] The base region 14 is provided below the emitter region 12. The base region 14 in this example is provided in contact with the emitter region 12. The base region 14 may be in contact with the trench portions on both sides of the mesa portion 60.

[0072] The storage region 16 is provided below the base region 14. The storage region 16 is an N+-type region with a doping concentration higher than that of the drift region 18. By providing the high-concentration storage region 16 between the drift region 18 and the base region 14, the carrier injection promotion effect (IE effect) can be enhanced and the on-voltage can be reduced. The storage region 16 may be provided so as to cover the entire lower surface of the base region 14 in each mesa portion 60.

[0073] In the mesa portion 61 of the diode portion 80, a P-type base region 14 is provided in contact with the upper surface 21 of the semiconductor substrate 10. A drift region 18 is provided below the base region 14. In the mesa portion 61, a storage region 16 may be provided below the base region 14.

[0074] In each of the transistor portion 70 and the diode portion 80, an N+-type buffer region 20 may be provided below the drift region 18. The doping concentration of the buffer region 20 is higher than that of the drift region 18. The buffer region 20 has a concentration peak 25 with a doping concentration higher than that of the drift region 18. The doping concentration of the concentration peak 25 refers to the doping concentration at the apex of the concentration peak 25. Also, the doping concentration of the drift region 18 may be the average value of the doping concentrations in a region where the doping concentration distribution is substantially flat. The region where the doping concentration distribution is substantially flat may be a region having a length in the depth direction of 10 μm or more and a doping concentration variation within ±10%. The buffer region 20 of this example has three or more concentration peaks 25 in the depth direction (Z-axis direction) of the semiconductor substrate 10. The concentration peaks 25 of the buffer region 20 may be provided at the same depth position as, for example, the concentration peaks of hydrogen (proton) or phosphorus. The buffer region 20 may function as a field stop layer that prevents the depletion layer extending from the lower end of the base region 14 from reaching the P+-type collector region 22 and the N+-type cathode region 82.

[0075] In the transistor section 70, a P+-type collector region 22 is provided below the buffer region 20. The acceptor concentration of the collector region 22 is higher than that of the base region 14. The collector region 22 may contain the same acceptor as the base region 14 or may contain a different acceptor. The acceptor of the collector region 22 is, for example, boron.

[0076] In the diode section 80, an N+-type cathode region 82 is provided below the buffer region 20. The donor concentration of the cathode region 82 is higher than that of the drift region 18. The donor of the cathode region 82 is, for example, hydrogen or phosphorus. Note that the elements serving as donors and acceptors in each region are not limited to the above-described examples. The collector region 22 and the cathode region 82 are exposed on the lower surface 23 of the semiconductor substrate 10 and are connected to the collector electrode 24. The collector electrode 24 may be in contact with the entire lower surface 23 of the semiconductor substrate 10. The emitter electrode 52 and the collector electrode 24 are formed of a metal material such as aluminum.

[0077] On the upper surface 21 side of the semiconductor substrate 10, one or more gate trench portions 40 and one or more dummy trench portions 30 are provided. Each trench portion penetrates from the upper surface 21 of the semiconductor substrate 10 through the base region 14 and reaches the drift region 18. In a region where at least any one of the emitter region 12, the contact region 15, and the accumulation region 16 is provided, each trench portion also penetrates these doping regions and reaches the drift region 18. The fact that the trench portion penetrates the doping region is not limited to the case where the trench portion is formed after the doping region is formed. Even in the case where the doping region is formed between the trench portions after the trench portions are formed, it is included in the case where the trench portion penetrates the doping region.

[0078] As described above, the transistor portion 70 is provided with the gate trench portion 40 and the dummy trench portion 30. The diode portion 80 is provided with the dummy trench portion 30 and is not provided with the gate trench portion 40. In this example, the boundary in the X-axis direction between the diode portion 80 and the transistor portion 70 is the boundary between the cathode region 82 and the collector region 22.

[0079] The gate trench portion 40 includes a gate trench provided on the upper surface 21 of the semiconductor substrate 10, a gate insulating film 42, and a gate conductive portion 44. The gate insulating film 42 is provided to cover the inner wall of the gate trench. The gate insulating film 42 may be formed by oxidizing or nitriding the semiconductor on the inner wall of the gate trench. The gate conductive portion 44 is provided inside the gate insulating film 42 within the gate trench. That is, the gate insulating film 42 insulates the gate conductive portion 44 from the semiconductor substrate 10. The gate conductive portion 44 is formed of a conductive material such as polysilicon.

[0080] The gate conductive portion 44 may be provided to be longer than the base region 14 in the depth direction. In the cross section, the gate trench portion 40 on the upper surface 21 of the semiconductor substrate 10 is covered with the interlayer insulating film 38. The gate conductive portion 44 is electrically connected to the gate wiring. When a predetermined gate voltage is applied to the gate conductive portion 44, a channel formed by an electron inversion layer is formed in the surface layer of the interface of the base region 14 that contacts the gate trench portion 40.

[0081] The dummy trench portion 30 may have the same structure as the gate trench portion 40 in the cross section. The dummy trench portion 30 has a dummy trench provided on the upper surface 21 of the semiconductor substrate 10, a dummy insulating film 32, and a dummy conductive portion 34. The dummy conductive portion 34 is electrically connected to the emitter electrode 52. The dummy insulating film 32 is provided to cover the inner wall of the dummy trench. The dummy conductive portion 34 is provided inside the dummy trench and is provided inside the dummy insulating film 32. The dummy insulating film 32 insulates the dummy conductive portion 34 from the semiconductor substrate 10. The dummy conductive portion 34 may be formed of the same material as the gate conductive portion 44. For example, the dummy conductive portion 34 is formed of a conductive material such as polysilicon. The dummy conductive portion 34 may have the same length as the gate conductive portion 44 in the depth direction.

[0082] In this example, the gate trench portion 40 and the dummy trench portion 30 are covered by the interlayer insulating film 38 on the upper surface 21 of the semiconductor substrate 10. Note that the bottoms of the dummy trench portion 30 and the gate trench portion 40 may be a convex curved surface (curved in the cross section) on the lower side.

[0083] In the semiconductor substrate 10 of this example, bulk donors of the first conductivity type (N-type) are distributed throughout. The bulk donors are donors by dopants contained substantially uniformly in the ingot during the production of the ingot that is the source of the semiconductor substrate 10. The bulk donors in this example are elements other than hydrogen. The dopants of the bulk donors are, for example, phosphorus, antimony, arsenic, selenium, sulfur, but are not limited thereto. The bulk donors in this example are phosphorus. The bulk donors are also included in the P-type regions. The semiconductor substrate 10 may be a wafer cut out from a semiconductor ingot, or may be a chip obtained by singulating the wafer. The semiconductor ingot may be manufactured by any of the Czochralski method (CZ method), the magnetic field applied Czochralski method (MCZ method), and the float zone method (FZ method). The ingot in this example is manufactured by the MCZ method. The bulk donor concentration may use the chemical concentration of the bulk donors distributed throughout the semiconductor substrate 10, and may be a value between 90% and 100% of the chemical concentration.

[0084] In the active part 160, the semiconductor substrate 10 has a first high-concentration region 106 that contains hydrogen and has a donor concentration higher than the bulk donor concentration. The first high-concentration region 106 can be formed by irradiating hydrogen toward the hydrogen implantation region 140 from the lower surface 23 of the semiconductor substrate 10 and performing heat treatment.

[0085] In the region through which the hydrogen ions implanted from the lower surface 23 pass, lattice defects mainly composed of vacancies such as single-atom vacancies (V) and multi-atom vacancies (VV) are formed. The atoms adjacent to the vacancies have dangling bonds. The lattice defects include interstitial atoms, dislocations, etc., and may also include donors and acceptors in a broad sense, but in this specification, the lattice defects mainly composed of vacancies may be referred to as vacancy-type lattice defects, vacancy-type defects, or simply lattice defects. Also, due to the formation of many lattice defects by hydrogen ion implantation into the semiconductor substrate 10, the crystallinity of the semiconductor substrate 10 may be strongly disturbed. In this specification, this disturbance of crystallinity may be referred to as disorder. Further, as the hydrogen implanted into the hydrogen implantation region 140 and the buffer region 20 diffuses into the passing region, the vacancies (V), oxygen (O), and hydrogen (H) existing in the passing region combine to form VOH defects. The VOH defects function as donors that supply electrons.

[0086] The formation of VOH defects increases the doping concentration in the hydrogen passing region. In this example, the doping concentration in the region from the lower surface 23 to the hydrogen implantation region 140 increases. Therefore, a first high-concentration region 106 with a concentration higher than the bulk donor concentration is formed in the hydrogen passing region.

[0087] The first high-concentration region 106 may be provided over the entire active portion 160 in a top view. The first high-concentration region 106 may be provided in a part of the drift region 18 on the lower surface 23 side. The first high-concentration region 106 may be in contact with the buffer region 20. When the buffer region 20 is not provided, the first high-concentration region 106 may be in contact with the collector region 22 and may be in contact with the cathode region 82. The doping concentration of the first high-concentration region 106 is lower than any peak value of the doping concentrations in the cathode region 82, the collector region 22, and the buffer region 20. In this example, the donor concentration due to the VOH defect is sufficiently lower than the doping concentrations in the buffer region 20, the cathode region 82, and the collector region 22. Therefore, in the example of FIG. 3, it is considered that the first high-concentration region 106 is not provided in the buffer region 20, the cathode region 82, and the collector region 22.

[0088] In this specification, a region where the doping concentration is the bulk donor concentration is defined as the low-concentration region 19. In the example of FIG. 3, among the regions between the buffer region 20 and the accumulation region 16, the drift region 18 remaining without the formation of the first high-concentration region 106 is the low-concentration region 19.

[0089] The hydrogen implantation region 140 may be provided on the upper surface 21 side of the semiconductor substrate 10. The upper surface 21 side refers to the region between the upper surface 21 and the center in the depth direction of the semiconductor substrate 10. Thereby, the first high-concentration region 106 can be formed over a wide region on the upper surface 21 side of the semiconductor substrate 10 from the upper end of the buffer region 20. Therefore, the doping concentration can be adjusted over a wide region.

[0090] Generally, a semiconductor substrate 10 having a bulk donor concentration Db should be prepared in accordance with the characteristics of the elements to be formed on the semiconductor substrate 10, particularly the rated voltage or breakdown voltage. On the other hand, according to the semiconductor device 100, by controlling the dose amount and implantation depth of hydrogen ions, the donor concentration and range of the first high-concentration region 106 can be made partially higher than the bulk donor concentration Db. Therefore, even if semiconductor substrates 10 having different bulk donor concentrations Db are used, elements with predetermined rated voltage or breakdown voltage characteristics can be formed. Also, although the variation in donor concentration during the manufacture of the semiconductor substrate 10 is relatively large, the dose amount of hydrogen ions can be controlled with relatively high precision. For this reason, the concentration of vacancies (V) generated by irradiating with hydrogen ions can also be controlled with high precision, and the donor concentration of the first high-concentration region 106 can be controlled with high precision.

[0091] Also, the hydrogen implantation region 140 is preferably disposed closer to the lower surface 23 side of the semiconductor substrate 10 than the lower end of the gate trench portion 40. That is, it is preferable to irradiate hydrogen ions from the lower surface 23 within a range that does not reach the gate trench portion 40. Thereby, since hydrogen ions do not pass through the gate insulating film 42, deterioration of the gate insulating film 42 can be suppressed.

[0092] The hydrogen chemical concentration distribution in the depth direction of the semiconductor substrate 10 has a first hydrogen concentration peak 141 in the hydrogen implantation region 140. In FIG. 3, the depth position of the first hydrogen concentration peak 141 is schematically indicated by a cross mark.

[0093] The distance L1 in the Z-axis direction between the first hydrogen concentration peak 141 and the lower end of the gate trench portion 40 is preferably such that even if there is variation in the range of hydrogen during irradiation, hydrogen does not irradiate the gate trench portion 40. The distance L1 may be 3 times or more, 5 times or more, or even 10 times or more the standard deviation σ of the first hydrogen concentration peak 141 in the hydrogen chemical concentration distribution in the depth direction. However, when it is desired to widely form the first high-concentration region 106, the distance L1 is preferably small. The distance L1 may be 20 times or less, or even 10 times or less the above-described standard deviation.

[0094] FIG. 4 is a diagram showing an example of the c-c cross section in FIG. 1. The c-c cross section is an XZ plane including the edge termination structure portion 90 and the transistor portion 70. In this example, a boundary portion 72 is provided between the edge termination structure portion 90 and the transistor portion 70. The structure of the transistor portion 70 is the same as that of the transistor portion 70 described in FIGS. 2 and 3.

[0095] The boundary portion 72 has an outer peripheral gate wiring 130 and a well region 11. The well region 11 is a P+-type region having a higher doping concentration than the base region 14. The well region 11 is provided from the upper surface 21 of the semiconductor substrate 10 to a position deeper than the lower end of the trench portion. By providing the well region 11, it becomes easier to separate the active portion 160 and the edge termination structure portion 90. The region surrounded by the well region 11 in top view may be defined as the active portion 160. One or more trench portions may be provided inside the well region 11. By providing the trench portion arranged at the outermost end among the plurality of trench portions inside the well region 11, the electric field concentration in the trench portion can be alleviated.

[0096] An outer peripheral gate wiring 130 is provided above the well region 11. The outer peripheral gate wiring 130 in this example includes a gate metal layer 50 formed of a metal such as aluminum and a gate runner 48 formed of a semiconductor such as polysilicon doped with impurities. The gate runner 48 is disposed above the well region 11 with the interlayer insulating film 38 interposed therebetween. The gate metal layer 50 is disposed above the gate runner 48 with the interlayer insulating film 38 interposed therebetween. The gate metal layer 50 and the gate runner 48 are connected by a through hole provided in the interlayer insulating film 38.

[0097] The edge termination structure portion 90 is provided with a plurality of guard rings 92, a plurality of field plates 94, and a channel stopper 174. In the edge termination structure portion 90, a collector region 22 may be provided in a region in contact with the lower surface 23. Further, a buffer region 20 is provided in the collector region 22. The buffer region 20 has one or more hydrogen chemical concentration peaks.

[0098] Each guard ring 92 may be provided so as to surround the active portion 160 on the upper surface 21. The plurality of guard rings 92 may have a function of expanding the depletion layer generated in the active portion 160 to the outside of the semiconductor substrate 10. Thereby, the electric field concentration inside the semiconductor substrate 10 can be prevented, and the breakdown voltage of the semiconductor device 100 can be improved.

[0099] The guard ring 92 in this example is a P+-type semiconductor region formed by ion irradiation in the vicinity of the upper surface 21. The depth of the bottom of the guard ring 92 may be deeper than the depths of the bottoms of the gate trench portion 40 and the dummy trench portion 30.

[0100] The upper surface of the guard ring 92 is covered with the interlayer insulating film 38. The field plate 94 is formed of a conductive material such as metal or polysilicon. The field plate 94 may be formed of the same material as the gate metal layer 50 or the emitter electrode 52. The field plate 94 is provided on the interlayer insulating film 38. The field plate 94 is connected to the guard ring 92 through a through hole provided in the interlayer insulating film 38.

[0101] The channel stopper 174 is provided so as to be exposed on the upper surface 21 and the side surface at the end side 102. The channel stopper 174 is an N-type region having a higher doping concentration than the drift region 18. The channel stopper 174 has a function of terminating the depletion layer generated in the active portion 160 at the end side 102 of the semiconductor substrate 10.

[0102] The semiconductor substrate 10 has a second high-concentration region 107 containing hydrogen and having a donor concentration higher than the bulk donor concentration in the edge termination structure portion 90. The second high-concentration region 107 is provided in a wider range than the first high-concentration region 106 in the depth direction of the semiconductor substrate 10.

[0103] The second high-concentration region 107 can be formed by irradiating hydrogen ions from the lower surface 23 of the semiconductor substrate 10 and performing heat treatment. The second high-concentration region 107 may be formed by irradiating hydrogen ions so as to penetrate the semiconductor substrate 10, or may be formed by injecting hydrogen ions at a position closer to the upper surface 21 than the hydrogen implantation region 140 in the active portion 160. Thereby, in the Z-axis direction, the second high-concentration region 107 can be formed in a wider range than the first high-concentration region 106. In the example of FIG. 4, the second high-concentration region 107 is formed by irradiating hydrogen ions so as to penetrate the semiconductor substrate 10. Therefore, the second high-concentration region 107 in the example of FIG. 4 does not have a concentration peak in the hydrogen chemical concentration distribution in the depth direction.

[0104] By widely forming the second high-concentration region 107 in the Z-axis direction, in the edge termination structure portion 90, the region with high resistivity can be reduced. Therefore, even if the length of the edge termination structure portion 90 in the X-axis direction is reduced, it becomes easier to ensure the breakdown voltage of the semiconductor device 100.

[0105] The second high-concentration region 107 may be in contact with the upper surface 21 of the semiconductor substrate 10. The second high-concentration region 107 in this example is provided from the upper end of the buffer region 20 to the upper surface 21 of the semiconductor substrate 10. The edge termination structure portion 90 may not be provided with a low-concentration region 19. The second high-concentration region 107 is also provided between the well region 11 and the guard ring 92, between two guard rings 92, and between the guard ring 92 and the channel stopper 174.

[0106] The doping concentration in the second highest concentration region 107 is lower than any peak value of the doping concentrations in the guard ring 92, the channel stopper 174, and the buffer region 20. For this reason, in the example of FIG. 4, in the guard ring 92, the channel stopper 174, and the buffer region 20, it is considered that the second highest concentration region 107 is not provided.

[0107] The second highest concentration region 107 may be provided over the entire edge termination structure portion 90 in a top view. The edge termination structure portion 90 in this example is a region from the end position Xw of the well region 11 to the end side 102 of the semiconductor substrate 10 on the upper surface 21 of the semiconductor substrate 10.

[0108] In the X-axis direction, the first highest concentration region 106 and the second highest concentration region 107 may be in contact with each other. The boundary position Xb in the X-axis direction between the first highest concentration region 106 and the second highest concentration region 107 may be arranged on the active portion 160 side rather than the end position Xw of the well region 11. The boundary position Xb may overlap the well region 11 in the Z-axis direction.

[0109] The distance L2 in the X-axis direction between the boundary position Xb and the gate trench portion 40 arranged at the most end in the X-axis direction is preferably such that hydrogen irradiated to form the second highest concentration region 107 is prevented from passing through the gate insulating film 42. The gate trench portion 40 is arranged closest to the second highest concentration region 107 in the X-axis direction. The distance L2 may be 3 times or more, 5 times or more, or even 10 times or more the standard deviation σ of the first hydrogen concentration peak 141 in the hydrogen chemical concentration distribution in the depth direction. The distance L2 may be larger than the distance L1. The distance L2 may be half or more of the width of the well region 11 in the X-axis direction.

[0110] FIG. 5 is a diagram showing an example of the hydrogen chemical concentration distribution in the depth direction in the vicinity of the hydrogen implantation region 140. As described above, in the hydrogen implantation region 140, the hydrogen chemical concentration distribution has a first hydrogen concentration peak 141. The first hydrogen concentration peak 141 is a region where the hydrogen chemical concentration shows a maximum value D3.

[0111] The standard deviation σ of the first hydrogen concentration peak 141 described above is the standard deviation in the mountain-shaped concentration distribution including the maximum value D3. By making the distances L1 and L2 sufficiently large with respect to the standard deviation σ, it is possible to suppress hydrogen ions from passing through the gate insulating film 42.

[0112] Note that the hydrogen chemical concentration distribution has a skirt S1 on the lower surface 23 side and a skirt S2 on the upper surface 21 side with respect to the first hydrogen concentration peak 141. In this example, hydrogen is irradiated from the lower surface 23 side. For this reason, the slope of the skirt S1 may be smaller than that of the skirt S2. That is, the hydrogen chemical concentration of the skirt S2 may vary more steeply than that of the skirt S1. By comparing the skirts on both sides of the first hydrogen concentration peak 141, it may be possible to determine from which side of the lower surface 23 and the upper surface 21 hydrogen was irradiated.

[0113] FIG. 6 is a diagram showing an example of the doping concentration distribution in the X-axis direction. FIG. 6 shows the distribution from the low-concentration region 19 to the second high-concentration region 107. As shown in FIG. 4, the boundary position Xb between the low-concentration region 19 and the second high-concentration region 107 can be regarded as the boundary position Xb between the first high-concentration region 106 and the second high-concentration region 107.

[0114] The doping concentration changes from the doping concentration Db of the low-concentration region 19 to the doping concentration D2 of the second high-concentration region 107 in the vicinity of the boundary position Xb. The boundary position Xb may be a position where the doping concentration becomes a concentration Dc that is intermediate between D2 and Db.

[0115] FIG. 7 is a diagram showing an example of the doping concentration distribution along lines e-e and f-f in FIG. 4. Line e-e is a line in the Z-axis direction passing through the emitter region 12 in the transistor section 70. Line f-f is a line in the Z-axis direction passing between the well region 11 and the guard ring 92 in the edge termination structure section 90. Line e-e passes through the first high-concentration region 106, and line f-f passes through the second high-concentration region 107. In addition, FIG. 7 also shows the hydrogen chemical concentration distribution in the vicinity of the depth position Z1. The depth position Z1 is the depth position of the first hydrogen concentration peak 141 of the hydrogen chemical concentration distribution in the first high-concentration region 106.

[0116] The buffer region 20 in this example has a plurality of concentration peaks 25-1, 25-2, 25-3, 25-4 in the doping concentration distribution. Each concentration peak 25 is formed by implanting hydrogen ions, but in FIG. 7, the peak of the hydrogen chemical concentration distribution corresponding to the concentration peak 25 is omitted.

[0117] The first hydrogen concentration peak 141 of the hydrogen chemical concentration distribution in the first high-concentration region 106 is arranged between the central Zc in the depth direction of the semiconductor substrate 10 and the accumulation region 16. On the other hand, in the second high-concentration region 107, no peak of the hydrogen chemical concentration is provided at the depth position Z1. The hydrogen chemical concentration distribution in the depth direction of the second high-concentration region 107 may be flat or may be linear with a slight slope. That the hydrogen chemical concentration distribution is flat may mean that the fluctuation range of the hydrogen chemical concentration is within ±50% over the entire depth direction of the second high-concentration region 107.

[0118] In the edge termination structure portion 90, the hydrogen chemical concentration Dh2 at the depth position Z1 that is the same as that of the first hydrogen concentration peak 141 may be lower than the hydrogen chemical concentration Dh1 at the first hydrogen concentration peak 141. For example, with the same hydrogen dose amount, hydrogen is irradiated toward the depth position Z1 in the active portion 160, and hydrogen is irradiated so as to penetrate the semiconductor substrate 10 in the edge termination structure portion 90. In this case, the hydrogen chemical concentration at the depth position Z1 is higher in the active portion 160 than in the edge termination structure portion 90. On the other hand, the hydrogen chemical concentration in the region on the upper surface 21 side than the depth position Z1 may be higher in the edge termination structure portion 90 than in the active portion 160. Also, the hydrogen chemical concentration in the region on the lower surface 23 side than the depth position Z1 may be equivalent between the edge termination structure portion 90 and the active portion 160. The hydrogen chemical concentrations being equivalent may mean that the difference in the hydrogen chemical concentration at the same depth position is within ±50%.

[0119] Further, at the depth position Z1 of the first hydrogen concentration peak 141, the doping concentration distribution of the first high-concentration region 106 may have a first doping concentration peak 108. The first doping concentration peak 108 may have a skirt S3 on the lower surface 23 side and a skirt S4 on the upper surface 21 side. Similar to the first hydrogen concentration peak 141, the skirt S3 may be gentler than the skirt S4.

[0120] The doping concentration Dp1 (or donor concentration) of the first high-concentration region 106 at the depth position Z1 is 1.0×10 13 / cm 3 or more and 2.0×10 14 / cm 3 or less. Also, the doping concentration D1 (or donor concentration) of the first high-concentration region 106 on the lower surface 23 side than the depth position Z1 is also 1.0×10 13 / cm 3 or more and 2.0×10 14 / cm 3 or less. The doping concentration Dp1 may be 3 times or more and 7 times or less the doping concentration D1. With such a configuration, the doping concentration of the first high-concentration region 106 can be made sufficiently higher than the bulk donor concentration Db, and the doping concentration of the drift region 18 can be accurately controlled.

[0121] In the depth range corresponding to the drift region 18, the variation width of the doping concentration distribution in the second high-concentration region 107 is smaller than the variation width of the doping concentration distribution in the active portion 160. The doping concentration in the second high-concentration region 107 may be flat. That the doping concentration is flat may refer to that the variation width of the doping concentration is within ±50% over the entire depth direction of the second high-concentration region 107. As an example, the doping concentration of the second high-concentration region 107 is 7.0×10 13 / cm 3 or more and 8.0×10 13 / cm 3 or less.

[0122] Also, the doping concentration of the edge termination structure portion 90 may be higher than the bulk donor concentration Db over the entire depth direction of the semiconductor substrate 10. However, at the boundary between the P-type region and the N-type region, the net value of the doping concentration becomes smaller than the bulk donor concentration Db.

[0123] In the region on the lower surface 23 side than the depth position Z1, the doping concentration D1 (donor concentration) of the first high-concentration region 106 and the doping concentration D2 (donor concentration) of the second high-concentration region 107 may be the same. That the doping concentrations are the same may allow an error within ±10%. Also, in the region on the upper surface 21 side than the depth position Z1, the doping concentration D2 of the second high-concentration region 107 is higher than the doping concentration Db of the low-concentration region 19 of the active portion 160.

[0124] FIG. 8 is a diagram showing an example of the doping concentration distribution on the g-g line in FIG. 4. The g-g line passes through the guard ring 92 in the edge termination structure portion 90. The second high-concentration region 107 in this example is provided between the buffer region 20 and the guard ring 92. Although VOH defects are also formed in the guard ring 92, since the doping concentration of the guard ring 92 is high, even if VOH defects are formed, the characteristics of the guard ring 92 are hardly affected.

[0125] FIG. 9 is a diagram showing another example of the doping concentration distribution and the hydrogen chemical concentration distribution along the f-f line in FIG. 4. In the second high-concentration region 107 of this example, a second hydrogen concentration peak 142 is present near the upper surface 21. The depth position Z2 of the second hydrogen concentration peak 142 is arranged closer to the upper surface 21 than the depth position Z1 of the first hydrogen concentration peak 141. The second hydrogen concentration peak 142 may be arranged closer to the upper surface 21 than the depth position of the lower end of the trench portion, may be arranged closer to the upper surface 21 than the depth position of the accumulation region 16, and may be arranged closer to the upper surface 21 than the depth position of the base region 14.

[0126] Even with such a configuration, the second high-concentration region 107 can be provided in a wider range in the depth direction than the first high-concentration region 106. The doping concentration distribution of the second high-concentration region 107 may have a second doping concentration peak 109 at the depth position Z2. Also in this example, the doping concentration may be higher than the bulk donor concentration throughout the second high-concentration region 107.

[0127] FIG. 10 is a diagram for explaining an example of the process of irradiating the semiconductor substrate 10 with hydrogen ions. In this example, hydrogen ions are simultaneously irradiated to both the active portion 160 and the edge termination structure portion 90. Thereby, the irradiation cost of hydrogen ions is reduced.

[0128] First, on the lower surface 23 of the semiconductor substrate 10, a shielding portion 200 is selectively formed in the region where the active portion 160 is provided. The shielding portion 200 may also be provided on at least a part of the boundary portion 72. The shielding portion 200 is, for example, a photosensitive photoresist. Among the lower surface 23 of the semiconductor substrate 10, the region where the second high-concentration region 107 is formed is exposed without being covered by the shielding portion 200.

[0129] Next, the entire lower surface 23 of the semiconductor substrate 10 is irradiated with hydrogen ions such as protons. At this time, the hydrogen ions penetrate the semiconductor substrate 10 in the region not covered by the shielding portion 200, and the hydrogen ions are accelerated at an acceleration energy at which the hydrogen ions do not penetrate the semiconductor substrate 10 in the region covered by the shielding portion 200. As a result, hydrogen is implanted into the hydrogen implantation region 140 in the active portion 160 covered by the shielding portion 200. By adjusting the thickness of the shielding portion 200, the depth position of the hydrogen implantation region 140 can be adjusted. Through such a process, the first high-concentration region 106 and the second high-concentration region 107 can be formed by the same hydrogen ion irradiation process.

[0130] FIG. 11 is a diagram showing an example of a method for manufacturing the semiconductor device 100. In this example, in step S1100, the upper surface structure of the semiconductor device 100 is formed. This refers to the structure provided on the upper surface 21 side of the semiconductor substrate 10 and includes, for example, a trench portion, an emitter region 12, a base region 14, a storage region 16, an interlayer insulating film 38, an emitter electrode 52, a gate wiring, and the like.

[0131] Next, in step S1102, the lower surface 23 side of the semiconductor substrate 10 is ground to adjust the thickness of the semiconductor substrate 10. Next, in the process of step S1104, the lower surface structure of the semiconductor substrate 10 is formed. In this example, in step S1104, dopants are implanted into the cathode region 82 and the collector region 22, and the cathode region 82 and the collector region 22 are formed by locally performing laser annealing in step S1106.

[0132] Next, in step S1108, a shielding portion 200 is selectively formed on the lower surface 23 side of the semiconductor substrate 10. After forming the shielding portion 200, in step S1110, hydrogen ions are irradiated from the lower surface 23 side. In step S1112, the shielding portion 200 is removed. After removing the shielding portion 200, hydrogen ions are implanted into the buffer region 20. Next, in step S1116, the semiconductor substrate 10 is heat-treated. In step S1116, the entire semiconductor substrate 10 may be heat-treated by an annealing furnace. As a result, hydrogen diffuses, and a first high-concentration region 106, a second high-concentration region 107, and a buffer region 20 are formed. Next, a collector electrode 24 is formed on the lower surface 23. Thereby, the semiconductor device 100 can be manufactured.

[0133] As described above, the present invention has been described using embodiments. However, the technical scope of the present invention is not limited to the scope described in the above embodiments. It is obvious to those skilled in the art that various changes or improvements can be made to the above embodiments. It is clear from the description of the claims that forms with such changes or improvements can also be included in the technical scope of the present invention.

[0134] It should be noted that the execution order of each process such as operations, procedures, steps, and stages in the apparatus, system, program, and method shown in the claims, the specification, and the drawings is not explicitly stated as "before" or "preceding" etc., and can be realized in any order unless the output of the previous process is used in the subsequent process. Regarding the operation flow in the claims, the specification, and the drawings, even if it is described using "first," "next," etc. for convenience, it does not mean that it must be implemented in this order.

Explanation of Reference Numerals

[0135] 10... semiconductor substrate, 11... well region, 12... emitter region, 14... base region, 15... contact region, 16... accumulation region, 18... drift region, 19... low-concentration region, 20... buffer region, 21... upper surface, 22... collector region, 23... lower surface, 24... collector electrode, 25... peak, 29... straight portion, 30... dummy trench portion, 31... tip portion, 32... dummy insulating film, 34... dummy conductive portion, 38... interlayer insulating film, 39... straight portion, 40... gate trench portion, 41... tip portion, 42... gate insulating film, 44... gate conductive portion, 48... gate runner, 50... gate metal layer, 52... emitter electrode, 54... contact hole, 60, 61... mesa portion, 70... transistor portion, 72... boundary portion, 80... diode portion, 81... extension region, 82... cathode region, 90... edge termination structure portion, 92... guard ring, 94... field plate, 100... semiconductor device, 102... side edge, 106... first high-concentration region, 107... second high-concentration region, 108... first doping concentration peak, 109... second doping concentration peak, 112... gate pad, 130... outer peripheral gate wiring, 131... active side gate wiring, 140... hydrogen implantation region, 141... first hydrogen concentration peak, 142... second hydrogen concentration peak, 160... active portion, 174... channel stopper, 200... shielding portion

Claims

1. A semiconductor device including a semiconductor substrate, a second conductivity type base region provided on an upper surface side of the semiconductor substrate; a first conductivity type low concentration region provided below the base region; an accumulation region of a first conductivity type provided between the base region and the low concentration region; an edge termination structure in which a high concentration region of a first conductivity type having a doping concentration higher than that of the low concentration region is selectively exposed on an upper surface of the semiconductor substrate; A semiconductor device comprising:

2. The low concentration region has a doping concentration equal to a bulk donor concentration. The semiconductor device according to claim 1 .

3. The doping concentration of the accumulation region is higher than that of the high concentration region.

3. The semiconductor device according to claim 1 or 2.

4. A buffer region as a field stop layer provided below the low concentration region; a collector region of a second conductivity type provided between the lower surface of the semiconductor substrate and the buffer region; Equipped with The doping concentration of the high concentration region is lower than the peak value of the doping concentration in the buffer region. The semiconductor device according to claim 1 .

5. The high concentration region is provided from an upper end of the buffer region to an upper surface of the semiconductor substrate. The semiconductor device according to claim 4.

6. The edge termination structure includes a channel stopper exposed on an upper surface and a side surface at an edge of the semiconductor substrate, and a plurality of second conductivity type guard rings provided inward of the channel stopper in a top view, The high concentration region is provided between the two guard rings. The semiconductor device according to claim 1 .

7. The high concentration region is also provided between the channel stopper and the guard ring. The semiconductor device according to claim 6.

8. The doping concentration of the high concentration region is lower than the peak values ​​of the doping concentrations of the guard ring and the channel stopper. The semiconductor device according to claim 7.

9. A trench portion penetrating the base region; a well region of a second conductivity type that is provided deeper than the trench portion and has a doping concentration higher than that of the base region; Equipped with The well region is located between the accumulation region and the high concentration region in the arrangement direction of the trench portions. The semiconductor device according to claim 1 .

10. A side surface of the high concentration region is in contact with the well region and the low concentration region. The semiconductor device according to claim 9.

11. The high concentration region has a doping concentration fluctuation range of within ±50% throughout the entire region in the depth direction. The semiconductor device according to claim 1 .

12. The high concentration region contains hydrogen. The semiconductor device according to claim 1 .

13. Further comprising an active portion provided on the semiconductor substrate, the active portion includes the base region, the low concentration region and the accumulation region, The edge termination structure is disposed outside the accumulation region in a top view and is provided between the active portion and an edge of the semiconductor substrate. The semiconductor device according to claim 1 .

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