Semiconductor device and method of manufacturing the same

Abstract

Provided is a semiconductor device comprising: a first conductivity type drift region provided on a semiconductor substrate having a front surface and a reverse surface; and a first conductivity type or second conductivity type reverse-surface-side region that is provided further to the reverse surface side of the semiconductor substrate than the drift region in the semiconductor substrate and has a higher atomic density than the drift region. The distribution of the atomic density in the rear-surface-side region includes: a gentle gradient region in which the atomic density of a dopant increases from the reverse surface side toward the front surface side of the semiconductor substrate in the depth direction of the semiconductor substrate; a steep gradient region that is provided further to the front surface side than the gentle gradient region and in which the atomic density of the dopant increases by a greater gradient of the atomic density than in the gentle gradient region; a peak region that is provided further to the front surface side than the steep gradient region and includes a peak in the distribution of the atomic density of the dopant; and a decreasing region that is provided between the peak region and the drift region and in which the atomic density of the dopant decreases toward the drift region in the depth direction of the semiconductor substrate.

Description

Technical Field

[0001] The present invention relates to a semiconductor device and a method for manufacturing the same.

Background Art

[0002] Patent Document 1 describes that "the n-type impurity concentration gradually increases toward the deeper side from the lower surface 12b of the semiconductor substrate 12 and reaches a maximum value N1". Non-Patent Document 1 describes forming a BOX profile on the back surface. [Prior Art Documents] [Patent Documents] Patent Document 1 Japanese Patent Application Laid-Open No. 2015-153788 Patent Document 2 Japanese Patent Application Laid-Open No. 2016-004956 [Non-Patent Documents] Non-Patent Document 1 Kiyono et al., "Development of a Top-Flat Beam Hybrid Laser Annealing Apparatus for Deep Activation of Power Semiconductor IGBTs", Japan Steel Works Technical Report No. 69, p. 76-81 (November 2018)

[0003] It is preferable to improve the electrical characteristics of the semiconductor device. General Disclosure

[0004] In a first aspect of the present invention, there is provided a semiconductor device including a drift region of a first conductivity type provided on a semiconductor substrate having a front surface and a back surface, and a back surface side region of the first conductivity type or the second conductivity type provided on the back surface side of the semiconductor substrate with respect to the drift region and having a higher atomic density than the drift region. The atomic density distribution of the back surface side region may include a gentle gradient region in which the atomic density of the dopant increases from the back surface side toward the front surface side of the semiconductor substrate in the depth direction of the semiconductor substrate, a steep gradient region provided on the front surface side with respect to the gentle gradient region and having a larger atomic density gradient of the dopant than the gentle gradient region, a peak region provided on the front surface side with respect to the steep gradient region and having a peak in the atomic density distribution of the dopant, and a decreasing region provided between the peak region and the drift region and in which the atomic density of the dopant decreases toward the drift region in the depth direction of the semiconductor substrate.

[0005] In the semiconductor device, the depth from the back surface of the semiconductor substrate to the peak of the atomic density distribution may be 0.8 μm or less.

[0006] In any of the above semiconductor devices, the average atomic density in the gentle gradient region may be 20% or more and 95% or less of the peak atomic density of the peak of the atomic density distribution.

[0007] Any of the above semiconductor devices may include an edge termination structure portion provided on the front surface of the semiconductor substrate.

[0008] In any of the above semiconductor devices, the upper end of the gentle gradient region may be at an intermediate position between the back surface and the depth position of the peak of the peak region in the depth direction of the semiconductor substrate.

[0009] In any of the above semiconductor devices, the lower end of the gentle gradient region may be the back surface of the semiconductor substrate.

[0010] In any of the above semiconductor devices, the lower end of the peak region may be a position where the atomic density of the dopant at the peak is 95% of the density on the back side of the semiconductor substrate with respect to the peak. The upper end of the peak region may be a position where the atomic density of the dopant at the peak is 95% of the density on the front side of the semiconductor substrate with respect to the peak.

[0011] In any of the above semiconductor devices, the upper end of the decreasing region may be a position where the atomic density of the dopant at the peak is 10% of the density on the front side of the semiconductor substrate with respect to the peak.

[0012] In any of the above semiconductor devices, the upper end of the gentle gradient region may be in contact with the lower end of the steep gradient region. The upper end of the steep gradient region may be in contact with the lower end of the peak region. The upper end of the peak region may be in contact with the lower end of the decreasing region.

[0013] Any of the above semiconductor devices may include a transistor portion. The back side region may include a collector region of a second conductivity type.

[0014] In any of the above semiconductor devices, the dopant in the collector region may be boron.

[0015] In the collector region of any of the above semiconductor devices, the atomic density gradient of the dopant in the gentle gradient region is 1.0E21 [atoms / cm 4 or more and 5.0E23 [atoms / cm 4 or less.

[0016] In the collector region of any of the above semiconductor devices, the atomic density gradient of the dopant in the steep gradient region is 1.0E22 [atoms / cm 4 or more and 1.0E24 [atoms / cm 4 or less.

[0017] In the collector region of any of the above semiconductor devices, the atomic density gradient of the dopant in the decreasing region is 1.0E23 [atoms / cm 4 or more and 1.0E25 [atoms / cm 4 or less.

[0018] In the collector region of any of the above semiconductor devices, the atomic density of the dopant at the peak of the peak region is 1.0E+16 [cm -3 or more and 1.0E+20 [cm -3 or less.

[0019] In the collector region of any of the above semiconductor devices, the atomic density of the dopant at the lower end of the gentle gradient region may be 10% or more and 80% or less of the atomic density of the dopant at the peak of the peak region.

[0020] In the collector region, the ratio of the atomic density gradient of the gentle gradient region to the atomic density gradient of the steep gradient region of the dopant the dopant mentioned above may be 0.01 or more and 0.8 or less.

[0021] In the collector region of any of the above semiconductor devices, the ratio of the atomic density gradient of the steep gradient region of the dopant to the atomic density gradient of the decreasing region of the dopant may be 0.001 or more and 0.5 or less.

[0022] Any of the above semiconductor devices may include a diode portion. The back side region may include a cathode region of a first conductivity type.

[0023] In any of the above semiconductor devices, the dopant in the cathode region may be phosphorus.

[0024] In the cathode region of any of the above semiconductor devices, the atomic density gradient of the dopant in the gentle gradient region is 1.0E22 [atoms / cm 4Above, 2.0E24 [atoms / cm 4 may be below.

[0025] In the cathode region of any of the above semiconductor devices, the atomic density gradient of the dopant in the steep gradient region is 1.0E23 [atoms / cm 4 or more and 1.0E25 [atoms / cm 4 may be below.

[0026] In the cathode region of any of the above semiconductor devices, the atomic density gradient of the dopant in the decreasing region is 2.0E24 [atoms / cm 4 or more and 2.0E26 [atoms / cm 4 may be below.

[0027] In the cathode region of any of the above semiconductor devices, the atomic density of the dopant at the peak of the peak region is 1.0 E1 9 [ cm -3 or more and 1.0 E2 1 [ cm -3 may be below.

[0028] In the cathode region of any of the above semiconductor devices, the atomic density of the dopant at the lower end of the gentle gradient region may be 30% or more and 90% or less of the atomic density of the dopant at the peak of the peak region.

[0029] In the cathode region of any of the above semiconductor devices, the ratio of the atomic density gradient of the dopant in the gentle gradient region to the atomic density gradient of the dopant in the steep gradient region may be 0.01 or more and 0.5 or less.

[0030] In the cathode region of any of the above semiconductor devices, the ratio of the atomic density gradient of the dopant in the decreasing region to the atomic density gradient of the dopant in the steep gradient region may be 0.001 or more and 0.3 or less.

[0031] In any of the semiconductor devices described above, the doping concentration of the dopant at the peak of the peak region may be 10% or more of the atomic density of the dopant at the peak of the peak region, 100 and may be % or less.

[0032] In any of the semiconductor devices described above, the doping concentration distribution in the back surface side region may include a doping peak region having a peak in the doping concentration distribution in the peak region.

[0033] In a second aspect of the present invention, the a step of ion-implanting a dopant into the back surface of a semiconductor substrate having a front surface and a back surface, and the a step of irradiating the back surface of the semiconductor substrate with a laser are provided. In the step of irradiating the laser, the melting depth of the semiconductor substrate melted by the irradiation of the laser may include the depth position of the peak of the atomic density distribution of the dopant after the step of ion-implanting the dopant.

[0034] The step of irradiating the laser may include a redistribution step of redistributing the depth position of the peak of the atomic density distribution of the dopant to the front surface side of the semiconductor substrate by melting the irradiation region of the semiconductor substrate by the irradiation of the laser, more than the peak position of the atomic density distribution of the dopant in the step of ion-implanting.

[0035] In the manufacturing method of any of the semiconductor devices described above, the redistribution step may include a step of depositing the dopant on the front surface side by melting the irradiation region.

[0036] In a third aspect of the present invention, In the semiconductor substrate, a step of forming a drift region of a first conductivity type, the Provided is a method of manufacturing a semiconductor device including: forming, on a back surface side of a semiconductor substrate with respect to a drift region, a back surface side region having a higher atomic density than the drift region and being of a first conductivity type or a second conductivity type. The step of forming the back surface side region may include: ion implanting a dopant into the back surface of the semiconductor substrate; forming, in a depth direction of the semiconductor substrate, a gentle gradient region in which an atomic density of the dopant increases from the back surface side toward a front surface side of the semiconductor substrate; forming, on a front surface side with respect to the gentle gradient region, a steep gradient region in which the atomic density of the dopant increases with a larger atomic density gradient than the gentle gradient region; forming, on a front surface side with respect to the steep gradient region, a peak region having a peak in an atomic density distribution; and forming, between the peak region and the drift region, a decreasing region in which the atomic density of the dopant decreases toward the drift region in the depth direction of the semiconductor substrate.

[0037] In the method of manufacturing the semiconductor device described above, the step of forming the back surface side region may include laser annealing the semiconductor substrate from a back surface side of the semiconductor substrate.

[0038] In the method of manufacturing the semiconductor device according to any one of the above, in the step of laser annealing, a melting depth of the semiconductor substrate melted by laser irradiation may be at or deeper than a peak position of the atomic density of the dopant after ion implantation. distribution of the peak position.

[0039] In the method of manufacturing the semiconductor device according to any one of the above, the step of laser annealing may include redistributing a peak of the atomic density distribution of the dopant to a position on a front surface side of the semiconductor substrate with respect to a peak position of the atomic density distribution of the dopant after ion implantation by melting an irradiation region of the semiconductor substrate by the laser annealing.

[0040] In the method for manufacturing any of the above semiconductor devices, the step of redistributing the peak of the atomic density distribution may include the step of depositing the dopant on the front surface side by melting the irradiation region.

[0041] In the method for manufacturing any of the above semiconductor devices, the step of forming the back surface side region may not include thermal annealing for forming the back surface side region.

[0042] Note that the above summary of the invention does not list all the features of the present invention. Also, sub - combinations of these feature groups can also be inventions.

Brief Description of the Drawings

[0043]

Figure 1A

Figure 1B

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Figure 2B

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Figure 4B

Figure 4C

Figure 4D

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Figure 8

Embodiments for Carrying Out the Invention

[0044] Hereinafter, the present invention will be described through embodiments of the invention. However, the following embodiments do not limit the invention according to the claims. Also, not all combinations of features described in the embodiments are essential for the solution means of the invention.

[0045] In this specification, one side in the direction parallel to the depth direction of the semiconductor substrate is referred to as "upper" and the other side as "lower". Of the two main surfaces of a substrate, layer, or other member, one surface is referred to as the upper surface and the other surface as the lower surface. The directions of "upper" and "lower" are not limited to the direction of gravity or the direction at the time of mounting the semiconductor device.

[0046] In this specification, technical matters may be described using the orthogonal coordinate axes of the X-axis, Y-axis, and Z-axis. The orthogonal coordinate axes only specify the relative positions of the components and do not limit a specific direction. For example, the Z-axis does not limit and indicate the height direction with respect to the ground. Note that the +Z-axis direction and the -Z-axis direction are opposite directions. When described as the Z-axis direction without indicating positive or negative, it means the directions parallel to the +Z-axis and -Z-axis.

[0047] In this specification, orthogonal axes parallel to the upper and lower surfaces of the semiconductor substrate are defined as the X-axis and the Y-axis. Also, an axis perpendicular to the upper and lower surfaces of the semiconductor substrate is defined as the Z-axis. In this specification, the direction of the Z-axis may sometimes be referred to as the depth direction. Further, in this specification, a direction parallel to the upper and lower surfaces of the semiconductor substrate, including the X-axis and the Y-axis, may sometimes be referred to as the horizontal direction.

[0048] In this specification, when referred to as "identical" or "equal", it may include cases having errors due to manufacturing variations or the like. Such errors are, for example, within 10%.

[0049] In this specification, the conductivity type of a doped region doped with impurities is described as P-type or N-type. In this specification, impurities may particularly mean either an N-type donor or a P-type acceptor, and may be described as dopants. In this specification, doping means introducing a donor or an acceptor into a semiconductor substrate to form a semiconductor having an N-type conductivity type or a semiconductor having a P-type conductivity type.

[0050] In this specification, the doping concentration means the concentration of donors or acceptors in the thermal equilibrium state. In this specification, the net doping concentration means the net concentration obtained by adding together the donor concentration as the concentration of positive ions and the acceptor concentration as the concentration of negative ions, including the polarity of the charges. As an example, when the donor concentration is N D , and the acceptor concentration is N A , the net doping concentration at any position is N D - N A . In this specification, the net doping concentration may sometimes be simply referred to as the doping concentration.

[0051] The donor has a function of supplying electrons to the semiconductor. The acceptor has a function of receiving electrons from the semiconductor. The donor and the acceptor are not limited to the impurities themselves. For example, a VOH defect in which a hole (V), oxygen (O), and hydrogen (H) existing in the semiconductor are combined functions as a donor that supplies electrons. In this specification, the VOH defect may be referred to as a hydrogen donor.

[0052] When described as P+ type or N+ type in this specification, it means that the doping concentration is higher than that of P type or N type. When described as P− type or N− type, it means that the doping concentration is lower than that of P type or N type. Also, when described as P++ type or N++ type in this specification, it means that the doping concentration is higher than that of P+ type or N+ type.

[0053] In this specification, the chemical concentration refers to the atomic density of impurities measured regardless of the electrically activated state. The chemical concentration can be measured, for example, by secondary ion mass spectrometry (SIMS). The net doping concentration described above can be measured by the voltage−capacitance measurement method (CV method). Also, the carrier concentration measured by the spreading resistance measurement method (SR method) may be used as the net doping concentration. A carrier means an electron or a hole charge carrier. The carrier concentration measured by the CV method or the SR method may be a value in the thermal equilibrium state. Also, in the N-type region, since the donor concentration is sufficiently larger than the acceptor concentration, the carrier concentration in the region may be used as the donor concentration. Similarly, in the P-type region, the carrier concentration in the region may be used as the acceptor concentration. In this specification, the doping concentration in the N-type region may be referred to as the donor concentration, and the doping concentration in the P-type region may be referred to as the acceptor concentration.

[0054] In addition, when the concentration distribution of donors, acceptors, or net doping has a peak, the peak value may be used as the concentration of donors, acceptors, or net doping in the region. In cases where the concentration of donors, acceptors, or net doping is substantially uniform, etc., the average value of the concentration of donors, acceptors, or net doping in the region may be used as the concentration of donors, acceptors, or net doping.

[0055] The carrier concentration measured by the SR method may be lower than the concentration of donors or acceptors. In the range where current flows when measuring the spreading resistance, the carrier mobility of the semiconductor substrate may be lower than the value in the crystalline state. The decrease in carrier mobility is caused by the scattering of carriers due to the disorder of the crystal structure (disorder) such as lattice defects. The reason for the decrease in carrier concentration is as follows. In the SR method, the spreading resistance is measured, and the carrier concentration is converted from the measured value of the spreading resistance. At this time, the mobility of the carriers is the mobility in the crystalline state. On the other hand, at the position where lattice defects are introduced, although the carrier mobility is decreased, the carrier concentration is calculated based on the carrier mobility in the crystalline state. Therefore, the actual carrier concentration, that is, a value lower than the concentration of donors or acceptors is obtained.

[0056] The concentration of donors or acceptors calculated from the carrier concentration measured by the CV method or the SR method may be lower than the chemical concentration of the element indicating the donors or acceptors. As an example, in a silicon semiconductor, the donor concentration of phosphorus or arsenic serving as donors, or the acceptor concentration of boron (boron) serving as an acceptor is about 99% of these chemical concentrations. On the other hand, the donor concentration of hydrogen serving as a donor in a silicon semiconductor is about 0.1% to 10% of the chemical concentration of hydrogen. In this specification, the SI unit system is adopted. In this specification, the unit of distance or length may be represented by cm (centimeter). In this case, various calculations may be performed after conversion to m (meter). Regarding the numerical display of powers of 10, for example, the display of 1E+16 indicates 1×10 16 is shown, and the display of 1E-16 indicates 1×10-16 is shown.

[0057] FIG. 1A shows an example of a top view of the semiconductor device 100. The semiconductor device 100 in this example is a semiconductor chip including a transistor section 70.

[0058] The transistor section 70 is an area obtained by projecting a collector region 22 provided on the back side of the semiconductor substrate 10 onto the top surface of the semiconductor substrate 10. The collector region 22 will be described later. The transistor section 70 includes a transistor such as an IGBT. In this example, the transistor section 70 is an IGBT. Note that the transistor section 70 may be another transistor such as a MOSFET.

[0059] In this figure, an area around the chip end, which is the edge side of the semiconductor device 100, is shown, and other areas are omitted. For example, an edge termination structure section may be provided in the negative side region of the semiconductor device 100 in the Y-axis direction in this example. The edge termination structure section relaxes the electric field concentration on the top surface side of the semiconductor substrate 10. The edge termination structure section has, for example, a guard ring, a field plate, a RESURF, and a structure combining these. Note that in this example, for the sake of convenience, the edge on the negative side in the Y-axis direction is described, but the same applies to other edges of the semiconductor device 100.

[0060] The semiconductor substrate 10 is a substrate formed of a semiconductor material. The semiconductor substrate 10 may be a silicon substrate, may be a silicon carbide substrate, or may be a nitride semiconductor substrate such as gallium nitride. The semiconductor substrate 10 in this example is a silicon substrate. Note that when simply referred to as a top view in this specification, it means viewing from the top surface side of the semiconductor substrate 10.

[0061] In the semiconductor device 100 of this example, on the front surface 21 of the semiconductor substrate 10, a gate trench portion 40, a dummy trench portion 30, an emitter region 12, a base region 14, a contact region 15, and a well region 17 are provided. The front surface 21 will be described later. Further, the semiconductor device 100 of this example includes an emitter electrode 52 and a gate metal layer 50 provided above the front surface 21 of the semiconductor substrate 10.

[0062] The emitter electrode 52 is provided above the gate trench portion 40, the dummy trench portion 30, the emitter region 12, the base region 14, the contact region 15, and the well region 17. Further, the gate metal layer 50 is provided above the gate trench portion 40 and the well region 17.

[0063] The emitter electrode 52 and the gate metal layer 50 are formed of a material containing metal. At least a part of the emitter electrode 52 may be formed of a metal such as aluminum (Al), or a metal alloy such as an aluminum - silicon alloy (AlSi) or an aluminum - silicon - copper alloy (AlSiCu). At least a part of the gate metal layer 50 may be formed of a metal such as aluminum (Al), or a metal alloy such as an aluminum - silicon alloy (AlSi) or an aluminum - silicon - copper alloy (AlSiCu). The emitter electrode 52 and the gate metal layer 50 may have a barrier metal formed of titanium or a titanium compound or the like under a region formed of aluminum or the like. The emitter electrode 52 and the gate metal layer 50 are provided separately from each other.

[0064] The emitter electrode 52 and the gate metal layer 50 are provided above the semiconductor substrate 10 with an interlayer insulating film 38 therebetween. The interlayer insulating film 38 is omitted in FIG. 1A. Contact holes 54, 55, and 56 are provided penetrating the interlayer insulating film 38.

[0065] The contact hole 55 connects the gate metal layer 50 and the gate conductive part in the transistor part 70. A plug metal layer formed of tungsten or the like may be formed inside the contact hole 55.

[0066] The contact hole 56 connects the emitter electrode 52 and the dummy conductive part in the dummy trench part 30. A plug metal layer formed of tungsten or the like may be formed inside the contact hole 56.

[0067] The connection part 25 is connected to the front-side electrode such as the emitter electrode 52 or the gate metal layer 50. In one example, the connection part 25 is provided between the gate metal layer 50 and the gate conductive part. The connection part 25 is also provided between the emitter electrode 52 and the dummy conductive part. The connection part 25 is a conductive material such as polysilicon doped with impurities. The connection part 25 in this example is polysilicon doped with N-type impurities (N+). The connection part 25 is provided above the front surface 21 of the semiconductor substrate 10 via an insulating film such as an oxide film.

[0068] The gate trench part 40 is an example of a plurality of trench parts extending in a predetermined extending direction on the front surface 21 side of the semiconductor substrate 10. The gate trench parts 40 are arranged at predetermined intervals along a predetermined arrangement direction (the X-axis direction in this example). The gate trench part 40 in this example may have two extending parts 41 extending along an extending direction (the Y-axis direction in this example) parallel to the front surface 21 of the semiconductor substrate 10 and perpendicular to the arrangement direction, and a connection part 43 connecting the two extending parts 41.

[0069] It is preferable that at least a part of the connection part 43 is formed in a curved shape. By connecting the ends of the two extending parts 41 of the gate trench part 40, the electric field concentration at the ends of the extending parts 41 can be alleviated. In the connection part 43 of the gate trench part 40, the gate metal layer 50 may be connected to the gate conductive part.

[0070] The dummy trench portion 30 is an example of a plurality of trench portions extending in a predetermined extending direction on the front surface 21 side of the semiconductor substrate 10. The dummy trench portion 30 is a trench portion electrically connected to the emitter electrode 52. The dummy trench portion 30 is arranged at a predetermined interval along a predetermined arrangement direction (the X-axis direction in this example), similarly to the gate trench portion 40. The dummy trench portion 30 in this example has an I shape on the front surface 21 of the semiconductor substrate 10, but may have a U shape on the front surface 21 of the semiconductor substrate 10, similarly to the gate trench portion 40. That is, the dummy trench portion 30 may have two extending portions extending along the extending direction and a connecting portion connecting the two extending portions.

[0071] The transistor portion 70 in this example has a structure in which two gate trench portions 40 and two dummy trench portions 30 are repeatedly arranged. That is, the transistor portion 70 in this example has the gate trench portion 40 and the dummy trench portion 30 at a ratio of 1:1. For example, the transistor portion 70 has one dummy trench portion 30 between two extending portions 41.

[0072] However, the ratio of the gate trench portion 40 to the dummy trench portion 30 is not limited to this example. The ratio of the gate trench portion 40 may be larger than the ratio of the dummy trench portion 30, and the ratio of the dummy trench portion 30 may be larger than the ratio of the gate trench portion 40. The ratio of the gate trench portion 40 to the dummy trench portion 30 may be 2:3 or 2:4. Further, the transistor portion 70 may have all the trench portions as the gate trench portion 40 and may not have the dummy trench portion 30.

[0073] The well region 17 is a region of the second conductivity type provided on the front surface 21 side of the semiconductor substrate 10 rather than the drift region 18 described later. The well region 17 is an example of a well region provided on the edge side of the semiconductor device 100. The well region 17 is, as an example, P+-type. The well region 17 is formed within a predetermined range from the end of the active region on the side where the gate metal layer 50 is provided. The diffusion depth of the well region 17 may be deeper than the depths of the gate trench portion 40 and the dummy trench portion 30. A part of the regions of the gate trench portion 40 and the dummy trench portion 30 on the gate metal layer 50 side is formed in the well region 17. The bottoms of the ends in the extending direction of the gate trench portion 40 and the dummy trench portion 30 may be covered by the well region 17.

[0074] The contact hole 54 is formed above each of the emitter region 12 and the contact region 15 in the transistor portion 70. The contact hole 54 is not provided above the well region 17 provided at both ends in the Y-axis direction. Thus, one or more contact holes 54 are formed in the interlayer insulating film. The one or more contact holes 54 may be formed to extend in the extending direction.

[0075] The mesa portion 71 is a mesa portion provided adjacent to the trench portion in a plane parallel to the front surface 21 of the semiconductor substrate 10. The mesa portion is a portion of the semiconductor substrate 10 sandwiched between two adjacent trench portions, and may be a portion from the front surface 21 of the semiconductor substrate 10 to the depth of the deepest bottom of each trench portion. The extending portions of each trench portion may be regarded as one trench portion. That is, the region sandwiched between the two extending portions may be regarded as the mesa portion.

[0076] The mesa portion 71 is provided adjacent to at least one of the dummy trench portion 30 or the gate trench portion 40 in the transistor portion 70. The mesa portion 71 has the well region 17, the emitter region 12, the base region 14, and the contact region 15 on the front surface 21 of the semiconductor substrate 10. In the mesa portion 71, the emitter region 12 and the contact region 15 are alternately provided in the extending direction.

[0077] The base region 14 is a region of a second conductivity type provided on the front surface 21 side of the semiconductor substrate 10. The base region 14 is, for example, P-type. The base region 14 may be provided at both ends in the Y-axis direction of the mesa portion 71 on the front surface 21 of the semiconductor substrate 10. Note that FIG. 1A shows only one end of the base region 14 in the Y-axis direction.

[0078] The emitter region 12 is a region of a first conductivity type having a higher doping concentration than the drift region 18. The emitter region 12 in this example is, for example, N+-type. An example of the dopant in the emitter region 12 is arsenic (As). The emitter region 12 is provided in contact with the gate trench portion 40 on the front surface 21 of the mesa portion 71. The emitter region 12 may be provided to extend in the X-axis direction from one of the two trench portions sandwiching the mesa portion 71 to the other. The emitter region 12 is also provided below the contact hole 54.

[0079] Also, the emitter region 12 may or may not be in contact with the dummy trench portion 30. The emitter region 12 in this example is in contact with the dummy trench portion 30.

[0080] The contact region 15 is provided above the base region 14 and is a region of a second conductivity type having a higher doping concentration than the base region 14. The contact region 15 in this example is, for example, P+-type. The contact region 15 in this example is provided on the front surface 21 of the mesa portion 71. The contact region 15 may be provided to extend in the X-axis direction from one of the two trench portions sandwiching the mesa portion 71 to the other. The contact region 15 may or may not be in contact with the gate trench portion 40 or the dummy trench portion 30. The contact region 15 in this example is in contact with the dummy trench portion 30 and the gate trench portion 40. The contact region 15 is also provided below the contact hole 54.

[0081] FIG. 1B shows an example of the cross section taken along line a-a' in FIG. 1A. The cross section taken along line a-a' is an XZ plane passing through the emitter region 12 in the transistor section 70. The semiconductor device 100 in this example has, in the cross section taken along line a-a', a semiconductor substrate 10, an interlayer insulating film 38, an emitter electrode 52, and a collector electrode 24. The emitter electrode 52 is formed above the semiconductor substrate 10 and the interlayer insulating film 38.

[0082] The drift region 18 is a region of the first conductivity type provided in the semiconductor substrate 10. The drift region 18 in this example is, by way of example, an N-type region. The drift region 18 may be a region remaining in the semiconductor substrate 10 without other doping regions being formed therein. That is, the doping concentration of the drift region 18 may be the doping concentration of the semiconductor substrate 10. The drift region 18 may be a region having a relatively low doping concentration in the semiconductor substrate 10. The drift region 18 may be a region having the lowest concentration portion in the semiconductor substrate 10 in terms of the acceptor concentration in the P-type region excluding the PN junction or the donor concentration in the N-type region. The doping concentration distribution of the drift region 18 may be substantially uniform along the depth direction of the semiconductor substrate 10, or may have a distribution with a concentration gradient. Substantially uniform means that the doping concentration is distributed between 50% and 150% of the average concentration with respect to the average concentration in a region of 30% to 90% with respect to the thickness in the depth direction of the semiconductor substrate 10. The drift region 18 may be a region in which a depletion layer corresponding to 50% or more of the applied voltage is formed in a state where the depletion layer extends inside the semiconductor device 100 in response to the applied voltage.

[0083] The buffer region 20 is a region of the first conductivity type provided on the back surface 23 side of the semiconductor substrate 10 rather than the drift region 18. The buffer region 20 in this example is, by way of example, an N-type region. The doping concentration of the buffer region 20 is higher than the doping concentration of the drift region 18. The buffer region 20 may function as a field stop layer that prevents a depletion layer extending from the lower surface side of the base region 14 from reaching the collector region 22 of the second conductivity type. Note that the buffer region 20 may be omitted.

[0084] The back surface side region 60 is provided on the back surface 23 side of the drift region 18 in the semiconductor substrate 10. The back surface side region 60 may have a first conductivity type or a second conductivity type. The back surface side region 60 in this example has a second conductivity type and functions as a collector region 22, but is not limited thereto. The back surface side region 60 may have a higher atomic density than the drift region 18. The atomic density will be described later. The upper end of the back surface side region 60 in this example is in contact with the lower end of the buffer region 20. When the buffer region 20 is omitted, the upper end of the back surface side region 60 may be in contact with the lower end of the drift region 18. The back surface side region 60 will be described later. In this specification, the upper end may refer to the end on the front surface 21 side in the depth direction of the semiconductor substrate 10, and the lower end may refer to the end on the back surface 23 side in the depth direction of the semiconductor substrate 10. The upper end and the lower end are not limited to the direction of gravity or the direction at the time of mounting the semiconductor device 100.

[0085] The collector region 22 is provided below the buffer region 20 in the transistor portion 70. The collector region 22 has a second conductivity type. The collector region 22 in this example is, as an example, P+ type.

[0086] The collector electrode 24 is formed on the back surface 23 of the semiconductor substrate 10. The collector electrode 24 is formed of a conductive material such as metal. The material of the collector electrode 24 may be the same as or different from the material of the emitter electrode 52.

[0087] The base region 14 is a region of the second conductivity type provided above the drift region 18. The base region 14 is provided in contact with the gate trench portion 40. The base region 14 may be provided in contact with the dummy trench portion 30.

[0088] The emitter region 12 is provided above the base region 14. The emitter region 12 is provided between the base region 14 and the front surface 21. The emitter region 12 is provided in contact with the gate trench portion 40. The emitter region 12 may or may not be in contact with the dummy trench portion 30.

[0089] The storage region 16 is a region of a first conductivity type provided on the front surface 21 side of the semiconductor substrate 10 rather than the drift region 18. The storage region 16 in this example is N+ type as an example. However, the storage region 16 may not be provided.

[0090] Also, the storage region 16 is provided in contact with the gate trench portion 40. The storage region 16 may or may not be in contact with the dummy trench portion 30. The doping concentration of the storage region 16 is higher than the doping concentration of the drift region 18. The dose amount of ion implantation in the storage region 16 is 1.0E+12 cm -2 above, 1.0E+13 cm -2 below. Also, the dose amount of ion implantation in the storage region 16 may be 3.0E+12 cm -2 above, 6.0E+12 cm -2 below. By providing the storage region 16, the carrier injection promotion effect (IE effect) can be enhanced and the on-voltage of the transistor portion 70 can be reduced. Here, E means the power of 10. For example, 1.0E+12 cm -2 means 1.0×10 12 cm -2 .

[0091] One or more gate trench portions 40 and one or more dummy trench portions 30 are provided on the front surface 21. Each trench portion is provided from the front surface 21 to the drift region 18. In a region where at least any one of the emitter region 12, the base region 14, the contact region 15, and the storage region 16 is provided, each trench portion penetrates these regions and reaches the drift region 18. That the trench portion penetrates the doping region is not limited to the case where the trench portion is formed in the order of forming the doping region and then forming the trench portion. Even when the doping region is formed between the trench portions after forming the trench portion, it is included in the case where the trench portion penetrates the doping region.

[0092] The gate trench portion 40 has a gate trench formed on the front surface 21, a gate insulating film 42, and a gate conductive portion 44. The gate insulating film 42 is formed to cover the inner wall of the gate trench. The gate insulating film 42 may be formed by oxidizing or nitriding the semiconductor on the inner wall of the gate trench. The gate conductive portion 44 is formed inside the gate trench and inside the gate insulating film 42. The gate insulating film 42 insulates the gate conductive portion 44 from the semiconductor substrate 10. The gate conductive portion 44 is formed of a conductive material such as polysilicon. The gate trench portion 40 is covered by an interlayer insulating film 38 on the front surface 21.

[0093] The gate conductive portion 44 includes a region facing the adjacent base region 14 on the mesa portion 71 side with the gate insulating film 42 interposed therebetween in the depth direction of the semiconductor substrate 10. When a predetermined voltage is applied to the gate conductive portion 44, a channel formed by an electron inversion layer is formed in the surface layer of the interface of the base region 14 in contact with the gate trench. the gate conductive part 44 and

[0094] The dummy trench portion 30 may have the same structure as the gate trench portion 40. The dummy trench portion 30 has a dummy trench formed on the front surface 21 side, a dummy insulating film 32, and a dummy conductive portion 34. The dummy insulating film 32 is formed to cover the inner wall of the dummy trench. The dummy conductive portion 34 is formed inside the dummy trench and inside the dummy insulating film 32. The dummy insulating film 32 insulates the dummy conductive portion 34 from the semiconductor substrate 10. The dummy trench portion 30 is covered by an interlayer insulating film 38 on the front surface 21.

[0095] ​The interlayer insulating film 38 is provided above the semiconductor substrate 10. The interlayer insulating film 38 in this example is provided in contact with the front surface 21. An emitter electrode 52 is provided above the interlayer insulating film 38. One or a plurality of contact holes 54 for electrically connecting the emitter electrode 52 and the semiconductor substrate 10 are provided in the interlayer insulating film 38. Similarly, the contact hole 55 and the contact hole 56 may also be provided penetrating the interlayer insulating film 38. The interlayer insulating film 38 may be a BPSG (Boro-phospho Silicate Glass) film, a BSG (borosilicate glass) film, a PSG (Phosphosilicate glass) film, an HTO film, or a laminate of these materials. The film thickness of the interlayer insulating film 38 is, for example, 1.0 μm, but is not limited thereto.

[0096] The first lifetime control region 151 may be provided in the transistor portion 70. The first lifetime control region 151 is not essential and may not be provided. The first lifetime control region 151 is a region in which a lifetime killer is intentionally formed by injecting impurities into the semiconductor substrate 10 or the like. In one example, the first lifetime control region 151 is formed by injecting helium into the semiconductor substrate 10. By providing the first lifetime control region 151, the turn-off time can be reduced and the tail current can be suppressed, thereby reducing the loss during switching.

[0097] The lifetime killer is a recombination center of carriers. The lifetime killer may be a lattice defect. For example, the lifetime killer may be a vacancy, a divacancy, a complex defect of these and the elements constituting the semiconductor substrate 10, or a dislocation. Also, the lifetime killer may be a noble gas element such as helium or neon, or a metal element such as platinum. An electron beam may be used for forming the lattice defect.

[0098] The lifetime killer concentration is the concentration of carrier recombination centers. The lifetime killer concentration may be the concentration of lattice defects. For example, the lifetime killer concentration may be the concentration of vacancies such as vacancies and divacancies, the concentration of composite defects between these vacancies and the elements constituting the semiconductor substrate 10, or the dislocation concentration. Further, the lifetime killer concentration may be the chemical concentration of noble gas elements such as helium and neon, or the chemical concentration of metal elements such as platinum.

[0099] The first lifetime control region 151 is provided on the back surface 23 side rather than the center of the semiconductor substrate 10 in the depth direction of the semiconductor substrate 10. The first lifetime control region 151 of this example is provided in the buffer region 20. The first lifetime control region 151 of this example is provided on the entire surface of the semiconductor substrate 10 in the XY plane and can be formed without using a mask. The first lifetime control region 151 may be provided on a part of the semiconductor substrate 10 in the XY plane. The dose amount of impurities for forming the first lifetime control region 151 is 0.5E+10 cm -2 above, 1.0E+13 cm -2 below, or 5.0E+10 cm -2 above, 5.0E+11 cm -2 below may also be acceptable.

[0100] Also, the first lifetime control region 151 of this example is formed by implantation from the back surface 23 side. Thereby, the influence on the front surface 21 side of the semiconductor device 100 can be avoided. For example, the first lifetime control region 151 is formed by irradiating helium from the back surface 23 side. Here, whether the first lifetime control region 151 is formed by implantation from the front surface 21 side or by implantation from the back surface 23 side can be determined by acquiring the state of the front surface 21 side by the SR method or measurement of the leakage current.

[0101] FIG. 2A is an example of a graph showing the atomic density distribution of the back surface side region 60. The vertical axis is the atomic density (atoms / cm 3) is shown, and the horizontal axis represents the analysis depth (μm) from the back surface 23. The unit of atomic density may be abbreviated as (cm -3 ) and may be displayed in a simplified manner. The back surface side region 60 in this example functions as the collector region 22. As an example, it shows the atomic density of boron, which is the dopant in the back surface side region 60. The back surface side region 60 has a gentle gradient region 61, a steep gradient region 62, a peak region 63, and a decreasing region 64. Hereinafter, the atomic density of the dopant may be simply referred to as the atomic density.

[0102] The gentle gradient region 61 is a region where the atomic density increases from the back surface 23 side toward the front surface 21 side of the semiconductor substrate 10 in the depth direction of the semiconductor substrate 10. The atomic density gradient of the gentle gradient region 61 may be constant or variable. As will be described later, due to the characteristics of the analysis means, there may be a region where the atomic density is not measured in the vicinity of the back surface 23 or a region where the atomic density rapidly decreases toward the back surface 23 side. For such a region where the atomic density is not measured or the atomic density rapidly decreases, a region where the measured value is interpolated by extrapolation or the like may also be regarded as a region of the gentle gradient region 61.

[0103] The steep gradient region 62 is provided on the front surface 21 side of the gentle gradient region 61 and is a region where the atomic density increases with a gradient larger than that of the gentle gradient region 61. The steep gradient region 62 is provided on the front surface 21 side of the gentle gradient region 61 in the depth direction of the semiconductor substrate 10.

[0104] The peak region 63 is provided on the front surface 21 side of the steep gradient region 62 and has a peak 65 where the atomic density distribution reaches the maximum value within the range of the back surface side region 60. The peak region 63 is provided on the front surface 21 side of the steep gradient region 62 in the depth direction of the semiconductor substrate 10. The peak region 63 is provided between the steep gradient region 62 and the decreasing region 64 in the depth direction of the semiconductor substrate 10.

[0105] Np is the peak atomic density of the peak 65. The peak atomic density Np of the peak 65 may be 1.0E+16 cm -3 or more in the collector region 22, and may be 1.0E+17 cm -3It may be the above, 1.0E+18 cm -3 It may be the above. The peak atomic density Np of peak 65 is 1.0E+20 cm in the collector region 22 -3 It may be below, 5.0E+19 cm -3 It may be below, 1.0E+19 cm -3 It may be below, 5.0E+18 cm -3 It may be below. The peak atomic density Np of peak 65 in this example is 7.45E+18 cm -3 It is. Xp is the depth position of peak 65 from the back surface 23 in the depth direction of the semiconductor substrate 10. Xp may be 0.1 μm or more, 0.2 μm or more, 0.3 μm or more, 0.4 μm or more in the collector region 22. Xp may be 0.8 μm or less, 0.6 μm or less, 0.5 μm or less, 0.4 μm or less in the collector region 22.

[0106] The decreasing region 64 is a region where the atomic density decreases toward the drift region 18 in the depth direction of the semiconductor substrate 10. The decreasing region 64 is provided between the peak region 63 and the drift region 18. When the semiconductor device 100 includes the buffer region 20, the decreasing region 64 may be provided between the peak region 63 and the buffer region 20 and may be in contact with the buffer region 20.

[0107] The lower end of the graded buffer region 61 may be the back surface 23 of the semiconductor substrate 10. That is, the back surface side region 60 may be provided on the most back surface 23 side of the semiconductor substrate 10. The upper end of the graded buffer region 61 may be an intermediate position between the back surface 23 and the depth position of peak 65 in the peak region 63 in the depth direction of the semiconductor substrate 10. That is, the upper end of the graded buffer region 61 may be at the position of 0.5Xp with reference to the depth position Xp of peak 65. Note that the upper end of the graded buffer region 61 may be at the position where the atomic density becomes 0.5Np with reference to the atomic density Np of peak 65.

[0108] The lower end of the steep gradient region 62 may be at the same position as the upper end of the gentle gradient region 61 in the depth direction of the semiconductor substrate 10. That is, the lower end of the steep gradient region 62 may be at a position of 0.5Xp with reference to the depth position Xp of the peak 65. The upper end of the steep gradient region 62 may be at the same position as the lower end of the peak region 63 in the depth direction of the semiconductor substrate 10. As will be described later, the upper end of the steep gradient region 62 may be at a position where the atomic density becomes 0.95Np on the back surface 23 side of the peak 65.

[0109] The lower end of the peak region 63 may be at a position where the density is 95% of the atomic density at the peak 65 on the back surface 23 side of the semiconductor substrate 10 with respect to the peak 65. That is, the lower end of the peak region 63 may be at a position where the atomic density becomes 0.95Np on the back surface 23 side of the peak 65. The upper end of the peak region 63 may be at a position where the density is 95% of the atomic density at the peak 65 on the front surface 21 side of the semiconductor substrate 10 with respect to the peak 65. That is, the upper end of the peak region 63 may be at a position where the atomic density becomes 0.95Np on the front surface 21 side of the peak 65. Also, the upper end and the lower end of the peak region 63 may each be at a position where the atomic density becomes 0.90Np. Note that the lower end of the peak region 63 may be at a position of 0.9Xp with reference to the depth position Xp of the peak 65. The upper end of the peak region 63 may be at a position of 1.1Xp with reference to the depth position Xp of the peak 65.

[0110] The lower end of the decreasing region 64 may be at the same position as the upper end of the peak region 63 in the depth direction of the semiconductor substrate 10. That is, the lower end of the decreasing region 64 may be at a position where the atomic density becomes 0.95Np on the front surface 21 side of the peak 65. The upper end of the decreasing region 64 may be at a position where the density is 10% of the atomic density at the peak 65 on the front surface 21 side of the semiconductor substrate 10 with respect to the peak 65. That is, the upper end of the peak region 63 may be on the front surface 21 side of the semiconductor substrate 10 with respect to the peak 65, and may be at a position where the atomic density becomes 0.1Np.

[0111] In the back surface region 60 of this example, the gentle gradient region 61, the steep gradient region 62, the peak region 63, and the decreasing region 64 may be provided continuously in order from the back surface 23 side. That is, the upper end of the gentle gradient region 61 may be in contact with the lower end of the steep gradient region 62. The upper end of the steep gradient region 62 may be in contact with the lower end of the peak region 63. The upper end of the peak region 63 may be in contact with the lower end of the decreasing region 64. In other words, the semiconductor device 100 may have a boundary A between the gentle gradient region 61 and the steep gradient region 62, a boundary B between the steep gradient region 62 and the peak region 63, a boundary C between the peak region 63 and the decreasing region 64, and a boundary D between the decreasing region 64 and the drift region 18. When the upper end of the gentle gradient region 61 is in contact with the lower end of the steep gradient region 62, the atomic density distribution from the gentle gradient region 61 to the steep gradient region 62 may continuously increase in the gradient of the atomic density distribution. Thereby, the electrical activation rate of the dopant may be relatively high in some cases. In addition, the atomic density distribution from the gentle gradient region 61 to the steep gradient region 62 may have a region where the atomic density decreases partially continuously, or may have a portion where the atomic density is partially continuously distributed flatly. Here, the fact that the atomic density is partially continuously distributed flatly may mean that, in a range narrower than the gentle gradient region 61 or the steep gradient region 62, the maximum value and the minimum value of the atomic density are within 15% of the average value of the atomic density in the said range.

[0112] the back surface 23, and An intermediate region 68 is defined as a region including a position intermediate to the depth position of the peak 65 of the peak region 63 in the depth direction of the semiconductor substrate 10 and ranging from 30% to 70% of the distance from the back surface 23 of the semiconductor substrate 10 to the depth position of the peak 65. The upper end of the gentle gradient region 61 may be located at any position in the intermediate region 68.

[0113] The upper end of the gentle gradient region 61 may be the upper end of a region where the density gradient of the atomic density distribution is relatively low on the back surface 23 side with respect to the depth position Xp of the peak 65. Further, the lower end of the steep gradient region 62 may be the lower end of a region where the density gradient of the atomic density distribution is relatively high on the back surface 23 side with respect to the depth position Xp of the peak 65. The upper end of the gentle gradient region 61 or the lower end of the steep gradient region 62 in this case may be located in the intermediate region 68.

[0114] The back surface side region 60 in this example functions as the collector region 22. The position of the peak 65 is separated from the back surface 23, and the gentle gradient region 61 and the steep gradient region 62 are provided between the back surface 23 and the peak region 63. Thereby, the peak region 63 and the decreasing region 64 can be formed at a depth of 0.2 μm or more from the back surface 23. The injection efficiency of charge carriers (holes in this example) may be determined by the magnitude of the atomic density of the peak 65 and the magnitude of the gradient of the decreasing region 64. Here, it may be assumed that the doping concentration is on the same order as the atomic density. For example, even when a scratch occurs on the back surface 23 during the manufacturing process of a semiconductor device or an assembly process such as a module, if the depth of the scratch is within the range up to the lower end of the peak region 63 (for example, about 0.3 μm), the injection efficiency of charge carriers can be made less susceptible to the depth of the scratch. Thereby, an increase in the on-voltage due to a scratch on the back surface 23 can be suppressed. The contact resistance between the back surface side region 60 and the electrode (collector electrode 24 in this example) formed on the back surface 23 is such that the atomic density of the dopant on the back surface 23 is 1×10 18 (atoms / cm 3 ) or more. On the other hand, the back surface side region 60 is from the back surface 23For example, when forming deeply at 0.3 μm or more, the atomic density of the dopant on the back surface 23 may be maximized. In this case, the gradient of the atomic density becomes relatively gentle, and the injection efficiency of charge carriers may not be increased. On the other hand, by providing the back surface side region 60 with the gentle gradient region 61 and the steep gradient region 62, the peak region 63 and the decreasing region 64 can be formed at a depth position away from the back surface 23, and the gradient of the atomic density in the decreasing region 64 can be made steep. As a result, not only can the injection efficiency of charge carriers be increased, but also the influence of the damage formed on the back surface 23 can be reduced. Thus, the back surface side region 60 of this example can not only promote the injection of carriers by having the peak region 63 and the decreasing region 64, but also be less susceptible to the influence of the damage on the back surface 23 by providing the gentle gradient region 61 and the steep gradient region 62.

[0115] Note that although the atomic density distribution of the back surface side region 60 is shown in this figure, the shape of the doping concentration may also be substantially equal. That is, the atomic density distribution of the back surface side region 60 may be substantially similar to the distribution of the doping concentration of the back surface side region 60. However, not all of the dopants in the back surface side region 60 become donors or acceptors, and the doping concentration may be 10% or more and 100% or less of the atomic density. Also, the doping concentration of the peak 65 in the peak region 63 may be 10% or more and 100% or less of the atomic density of the peak 65.

[0116] FIG. 2B is an example of a graph showing the atomic density gradient of the gentle gradient region 61. The unit of the atomic density gradient in this example is (atoms / cm 4 ). The unit of the atomic density gradient may be abbreviated as (cm -4 ). Regarding the atomic density gradient in this specification, when the description of the unit is omitted, the unit of the atomic density gradient is (atoms / cm 4) It is. As another example, the atomic density gradient may be calculated using the common logarithm of the atomic density. The unit of the atomic density gradient when using the common logarithm of the atomic density may be ( / cm). In this specification, the description of the unit may be omitted for the value of the atomic density gradient. The unit of the atomic density gradient in this case is (atoms / cm 4 ) It is. This figure shows the atomic density gradient a1 of the gentle gradient region 61 in FIG. 2A. In the collector region 22, the atomic density gradient a1 of the gentle gradient region 61 may be 1.0E21 or more, may be 5.0E21 or more, may be 1.0E22 or more, may be 2.0E22 or more. In the collector region 22, the atomic density gradient a1 of the gentle gradient region 61 may be 5.0E23 or less, may be 2.0E23 or less, may be 1.0E23 hereinafter or less, may be 8.0E22 or less, may be 5.0E22 or less. The atomic density gradient a1 in this example is 4.079E+22. The atomic density gradient may be calculated by drawing an arbitrary tangent line by fitting the atomic density distribution obtained by measurement, or may be calculated by other methods. In this specification, the atomic density gradient is displayed as an absolute value.

[0117] The average atomic density of the gentle gradient region 61 may be 20% or more, may be 30% or more, may be 40% or more, may be 50% or more of the peak atomic density Np of the peak 65. The average atomic density of the gentle gradient region 61 may be 95% or less, may be 90% or less, may be 85% or less, may be 80% or less, may be 70% or less of the peak atomic density Np of the peak 65. The average atomic density of the gentle gradient region 61 in this example is about 3.7E+18 atoms / cm 3 and is about 50% of the peak atomic density Np.

[0118] Figure 2C is an example of a graph showing the atomic density gradient in the steep gradient region 62. This figure shows the atomic density gradient a2 in the steep gradient region 62 of Figure 2A. The atomic density gradient a2 in the steep gradient region 62 is greater than the atomic density gradient a1 in the gentle gradient region 61. In the collector region 22, the atomic density gradient a2 in the steep gradient region 62 may be 1.0E22 or more, may be 2.0E22 or more, may be 5.0E22 or more, and may be 7.0E22 or more. In the collector region 22, the atomic density gradient a2 in the steep gradient region 62 may be 1.0E24 or less, may be 5.0E23 or less, and may be 3.0E23 or less. The atomic density gradient a2 in this example is 1.680E+23.

[0119] Figure 2D is an example of a graph showing the atomic density gradient in the decreasing region 64. This figure shows the atomic density gradient a3 in the decreasing region 64 of Figure 2A. Since the atomic density gradient a3 is the absolute value of the gradient of the graph of the atomic density distribution in the decreasing region 64, it takes a positive value. In the collector region 22, the atomic density gradient a3 in the decreasing region 64 may be 1.0E23 or more, may be 2.0E23 or more, may be 5.0E23 or more, and may be 8.0E23 or more. In the collector region 22, the atomic density gradient a3 in the decreasing region 64 may be 1.0E25 or less, may be 8.0E24 or less, may be 5.0E24 or less, and may be 3.0E24 or less. The atomic density gradient a3 in this example is 1.618E+24.

[0120] In the collector region 22, the atomic density at the lower end of the gentle gradient region 61 may be 10% or more and 80% or less of the atomic density Np of the peak 65. The atomic density at the lower end of the gentle gradient region 61 may be 30% or more and 60% or less of the atomic density Np of the peak 65. The semiconductor device 100 in this example can increase the atomic density on the back surface 23 and reduce the contact resistance with the collector electrode 24 by using laser annealing compared to the case of using thermal annealing.

[0121] In the collector region 22, the ratio α of the atomic density gradient of the gentle gradient region 61 to the atomic density gradient of the steep gradient region 62 may be 0.01 or more and 0.8 or less. The ratio α of the atomic density gradient may be 0.02 or more, may be 0.05 or more, and may be 0.1 or more in the collector region 22. The ratio α of the atomic density gradient may be 0.5 or less, may be 0.2 or less, and may be 0.1 or less in the collector region 22.

[0122] In the collector region 22, the ratio β of the atomic density gradient of the steep gradient region 62 to the atomic density gradient of the decreasing region 64 may be 0.001 or more and 0.5 or less. The ratio β of the atomic density gradient may be 0.005 or more, may be 0.01 or more, and may be 0.05 or more in the collector region 22. The ratio β of the atomic density gradient may be 0.2 or less, may be 0.1 or less, and may be 0.05 or less in the collector region 22.

[0123] In this way, by appropriately setting the atomic density gradient of each region of the back surface side region 60, it is possible to provide the semiconductor device 100 having good electrical characteristics while suppressing the influence of the damage on the back surface 23.

[0124] FIG. 3A is an example of a top view showing a modified example of the semiconductor device 100. In FIG. 3A, the positions where each member is projected onto the upper surface of the semiconductor substrate 10 are shown. In FIG. 3A, only some members of the semiconductor device 100 are shown, and some members are omitted.

[0125] The semiconductor substrate 10 has end sides 102 in a top view. The semiconductor substrate 10 in this example has two sets of end sides 102 facing each other in a top view. In FIG. 3A, the X-axis and the Y-axis are parallel to any one of the end sides 102.

[0126] The semiconductor substrate 10 is provided with an active portion 120. The active portion 120 is a region where a main current flows in the depth direction between the front surface 21 and the back surface 23 of the semiconductor substrate 10 when the semiconductor device 100 operates. An emitter electrode 52 is provided above the active portion 120, but is omitted in FIG. 3A.

[0127] The active portion 120 is provided with at least one of a transistor portion 70 including transistor elements such as IGBTs and a diode portion 80 including diode elements such as a freewheeling diode (FWD). In the example of FIG. 3A, the transistor portion 70 and the diode portion 80 are alternately arranged along a predetermined arrangement direction (the X-axis direction in this example) on the front surface 21 of the semiconductor substrate 10. In other examples, only one of the transistor portion 70 and the diode portion 80 may be provided in the active portion 120.

[0128] In FIG. 3A, the region where the transistor portion 70 is arranged is marked with the symbol "I", and the region where the diode portion 80 is arranged is marked with the symbol "F". The transistor portion 70 and the diode portion 80 may each have a length in the extending direction. That is, the length of the transistor portion 70 in the Y-axis direction is larger than the width in the X-axis direction. Similarly, the length of the diode portion 80 in the Y-axis direction is larger than the width in the X-axis direction. The extending direction of the transistor portion 70 and the diode portion 80 may be the same as the longitudinal direction of each trench portion described later.

[0129] The diode portion 80 has an N+-type cathode region in a region in contact with the back surface 23 of the semiconductor substrate 10. In this specification, the region where the cathode region is provided is referred to as the diode portion 80. That is, the diode portion 80 is a region that overlaps the cathode region in a top view. A P+-type collector region 22 may be provided on the back surface 23 of the semiconductor substrate 10 in a region other than the cathode region. In this specification, the diode portion 80 may include an extended region 85 extended in the Y-axis direction up to a gate wiring described later. A collector region 22 is provided on the back surface 23 of the extended region 85.

[0130] The semiconductor device 100 may have one or more pads above the semiconductor substrate 10. The semiconductor device 100 in this example has a gate pad 112. The semiconductor device 100 may have pads such as an anode pad, a cathode pad, and a current detection pad. Each pad is disposed in the vicinity of the end side 102. The vicinity of the end side 102 refers to the region between the end side 102 and the emitter electrode 52 in a top view. When the semiconductor device 100 is mounted, each pad may be connected to an external circuit via wiring such as a wire.

[0131] A gate potential is applied to the gate pad 112. The gate pad 112 is electrically connected to the gate conductive portion 44 of the gate trench portion 40 of the active portion 120. The semiconductor device 100 includes a gate wiring that connects the gate pad 112 and the gate trench portion 40. In FIG. 3A, the gate wiring is hatched with diagonal lines.

[0132] The gate wiring in this example has an outer peripheral gate wiring 130 and an active side gate wiring 131. The outer peripheral gate wiring 130 and the active side gate wiring 131 are an example of the gate metal layer 50. The outer peripheral gate wiring 130 is disposed between the active portion 120 and the end side 102 of the semiconductor substrate 10 in a top view. The outer peripheral gate wiring 130 in this example surrounds the active portion 120 in a top view. The region surrounded by the outer peripheral gate wiring 130 in a top view may be regarded as the active portion 120. Further, the outer peripheral gate wiring 130 is connected to the gate pad 112. The outer peripheral gate wiring 130 is disposed above the semiconductor substrate 10. The outer peripheral gate wiring 130 may be a metal wiring containing aluminum or the like.

[0133] The active side gate wiring 131 is provided in the active portion 120. By providing the active side gate wiring 131 in the active portion 120, the variation in the wiring length from the gate pad 112 can be reduced for each region of the semiconductor substrate 10.

[0134] The active-side gate wiring 131 is connected to the gate trench portion of the active portion 120. The active-side gate wiring 131 is disposed above the semiconductor substrate 10. The active-side gate wiring 131 may be a wiring formed of a semiconductor such as polysilicon doped with impurities.

[0135] The active-side gate wiring 131 may be connected to the outer peripheral gate wiring 130. The active-side gate wiring 131 in this example extends in the X-axis direction so as to cross the active portion 120 from one outer peripheral gate wiring 130 to the other outer peripheral gate wiring 130 at approximately the center in the Y-axis direction. When the active portion 120 is divided by the active-side gate wiring 131, the transistor portions 70 and the diode portions 80 may be alternately arranged in the X-axis direction in each divided region.

[0136] Further, the semiconductor device 100 may include a temperature sensing portion (not shown) which is a PN junction diode formed of polysilicon or the like, and a current detecting portion (not shown) for simulating the operation of the transistor portion provided in the active portion 120.

[0137] The edge termination structure portion 140 is provided on the front surface 21 of the semiconductor substrate 10. The edge termination structure portion 140 is provided between the active portion 120 and the end side 102 in a top view. The edge termination structure portion 140 in this example is disposed between the outer peripheral gate wiring 130 and the end side 102. The edge termination structure portion 140 relaxes the electric field concentration on the front surface 21 side of the semiconductor substrate 10. The edge termination structure portion 140 may include at least one of a guard ring, a field plate, and a RESURF provided annularly surrounding the active portion 120.

[0138] FIG. 3B is an enlarged view of the region A in FIG. 3A. The region A is a region including the transistor portion 70 and the diode portion 80. The semiconductor device 100 in this example includes a gate trench portion 40, a dummy trench portion 30, an emitter region 12, a base region 14, a contact region 15, and a well region 17 provided inside the upper surface side of the semiconductor substrate 10. The gate trench portion 40 and the dummy trench portion 30 are each an example of a trench portion.

[0139] The dummy trench portion 30 in this example may have a U shape on the front surface 21 of the semiconductor substrate 10, similar to the gate trench portion 40. That is, the dummy trench portion 30 may have two extending portions 31 extending along the extending direction and a connecting portion 33 connecting the two extending portions 31.

[0140] The semiconductor device 100 in this example includes an emitter electrode 52 and a gate metal layer 50 provided above the front surface 21 of the semiconductor substrate 10. The emitter electrode 52 and the gate metal layer 50 are provided separately from each other. The transistor portion 70 in this example includes a boundary portion 90 located at the boundary between the transistor portion 70 and the diode portion 80.

[0141] The boundary portion 90 is a region provided in the transistor portion 70 and adjacent to the diode portion 80. The boundary portion 90 has a contact region 15. The boundary portion 90 in this example does not have an emitter region 12. In one example, the trench portion of the boundary portion 90 is the dummy trench portion 30. The boundary portion 90 in this example is arranged such that both ends in the X-axis direction are the dummy trench portions 30. The boundary portion 90 is not essential and may not be provided.

[0142] The contact hole 54 is provided above the base region 14 in the diode portion 80. The contact hole 54 is provided above the contact region 15 in the boundary portion 90. None of the contact holes 54 are provided above the well regions 17 provided at both ends in the Y-axis direction.

[0143] The mesa portion 91 is provided in the boundary portion 90. The mesa portion 91 has a contact region 15 on the front surface 21 of the semiconductor substrate 10. The mesa portion 91 in this example has a base region 14 and a well region 17 on the negative side in the Y-axis direction.

[0144] The mesa portion 81 is provided in the diode portion 80 in a region sandwiched between adjacent dummy trench portions 30. The mesa portion 81 has a base region 14 on the front surface 21 of the semiconductor substrate 10. The mesa portion 81 may have a contact region 15 on the front surface 21 of the semiconductor substrate 10. The mesa portion 81 of this example has a base region 14 and a well region 17 on the negative side in the Y-axis direction.

[0145] The emitter region 12 is provided in the mesa portion 71, but does not have to be provided in the mesa portion 81 and the mesa portion 91. The contact region 15 is provided in the mesa portion 71 and the mesa portion 91, but does not have to be provided in the mesa portion 81.

[0146] FIG. 3C shows a cross section taken along line b-b' of a modified example of the semiconductor device 100. This figure corresponds to the cross section taken along line b-b' of FIG. 3B. The semiconductor device 100 of this example includes a first lifetime control region 151 and a second lifetime control region 152. The first lifetime control region 151 and the second lifetime control region 152 are not essential and may not be provided.

[0147] The contact region 15 is provided above the base region 14 in the mesa portion 91. The contact region 15 is provided in contact with the dummy trench portion 30 in the mesa portion 91. In other cross sections, the contact region 15 may be provided on the front surface 21 of the mesa portion 71.

[0148] The storage region 16 is provided in the transistor portion 70 and the diode portion 80. The storage region 16 of this example is provided over the entire surfaces of the transistor portion 70 and the diode portion 80. However, the storage region 16 does not have to be provided in the diode portion 80.

[0149] The cathode region 82 is provided below the buffer region 20 in the diode portion 80. The boundary between the collector region 22 and the cathode region 82 is the boundary between the transistor portion 70 and the diode portion 80. That is, the collector region 22 is provided below the boundary portion 90 of this example.

[0150] The first lifetime control region 151 is provided in both the transistor portion 70 and the diode portion 80. Thereby, the semiconductor device 100 of this example can accelerate the recovery in the diode portion 80 and further improve the switching loss. The first lifetime control region 151 may be formed by the same method as the first lifetime control region 151 of other embodiments.

[0151] The second lifetime control region 152 is provided closer to the front surface 21 side than the center of the semiconductor substrate 10 in the depth direction of the semiconductor substrate 10. The second lifetime control region 152 of this example is provided in the drift region 18. The second lifetime control region 152 is provided in both the transistor portion 70 and the diode portion 80. The second lifetime control region 152 may be formed by implanting impurities from the front surface 21 side, or may be formed by implanting impurities from the back surface 23 side. The second lifetime control region 152 is provided at the boundary portion 90 with the diode portion 80 and may not be provided in a part of the transistor portion 70.

[0152] The second lifetime control region 152 may be formed by any of the methods for forming the first lifetime control region 151. Elements, dose amounts, etc. for forming the first lifetime control region 151 and the second lifetime control region 152 may be the same or different.

[0153] FIG. 4A is an example of a graph showing the atomic density distribution of the back surface side region 60. The vertical axis indicates the atomic density (atoms / cm 3 ), and the horizontal axis indicates the analysis depth (μm). The back surface side region 60 of this example functions as the cathode region 82. As an example, it shows the atomic density of phosphorus which is a dopant in the back surface side region 60. The back surface side region 60 has a gentle gradient region 61, a steep gradient region 62, a peak region 63, and a decreasing region 64.

[0154] Np in this example is the atomic density of the peak 65 in the cathode region 82. The atomic density Np of the peak 65 is 1.0E+18 cm in the cathode region 82-3 may be the above, 5.0E+18 cm -3 may be the above, 1.0E+19 cm -3 may be the above. The atomic density Np of peak 65 may be 1.0E21 cm in the cathode region 82 -3 may be below, 5.0E+21 cm -3 may be below, 1.0E+20 cm -3 may be below. The atomic density Np of peak 65 in this example is 1.43E+20 cm -3 is. Xp may be 0.1 μm or more, 0.2 μm or more, 0.3 μm or more in the cathode region 82. Xp may be 0.8 μm or less, 0.6 μm or less, 0.4 μm or less in the cathode region 82.

[0155] The back side region 60 in this example functions as the cathode region 82, and by having an atomic density distribution as in this example, carriers can be easily injected. In particular, by making the decreasing region 64 have a steep gradient, carriers can be easily injected. As a result, holes can be easily injected when the diode is on, and the on characteristics of the semiconductor device 100 can be improved.

[0156] FIG. 4B is an example of a graph showing the atomic density gradient of the gentle gradient region 61. This figure shows the atomic density gradient a1 of the gentle gradient region 61 in FIG. 4A. In the cathode region 82, the atomic density gradient a1 of the gentle gradient region 61 may be 1.0E22 or more, 3.0E22 or more, 5.0E22 or more, 8.0E22 or more. In the cathode region 82, the atomic density gradient a1 of the gentle gradient region 61 may be 2.0E24 or less, 1.0E24 or less, 8.0E23 or less, 5.0E23 or less. The atomic density gradient a1 in this example is 1.819 E+23.

[0157] In the cathode region 82, the average atomic density of the gentle gradient region 61 may be 20% or more, 30% or more, 40% or more, or 50% or more of the peak atomic density Np of the peak 65. The average atomic density of the gentle gradient region 61 may be 95% or less, 90% or less, 85% or less, 80% or less, or 70% or less of the peak atomic density Np of the peak 65. The average atomic density of the gentle gradient region 61 in this example is about 1.2E+20 atoms / cm 3 and is about 82% of the peak atomic density Np.

[0158] FIG. 4C is an example of a graph showing the atomic density gradient of the steep gradient region 62. This figure shows the atomic density gradient a2 of the steep gradient region 62 in FIG. 4A. The atomic density gradient a2 of the steep gradient region 62 is greater than the atomic density gradient a1 of the gentle gradient region 61. In the cathode region 82, the atomic density gradient a2 of the steep gradient region 62 may be 1.0E23 or more, 2.0E23 or more, 5.0E23 or more, or 8.0E23 or more. In the cathode region 82, the atomic density gradient a2 of the steep gradient region 62 may be 1.0E25 or less, 8.0E24 or less, 5.0E24 or less, or 3.0E24 or less. The atomic density gradient a2 in this example is 1.970 E+24.

[0159] FIG. 4D is an example of a graph showing the atomic density gradient of the decreasing region 64. This figure shows the atomic density gradient a3 of the decreasing region 64 in FIG. 4A. Since the atomic density gradient a3 is the absolute value of the gradient of the graph of the atomic density distribution in the decreasing region 64, it takes a positive value. In the cathode region 82, the atomic density gradient a3 of the decreasing region 64 may be 2.0E24 or more, 5.0E24 or more, 8.0E24 or more, or 1.0E25 or more. In the cathode region 82, the atomic density gradient a3 of the decreasing region 64 may be 2.0E26 or less, 1.0E26 or less, 8.0E25 or less, or 5.0E25 or less. The atomic density gradient a3 in this example is 2.570 E+25.

[0160] In the cathode region 82, the atomic density at the lower end of the gentle gradient region 61 may be 30% or more and 90% or less of the atomic density Np of the peak 65. The atomic density at the lower end of the gentle gradient region 61 may be 50% or more and 80% or less of the atomic density Np of the peak 65. By using laser annealing, the semiconductor device 100 of this example can increase the atomic density on the back surface 23 and reduce the contact resistance with the collector electrode 24 as compared with the case of using thermal annealing.

[0161] In the cathode region 82, the ratio α of the atomic density gradient of the gentle gradient region 61 to the atomic density gradient of the steep gradient region 62 may be 0.01 or more and 0.5 or less. The ratio α of the atomic density gradient may be 0.02 or more, 0.05 or more, or 0.1 or more in the cathode region 82. The ratio α of the atomic density gradient may be 0.3 or less, 0.2 or less, or 0.1 or less in the cathode region 82.

[0162] In the cathode region 82, the ratio β of the atomic density gradient of the steep gradient region 62 to the atomic density gradient of the decreasing region 64 may be 0.001 or more and 0.3 or less. The ratio β of the atomic density gradient may be 0.005 or more, 0.01 or more, or 0.05 or more in the cathode region 82. The ratio β of the atomic density gradient may be 0.2 or less, 0.1 or less, or 0.08 or less in the cathode region 82.

[0163] The rear surface side region 60 in this example functions as a cathode region 82. The position of the peak 65 is separated from the rear surface 23, and a gentle gradient region 61 and a steep gradient region 62 are provided between the rear surface 23 and the peak region 63. This allows the peak region 63 and the decrease region 64 to be formed at a depth of 0.1 μm or more from the rear surface 23. The injection efficiency of charge carriers (electrons in this example) may be determined by the magnitude of the atomic density of the peak 65 and the magnitude of the gradient of the decrease region 64. Here, the doping concentration may be of the same order as the atomic density. For example, even if a scratch occurs on the rear surface 23 during a manufacturing process for a semiconductor device or an assembly process for a module, etc., the depth of the scratch may be determined by the degree of the atomic density of the peak 65 and the decrease region 64. from the back surface 23 If the depth of the scratches is within the range up to the bottom end of the peak region 63 (for example, about 0.2 μm), the efficiency of charge carrier injection can be made less susceptible to the effect of the depth of the scratches. This makes it possible to suppress an increase in forward voltage drop due to scratches on the rear surface 23. The contact resistance between the rear surface side region 60 and the rear surface electrode (collector electrode 24 in this example) formed on the rear surface 23 is reduced when the atomic density of the dopant on the rear surface 23 is 1×10 18 (atoms / cm 3 On the other hand, the rear surface side region 60 is from the back surface 23 For example, when the dopant is formed to a depth of 0.2 μm or more, the atomic density of the dopant on the rear surface 23 may be maximized. In this case, the gradient of the atomic density becomes relatively gentle, and the injection efficiency of the charge carriers may not be increased. In contrast, by providing the rear surface side region 60 with the gentle gradient region 61 and the steep gradient region 62, the peak region 63 and the decrease region 64 can be formed at a depth position away from the rear surface 23, and the gradient of the atomic density in the decrease region 64 can be made steep. As a result, not only can the injection efficiency of the charge carriers be increased, but also the influence of scratches formed on the rear surface 23 can be reduced. In this way, the rear surface side region 60 of this example not only can promote the injection of carriers by having the peak region 63 and the decrease region 64, but can also be made less susceptible to the influence of scratches on the rear surface 23 by providing the gentle gradient region 61 and the steep gradient region 62.

[0164] When the back-side region 60 functions as the cathode region 82, the depletion layer may reach the cathode region 82. When the depletion layer reaches the back electrode, the leakage current increases. To prevent the depletion layer from reaching the back electrode, it is possible to stop the depletion layer inside the cathode region 82 and prevent it from reaching the back electrode by increasing the doping concentration of the cathode region 82, that is, the atomic density of the dopant in the cathode region 82. On the other hand, when a scratch occurs on the back surface 23 as described above, the leakage current may increase when the depletion layer reaches the back electrode at the scratch on the back surface 23. In particular, in the case of the density distribution that maximizes the atomic density of the dopant on the back surface 23, the atomic density of the cathode region 82 is relatively low at the tip on the front surface 21 side of the scratch. Therefore, the depletion layer easily reaches the back electrode at the scratch on the back surface 23. By separating the position of the peak 65 from the back surface 23 and providing the gentle gradient region 61 and the steep gradient region 62 between the back surface 23 and the peak region 63 as in this example, the peak region 63 or the steep gradient region 62 can be made deeper than the tip of the scratch on the back surface 23. Thereby, the depletion layer can be stopped in the peak region 63, the steep gradient region 62, or the gentle gradient region 61, and an increase in the leakage current can be suppressed.

[0165] In this way, by appropriately setting the atomic density gradient of each region of the back-side region 60, it is possible to promote carrier injection from the back-side region 60 and provide the semiconductor device 100 having good electrical characteristics. Further, the back-side region 60 of this example functions as the cathode region 82 and can stop the depletion layer at the peak 65 away from the back surface 23. Therefore, even when a scratch occurs on the back surface 23, the depth of the scratch is from the back surface 23 For example, if it is within the range up to the gentle gradient region 61 and the steep gradient region 62, an increase in the leakage current due to the scratch on the back surface 23 can be suppressed.

[0166] FIG. 5 is a flowchart showing an example of the manufacturing process of the semiconductor device 100. In step S100, the structure on the front surface 21 side of the semiconductor device 100 is formed. Also, in step S100, after forming the structure on the front surface 21 side, the back surface 23 side of the semiconductor substrate 10 is ground to adjust the thickness of the semiconductor substrate 10 according to electrical characteristics such as required breakdown voltage.

[0167] In step S102, a dopant for forming the back surface side region 60 is ion-implanted from the back surface 23 side of the semiconductor substrate 10. The back surface side region 60 may be formed over the entire back surface 23 of the semiconductor substrate 10. When the back surface side region 60 is the collector region 22, the dopant may be boron. When the back surface side region 60 is the cathode region 82, the dopant may be phosphorus. When the back surface side region 60 includes both the collector region 22 and the cathode region 82, the dopants for the collector region 22 and the cathode region 82 may be ion-implanted separately into their respective regions.

[0168] The dose amount of the dopant for forming the collector region 22 may be 2.0E+13 cm -2 or more and may be 5.0E+13 cm -2 or less. The dose amount of the dopant for forming the cathode region 82 may be 1.0E14 cm -2 or more and may be 1.0E16 cm -2 or less. The acceleration energy of the ion implantation for forming the back surface side region 60 may be 10 keV or more and 300 keV or less in the collector region 22 or the cathode region 82.

[0169] In step S104, the semiconductor substrate 10 is laser annealed from the back surface 23 side of the semiconductor substrate 10. In this example, the region where the dopant in the back surface side region 60 is ion implanted is laser annealed. By laser annealing, the region where the dopant is ion implanted is selectively heated from the back surface 23 side of the semiconductor substrate 10. By using laser annealing, it is possible to raise the temperature of a region of several micrometers on the laser irradiation surface to the temperature required for activation of the dopant while keeping the non-irradiated region not irradiated with the laser at a low temperature. Thereby, the back surface side region 60 having the peak 65 can be formed.

[0170] When the back surface side region 60 includes the collector region 22 and the cathode region 82, each of the collector region 22 and the cathode region 82 may be laser annealed simultaneously or separately. When recrystallizing the melted semiconductor substrate 10 by laser annealing, the position of the peak of the dopant for forming the back surface side region 60 can be changed. Thereby, each of the gentle gradient region 61, the steep gradient region 62, the peak region 63, and the decreasing region 64 is formed.

[0171] The type of laser used for annealing the back surface side region 60 is not particularly limited. The laser used for annealing the back surface side region 60 may be an XeCl excimer laser (wavelength 308 nm), a KrF excimer laser (wavelength 248 nm), an XeF excimer laser (wavelength 351 nm), a solid laser of YAG2ω (second harmonic of YAG) (wavelength 532 nm), or YAG3ω (third harmonic of YAG) (wavelength 355 nm). The type of laser used for annealing the back surface side region 60 may be a laser with a penetration depth of laser light of, for example, 5 μm or less.

[0172] Note that the step for forming the back side region 60 may not include thermal annealing for forming the back side region 60. That is, the recovery of defects and the activation of dopants in the back side region 60 may be realized only by laser annealing. However, the recovery of defects and the activation of dopants in the back side region 60 may also be realized by using thermal annealing in addition to laser annealing. The thermal annealing may be furnace annealing in which the semiconductor device 100 is heated in a furnace.

[0173] In step S106, a back side electrode is formed. The back side electrode may be the collector electrode 24 or may be the cathode electrode. For example, the back side electrode is formed by a sputtering method. The back side electrode may be a laminated electrode in which an aluminum layer, a titanium layer, a nickel layer, etc. are laminated. In such a process, the semiconductor device 100 including the back side region 60 can be manufactured. When other regions such as the buffer region 20 or the first lifetime control region 151 are formed on the back surface 23 side of the semiconductor substrate 10, steps for forming these regions may be appropriately added.

[0174] FIG. 6 shows the atomic density distribution before and after laser annealing of the back side region 60. The vertical axis indicates the atomic density (atoms / cm 3 ) and the secondary ion intensity of silicon (arb.Unit), and the horizontal axis indicates the analysis depth (μm) from the back surface 23.

[0175] The solid line shows the distribution of the atomic density of the back side region 60 at the time of ion implantation and after laser annealing. The dopant in the back side region 60 in this example is boron. At the time of ion implantation into the back side region 60, the peak of the atomic density distribution is at a position where the depth is the projected range Rp. The time of ion implantation , the back may be the stage before annealing of the front side region 60. The depth position Xp of the peak 65 after laser annealing is larger than the projected range Rp of the peak at the time of ion implantation. In this example, due to the melting of the irradiation region of the semiconductor substrate 10 by laser annealing, the peak of the atomic density distribution is redistributed to a position on the front surface 21 side of the semiconductor substrate 10 rather than the peak position of the atomic density distribution after ion implantation.

[0176] The depth position of the semiconductor substrate 10 melted by laser annealing may be appropriately changed according to the atomic density distribution or material of the back surface side region 60 or the like. The irradiation depth of the laser annealing, particularly the melting depth by the laser annealing, may include the region from the back surface 23 of the semiconductor substrate 10 to the range of the range of the peak Rp at the time of ion implantation, may include the region from the back surface 23 to the depth position Xp of the peak 65, and may include all the regions where the back surface side region 60 is formed. That is, the melting depth may be equal to or greater than the range of the peak Rp at the time of ion implantation. The laser irradiation is performed with the irradiation surface (the back surface 23 in this example) to which the laser is irradiated on the upper side among the main surfaces of the semiconductor substrate 10 in the wafer state, and the semiconductor substrate 10 is arranged horizontally. By setting the melting depth to be equal to or greater than the range of the peak Rp at the time of ion implantation, 50% or more of the total amount of the implanted dopant can be arranged inside the melted semiconductor material. As a result, the atomic density of the implanted dopant is substantially uniformly redistributed within the range of the melting depth. Further, when the melting time is made relatively long, the dopant precipitates on the installation surface (the front surface 21 in this example), which is the main surface opposite to the irradiation surface, along the gravity within the range of the melting depth. Due to the precipitation, the dopant moves to the front surface 21 side, so that the peak position of the dopant atomic density distribution moves to a position equal to or deeper than the range of the peak Rp at the time of ion implantation. Further, due to the movement of the dopant, a gentle gradient region 61, a steep gradient region 62, a peak region 63, and a decreasing region 64 are formed in order from the back surface 23 side toward the front surface 21 side. By setting the conditions of the laser annealing (for example, the intensity of the laser beam, the irradiation time, the number of irradiations and the time interval, the overlap rate, etc.) so that the semiconductor material melts, the dopant is redistributed, and further precipitates on the installation surface side, the back surface side region 60 having the gentle gradient region 61, the steep gradient region 62, the peak region 63, and the decreasing region 64 can be formed.

[0177] The graph of the dotted line at 1 o'clock shows the measurement results of the secondary ion intensity of silicon, which is the semiconductor substrate 10. In the region close to the back surface 23 (for example, a region of 0.05 μm or less), the measurement results are not stable, and the secondary ion intensity of silicon is not accurately measured. That is, the atomic density of the dopant in the back surface side region 60 may not be accurately measured. Therefore, in the region near the back surface 23, the measured value of the atomic density of the back surface side region 60 may be interpolated by extrapolation or the like.

[0178] Note that the integrated concentration of the back surface side region 60 may be decreased by laser annealing. The ratio of the integrated concentration of the back surface side region 60 after laser annealing to the integrated concentration of the back surface side region 60 before laser annealing may be 85% or more, 90% or more, or 95% or more in the case of boron. The ratio of the integrated concentration of the back surface side region 60 after laser annealing to the integrated concentration of the back surface side region 60 before laser annealing may be less than 100%, 99% or less, or 95% or less in the case of boron. The ratio of the integrated concentration in this example is 97%. The same may apply when the dopant is phosphorus or arsenic.

[0179] FIG. 7 shows the measurement results of the atomic density on the back surface 23 side of the semiconductor substrate 10. This figure shows the analysis results of the secondary ions measured by SIMS. Also in the results of this example, as shown in other embodiments, the back surface side region 60 has a gentle gradient region 61, a steep gradient region 62, a peak region 63, and a decreasing region 64.

[0180] FIG. 8 shows the measurement results of the doping concentration on the back surface 23 side of the semiconductor substrate 10. In this example, the dopant is boron, and an example of the distribution of the doping concentration (net doping concentration, carrier concentration) measured by the SR method is shown. The dopant is not limited to boron and may be phosphorus or arsenic. It can be seen that the distribution of the doping concentration measured by the SR method also reflects the same characteristics as the SIMS analysis results of the back surface side region 60 shown in FIG. 7. That is, the atomic density distribution in the back surface side region 60 may be substantially similar to the distribution of the doping concentration in the back surface side region 60. Note that the distribution of the doping concentration measured by the SR method may have fine increases and decreases in a plurality of measured values due to the spreading resistance measurement environment such as errors.

[0181] As shown in FIG. 8, the semiconductor device 100 may include a doping gentle gradient region 161 of the doping concentration distribution corresponding to the gentle gradient region 61 of the atomic density distribution, a doping steep gradient region 162 of the doping concentration distribution corresponding to the steep gradient region 62 of the atomic density distribution, a doping peak region 163 of the doping concentration distribution corresponding to the peak region 63 of the atomic density distribution, and a doping decreasing region 164 of the doping concentration distribution corresponding to the decreasing region 64 of the atomic density distribution. That is, the doping concentration distribution in the back surface side region 60 may have a doping gentle gradient region 161, a doping steep gradient region 162, a doping peak region 163, and a doping decreasing region 164.

[0182] N Dp is the peak doping concentration of the doping peak 165. X Dp is the depth position of the doping peak 165 from the back surface 23 in the depth direction of the semiconductor substrate 10.

[0183] The doping reduction region 164 may be a region where the doping concentration decreases from the back surface 23 toward the drift region 18 in the depth direction of the semiconductor substrate 10. The doping reduction region 164 is provided between the doping peak region 163 and the drift region 18. When the semiconductor device 100 includes the buffer region 20, the doping reduction region 164 may be provided between the doping peak region 63 and the buffer region 20 and may be in contact with the buffer region 20.

[0184] The lower end of the doping gentle gradient region 161 may be the back surface 23 of the semiconductor substrate 10. The upper end of the doping gentle gradient region 161 may be a position intermediate between the back surface 23 and the depth position of the doping peak 165 of the doping peak region 163 in the depth direction of the semiconductor substrate 10. That is, the upper end of the doping gentle gradient region 161 is the depth position X of the doping peak 165 Dp Based on this, it may be at the position of 0.5X Dp Note that the upper end of the doping gentle gradient region 161 is the doping concentration N of the doping peak 165 Dp Based on this, the doping concentration may be 0.5N Dp That is, it may be at the position where the doping concentration becomes 0.5N. Alternatively, the depth range of the doping gentle gradient region 161 may be the same depth range as the gentle gradient region 61.

[0185] The lower end of the doping steep gradient region 162 may be at the same position as the upper end of the doping gentle gradient region 161 in the depth direction of the semiconductor substrate 10. That is, the lower end of the doping steep gradient region 162 is the depth position X of the doping peak 165 Dp Based on this, it may be at the position of 0.5X Dp That is, it may be at the position where the doping concentration becomes 0.5N. The upper end of the doping steep gradient region 162 may be at the same position as the lower end of the doping peak region 163 in the depth direction of the semiconductor substrate 10. The upper end of the doping steep gradient region 162 is, as will be described later, on the back surface 23 side of the doping peak 165, and the doping concentration may be 0.95N Dp That is, it may be at the position where the doping concentration becomes 0.95N. Alternatively, the depth range of the doping steep gradient region 162 may be the same depth range as the steep gradient region 62.

[0186] The lower end of the doping peak region 163 may be at a position where the concentration is 95% of the doping concentration at the doping peak 165 on the back surface 23 side of the semiconductor substrate 10 with respect to the doping peak 165. That is, the lower end of the doping peak region 163 may be at a position where the doping concentration is 0.95N on the back surface 23 side with respect to the doping peak 165. Dp The upper end of the doping peak region 163 may be at a position where the concentration is 95% of the doping concentration at the doping peak 165 on the front surface 21 side of the semiconductor substrate 10 with respect to the doping peak 165. That is, the upper end of the doping peak region 163 may be at a position where the doping concentration is 0.95N on the front surface 21 side with respect to the doping peak 165. Dp The upper end and the lower end of the doping peak region 163 may each be at a position where the doping concentration is 0.90N. Dp The lower end of the doping peak region 163 may be at a position of 0.9X based on the depth position X of the doping peak 165. Dp Dp The upper end of the doping peak region 163 may be at a position of 1.1X based on the depth position X of the doping peak 165. Dp Dp Alternatively, the depth range of the doping peak 165 may be the same as the depth range of the peak region 63.

[0187] The lower end of the doping decrease region 164 may be at the same position as the upper end of the doping peak region 163 in the depth direction of the semiconductor substrate 10. That is, the lower end of the doping decrease region 164 may be at a position where the doping concentration is 0.95Np on the front surface 21 side with respect to the doping peak 165. The upper end of the doping decrease region 164 may be at a position where the concentration is 10% of the doping concentration at the doping peak 165 on the front surface 21 side of the semiconductor substrate 10 with respect to the doping peak 165. That is, the upper end of the doping peak region 163 may be on the front surface 21 concentration with respect to the doping peak 165, at a position where side the concentration is​​doping concentration It may be a position where it becomes 0.1 Np. Alternatively, the depth range of the doping reduction region 164 may be the same depth range as the reduction region 64.

[0188] In the back surface side region 60 of this example, the doping gentle gradient region 161, the doping steep gradient region 162, the doping peak region 163, and the doping reduction region 164 may be continuously provided in order from the back surface 23 side. That is, the upper end of the doping gentle gradient region 161 may be in contact with the lower end of the doping steep gradient region 162. The upper end of the doping steep gradient region 162 may be in contact with the lower end of the doping peak region 163. The upper end of the doping peak region 163 may be in contact with the lower end of the doping reduction region 164. In other words, the semiconductor device 100 has a boundary A D between the doping gentle gradient region 161 and the doping steep gradient region 162, may have a boundary B D between the doping steep gradient region 162 and the doping peak region 163, may have a boundary C D between the doping peak region 163 and the doping reduction region 164, and may have a boundary D D between the doping reduction region 164 and the drift region 18.

[0189] When the upper end of the doping gentle gradient region 161 and the lower end of the doping steep gradient region 162 are in contact, the doping concentration distribution from the doping gentle gradient region 161 to the doping steep gradient region 162 may be such that the gradient of the doping concentration distribution (doping concentration gradient) continuously increases. Thereby, the electrical activation rate of the dopant may be relatively high in some cases. Alternatively, the doping concentration distribution from the doping gentle gradient region 161 to the doping steep gradient region 162 may have a region where the doping concentration continuously decreases partially, or may have a portion where the doping concentration is partially continuously and flatly distributed. Here, when the doping concentration is partially continuously and flatly distributed, it may mean that in a range narrower than any one of the gentle gradient region 61, the steep gradient region 62, the doping gentle gradient region 161, or the doping steep gradient region 162, or the narrowest region, the maximum value and the minimum value of the doping concentration are within 15% of the average value of the doping concentration in the said range.

[0190] As described above, the present invention has been described using embodiments, but the technical scope of the present invention is not limited to the scope described in the above embodiments. It is obvious to those skilled in the art that various changes or improvements can be made to the above embodiments. It is clear from the description of the claims that forms with such changes or improvements can also be included in the technical scope of the present invention.

[0191] It should be noted that the execution order of each process such as operations, procedures, steps, and stages in the apparatus, system, program, and method shown in the claims, the specification, and the drawings is not explicitly indicated as "before" or "preceding" etc., and can be realized in any order unless the output of the previous process is used in the subsequent process. Regarding the operation flow in the claims, the specification, and the drawings, even if it is described for convenience using "first," "next," etc., it does not mean that it is essential to implement in this order.

Explanation of Reference Numerals

[0192] 10 ··· semiconductor substrate, 12 ··· emitter region, 14 ··· base region, 15 ··· contact region, 16 ··· storage region, 17 ··· well region, 18 ··· drift region, 20 ··· buffer region, 21 ··· front surface, 22 ··· collector region, 23 ··· back surface, 24 ··· collector electrode, 25 ··· connection part, ··· 30 ··· dummy trench part, 31 ··· extension part, 32 ··· dummy insulating film, 33 ··· connection part, 34 ··· dummy conductive part, 38 ··· interlayer insulating film, 40 ··· gate trench part, 41 ··· extension part, 42 ··· gate insulating film, 43 ··· connection part, 44 ··· gate conductive part, 50 ··· gate metal layer, 52 ··· emitter electrode, 54 ··· contact hole, 55 ··· contact hole, 56 ··· contact hole, 60 ··· back surface side region, 61 ··· gentle gradient region, 62 ··· steep gradient region, 63 ··· peak region, 64 ··· decreasing region, 65 ··· peak, 68 ··· intermediate region, 70 ··· transistor part, 71 ··· mesa part, 80 ··· diode part, 81 ··· mesa part, 82 ··· cathode region, 85 ··· extension region, 90 ··· boundary part, 91 ··· mesa part, 100 ··· semiconductor device, 102 ··· side edge, 112 ··· gate pad, 120 ··· active part, 130 ··· outer peripheral gate wiring, 131 ··· active side gate wiring, 140 ··· edge termination structure part, 151 ··· first lifetime control region, 152 ··· second lifetime control region, 161 ··· doping gentle gradient region, 162 ··· doping steep gradient region, 163 ··· doping peak region, 164 ··· doping decreasing region, 165 ··· doping peak

Claims

1. A first conductivity type drift region provided in a semiconductor substrate having a front surface and a back surface, and in the semiconductor substrate, a back surface side region of the first conductivity type or the second conductivity type provided on the back surface side of the semiconductor substrate with respect to the drift region and having a higher atomic density than the drift region are provided, the atomic density distribution of the back surface side region is in the depth direction of the semiconductor substrate, a gentle gradient region in which the atomic density of the dopant increases from the back surface side toward the front surface side of the semiconductor substrate, and a steep gradient region provided on the front surface side with respect to the gentle gradient region and in which the atomic density of the dopant increases with a larger atomic density gradient than the gentle gradient region, and a peak region provided on the front surface side with respect to the steep gradient region and having a peak in the atomic density distribution of the same dopant as the gentle gradient region, and a decreasing region provided between the peak region and the drift region and in which the atomic density of the dopant decreases toward the drift region in the depth direction of the semiconductor substrate a semiconductor device having.

2. A first conductivity type drift region provided in a semiconductor substrate having a front surface and a back surface, and in the semiconductor substrate, a back surface side region of the first conductivity type or the second conductivity type provided on the back surface side of the semiconductor substrate with respect to the drift region and having a higher atomic density than the drift region are provided, the atomic density distribution of the back surface side region is in the depth direction of the semiconductor substrate, a gentle gradient region in which the atomic density of the dopant increases from the back surface side toward the front surface side of the semiconductor substrate, and a steep gradient region provided on the front surface side with respect to the gentle gradient region and in which the atomic density of the dopant increases with a larger atomic density gradient than the gentle gradient region, and a peak region provided on the front surface side with respect to the steep gradient region and having a peak in the atomic density distribution of the dopant, and a decreasing region provided between the peak region and the drift region and in which the atomic density of the dopant decreases toward the drift region in the depth direction of the semiconductor substrate are provided, the depth of the peak of the atomic density distribution from the back surface of the semiconductor substrate is 0.8 μm or less a semiconductor device.

3. The average atomic density in the gentle gradient region is 20% or more and 95% or less of the peak atomic density of the peak of the atomic density distribution The semiconductor device according to claim 1.

4. comprising an edge termination structure portion provided on the front surface of the semiconductor substrate The semiconductor device according to claim 1. [

5. ] A drift region of a first conductivity type provided on a semiconductor substrate having a front surface and a back surface, and in the semiconductor substrate, a back surface side region of a first conductivity type or a second conductivity type provided on the back surface side of the semiconductor substrate with respect to the drift region and having a higher atomic density than the drift region comprising: The atomic density distribution of the back surface side region is in the depth direction of the semiconductor substrate, a gentle gradient region in which the atomic density of the dopant increases from the back surface side toward the front surface side of the semiconductor substrate, a steep gradient region provided on the front surface side with respect to the gentle gradient region and having a larger atomic density gradient of the dopant than the gentle gradient region, a peak region provided on the front surface side with respect to the steep gradient region and having a peak in the atomic density distribution of the dopant, a decreasing region provided between the peak region and the drift region and in which the atomic density of the dopant decreases toward the drift region in the depth direction of the semiconductor substrate having: The upper end of the gentle gradient region is at an intermediate position between the back surface and the depth position of the peak of the peak region in the depth direction of the semiconductor substrate Semiconductor device. [

6. ] A drift region of a first conductivity type provided on a semiconductor substrate having a front surface and a back surface, and in the semiconductor substrate, a back surface side region of a first conductivity type or a second conductivity type provided on the back surface side of the semiconductor substrate with respect to the drift region and having a higher atomic density than the drift region comprising: The atomic density distribution of the back surface side region is in the depth direction of the semiconductor substrate, a gentle gradient region in which the atomic density of the dopant increases from the back surface side toward the front surface side of the semiconductor substrate, a steep gradient region provided on the front surface side with respect to the gentle gradient region and having a larger atomic density gradient of the dopant than the gentle gradient region, a peak region provided on the front surface side with respect to the steep gradient region and having a peak in the atomic density distribution of the dopant, a decreasing region provided between the peak region and the drift region and in which the atomic density of the dopant decreases toward the drift region in the depth direction of the semiconductor substrate having: The lower end of the gentle gradient region is the back surface of the semiconductor substrate Semiconductor device. [

7. ] A drift region of a first conductivity type provided on a semiconductor substrate having a front surface and a back surface, and In the semiconductor substrate, a backside region of a first conductivity type or a second conductivity type, which is provided on the backside of the semiconductor substrate with respect to the drift region and has a higher atomic density than the drift region, and comprising the atomic density distribution of the backside region is in the depth direction of the semiconductor substrate, a gentle gradient region in which the atomic density of the dopant increases from the backside toward the front side of the semiconductor substrate, a steep gradient region provided on the front side with respect to the gentle gradient region and having a larger atomic density gradient in which the atomic density of the dopant increases than the gentle gradient region, a peak region provided on the front side with respect to the steep gradient region and having a peak in the atomic density distribution of the dopant, and a decreasing region provided between the peak region and the drift region and in which the atomic density of the dopant decreases toward the drift region in the depth direction of the semiconductor substrate having the lower end of the peak region is a position at a density of 95% of the atomic density of the dopant at the peak on the backside of the semiconductor substrate with respect to the peak, the upper end of the peak region is a position at a density of 95% of the atomic density of the dopant at the peak on the front side of the semiconductor substrate with respect to the peak a semiconductor device.

8. A drift region of a first conductivity type provided in a semiconductor substrate having a front side and a back side, and in the semiconductor substrate, a backside region of a first conductivity type or a second conductivity type, which is provided on the backside of the semiconductor substrate with respect to the drift region and has a higher atomic density than the drift region, and comprising the atomic density distribution of the backside region is in the depth direction of the semiconductor substrate, a gentle gradient region in which the atomic density of the dopant increases from the backside toward the front side of the semiconductor substrate, a steep gradient region provided on the front side with respect to the gentle gradient region and having a larger atomic density gradient in which the atomic density of the dopant increases than the gentle gradient region, a peak region provided on the front side with respect to the steep gradient region and having a peak in the atomic density distribution of the dopant, and a decreasing region provided between the peak region and the drift region and in which the atomic density of the dopant decreases toward the drift region in the depth direction of the semiconductor substrate having the upper end of the decreasing region is a position at a density of 10% of the atomic density of the dopant at the peak on the front side of the semiconductor substrate with respect to the peak a semiconductor device.

9. The upper end of the gentle gradient region is in contact with the lower end of the steep gradient region, The upper end of the steep gradient region is in contact with the lower end of the peak region, The upper end of the peak region is in contact with the lower end of the decreasing region The semiconductor device according to claim 1.

10. Comprising a transistor section, The back side region includes a collector region of the second conductivity type The semiconductor device according to claim 1.

11. The dopant of the collector region is boron The semiconductor device according to claim 10.

12. A semiconductor device comprising a transistor section, A drift region of the first conductivity type provided on a semiconductor substrate having a front surface and a back surface, and In the semiconductor substrate, a back side region of the first conductivity type or the second conductivity type provided on the back side of the semiconductor substrate with respect to the drift region and having a higher atomic density than the drift region, Comprising The atomic density distribution of the back side region is In the depth direction of the semiconductor substrate, a gentle gradient region in which the atomic density of the dopant increases from the back side toward the front side of the semiconductor substrate, A steep gradient region provided on the front side with respect to the gentle gradient region and having a larger atomic density gradient in which the atomic density of the dopant increases, A peak region provided on the front side with respect to the steep gradient region and having a peak in the atomic density distribution of the dopant, A decreasing region provided between the peak region and the drift region and in which the atomic density of the dopant decreases toward the drift region in the depth direction of the semiconductor substrate Having The back side region includes a collector region of the second conductivity type, In the collector region, the atomic density gradient of the dopant in the gentle gradient region is 1.0E21 [atoms / cm ４ or more and 5.0E23 [atoms / cm ４ or less The semiconductor device according to claim 10.

13. A semiconductor device comprising a transistor section, A drift region of the first conductivity type provided on a semiconductor substrate having a front surface and a back surface, and In the semiconductor substrate, a back side region of the first conductivity type or the second conductivity type provided on the back side of the semiconductor substrate with respect to the drift region and having a higher atomic density than the drift region, Comprising The atomic density distribution of the back side region is In the depth direction of the semiconductor substrate, a gentle gradient region in which the atomic density of the dopant increases from the back side toward the front side of the semiconductor substrate, A steep gradient region provided on the front side with respect to the gentle gradient region and having a larger atomic density gradient in which the atomic density of the dopant increases, A peak region provided on the front surface side of the semiconductor substrate rather than the steep gradient region, and having a peak in the atomic density distribution of the dopant, A decreasing region provided between the peak region and the drift region, and in the depth direction of the semiconductor substrate, the atomic density of the dopant decreasing toward the drift region having The back surface side region includes a collector region of the second conductivity type. In the collector region, the atomic density gradient of the dopant in the steep gradient region is 1.0E22 [atoms / cm ４ or more and 1.0E24 [atoms / cm ４ or less Semiconductor device.

14. A semiconductor device including a transistor portion, A drift region of the first conductivity type provided on a semiconductor substrate having a front surface and a back surface, In the semiconductor substrate, a back surface side region of the first conductivity type or the second conductivity type provided on the back surface side of the semiconductor substrate rather than the drift region, and having a higher atomic density than the drift region comprising The atomic density distribution of the back surface side region is In the depth direction of the semiconductor substrate, a gentle gradient region in which the atomic density of the dopant increases from the back surface side toward the front surface side of the semiconductor substrate, A steep gradient region provided on the front surface side of the gentle gradient region, and the atomic density of the dopant increasing with a larger atomic density gradient than the gentle gradient region A peak region provided on the front surface side of the steep gradient region, and having a peak in the atomic density distribution of the dopant, A decreasing region provided between the peak region and the drift region, and in the depth direction of the semiconductor substrate, the atomic density of the dopant decreasing toward the drift region having The back surface side region includes a collector region of the second conductivity type. In the collector region, the atomic density gradient of the dopant in the decreasing region is 1.0E23 [atoms / cm ４ or more and 1.0E25 [atoms / cm ４ or less Semiconductor device.

15. In the collector region, the atomic density of the dopant at the peak of the peak region is 1.0E+16 [cm －３ or more and 1.0E+20 [cm －３ or less The semiconductor device according to claim 10.

16. In the collector region, the atomic density of the dopant at the lower end of the gentle gradient region is 10% or more and 80% or less of the atomic density at the peak of the peak region The semiconductor device according to claim 10.

17. A semiconductor device including a transistor portion, A drift region of the first conductivity type provided on a semiconductor substrate having a front surface and a back surface, In the semiconductor substrate, a back surface side region of the first conductivity type or the second conductivity type provided on the back surface side of the semiconductor substrate rather than the drift region, and having a higher atomic density than the drift region comprising The atomic density distribution of the back surface side region is In the depth direction of the semiconductor substrate, a gentle gradient region in which the atomic density of the dopant increases from the back surface side toward the front surface side of the semiconductor substrate, A steep gradient region provided on the front surface side of the gentle gradient region, where the atomic density of the dopant increases with an atomic density gradient larger than that of the gentle gradient region, A peak region provided on the front surface side of the steep gradient region and having a peak in the atomic density distribution of the dopant, A decreasing region provided between the peak region and the drift region, where the atomic density of the dopant decreases toward the drift region in the depth direction of the semiconductor substrate, and having, The back surface side region includes a collector region of the second conductivity type, In the collector region, the ratio of the atomic density gradient of the gentle gradient region to the atomic density gradient of the steep gradient region of the dopant is 0.01 or more and 0.8 or less. Semiconductor device.

18. A semiconductor device including a transistor portion, A drift region of the first conductivity type provided on a semiconductor substrate having a front surface and a back surface, In the semiconductor substrate, a back surface side region of the first conductivity type or the second conductivity type provided on the back surface side of the semiconductor substrate with respect to the drift region and having a higher atomic density than the drift region, and comprising, The atomic density distribution of the back surface side region is, In the depth direction of the semiconductor substrate, a gentle gradient region where the atomic density of the dopant increases from the back surface side toward the front surface side of the semiconductor substrate, A steep gradient region provided on the front surface side of the gentle gradient region, where the atomic density of the dopant increases with an atomic density gradient larger than that of the gentle gradient region, A peak region provided on the front surface side of the steep gradient region and having a peak in the atomic density distribution of the dopant, A decreasing region provided between the peak region and the drift region, where the atomic density of the dopant decreases toward the drift region in the depth direction of the semiconductor substrate, and having, The back surface side region includes a collector region of the second conductivity type, In the collector region, the ratio of the atomic density gradient of the steep gradient region to the atomic density gradient of the decreasing region of the dopant is 0.001 or more and 0.5 or less. Semiconductor device.

19. Comprising a diode portion, The back surface side region includes a cathode region of the first conductivity type. The semiconductor device according to any one of claims 1 to 18.

20. The dopant in the cathode region is phosphorus. The semiconductor device according to claim 19.

21. A semiconductor device including a diode portion, A drift region of a first conductivity type provided in a semiconductor substrate having a front surface and a back surface, In the semiconductor substrate, a back surface side region of a first conductivity type or a second conductivity type provided on the back surface side of the semiconductor substrate with respect to the drift region and having a higher atomic density than the drift region, Comprising, The atomic density distribution of the back surface side region is, In the depth direction of the semiconductor substrate, a gentle gradient region in which the atomic density of the dopant increases from the back surface side toward the front surface side of the semiconductor substrate, A steep gradient region provided on the front surface side with respect to the gentle gradient region and having an atomic density gradient larger than that of the gentle gradient region, where the atomic density of the dopant increases, A peak region provided on the front surface side with respect to the steep gradient region and having a peak in the atomic density distribution of the dopant, A decreasing region provided between the peak region and the drift region, in which the atomic density of the dopant decreases toward the drift region in the depth direction of the semiconductor substrate Having, The back surface side region includes a cathode region of a first conductivity type, In the cathode region, the atomic density gradient of the dopant in the gentle gradient region is 1.0E22 [atoms / cm ４ or more and 2.0E24 [atoms / cm ４ or less Semiconductor device.

22. A semiconductor device including a diode portion, A drift region of a first conductivity type provided in a semiconductor substrate having a front surface and a back surface, In the semiconductor substrate, a back surface side region of a first conductivity type or a second conductivity type provided on the back surface side of the semiconductor substrate with respect to the drift region and having a higher atomic density than the drift region, Comprising, The atomic density distribution of the back surface side region is, In the depth direction of the semiconductor substrate, a gentle gradient region in which the atomic density of the dopant increases from the back surface side toward the front surface side of the semiconductor substrate, A steep gradient region provided on the front surface side with respect to the gentle gradient region and having an atomic density gradient larger than that of the gentle gradient region, where the atomic density of the dopant increases, A peak region provided on the front surface side with respect to the steep gradient region and having a peak in the atomic density distribution of the dopant, A decreasing region provided between the peak region and the drift region, in which the atomic density of the dopant decreases toward the drift region in the depth direction of the semiconductor substrate Having, The back surface side region includes a cathode region of a first conductivity type, In the cathode region, the atomic density gradient of the dopant in the steep gradient region is 1.0E23 [atoms / cm ４ or more and 1.0E25 [atoms / cm ４ or less Semiconductor device.

23. A semiconductor device including a diode portion, A drift region of a first conductivity type provided in a semiconductor substrate having a front surface and a back surface, In the semiconductor substrate, a backside region of a first conductivity type or a second conductivity type, which is provided on the backside of the semiconductor substrate with respect to the drift region and has a higher atomic density than the drift region, comprises The atomic density distribution of the backside region is In the depth direction of the semiconductor substrate, a gentle gradient region in which the atomic density of the dopant increases from the backside toward the front side of the semiconductor substrate, A steep gradient region provided on the front side with respect to the gentle gradient region, in which the atomic density of the dopant increases with a larger atomic density gradient than the gentle gradient region, A peak region provided on the front side with respect to the steep gradient region and having a peak in the atomic density distribution of the dopant, A decreasing region provided between the peak region and the drift region, in which the atomic density of the dopant decreases toward the drift region in the depth direction of the semiconductor substrate has The backside region includes a cathode region of a first conductivity type, In the cathode region, the atomic density gradient of the dopant in the decreasing region is 2.0E24 [atoms / cm ４ or more and 2.0E26 [atoms / cm ４ or less Semiconductor device.

24. A semiconductor device including a diode section, A drift region of a first conductivity type provided on a semiconductor substrate having a front side and a back side, In the semiconductor substrate, a backside region of a first conductivity type or a second conductivity type, which is provided on the backside of the semiconductor substrate with respect to the drift region and has a higher atomic density than the drift region, comprises The atomic density distribution of the backside region is In the depth direction of the semiconductor substrate, a gentle gradient region in which the atomic density of the dopant increases from the backside toward the front side of the semiconductor substrate, A steep gradient region provided on the front side with respect to the gentle gradient region, in which the atomic density of the dopant increases with a larger atomic density gradient than the gentle gradient region, A peak region provided on the front side with respect to the steep gradient region and having a peak in the atomic density distribution of the dopant, A decreasing region provided between the peak region and the drift region, in which the atomic density of the dopant decreases toward the drift region in the depth direction of the semiconductor substrate has The backside region includes a cathode region of a first conductivity type, In the cathode region, the atomic density of the dopant at the peak of the peak region is 1.0E19 [cm －３ or more and 1.0E21 [cm －３ or less Semiconductor device.

25. A semiconductor device including a diode section, A drift region of a first conductivity type provided on a semiconductor substrate having a front side and a back side, In the semiconductor substrate, a backside region of a first conductivity type or a second conductivity type, which is provided on the backside of the semiconductor substrate with respect to the drift region and has a higher atomic density than the drift region, comprises The atomic density distribution of the back side region is in the depth direction of the semiconductor substrate, a gentle gradient region in which the atomic density of the dopant increases from the back side toward the front side of the semiconductor substrate, a steep gradient region provided on the front side of the gentle gradient region and having an atomic density gradient of the dopant larger than that of the gentle gradient region, a peak region provided on the front side of the steep gradient region and having a peak in the atomic density distribution of the dopant, a decreasing region provided between the peak region and the drift region and having a decreasing atomic density of the dopant toward the drift region in the depth direction of the semiconductor substrate and has the back side region includes a cathode region of a first conductivity type, in the cathode region, the atomic density of the dopant at the lower end of the gentle gradient region is 30% or more and 90% or less of the atomic density of the dopant at the peak of the peak region semiconductor device.

26. A semiconductor device including a diode section, a drift region of a first conductivity type provided on a semiconductor substrate having a front surface and a back surface, in the semiconductor substrate, a back side region of a first conductivity type or a second conductivity type provided on the back side of the semiconductor substrate with respect to the drift region and having a higher atomic density than the drift region, and includes the atomic density distribution of the back side region is in the depth direction of the semiconductor substrate, a gentle gradient region in which the atomic density of the dopant increases from the back side toward the front side of the semiconductor substrate, a steep gradient region provided on the front side of the gentle gradient region and having an atomic density gradient of the dopant larger than that of the gentle gradient region, a peak region provided on the front side of the steep gradient region and having a peak in the atomic density distribution of the dopant, a decreasing region provided between the peak region and the drift region and having a decreasing atomic density of the dopant toward the drift region in the depth direction of the semiconductor substrate and has the back side region includes a cathode region of a first conductivity type, in the cathode region, the ratio of the atomic density gradient of the dopant in the gentle gradient region to the atomic density gradient of the dopant in the steep gradient region is 0.01 or more and 0.5 or less semiconductor device.

27. A semiconductor device including a diode section, a drift region of a first conductivity type provided on a semiconductor substrate having a front surface and a back surface, In the semiconductor substrate, a back-side region of a first conductivity type or a second conductivity type, which is provided on the back-side of the semiconductor substrate with respect to the drift region and has a higher atomic density than the drift region, and comprising the atomic density distribution of the back-side region is in the depth direction of the semiconductor substrate, a gentle gradient region in which the atomic density of the dopant increases from the back-side toward the front-side of the semiconductor substrate, a steep gradient region provided on the front-side with respect to the gentle gradient region, in which the atomic density of the dopant increases with a larger atomic density gradient than the gentle gradient region, a peak region provided on the front-side with respect to the steep gradient region and having a peak in the atomic density distribution of the dopant, a decreasing region provided between the peak region and the drift region, in which the atomic density of the dopant decreases toward the drift region in the depth direction of the semiconductor substrate and having the back-side region includes a cathode region of a first conductivity type, in the cathode region, the ratio of the atomic density gradient of the steep gradient region to the atomic density gradient of the decreasing region of the dopant is 0.001 or more and 0.3 or less semiconductor device.

28. A drift region of a first conductivity type provided in a semiconductor substrate having a front-side and a back-side, and in the semiconductor substrate, a back-side region of a first conductivity type or a second conductivity type, which is provided on the back-side of the semiconductor substrate with respect to the drift region and has a higher atomic density than the drift region comprising the atomic density distribution of the back-side region is in the depth direction of the semiconductor substrate, a gentle gradient region in which the atomic density of the dopant increases from the back-side toward the front-side of the semiconductor substrate, a steep gradient region provided on the front-side with respect to the gentle gradient region, in which the atomic density of the dopant increases with a larger atomic density gradient than the gentle gradient region, a peak region provided on the front-side with respect to the steep gradient region and having a peak in the atomic density distribution of the dopant, a decreasing region provided between the peak region and the drift region, in which the atomic density of the dopant decreases toward the drift region in the depth direction of the semiconductor substrate and having the doping concentration of the dopant at the peak of the peak region is 10% or more and 100% or less of the atomic density of the dopant at the peak of the peak region semiconductor device.

29. A drift region of a first conductivity type provided on a semiconductor substrate having a front surface and a back surface, and in the semiconductor substrate, a back surface side region of a first conductivity type or a second conductivity type provided on the back surface side of the semiconductor substrate with respect to the drift region and having a higher atomic density than the drift region, and comprising: The atomic density distribution of the back surface side region is in the depth direction of the semiconductor substrate, a gentle gradient region in which the atomic density of the dopant increases from the back surface side toward the front surface side of the semiconductor substrate, a steep gradient region provided on the front surface side with respect to the gentle gradient region and having an atomic density gradient of the dopant larger than that of the gentle gradient region and increasing the atomic density of the dopant, a peak region provided on the front surface side with respect to the steep gradient region and having a peak in the atomic density distribution of the dopant, and a decreasing region provided between the peak region and the drift region and having the atomic density of the dopant decreasing toward the drift region in the depth direction of the semiconductor substrate. having The doping concentration distribution of the back surface side region includes a doping peak region having a peak in the doping concentration distribution in the peak region. A semiconductor device.

30. A transistor portion having a collector region of a second conductivity type and a diode portion having a cathode region of a first conductivity type, and comprising: The gentle gradient region, the steep gradient region, the peak region, and the decreasing region are provided in each of the collector region and the cathode region. The semiconductor device according to any one of claims 1 to 9.

31. A step of ion implanting a dopant into the back surface of a semiconductor substrate having a front surface and a back surface, and a step of irradiating the back surface of the semiconductor substrate with a laser, and comprising: In the step of irradiating the laser, the melting depth of the semiconductor substrate melted by the irradiation of the laser includes the depth position of the peak of the atomic density distribution of the dopant after the step of ion implanting the dopant. The step of irradiating the laser redistributes the depth position of the peak of the atomic density distribution of the dopant to the front surface side of the semiconductor substrate with respect to the peak position of the atomic density distribution of the dopant in the step of ion implanting by melting the irradiated region of the semiconductor substrate by the irradiation of the laser, in the depth direction of the semiconductor substrate, a gentle gradient region in which the atomic density of the dopant increases from the back surface toward the front surface side of the semiconductor substrate. A steep gradient region provided on the front surface side of the semiconductor substrate with respect to the gentle gradient region, where the atomic density of the dopant increases with an atomic density gradient larger than that of the gentle gradient region, and A peak region provided on the front surface side of the semiconductor substrate with respect to the steep gradient region, having a peak in the atomic density distribution of the dopant, and A decreasing region provided between the peak region and the drift region, where the atomic density of the dopant decreases toward the drift region in the depth direction of the semiconductor substrate, and A redistribution step of forming the above, The redistribution step includes a step of precipitating the dopant on the front surface side by melting the irradiated region, thereby forming the gentle gradient region, the steep gradient region, the peak region, and the decreasing region. A method for manufacturing a semiconductor device.

32. The step of irradiating the laser includes irradiating the back surface of the semiconductor substrate with a laser to form a collector region of a second conductivity type, and simultaneously irradiating the back surface of the semiconductor substrate with a laser to form a cathode region of a first conductivity type. The method for manufacturing a semiconductor device according to claim 31.

33. In a semiconductor substrate, a step of forming a drift region of a first conductivity type, and In the semiconductor substrate, a step of forming a back surface side region of a first conductivity type or a second conductivity type having a higher atomic density than the drift region on the back surface side of the semiconductor substrate with respect to the drift region, and Comprising, The step of forming the back surface side region is A step of ion implanting a dopant into the back surface of the semiconductor substrate, and A step of forming a gentle gradient region where the atomic density of the dopant increases from the back surface side toward the front surface side of the semiconductor substrate in the depth direction of the semiconductor substrate, and A step of forming a steep gradient region where the atomic density of the dopant increases with an atomic density gradient larger than that of the gentle gradient region on the front surface side of the gentle gradient region, and A step of forming a peak region having a peak in the atomic density distribution of the same dopant as the gentle gradient region on the front surface side of the steep gradient region, and A step of forming a decreasing region where the atomic density of the dopant decreases toward the drift region in the depth direction of the semiconductor substrate between the peak region and the drift region. A method for manufacturing a semiconductor device having the above.

34. The step of forming the back surface side region includes a step of laser annealing the semiconductor substrate from the back surface side of the semiconductor substrate. The method for manufacturing a semiconductor device according to claim 33.

35. In the step of laser annealing, the melting depth of the semiconductor substrate melted by laser irradiation is at or deeper than the peak position of the atomic density distribution of the dopant after ion implantation. The method of manufacturing a semiconductor device according to claim 34.

36. In the step of laser annealing, the melting of the irradiation region of the semiconductor substrate by the laser annealing redistributes the peak of the atomic density distribution of the dopant to a position on the front surface side of the semiconductor substrate that is deeper than the peak position of the atomic density distribution of the dopant after ion implantation. The method of manufacturing a semiconductor device according to claim 35.

37. The step of redistributing the peak of the atomic density distribution includes the step of depositing the dopant on the front surface side by melting the irradiation region. The method of manufacturing a semiconductor device according to claim 36.

38. The step of forming the back surface side region includes providing the graded region, the steep graded region, the peak region, and the decreasing region in the second conductivity type collector region provided in the transistor portion and the first conductivity type cathode region provided in the diode portion, respectively. The method of manufacturing a semiconductor device according to claim 37.

39. The step of forming the back surface side region does not include thermal annealing for forming the back surface side region. The method of manufacturing a semiconductor device according to any one of claims 33 to 38.

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