Dielectric-Filled Nanostructured Silica Substrate for Flat Optical Devices

Abstract

A method and apparatus for fabricating a flat optical structure is disclosed, the method including etching at least one trench in a substrate, disposing a dielectric material in the at least one trench in the substrate, and encapsulating a top of the substrate with a film.

Description

Technical Field

[0001] Embodiments of the present disclosure generally relate to optical devices. More particularly, aspects of the present disclosure relate to a dielectric-filled nanostructured silica substrate for flat optical devices.

Background Art

[0002] Description of Related Art In the case of flat optical devices, the dielectric film is structured with features smaller than the operating wavelength. For example, in the visible and near-infrared spectra, the smallest features of the nanostructure are often as small as 30 nanometers, exceeding most lithography methods available for large-scale device manufacturing.

[0003] Flat optical devices are often exposed to harsh conditions during use. Conventional flat optical designs have structures that limit their use because they may not be sufficiently robust against the operating conditions. There is a need to provide flat optical devices that can withstand increasingly harsh operating conditions.

[0004] Another drawback of conventional manufacturing methods and apparatuses is that the size of the features produced is limited in conventional manufacturing methods due to the limited lithography methods available.

[0005] There is a need to provide methods and apparatuses for manufacturing flat optical devices that are suitable for their intended purposes.

[0006] There is a further need to provide a method for manufacturing flat optical devices that is economical for large-scale manufacturing.

[0007] There is a further need to provide a method for manufacturing flat optical devices that can incorporate small-scale nanostructures.

Summary of the Invention

[0008] The summary aspects are presented for illustrative purposes only and are not intended to limit the claims or the disclosure.

[0009] In one non - limiting embodiment, a method for fabricating a flat optical structure is disclosed, the method comprising providing a substrate, etching at least one nanotrench in the substrate, disposing a dielectric material within at least one nanotrench in the substrate, and encapsulating the top of the substrate with a film.

[0010] In another exemplary embodiment, a method for fabricating a flat optical structure is disclosed, the method comprising providing a substrate, depositing a material on a first surface of the substrate, etching at least one nanotrench in the material deposited on the first surface of the substrate, and encapsulating the top of the material deposited on the first surface of the substrate with a capsule material.

[0011] In another exemplary embodiment, a method for fabricating a flat optical structure is disclosed, the method comprising providing a substrate, depositing a material on a first surface of the substrate, etching at least one trench in the material deposited on the first surface of the substrate, and encapsulating the top of the material deposited on the first surface of the substrate with a capsule material.

[0012] In another exemplary embodiment, a method for fabricating a flat optical structure is disclosed, the method comprising etching at least one trench in at least one flat surface of a silicon dioxide substrate, disposing a dielectric material in at least one trench in at least one flat surface of the silicon dioxide substrate, and encapsulating the dielectric material disposed in at least one trench in at least one flat surface of the silicon dioxide substrate with a film.

[0013] Brief Description of the Drawings To better understand the above features of the present disclosure, a more specific description of the present disclosure briefly summarized above can be obtained by referring to the embodiments, some of which are shown in the accompanying drawings. However, it should be noted that the accompanying drawings only show exemplary embodiments and should not be regarded as limiting the scope thereof, and other equally effective embodiments can be recognized.

Brief Description of the Drawings

[0014]

FIG. 1A-C

FIG. 2A-C

FIG. 3A-C

FIG. 4A-B

FIG. 5A-C

FIG. 6A-C

FIG. 7

FIG. 8

FIG. 9

FIG. 10

[0015] In the exemplary embodiments described below, configurations and methods for providing the manufacture of flat optical devices are disclosed. In the described embodiments, different methods and materials are used as compared to conventional methods and materials for manufacturing flat optical devices. The methods and apparatus provided enable the superior manufacture of more compliant flat optical devices as compared to conventional counterparts. Aspects of the apparatus provide for the use of different materials such as silicon dioxide (SiO 2 ) having a low refractive index (RI) and a low dielectric constant value. Other components of the apparatus use titanium dioxide (TiO 2 ) having a higher refractive index and a low dielectric constant value. The functional materials have a high refractive index (RI) and a low dielectric constant and may be referred to as a "dielectric" different from the substrate, the interstitial space, and the encapsulant. In the illustrated and described embodiments, the terms trench and pillar are used. The lateral dimensions of the trenches and pillars are on the order of half of the operating wavelength.

[0016] In embodiments, instead of using pillars, aspects of the present disclosure attempt to use trenches in the dielectric material to achieve similar results. In manufacturing, some embodiments are more cost-effective to achieve using trench technology than using pillars.

[0017] To enhance the overall durability of the design, several components are dedicated to the placement of the encapsulant material. The encapsulant material covers one section of the component and can provide not only the necessary dielectric properties but also wear resistance to adapt the resulting configuration to the intended purpose.

[0018] In some non-limiting embodiments, silicon dioxide materials are used as device encapsulants to manufacture faster, less expensive, and overall superior operating devices. In embodiments, a structured silicon dioxide film is used in combination with a silicon dioxide substrate having a desired nanostructure. The nanostructures can be pillars or holes and can have different cross-sections such as square, circular, elliptical, or any shape. The lattice can also be configured in a square, hexagonal, or any position. The gaps of the created nanostructures can be filled as needed. The gaps can be filled with spin-on dielectric materials (such as titanium dioxide, SiN, ZnO) or materials that can be used in fluidized chemical vapor deposition.

[0019] In an alternative nanostructure design, holes or trenches can be placed in the dielectric film compared to the achieved dielectric nanopillars. In one non-limiting embodiment, a flat optical device can be fabricated starting from a silica substrate and then depositing a dielectric thin film on the structured silica substrate and any gap-filling material. In embodiments, the gaps of the created component are filled and then encapsulated. In one example embodiment, the silica substrate is made such that the silica substrate is structured in a profile. This profile is then filled using a spin-on dielectric to easily and cost-effectively fill the structured substrate to construct a nanostructure. In embodiments, trenches (holes) in the dielectric film can occur instead of pillars and provide optical performance comparable to that of the pillar structure embodiments.

[0020] In the disclosed embodiments, fabricating trenches on a dielectric film or on a substrate is an excellent process compared to the conventional method of fabricating isolated pillars on a dielectric film. The nanotrenches can be used in the structured silica method or in the method of depositing a dielectric film on a planar silica substrate and nanostructuring the result.

[0021] Referring to A of FIG. 1, a top view of a dielectric nanotrench is shown. In the illustrated embodiment, the values d and g are such that these values are less than one measurement wavelength. In the top view of the dielectric nanotrench, the structure measured by the value g is TiO as a non-limiting embodiment. 2 is. The high RI value can be used in low absorption dielectrics of value g (e.g., TiO 2 , GaP, aSi, cSi, SiN, etc.). The structure indicated by the distance d is SiO having a low RI and a low absorption dielectric. 2 is. The height of the trench made with "h" in B of FIG. 1 can vary because the distance between the substrate 100 and the encapsulant 102 can vary. A perspective view 1C is presented, showing the layer of SiO 2 and the layer of TiO 2 . For further clarity, titanium dioxide TiO 2 is formed in a hash tag or pond shape (i.e., "#"), and silicon dioxide forms the rest of the space between the substrate, the encapsulant, and the configuration flange of the shape.

[0022] Referring to A of FIG. 2, a top view of a dielectric nanopillar structure is shown. In the illustrated embodiment, the values d and g are such that these values are less than one measurement wavelength. In the top view of the dielectric nanopillar, the structure measured by the value g is SiO as a non-limiting embodiment. 2 is. The value of d measures part of the nanopillar structure made of TiO 2 . The high RI value is, for example, a low absorption dielectric (TiO 2, GaP, aSi, cSi, SiN, etc.) and can be used. Since the distance between the substrate 200 and the encapsulant 202 can vary, the height of the trench creating "h" can vary. A perspective view 2C is presented, showing a layer of SiO 2 and a layer of TiO 2 .

[0023] Referring to A, B, and C of FIG. 3, a process flow of a nanopillar or nanotrench design is shown. In A of FIG. 3, a substrate 300 provided with etched pillars / trenches 302 is provided. In B of FIG. 3, a spin on a high RI, low dielectric constant dielectric is used to fill the pillars / trenches 302. As it progresses further over time, in C of FIG. 3, the construct from B of FIG. 3 is encapsulated with SiO 2 .

[0024] Referring to A and B of FIG. 4, the as-built construct obtained from FIG. 3 is presented. A, B, and C of FIG. 3 show the ideal structure resulting from the described methodology, while A and B of FIG. 4 show that the filling of the trenches in B of FIG. 3 occurs such that the top layer of the overfilled dielectric layer 400 exists and, in reality, the trenches fill the upper part. Next, a capsule 402 is placed on the dielectric layer 400 to construct the final construct.

[0025] Referring to A, B, and C of FIG. 5, a second process flow is shown in another embodiment. In A of FIG. 5, SiO 2 pillars are etched on an SiO 2 substrate. In B of FIG. 5, the nanotrenches etched in SiO 2 are filled with a spin-on high n, low dielectric constant dielectric material. In C of FIG. 5, the construct obtained from B of FIG. 5 is encapsulated with a material having a low RI and a low dielectric constant.

[0026] Referring to A, B, and C of FIG. 6, a process flow different from that described in A, B, and C of FIG. 5 is shown. In A of FIG. 6, SiO 2A substrate 600 is provided, and a high RI, low dielectric constant dielectric 602 is disposed on the surface of the substrate 600 such as SiO 2 In B of FIG. 6, the nanotrench 604 is disposed in the high RI, low dielectric constant dielectric layer 602. Moving on to C of FIG. 6, the trench is filled with a low RI, low dielectric constant material to provide a complete structure.

[0027] Since the "as-built" embodiments may differ from the ideal design, different variations of the above embodiments were tested for compliance to confirm that such "as-built" embodiments meet the design goals. Since the illustrated embodiments use trenches instead of pillar structures, tests were conducted to determine whether the two types of structures (pillars and trenches) provide similar results in the tests.

[0028] Referring to FIG. 7, a graph of phase change versus diameter is shown. In the illustrated graph, the filled circles represent pillars with circular cross-sections. The hollow circles provide trenches with circular cross-sections. The filled squares represent pillars with square cross-sections. The hollow squares represent trenches with square cross-sections. In the illustrated graph, the transmission phases of both the circular pillars and the square pillars start at a value of 0 and increase to 1 over the duration of the graph. In the trench configuration, the value of the transmission phase starts at 1 and decreases to 0 over the duration of the graph. Thus, as can be seen from FIG. 8, phase changes occur in both the positive and negative configurations. Since the lateral dimensions of the nanopillars (trenches) vary monotonically, in one embodiment it is important to access all possible values of the transmission phase (normalized) between 0 and 1. At the same time, regardless of the change in the size of the nanostructure, the transmission amplitude should be as close to 1 as possible, i.e., remain at a maximum.

[0029] Referring to FIG. 8, a graph of amplitude versus diameter is shown. In the illustrated graph, the filled circles indicate the configuration of positive circles. The hollow circles provide the configuration of negative circles. The filled squares indicate the configuration of positive squares. The hollow squares indicate the configuration of negative squares. As shown in FIG. 8, the configurations of the positive circles and positive squares have a value of approximately 1 up to 180 nm and then decrease slowly. The values of the negative circles and negative squares are slightly lower with an amplitude of about.7 and increase to a value of about 1 for the remaining diameter values. In the illustrated embodiment, the pillars transmit a greater amplitude than the trenches.

[0030] Referring to FIG. 9, a graph of phase change versus the side dimension of a square is shown. In both square pillar configurations, as the measured side increases, the phase change increases. As shown, the higher the pillars of a particular configuration, the larger the minimum (closest) gap between two adjacent pillars. To increase the film thickness from 600 nm to 850 nm, the overall transmission amplitude is increased and the minimum gap requirement is improved from 40 nm to 600 nm. FIG. 10 presents the wavelength, dielectric type, and sizing characteristics in one non-limiting embodiment. In the illustrated embodiment, aspects of the present disclosure indicate that the shape of a square pillar is more desirable than a square trench, a square trench is more desirable than a circular pillar, and a circular pillar is more desirable than a circular trench.

[0031] Through tests performed on various modifications of ideal and "as-built" type constructs, the tests show that by increasing the thickness of the dielectric film used in different embodiments, the rounded corners of the square trenches can be compensated for. In the case of embodiments where the "as-built" construct has a residual top layer, minimal changes occur to the phase change and the amplitude of the signal. The encapsulation material used on the top surface can affect the depth of the trenches used. Lowering the refractive index of the encapsulation material results in a lower aspect ratio (h:d) and thus relaxes the manufacturing constraints regarding the etching of nanostructures.

[0032] In the illustrated embodiment, from a manufacturing perspective, a square configuration is easier to manufacture than a circular configuration, and thus, a square is less expensive to manufacture than a circle.

[0033] In the illustrated embodiment, the described structure may have a structure smaller than 30 nanometers, thereby exceeding the resolution limit of conventional devices.

[0034] The flat optical device is processed such that the components are encapsulated. Such encapsulation enables a more durable device that is more suitable for the intended purpose.

[0035] Aspects of the present disclosure provide a method for manufacturing a flat optical device that is economical for large-scale manufacturing.

[0036] In one example embodiment, a method for fabricating a flat optical structure is disclosed, the method comprising: etching at least one trench in a substrate; disposing a dielectric material in at least one trench of the substrate; and encapsulating the top of the substrate with a film.

[0037] In another exemplary embodiment, a method is provided in which the substrate is made of silicon dioxide.

[0038] In another exemplary embodiment, a method is provided in which disposing a dielectric material in at least one trench in the substrate is via a spinning process.

[0039] In another exemplary embodiment, the method of encapsulating the top of the substrate with a film is provided by using a SiO 2 film.

[0040] In another exemplary embodiment, a method is provided in which disposing a dielectric material in at least one trench in the substrate includes providing an overfilled dielectric layer.

[0041] In another exemplary embodiment, a method for fabricating a flat optical structure, the method comprising: providing a substrate; depositing a material on a first surface of the substrate; etching at least one trench in the material deposited on the first surface of the substrate; and encapsulating an upper portion of the material deposited on the first surface of the substrate with an encapsulation material.

[0042] In another exemplary embodiment, a method can be implemented in which the substrate is made of SiO 2 can be implemented.

[0043] In another exemplary embodiment, a method can be implemented in which the encapsulation material has a low refractive index and is a low dielectric constant material.

[0044] In another exemplary embodiment, a structure is disclosed that includes a substrate having at least one trench, a spun material disposed in at least one nanotrench, and an encapsulation material disposed in contact with the substrate and the spun material.

[0045] In another exemplary embodiment, the spun material disposed in at least one trench further includes an overfill layer.

[0046] In another exemplary embodiment, the spun material disposed in at least one trench is titanium dioxide.

[0047] In another exemplary embodiment, the substrate having at least one trench is made of silicon dioxide.

[0048] In another exemplary embodiment, the spun material is one of GaP, aSi, cSi, and SiN.

[0049] In another exemplary embodiment, a method for fabricating a flat optical structure is disclosed, the method comprising: etching at least one trench in at least one flat surface of a silicon dioxide substrate; disposing a dielectric material in at least one trench in at least one flat surface of the silicon dioxide substrate; and encapsulating the dielectric material disposed in at least one trench in at least one flat surface of the silicon dioxide substrate with a film.

[0050] In another non-limiting embodiment, a method in which the dielectric material is deposited by a spinning process can be implemented.

[0051] In another non-limiting embodiment, a method in which the material is GaP can be implemented.

[0052] In another non-limiting embodiment, a method in which the material is one of aSi and SiN can be implemented.

[0053] While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the present disclosure can be devised without departing from the basic scope thereof, which is determined by the following claims.

Claims

1. A method for fabricating a flat optical structure, comprising: etching a substrate to form at least a first trench and a second trench, wherein the first trench and the second trench are grooves having a width and a depth, and the first trench is separated from the second trench by a separation distance; disposing a dielectric material in the first trench and the second trench of the substrate, including providing an overfilled dielectric material that fills beyond the upper ends of the first trench and the second trench; covering an upper portion of the substrate with a film, wherein the film has a refractive index lower than that of the dielectric material; wherein the lateral dimensions of the first trench and the second trench vary between a first size and a second size larger than the first size, and the normalized phase change of a selected optical wavelength passing through the dielectric material is equal to 1 at the first size of the lateral dimension and zero at the second size of the lateral dimension.

2. The method according to claim 1, wherein the width of the first trench and the second trench is at most half of the operating wavelength of the flat optical structure.

3. the substrate is made of silicon dioxide; or disposing the dielectric material in the first trench and the second trench of the substrate is by one of a spinning process, chemical vapor deposition, and a material deposition process; or Covering the upper part of the substrate with the film is by using an SiO ２ film, the method according to claim 2.

4. The method according to claim 1, wherein the substrate has at least one flat surface, the substrate is a silicon dioxide substrate, the dielectric material is disposed in the first trench and the second trench formed on the at least one flat surface of the silicon dioxide substrate, and the covering includes covering the dielectric material in the first trench and the second trench formed on the at least one flat surface of the silicon dioxide substrate with a film.

5. The method according to claim 4, wherein the covering is performed using a spin-on process.

6. wherein the spin-on process uses one of titanium dioxide, GaP, a-Si, c-Si, and Si ３ N ４ The method according to claim 5, wherein one of the foregoing is used.

7. The method according to claim 5, wherein the dielectric material is a material having a refractive index greater than 1.8 and an absorption coefficient less than 0.

01. **Claim 8**: A substrate having at least a first trench and a second trench, wherein the first trench and the second trench are grooves having a width and a depth, and the first trench is spaced apart from the second trench by a separation distance, the substrate; A dielectric material disposed in the first trench and the second trench, the dielectric material being filled beyond the upper ends of the first trench and the second trench; An encapsulation material disposed in contact with the substrate and the dielectric material so as to cover the substrate and the dielectric material, the encapsulation material having a refractive index lower than the refractive index of the dielectric material, the encapsulation material; comprising; The lateral dimensions of the first trench and the second trench vary between a first size and a second size that is larger than the first size, and the normalized phase change of a selected optical wavelength passing through the dielectric material is equal to 1 at the first size of the lateral dimension and zero at the second size of the lateral dimension, a flat optical structure. **Claim 9** The flat optical structure according to claim 8, wherein the dielectric material disposed in the first trench and the second trench further includes an overfill layer filled beyond the upper ends of the first trench and the second trench. **Claim 10** the dielectric material disposed in the first trench and the second trench is titanium dioxide; or the substrate having the first trench and the second trench is made of silicon dioxide, the flat optical structure according to claim 8. **Claim 11** wherein the dielectric material is one of titanium dioxide, GaP, a-Si, c-Si, and Si ３ N ４ The flat optical structure according to claim 8, wherein the material is one of the foregoing or has a refractive index greater than 1.8 and an absorption coefficient of less than 0.01.

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