Method for depositing a strain-relaxed graded buffer layer of silicon germanium on the surface of a substrate

By employing a two-stage growth process with specific conditions for GeCl4 and SiH2Cl2 CVD, the method addresses the challenge of high TDD in SiGe buffer layers, achieving a low TDD and enhancing the quality of the buffer layer for electronic devices.

JP7693955B2Active Publication Date: 2025-06-17SILTRONIC AG
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Patent Information

Application Number
JP2024543959
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2022-01-31
Filing Date
2022-12-14
Publication Date
2025-06-17
Estimated Expiration
2042-12-14

AI Technical Summary

Technical Problem

Existing methods for depositing silicon-germanium strain-relaxed graded buffer layers on silicon substrates often result in high threading dislocation densities (TDD), which can negatively impact the quality of electronic devices.

Method used

A method involving the use of GeCl4 and SiH2Cl2 precursor gases during chemical vapor deposition (CVD) at 800°C or higher, with specific growth rate and grading rate conditions in two distinct stages to achieve a low TDD in the SiGe buffer layer.

Benefits of technology

The method effectively reduces the threading dislocation density, resulting in a high-quality SiGe buffer layer with improved characteristics for electronic device fabrication.

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Abstract

A method for depositing a strain-relaxed graded buffer layer of silicon germanium on a surface of a substrate, the surface consisting of silicon and a buffer layer having a content of germanium that increases to a final content, the method comprising: introducing GeCl4 and SiH2Cl2 onto the surface of the substrate at a deposition temperature of 800°C or greater during a first and second stage; growing the buffer layer at a grade rate of less than 10% Ge / μm; and growing the buffer layer at a growth rate of 0.1 μm / min or greater during the first stage and less than 0.1 μm / min during the second stage.
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Description

Technical Field

[0001] The present invention relates to a method of depositing a strain-relaxed graded buffer layer of silicon germanium on a surface of a substrate, the surface consisting of silicon and a buffer layer having a germanium content that increases to a final content.

Background Art

[0002] Prior Art / Problems Silicon germanium, or simply SiGe (Silicon germanium), is a semiconductor containing both silicon and germanium according to the formula Si 1-x Ge x (where 0 < x < 1). Thus, a germanium content of 25% Ge is represented by the formula Si 0.75 Ge 0.25 and is represented by.

[0003] Due to the lattice mismatch between silicon and silicon germanium, a heteroepitaxial Si 1-x Ge x buffer layer grows strained to a critical thickness on the Si substrate, and the strain energy becomes high enough to relax the epitaxial layer and form misfit dislocations (their respective through-dislocation segments that penetrate the surface of the layer) to reduce the strain. A strained silicon can be deposited thereon using a relaxed SiGe buffer layer to fabricate an electronic device having improved characteristics. The quality of the relaxed SiGe buffer layer is largely determined by the threading dislocation density (TDD).

[0004] International Publication No. 2004 / 084268 and U.S. Patent Application Publication No. 2007 / 0077734 each disclose a method of depositing an epitaxial germanium-containing layer on a single-crystalline silicon structure.

[0005] U.S. Patent Application Publication No. 2015 / 0318355 discloses the manufacture of a strain-relaxed buffer including first and second SiGe layers, where the TDD of the second SiGe layer is 1×10 3 / cm 2 less than. SUMMARY OF THE INVENTION PROBLEMS TO BE SOLVED BY THE INVENTION

[0006] An object of the present invention is to provide a method for depositing a silicon-germanium strain-relaxed graded buffer layer on a surface of a substrate that can be relatively easily implemented and provides access to a relatively low TDD. MEANS FOR SOLVING THE PROBLEMS

[0007] A method for depositing a silicon-germanium strain-relaxed graded buffer layer on a surface of a substrate, wherein the surface consists of silicon and a buffer layer having a germanium content that increases to a final content, introducing GeCl4 and SiH2Cl2 between a first stage and a second stage on the surface of the substrate at a deposition temperature of 800° C. or higher, growing the buffer layer at a grading rate of less than 10% Ge / μm, growing the buffer layer at a growth rate that is 0.1 μm / min or more during the first stage and less than 0.1 μm / min during the second stage is provided.

[0008] DESCRIPTION The following considerations and findings are helpful in understanding the present invention.

[0009] Relaxation by misfit dislocations can be achieved by two mechanisms that affect the final TDD in different ways: (i) Nucleation and glide of new dislocation loops; each new loop generates two through dislocations, increasing the final TDD.

[0010] (ii) Sliding and elongation of existing dislocation loops; the existing loops slide to relax the buffer layer and the TDD does not increase.

[0011] The low-TDD SiGe buffer layer has a low number of half-loops that slide far within the buffer layer to form long misfit dislocation segments, while the high-TDD buffer layer has a high number of half-loops that have only short misfit dislocation segments. Thus, the final TDD is the result of the balance between (i) and (ii), i.e., the number of half-loops generated and the time they can slide without being hindered.

[0012] The balance between the two mechanisms (i) and (ii) has different importance in different phases of buffer layer growth. In the initial stage of buffer layer growth, there are no dislocations in the buffer layer and new loops need to be nucleated to relax the buffer layer, so (i) is the dominant mechanism. During continuous ramps, (ii) is preferably the dominant mechanism for receiving a low TDD.

[0013] Therefore, the growth conditions employed in the two phases of buffer growth must be optimized individually, which is the core of the present invention. Different growth rates are used at different stages of buffer layer growth to produce a low final TDD of the relaxed buffer layer.

[0014] During the first stage of SiGe buffer layer deposition, the growth rate is 0.1 μm / min or more, while during the second stage, the growth rate is less than 0.1 μm / min. The growth rate is preferably 0.3 μm / min or more and 0.6 μm / min or less in the first stage and 0.01 μm / min or more and 0.095 μm / min or less in the second stage.

[0015] The slope regarding the increase in germanium content per unit thickness of the buffer layer is less than 10% Ge / μm in both the first and second stages of the deposition process.

[0016] A higher growth rate during the first stage ensures optimal conditions in the nucleation phase of the relaxation process, resulting in low-base TDD. This TDD is maintained low during the continuous slope by adopting a very low growth rate and slope in the second stage.

[0017] Preferably, the first stage ends before reaching about 1 / 3 of the final Ge content. The second stage ends when the final Ge content is reached.

[0018] According to an embodiment of the present invention, the final Ge content is 2% Ge or more and 90% Ge or less. According to a preferred embodiment, the final content is 25% Ge, and the first stage ends when the content reaches 8% Ge.

[0019] The SiGe buffer layer is grown using CVD (chemical vapor deposition) at a deposition temperature of 800 °C or higher, with GeCl4 and SiH2Cl2 as precursor gases.

[0020] Preferably, the SiGe buffer layer is deposited on the surface of a silicon single crystal wafer or an SOI wafer (silicon on insulator).

[0021] The present invention will be further described by referring to the figures and examples.

Brief Description of the Drawings

[0022]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Mode for Carrying Out the Invention

[0023] Examples The influence of the growth rate on TDD in the first stage of buffer growth (nucleation phase) has been investigated in the first experimental set. The sample configuration used in the first experimental set is shown in FIG. 1.

[0024] On a silicon single crystal wafer 1 (FIG. 1), a graded SiGe buffer layer 2 with a final concentration of 8% Ge was grown. The growth rate was varied from 0.05 μm / min to 0.8 μm / min, and a grading rate of 4% Ge / μm was used. The obtained TDD was measured after defect selective etching. As shown in FIG. 2 showing TDD versus growth rate GR, TDD decreases to a minimum at 0.46 μm / min as the growth rate increases.

[0025] The influence of the growth rate in the second stage of buffer growth (graded phase) was investigated in the second experimental set. The sample configuration used in the second experimental set is shown in FIG. 3.

[0026] On the first SiGe buffer layer 2 having an 8% Ge concentration, a second graded buffer layer 3 was grown to a final concentration of 16% Ge. A grading rate of 4% Ge / μm was used. The growth rate of the second layer 2 was varied from 0.05 μm / min to 0.95 μm / min. At 0.05 μm / min to 0.23 μm / min, TDD increases, and at higher growth rates, TDD remains constant. As shown in FIG. 4, the lowest TDD is achieved at lower growth rates.

[0027] A fully strained relaxation graded buffer layer up to a germanium content of 25% Ge is deposited on a silicon single crystal wafer according to the present invention (Example). During the first stage of the deposition process, i.e., from the start of the process until a germanium content of 8% Ge is reached, the growth rate was 0.46 μm / min in order to generate a low base TDD in the base layer according to the results of the first set of experiments. To further grade up to a final content of 25% Ge, the growth rate was 0.05 μm / min according to the results of the second set of experiments. The overall grading rate was 2.1% Ge / μm. As shown in Figure 5 showing the germanium content in the grown buffer layer over the thickness of the grown buffer layer, the achieved final TDD was 4×10 4 / cm 2 . The dotted line in Figure 5 represents the first stage of the deposition process and the solid line represents the second stage of the deposition process.

[0028] A series of experiments and examples were carried out in a commercially available EPSILON 3200 type epitaxial reactor manufactured by ASM, at a deposition temperature of 1050 °C, using GeCl4 and SiH2Cl2 as precursor gases.

Description of the reference numerals

[0029] 1 Substrate 2 First silicon germanium buffer layer grown at the first growth rate 3 Second silicon germanium buffer layer grown at the second growth rate

Claims

1. A method for depositing a strain-relaxed graded buffer layer of silicon germanium on a surface of a substrate, wherein the surface consists of silicon and the buffer layer having an increasing germanium content up to a final content, on the surface of the substrate at a deposition temperature of 800 °C or higher, between a first stage and a second stage, GeCl 4 and SiH 2 Cl 2 are introduced, growing the buffer layer at a grading rate of less than 10% Ge / μm, growing the buffer layer at a growth rate that is 0.1 μm / min or more during the first stage and less than 0.1 μm / min during the second stage A method comprising.

2. The method according to claim 1, wherein the first stage ends before reaching about 1 / 3 of the final content of germanium.

3. The method according to claim 1 or 2, wherein the final content of germanium is 2% Ge or more and 90% Ge or less.

4. The method according to any one of claims 1 to 3, wherein the buffer layer is deposited by chemical vapor deposition.

5. The method according to any one of claims 1 to 4, wherein the buffer layer is grown on a silicon single crystal wafer or an SOI wafer.

Citation Information

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