Heat treatment method for silicon epitaxial substrate and silicon substrate

The development of a silicon substrate with a {110} orientation and specific off-angle, combined with controlled heat treatment, addresses the issues of surface roughness and concave defects in Si(110) substrates, resulting in improved substrate quality and device performance.

JP7694736B1Active Publication Date: 2025-06-18SHIN ETSU HANDOTAI CO LTD
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Patent Information

Application Number
JP2024017105
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2024-02-07
Publication Date
2025-06-18
Estimated Expiration
2044-02-07

AI Technical Summary

Technical Problem

The Si(110) substrate faces issues with large surface roughness, haze, and the generation of concave defects due to its unique 16×2 domain structure, which complicates understanding of surface phenomena and affects device characteristics.

Method used

A silicon substrate with a {110} plane orientation and an off-angle of 0.23° or more is developed, along with a heat treatment method involving heating to a temperature higher than 570°C, followed by cooling, with a specific temperature-time product to suppress the generation of concave defects.

Benefits of technology

The approach results in a high-quality Si(110) substrate without concave defects, improved surface roughness, and enhanced device characteristics by effectively managing the heat treatment conditions and off-angle to prevent defect formation.

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Abstract

An object of the present invention is to provide a Si{110} substrate in which generation of recessed defects is suppressed and a heat treatment method for the Si{110} substrate. 【Means for solving the problem】 A silicon substrate having a plane orientation of {110} on the main surface, characterized in that the surface does not contain recessed defects having a longitudinal length of 50 nm or more and 2000 nm or less.
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Description

Technical Field

[0001] The present invention relates to a silicon substrate and a heat treatment method for the silicon substrate.

Background Art

[0002] Instead of the Fin structure currently adopted in logic ICs, in semiconductors after the next generation, a Gate-All-Around (GAA) structure or a Complementary Field Effect Transistor (CFET) in which NMOS and CMOS are stacked has been proposed and actively researched and developed. At this time, as a method for improving hole mobility, using (110) among some crystal orientations of silicon (hereinafter also referred to as "Si") has been considered (Non-Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Patent Document 3

Patent Document 4

Patent Document 5

Patent Document 6

Non-Patent Documents

[0004]

Non-Patent Document 1

Non-Patent Document 2

Non-Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0005] However, it has been pointed out that the Si(110) substrate has problems such as large surface roughness and haze (Non-Patent Document 1). Here, haze is also referred to as the degree of cloudiness of the surface, and represents the surface roughness in terms of the degree of light scattering. The larger the haze, the rougher the surface. Also, the most stable structure of the outermost surface of Si(110) has been confirmed relatively recently (Non-Patent Documents 2 and 3).

[0006] Also, as described in Non-Patent Documents 2 and 3, in the surface structure of Si(110), the 16×2 domain (a region having one structural unit), which is the most stable structure, undergoes a phase transformation depending on temperature, for example, as shown in FIG. 2, and the structure is said to change in the range of 600 to 800°C.

[0007] Also, along with this structural change, a step bunching phenomenon also occurs. Step bunching is a phenomenon in semiconductor materials such as silicon where there are atomic-level steps called steps on the wafer surface, and the atoms on the surface move due to heat treatment or the like, causing the steps to gather and form larger steps. Furthermore, for example, materials such as SiGe laminated in GAA or CFET often involve processing in this temperature range, and it can easily be imagined that it makes it more difficult to understand the surface structure. The phenomena associated with this phase change have become a large bias and are causing difficulties in understanding other phenomena (such as defect and contamination behavior).

[0008] This unique outermost surface structure of the Si(110) plane also affects the surface structure after etching. The step edges of the 16×2 domain surface structure do not have a single-atom structure like Si(100), but have a step of two atoms. When the energy of the reaction system is low (equilibrium reaction), the reaction proceeds with the outermost atoms, and the surface shape after etching becomes a linear structure surrounded by the surface-first-nearest Si(111). On the other hand, when the energy of the reaction system is high, the outermost surface and the atoms below it will be involved in the reaction, and a square shape surrounded by the surface-second-nearest Si(111) will appear.

[0009] For such a planar state of Si(110), Patent Document 1 discloses a method of reducing surface roughness by tilting the orientation during epitaxial growth. Patent Document 2 discloses regulations on the cooling rate and surface protection for the same epitaxial growth. Furthermore, Patent Document 3 discloses a method of defining the plane orientation during crystal growth instead of during epitaxial growth to similarly reduce surface roughness. Patent Document 4 discloses polishing the epitaxial surface. Patent Document 5 discloses a technique with a different LPD detection size from that of Patent Document 1. Also, Patent Document 6 discloses a method of reducing the surface roughness formed in an annular shape at the periphery by setting the off-angle during slicing to 0.5 to 7° although the epitaxial film thickness is very thick at 30 μm or more.

[0010] On the other hand, the inventors have clarified that in addition to the defects caused by such surface roughness and crystal defects, particularly, since the Si(110) substrate has a special structure of 16×2 as the most stable structure, different from the Si(100) substrate, there is an unstable region (expressed as a "disorder region" in Non-Patent Document 2) adjacent to the most stable structure of 16×2. Minute protrusion-like defects are generated from this part by heat treatment including hydrogen baking before epitaxial growth and epitaxial growth, forming an in-plane distribution of the Si(110) substrate, and have shown countermeasures for this.

[0011] Thus, the surface of the Si(110) substrate has a very complex shape, and various techniques have been disclosed for relaxing the surface roughness. However, in particular, as described above, since the Si(110) substrate has a special structure of 16×2 as the most stable structure, different from the Si(100) substrate, there is an unstable region adjacent to the most stable structure of 16×2. Starting from this portion, the inventors have found that relatively large concave defects are generated by performing heat treatment such as hydrogen baking before epitaxial growth or epitaxial growth.

[0012] The present invention has been made to solve the above problems, and an object thereof is to provide a Si{110} substrate in which the generation of concave defects is suppressed and a heat treatment method for the Si{110} substrate.

Means for Solving the Problems

[0013] The present invention has been made to achieve the above object, and provides a silicon substrate having a plane orientation of {110} on the main surface, characterized in that the surface does not contain concave defects having a length in the longitudinal direction of 50 nm or more and 2000 nm or less.

[0014] According to such a silicon substrate, it becomes a high-quality one without concave defects and with improved surface roughness, and the device characteristics can be improved.

[0015] At this time, the silicon substrate can have an off-angle of the plane orientation of the main surface {110} of 0.23° or more.

[0016] Thereby, the surface roughness is further improved, and the device characteristics can be further improved.

[0017] The present invention is also made to achieve the above object, and is a heat treatment method for a silicon substrate having a plane orientation of {110} on the main surface, the heat treatment method including a heating step of heating the silicon substrate to a heat treatment temperature higher than 570°C, a heat treatment step of performing heat treatment at the heat treatment temperature, and a cooling step of cooling to a temperature lower than 570°C, and the sum of the products of the temperature and time of the silicon substrate during the period from the time when the temperature of the silicon substrate reaches 570°C in the heating step to the time when the temperature of the silicon substrate reaches 570°C in the cooling step is 60,000 (°C·sec) or less. A heat treatment method for a silicon substrate is provided.

[0018] According to such a heat treatment method for a silicon substrate, it becomes possible to suppress the generation of recessed defects.

[0019] At this time, the off-angle of the main surface of the silicon substrate can be 0.23° or more.

[0020] Thereby, it is possible to further suppress the generation of recessed defects.

Effect of the Invention

[0021] As described above, according to the silicon substrate of the present invention, it becomes a high-quality product without recessed defects and with improved surface roughness, and the device characteristics can be improved. Further, according to the heat treatment method for a silicon substrate of the present invention, it becomes possible to suppress the generation of recessed defects.

Brief Description of the Drawings

[0022]

Figure 1

Figure 2

Figure 3

Figure 4

Best Mode for Carrying Out the Invention

[0023] Hereinafter, the present invention will be described in detail, but the present invention is not limited thereto.

[0024] As described above, there has been a demand for a Si{110} substrate in which generation of concave defects is suppressed and a heat treatment method for the Si{110} substrate.

[0025] As a result of intensive studies on the above problems, the present inventors have found that a silicon substrate having a plane orientation of {110} on the main surface and not including concave defects having a length in the longitudinal direction of 50 nm or more and 2000 nm or less on the surface is characterized in that it is a high-quality product with no concave defects and improved surface roughness, and the device characteristics can be improved, and thus the present invention has been completed.

[0026] As a result of intensive studies on the above problems, the present inventors have also found that a heat treatment method for a silicon substrate having a plane orientation of {110} on the main surface, the heat treatment method including a heating step of heating the silicon substrate to a heat treatment temperature higher than 570°C, a heat treatment step of performing heat treatment at the heat treatment temperature, and a cooling step of cooling to a temperature lower than 570°C, and the sum of the products of the temperature and time of the silicon substrate during the period from the time when the temperature of the silicon substrate reaches 570°C in the heating step to the time when the temperature of the silicon substrate reaches 570°C in the cooling step is 60,000 (°C·sec) or less. By the heat treatment method of the silicon substrate characterized by this, it has been found that generation of concave defects can be suppressed, and the present invention has been completed.

[0027] [Silicon Substrate] In the present invention, the plane orientation of {110} includes a plane equivalent to the plane orientation of (110). Also included are those having an off-angle of 0.23 to 0.5 degrees from the {110} plane.

[0028] Fig. 4 shows a cross-sectional structure diagram of an example of a Si(110) substrate. As shown in Fig. 4, the Si(110) substrate 2 has a surface 3 (the outermost surface of the surface stable structure). The surface 3 is where the recessed defect (hereinafter, also simply referred to as "recessed defect") having a longitudinal length of 50 nm or more and 2000 nm or less, which is the object of the present invention, exists.

[0029] When hydrogen annealing is performed on the Si(110) substrate before epitaxial growth, or epitaxial growth (such as silicon or SiGe) or heat treatment is performed, recessed defects as shown in Fig. 2 may occur.

[0030] This defect is generated due to the difference in the stable structure of Si(110), as described in Patent Document 2 and Non-Patent Documents 2 and 3. In particular, it has been clarified by the investigation and research of the present researchers that such long defects can be generated when stable structures such as 16×2 domains are connected.

[0031] To generate such long defects, atomic interaction over a long distance is required. That is, when considering the recessed defect, the interaction of (surface energy)×(thermal energy) is required.

[0032] As shown in Fig. 4, the silicon {110} substrate 2 of the present invention does not contain such recessed defects on the surface 3 of the surface stable structure.

[0033] In addition, the recessed defect is affected not only by the heat treatment conditions but also by the off-angle of the main surface of the substrate. That is, if it is understood that the interaction of (surface energy)×(thermal energy) is involved when considering the recessed defect, the defect can be suppressed.

[0034] Here, the surface energy corresponds to the step terrace width formed by the off-angle of the silicon (110) substrate, and when the off-angle is small and the terrace width is small, the surface energy becomes relatively large.

[0035] In the present invention, the off-angle of the main surface of the silicon {110} substrate 2 can be 0.23° or more. Although the upper limit of the off-angle is not particularly limited, it may be 0.5°.

[0036] According to such a silicon substrate, the surface roughness is further improved, and the device characteristics can be further enhanced. This is because the ES effect (Early-Schweibel effect: since a wider terrace allows more atomic diffusion, the movement of steps can be suppressed) occurs due to the large off-angle, and the generation of defects is suppressed.

[0037] [Heat treatment method of silicon substrate] The heat treatment method of the silicon {110} substrate according to the present invention includes a heating step of heating the silicon substrate to a heat treatment temperature higher than 570°C, a heat treatment step of performing heat treatment at the heat treatment temperature, and a cooling step of cooling to a temperature lower than 570°C.

[0038] Here, the heat treatment refers to heat treatment in which the silicon substrate is treated at a temperature of 570°C or higher, and includes layer formation treatments such as annealing treatment and epitaxial growth. Also, the heat treatment does not necessarily have to be at a constant temperature.

[0039] In order to reduce the above-mentioned concave defects, it is necessary that the sum of the products of the temperature and time of the silicon substrate during the period from the time when the temperature of the silicon substrate reaches 570°C in the heating step to the time when the temperature of the silicon substrate reaches 570°C in the cooling step is 60000 (°C·sec) or less.

[0040] That is, when a Si(110) substrate with an off-angle of 0.26° on the main surface is subjected to hydrogen annealing at a temperature of 1080°C for 60 seconds in the heat treatment step, concave defects with a longitudinal length of 1 μm as shown in FIG. 2 are generated. At this time, the sum of the products of the temperature and time of the silicon substrate during the period from the time when the temperature of the silicon substrate reaches 570°C in the heating step to the time when the temperature of the silicon substrate reaches 570°C in the cooling step was 65000 (°C·sec).

[0041] Next, when a Si(110) substrate with an off-angle of 0.26° on the same main surface as above was subjected to hydrogen annealing at a temperature of 900°C for 60 seconds in a heat treatment process, no concave defects were generated as shown in Fig. 1. At this time, the sum of the product of the temperature and time of the silicon substrate during the period from the time when the temperature of the silicon substrate reached 570°C in the heating process to the time when the temperature of the silicon substrate reached 570°C in the cooling process was 57000 (°C·sec).

[0042] Thus, by considering the heat treatment temperature and time and performing heat treatment with the sum of the product of the temperature and time of the silicon substrate during the period from the time when the temperature of the silicon substrate reaches 570°C in the heating process to the time when the temperature of the silicon substrate reaches 570°C in the cooling process being 60000 (°C·sec) or less, it becomes possible to suppress the generation of concave defects.

[0043] Note that the lower limit value of the sum of the product of the above temperature and time is not particularly limited, but it may be 5400 (°C·sec).

[0044] In the heat treatment method of the Si{110} substrate according to the present invention, the off-angle of the main surface of the silicon substrate can be 0.23° or more. Thereby, the generation of concave defects can be further suppressed. Note that the upper limit of the off-angle is not particularly limited, but it may be 0.5°.

Example

[0045] Hereinafter, the present invention will be specifically described with reference to examples, but this does not limit the present invention.

[0046] (Example) A silicon single crystal substrate with a diameter of 300 mm, a plane orientation of (110), boron doping, a resistance of 10 Ω·cm, and an off-angle of 0.26° with respect to the (110) plane of the main surface was prepared, and this was subjected to hydrogen annealing at a temperature of 900 °C for 60 seconds under normal pressure. At this time, the sum of the products of the temperature and time of the silicon substrate during the period from the time when the temperature of the silicon substrate reached 570 °C in the heating process to the time when the temperature of the silicon substrate reached 570 °C in the cooling process was 57000 (°C·sec).

[0047] After that, the AFM measurement was performed by adjusting the viewing angle so that one side of the acquired image became 1 μm. The measurement results are shown in Fig. 1. As shown in Fig. 1, no concave defects were observed on the surface of the silicon substrate.

[0048] (Comparative Example 1) The same silicon single crystal substrate as in the example was prepared, and this was subjected to hydrogen annealing at a temperature of 1080 °C for 60 seconds under normal pressure. At this time, the sum of the products of the temperature and time of the silicon substrate during the period from the time when the temperature of the silicon substrate reached 570 °C in the heating process to the time when the temperature of the silicon substrate reached 570 °C in the cooling process was 65000 (°C·sec).

[0049] After that, the AFM measurement was performed by adjusting the viewing angle so that one side of the acquired image became 1 μm. The measurement results are shown in Fig. 2. Concave defects with a length of 1 μm in the longitudinal direction as shown in Fig. 2 were observed on the surface of the silicon substrate.

[0050] (Comparative Example 2) A silicon single crystal substrate the same as in the example was prepared except that the off-angle of the main surface was 0.24°, and this was subjected to hydrogen annealing at a temperature of 1030 °C for 60 seconds under normal pressure. At this time, the sum of the products of the temperature and time of the silicon substrate during the period from the time when the temperature of the silicon substrate reached 570 °C in the heating process to the time when the temperature of the silicon substrate reached 570 °C in the cooling process was 65000 (°C·sec).

[0051] After that, the angle of view was adjusted so that one side of the acquired image became 1 μm, and AFM measurement was performed. The measurement results are shown in Fig. 3. A concave defect of 0.8 μm as shown in Fig. 3 was observed on the surface of the silicon substrate.

[0052] As described above, according to the embodiment of the present invention, in the heat treatment of the Si(110) substrate, heat treatment can be performed without generating concave defects on the surface, and a Si(110) substrate having no concave defects of 50 nm or more and 2000 nm or less on the surface can be obtained.

[0053] Note that the present invention is not limited to the above embodiment. The above embodiment is an example, and any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and exhibits the same operational effects is included in the technical scope of the present invention.

Explanation of Signs

[0054] 1... Concave defect, 2... Si(110) (Si{110}) substrate, 3... Surface (surface stable structure).

Claims

1. A silicon epitaxial substrate having a principal surface with a plane orientation of {110}, an off-angle of the principal surface of 0.23° or more and 0.5° or less, and containing no depression-like defects on the surface with a longitudinal length of 50 nm or more and 2000 nm or less.

2. A method for heat treating a silicon substrate having a principal surface with a plane orientation of {110} and an outermost surface having a most stable silicon structure, comprising the steps of: The heat treatment method includes a heating step of heating the silicon substrate to a heat treatment temperature higher than 570° C., a heat treatment step of performing a hydrogen annealing heat treatment at the heat treatment temperature and in a hydrogen atmosphere, and a cooling step of cooling the silicon substrate to a temperature lower than 570° C., A heat treatment method for a silicon substrate, characterized in that a sum of the product of the temperature and time of the silicon substrate during the period from the time when the temperature of the silicon substrate reaches 570° C. in the heating step to the time when the temperature of the silicon substrate reaches 570° C. in the cooling step is set to 60,000 (° C. sec) or less.

3. 3. The method for heat treating a silicon substrate according to claim 2, wherein an off-angle of a main surface of the silicon substrate is set to 0.23° or more.

Citation Information

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