Light-receiving element and light-receiving device

Abstract

Provided is a light-receiving element comprising: a semiconductor substrate; a photoelectric conversion unit (PD) provided in the semiconductor substrate (200) to convert light into charge; a first charge storage (MEM) provided in the semiconductor substrate and to which the charge is transferred from the photoelectric conversion unit; a first sorting gate (150a) provided on a surface of the semiconductor substrate to sort the charge from the photoelectric conversion unit to the first charge storage; a second charge storage (MEM) provided in the semiconductor substrate and to which the charge is transferred from the photoelectric conversion unit; and a second sorting gate (150b) provided on the surface of the semiconductor substrate to sort the charge from the photoelectric conversion unit to the second charge storage. The first and second sorting gates each include a pair of embedded gate portions (170a, 170b) embedded in the semiconductor substrate.

Description

Technical Field

[0001] The present disclosure relates to a light receiving element and a light receiving device.

Background Art

[0002] As a method for measuring the distance to an object, a TOF (Time of Flight) sensor (light receiving device) is known. In the case of an indirect TOF sensor, for example, the TOF sensor irradiates the object with irradiation light having a predetermined period and detects the phase difference between the irradiation light and the reflected light, thereby measuring the distance to the object. In the TOF sensor, by repeating light reception a plurality of times at short intervals, the signal amount is increased to improve the S / N (Signal / Noise) ratio, enabling highly accurate distance measurement.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] As described above, the TOF sensor (light receiving device) repeats light reception a plurality of times at short intervals in order to improve the S / N ratio. Therefore, the charge generated by light reception in the photodiode incorporated in the TOF sensor is required to be transferred at high speed.

[0005] Therefore, in view of such a situation, the present disclosure proposes a light receiving element and a light receiving device capable of transferring charge at high speed.

Means for Solving the Problems

[0006] According to the present disclosure, there is provided a light receiving element including a semiconductor substrate, a photoelectric conversion unit provided in the semiconductor substrate for converting light into electric charges, a first charge accumulation unit provided in the semiconductor substrate to which the electric charges are transferred from the photoelectric conversion unit, a first distribution gate provided on the surface of the semiconductor substrate for distributing the electric charges from the photoelectric conversion unit to the first charge accumulation unit, a second charge accumulation unit provided in the semiconductor substrate to which the electric charges are transferred from the photoelectric conversion unit, and a second distribution gate provided on the surface of the semiconductor substrate for distributing the electric charges from the photoelectric conversion unit to the second charge accumulation unit, wherein the first and second distribution gates each have a pair of embedded gate portions embedded in the semiconductor substrate.

[0007] Further, according to the present disclosure, there is provided a light receiving device including one or more light receiving elements, wherein each light receiving element includes a semiconductor substrate, a photoelectric conversion unit provided in the semiconductor substrate for converting light into electric charges, a first charge accumulation unit provided in the semiconductor substrate to which the electric charges are transferred from the photoelectric conversion unit, a first distribution gate provided on the surface of the semiconductor substrate for distributing the electric charges from the photoelectric conversion unit to the first charge accumulation unit, a second charge accumulation unit provided in the semiconductor substrate to which the electric charges are transferred from the photoelectric conversion unit, and a second distribution gate provided on the surface of the semiconductor substrate for distributing the electric charges from the photoelectric conversion unit to the second charge accumulation unit, and the first and second distribution gates each have a pair of embedded gate portions embedded in the semiconductor substrate.

Brief Description of the Drawings

[0008]

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Embodiments for Carrying Out the Invention

[0009] Hereinafter, preferred embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In the present specification and the drawings, for components having substantially the same functional configuration, the same reference numerals are given to omit redundant description.

[0010] Also, in the present specification and the drawings, when distinguishing a plurality of components having substantially the same or similar functional configurations, different numbers may be attached after the same reference numeral. However, when it is not necessary to particularly distinguish each of the plurality of components having substantially the same or similar functional configurations, only the same reference numeral is given. Also, for similar components in different embodiments, different alphabets may be attached after the same reference numeral to distinguish them. However, when it is not necessary to particularly distinguish each of the similar components, only the same reference numeral is given.

[0011] Also, the drawings referred to in the following description are for explaining the embodiments of the present disclosure and facilitating its understanding, and for the sake of clarity, the shapes, dimensions, ratios, etc. shown in the drawings may be different from the actual ones. Furthermore, the components etc. included in the elements and devices shown in the drawings can be appropriately modified in design in consideration of the following description and known techniques.

[0012] In the following description, an example in which the embodiment of the present disclosure is applied to a back-illuminated light receiving device will be described. Therefore, in the light receiving device, light is incident from the back side of the substrate. Therefore, in the following description, the front surface of the substrate is the surface facing the back surface when the side where light is incident is defined as the back surface.

[0013] The descriptions of specific lengths and shapes in the following description do not mean only values defined mathematically or shapes defined geometrically. Specifically, the descriptions of specific lengths and shapes in the following description include cases where there are allowable differences (errors and distortions) in elements, their manufacturing processes, and their use and operations, as well as shapes similar to those shapes. For example, when the expression "circular shape" or "substantially circular shape" is used in the following description, it does not mean that it is limited to a perfect circle, but means that it includes shapes similar to a perfect circle such as an elliptical shape.

[0014] Furthermore, in the following description of circuits (electrical connections), unless otherwise specified, "electrically connected" means connecting such that electricity (signals) can conduct between a plurality of elements. In addition, the "electrically connected" in the following description includes not only cases where a plurality of elements are directly and electrically connected, but also cases where they are indirectly and electrically connected via other elements.

[0015] In the following description, "shared" means that, unless otherwise specified, other elements are provided so as to be shared by a plurality of one element, in other words, other elements are shared by each of a predetermined number of one element.

[0016] The description will be made in the following order. 1. Configuration example of the distance measurement module 1 according to the embodiment of the present disclosure 2. Configuration example of the light receiving unit 30 according to the embodiment of the present disclosure 3. Equivalent circuit of the light receiving element 10 according to the embodiment of the present disclosure 4. Principle of the distance calculation method using the distance measurement module 1 according to an embodiment of the present disclosure 5. Background leading to the creation of this embodiment 6. First embodiment 7. Second embodiment 8. Third embodiment 9. Fourth embodiment 10. Summary 11. Configuration example of an electronic device 12. Application example to an endoscopic surgery system 13. Application example to a moving body 14. Supplementary

[0017] <<1. Configuration example of the distance measurement module 1 according to an embodiment of the present disclosure>> First, with reference to FIG. 1, a schematic configuration of the distance measurement module 1 according to an embodiment of the present disclosure will be described. FIG. 1 is a block diagram showing a configuration example of the distance measurement module 1 according to an embodiment of the present disclosure. Specifically, as shown in FIG. 1, the distance measurement module 1 can mainly include an irradiation unit 20, a light receiving unit 30, a control unit (irradiation control unit) 40, and a processing unit 60. Hereinafter, each functional block included in the distance measurement module 1 according to the present embodiment will be described.

[0018] (Irradiation unit 20) The irradiation unit 20 has an LED (Light Emitting Diode) light source (not shown) and an optical element (not shown). The wavelength of the irradiated light can be changed by appropriately selecting the LED light source. In the present embodiment, the irradiation unit 20 is described as irradiating infrared light in the wavelength range of 780 nm to 1000 nm, for example, but the present embodiment is not limited to irradiating such infrared light. Further, the irradiation unit 20 can irradiate the object 800 with irradiation light whose brightness varies periodically in synchronization with a periodic signal such as a rectangular signal supplied from the control unit 40 described later.

[0019] (Light receiving unit 30) The light-receiving unit 30 receives the reflected light reflected from the object 800. The light-receiving unit 30 has a condenser lens (not shown) and a plurality of light-receiving elements 10 described later. The condenser lens has a function of collecting the received light onto each light-receiving element 10. Further, the light-receiving element 10 generates charges (for example, electrons) based on the intensity of the received light, and drives a built-in transistor (sorting transistor VG; see FIG. 3), which is a periodic signal such as a rectangular signal supplied from a control unit 40 described later, in synchronization with the generated charges, and transfers them to a charge storage unit MEM (see FIG. 3). Furthermore, the charges transferred to the charge storage unit MEM are converted into signals and finally transferred to the processing unit 60. Note that the details of the light-receiving element 10 will be described later.

[0020] (Control unit 40) The control unit 40 supplies a periodic signal to the irradiation unit 20 and the light-receiving unit 30, and controls the irradiation timing of the irradiation light and the driving timing of the transistor. The frequency of the signal can be, for example, 5 to 20 megahertz (MHz), but is not limited to such a frequency in this embodiment. Further, the control unit 40 controls the transistor (sorting transistor VG; see FIG. 3) to operate at different timings, such as differential.

[0021] (Processing unit 60) The processing unit 60 acquires the signal from the light-receiving unit 30, and based on the acquired signal, can acquire the distance to the object 800 by, for example, the indirect ToF (iToF) method. Note that the method of calculating the distance will be described later.

[0022] <<2. Configuration example of the light-receiving unit 30 according to the embodiment of the present disclosure>> Next, with reference to FIGS. 2A to 2C, a planar configuration example of the light receiving unit 30 according to an embodiment of the present disclosure will be described. FIGS. 2A to 2C are explanatory diagrams showing a planar configuration example of the light receiving unit 30 according to an embodiment of the present disclosure. Specifically, as shown in FIG. 2A, the light receiving unit 30 according to the present embodiment includes, for example, a pixel array unit 12, a vertical drive circuit unit 32, a column signal processing circuit unit 34, a horizontal drive circuit unit 36, an output circuit unit 38, and a control circuit unit 44 provided on a semiconductor substrate 200 made of silicon. Details of each block of the light receiving unit 30 according to the present embodiment will be described below.

[0023] (Pixel array unit 12) The pixel array unit 12 has a plurality of light receiving elements 10 two-dimensionally arranged in a matrix (a matrix in the row direction and the column direction) on the semiconductor substrate 200. Each light receiving element 10 has a photoelectric conversion unit (photodiode PD) (not shown) that converts light into electric charges (for example, electrons), and a plurality of pixel transistors (for example, MOS (Metal - Oxide - Semiconductor) transistors) (not shown), etc. In other words, the pixel array unit 12 has a plurality of pixels that photoelectrically convert incident light and output a signal corresponding to the electric charges obtained as a result. And the above pixel transistors can include transistors having various functions such as, for example, transfer transistors, selection transistors, reset transistors, and amplification transistors. Details of the equivalent circuit of the light receiving element 10 will be described later.

[0024] Here, the row direction refers to the arrangement direction of the light receiving elements 10 in the horizontal direction, and the column direction refers to the arrangement direction of the light receiving elements 10 in the vertical direction. The row direction is the left - right direction in FIG. 2A, and the column direction is the up - down direction in FIG. 2A. In the pixel array unit 12, for the matrix - shaped arrangement of the light receiving elements 10, pixel drive wirings 42 are wired along the row direction for each row, and vertical signal lines 48 are wired along the column direction for each column. For example, the pixel drive wiring 42 transmits a drive signal for driving when reading a signal from the light receiving element 10.

[0025] (Vertical drive circuit unit 32) The vertical drive circuit section 32 is formed by, for example, a shift register, an address decoder, etc., selects the pixel drive wiring 42, supplies a pulse for driving the light receiving element 10 to the selected pixel drive wiring 42, and drives the light receiving elements 10 all at once or by row unit. For example, the vertical drive circuit section 32 sequentially selects and scans each light receiving element 10 in the pixel array section 12 in the vertical direction (the up and down direction in FIG. 2A) by row unit, and supplies a pixel signal based on the charge generated according to the amount of light received by the photodiode PD of each light receiving element 10 to the column signal processing circuit section 34 described later through the vertical signal line 48.

[0026] (Column signal processing circuit section 34) The column signal processing circuit section 34 is arranged for each column of the light receiving elements 10, and performs signal processing such as noise removal for each column on the signals output from the light receiving elements 10 for one row. For example, the column signal processing circuit section 34 performs signal processing such as CDS (Correlated Double Sampling) and AD (Analog - Digital) conversion to remove the fixed pattern noise specific to the light receiving elements 10.

[0027] (Horizontal drive circuit section 36) The horizontal drive circuit section 36 is formed by, for example, a shift register, an address decoder, etc., and by sequentially outputting horizontal scan pulses, can select each of the above - mentioned column signal processing circuit sections 34 in order, and output signals from each of the column signal processing circuit sections 34 to the horizontal signal line 46.

[0028] (Output circuit section 38) The output circuit section 38 can perform signal processing and output on the signals sequentially supplied from each of the above - mentioned column signal processing circuit sections 34 through the horizontal signal line 46. The output circuit section 38 may function as a functional section that performs buffering, for example, or may perform processing such as column variation correction and various digital signal processing. Note that buffering means temporarily storing a signal to compensate for the difference in processing speed and transfer speed during signal exchange.

[0029] (Control circuit unit 44) The control circuit unit 44 can receive an input clock and data for instructing an operation mode or the like, and can also output data such as internal information of the light receiving element 10. That is, the control circuit unit 44 generates a clock signal and a control signal serving as a reference for operations of the vertical drive circuit unit 32, the column signal processing circuit unit 34, the horizontal drive circuit unit 36, etc. based on the vertical synchronization signal, the horizontal synchronization signal, and the master clock. Then, the control circuit unit 44 outputs the generated clock signal and control signal to the vertical drive circuit unit 32, the column signal processing circuit unit 34, the horizontal drive circuit unit 36, etc.

[0030] (Multiplexer transistor drive unit 50, signal processing unit 52, data storage unit 54) As shown in FIGS. 2B and 2C, the light receiving element 10 may be provided with a multiplexer transistor drive unit 50, a signal processing unit 52, and a data storage unit 54. That is, the multiplexer transistor drive unit 50, the signal processing unit 52, and the data storage unit 54 may be provided on the semiconductor substrate 200. However, in the present embodiment, it is not limited thereto, and the multiplexer transistor drive unit 50, the signal processing unit 52, and the data storage unit 54 may be provided on another semiconductor substrate (not shown). First, the multiplexer transistor drive unit 50 controls the operation of a multiplexer transistor VG (see FIG. 3) described later. For example, as shown in FIG. 2B, the multiplexer transistor drive unit 50 may be provided adjacent to the pixel array unit 12 along the column direction, or may be provided adjacent to the pixel array unit 12 along the row direction as shown in FIG. 2C, and is not particularly limited in the present embodiment. Also, the signal processing unit 52 has at least an arithmetic processing function and performs various signal processes such as arithmetic processing based on the signal output from the output circuit unit 38. The data storage unit 54 temporarily stores the data necessary for the signal processing of the signal processing unit 52 during the signal processing.

[0031] Note that the planar configuration example of the light receiving unit 30 according to the present embodiment is not limited to the example shown in FIGS. 2A to 2C. For example, it may include other circuits or the like and is not particularly limited.

[0032] <<3. Equivalent Circuit of Light Receiving Element 10 According to Embodiment of the Present Disclosure>> Next, with reference to FIG. 3, the equivalent circuit of the light receiving element 10 according to the embodiment of the present disclosure will be described. FIG. 3 is an equivalent circuit diagram of the light receiving element 10 according to the embodiment of the present disclosure.

[0033] Specifically, as shown in FIG. 3, the light receiving element 10 includes a photodiode PD as a photoelectric conversion element (photoelectric conversion unit) that converts light into charges, and a charge discharge transistor OFG (note that the charge discharge transistor OFG is shown as one transistor on the equivalent circuit, but may be composed of a plurality of transistors connected in parallel electrically). Further, the light receiving element 10 has two each of a switching transistor VG, charge storage units (first charge storage unit, second charge storage unit) MEM, a transfer transistor TG, a floating diffusion region FD, a reset transistor RST, an amplification transistor AMP, and a selection transistor SEL.

[0034] As shown in FIG. 3, in the light receiving element 10, one of the source / drains of the charge discharge transistor OFG is electrically connected to the photodiode PD that generates charges by receiving light. Further, the other of the source / drains of the charge discharge transistor OFG is electrically connected to a power supply circuit (power supply potential VDD). And the charge discharge transistor OFG becomes conductive according to the voltage applied to its gate, and can discharge the charges accumulated in the photodiode PD to the above power supply circuit (power supply potential VDD).

[0035] Also, as shown in FIG. 3, in the light receiving element 10, one of the source / drains of the distribution transistors VG1 and VG2 is electrically connected to the photodiode PD, and the other of the source / drains of the distribution transistors VG1 and VG2 is electrically connected to the charge storage units MEM1 and MEM2, respectively. Then, the distribution transistors VG1 and VG2 become conductive according to the voltage applied to their gates (the first distribution gate and the second distribution gate), and can transfer the charges accumulated in the photodiode PD to the charge storage units MEM1 and MEM2, respectively. That is, in the present embodiment, by changing the voltages applied to the gates of the distribution transistors VG1 and VG2 at different timings, the charges accumulated in the photodiode PD can be distributed to either one of the two charge storage units MEM1 and MEM2. In other words, it can be said that the two charge storage units MEM1 and MEM2 share one photodiode PD.

[0036] Also, as shown in FIG. 3, in the light receiving element 10, one of the source / drains of the transfer transistors TG1 and TG2 is electrically connected to the other of the source / drains of the distribution transistors VG1 and VG2 and the charge storage units MEM1 and MEM2. Further, the other of the source / drains of the transfer transistors TG1 and TG2 is electrically connected to the floating diffusion regions FD1 and FD2. Then, the transfer transistors TG1 and TG2 become conductive according to the voltage applied to their gates (transfer gates), and can transfer the charges accumulated in the charge storage units MEM1 and MEM2 to the floating diffusion regions FD1 and FD2. In the embodiment of the present disclosure, since there are two charge storage units MEM1 and MEM2, the transfer transistors TG1 and TG2 can also share one floating diffusion region FD.

[0037] Further, the floating diffusion regions FD1 and FD2 are electrically connected to the gates of the amplification transistors AMP1 and AMP2 that convert charges into voltages and output them as signals. Also, one of the sources / drains of the amplification transistors AMP1 and AMP2 is electrically connected to one of the sources / drains of the selection transistors SEL1 and SEL2 that output the signals obtained by conversion to the signal lines VSL1 and VSL2 according to a selection signal. Further, the other of the sources / drains of the amplification transistors AMP1 and AMP2 is electrically connected to a power supply circuit (power supply potential VDD).

[0038] Also, the other of the sources / drains of the selection transistors SEL1 and SEL2 is electrically connected to the signal lines VSL1 and VSL2 that transmit the converted voltage as a signal, and is further electrically connected to the column signal processing circuit unit 34 described above. Further, the gates of the selection transistors SEL1 and SEL2 are electrically connected to a selection line (not shown) that selects the row that outputs the signal, and is further electrically connected to the vertical drive circuit unit 32 described above. That is, the charges accumulated in the floating diffusion regions FD1 and FD2 are converted into voltages by the amplification transistors AMP1 and AMP2 under the control of the selection transistors SEL1 and SEL2, and are output to the signal lines VSL1 and VSL2.

[0039] Also, as shown in FIG. 3, the floating diffusion regions FD1 and FD2 are electrically connected to one of the drains / sources of the reset transistors RST1 and RST2 for resetting the accumulated charges. The gates of the reset transistors RST1 and RST2 are electrically connected to a reset signal line (not shown), and are further electrically connected to the vertical drive circuit unit 32 described above. Also, the other of the drains / sources of the reset transistors RST1 and RST2 is electrically connected to a power supply circuit (power supply potential VDD). Then, the reset transistors RST1 and RST2 become conductive according to the voltage applied to their gates, and can reset the charges accumulated in the floating diffusion regions FD1 and FD2 (discharge them to the power supply circuit (power supply potential VDD)).

[0040] Note that the equivalent circuit of the light-receiving element 10 according to this embodiment is not limited to the example shown in FIG. 3. For example, it may include other elements or the like, and is not particularly limited.

[0041] Here, an operation example of the light-receiving element 10 will be briefly described.

[0042] First, before starting light reception, a discharging operation for discharging the charges of the photodiode PD is performed. That is, the charge discharge transistors OFG1 and OFG2 are turned on, and the charges of the photodiode PD are discharged to the power supply circuit (power supply potential VDD).

[0043] Next, light reception is started, and the switching transistors VG1 and VG2 are controlled to operate at different timings (for example, differentially) from each other. Specifically, in the first period, when the switching transistor VG1 is turned on, the charges of the photodiode PD are transferred to the charge accumulation unit MEM1. On the other hand, in the second period, when the switching transistor VG2 is turned on, the charges of the photodiode PD are transferred to the charge accumulation unit MEM2. That is, the charges generated in the photodiode PD are distributed to the charge accumulation units MEM1 and MEM2 by the switching transistors VG1 and VG2.

[0044] Next, a discharging operation for discharging the charges of the floating diffusion regions FD1 and FD2 is performed. That is, the reset transistors RST1 and RST2 are turned on, and the charges of the floating diffusion regions FD1 and FD2 are discharged to the power supply circuit (power supply potential VDD). After that, it is preferable that the charges (ktc noise) generated in the floating diffusion regions FD1 and FD2 are removed by CDS driving.

[0045] Then, transfer transistors TG1 and TG2 are turned on, and the charges stored in charge storage units MEM1 and MEM2 are transferred to floating diffusion regions FD1 and FD2. Then, when the light reception period ends, each light receiving element 10 of the pixel array unit 12 is sequentially selected. In the selected light receiving element 10, selection transistors SEL1 and SEL2 are turned on. As a result, the charges stored in floating diffusion regions FD1 and FD2 are output as signals to signal lines VSL1 and VSL2.

[0046] Note that the operation of the light receiving element 10 according to the present embodiment is not limited to the above example, and for example, the order may be appropriately changed. And in the present embodiment, the distance to the object 800 can be obtained from the distribution ratio of the charges stored in the two floating diffusion regions FD1 and FD2. The principle thereof will be briefly described below.

[0047] <<4. Principle of the distance calculation method using the distance measurement module 1 according to the embodiment of the present disclosure>> Next, the principle of the distance calculation method (indirect type) using the distance measurement module 1 according to the embodiment of the present disclosure will be described with reference to FIG. 4. FIG. 4 is an explanatory diagram for explaining the principle of the distance calculation method using the distance measurement module 1 according to the embodiment of the present disclosure. Specifically, it schematically shows the temporal variation of the intensity of the irradiation light and the reflected light in the distance measurement module 1.

[0048] As shown in FIG. 4, the distance measurement module 1 irradiates the object 800 with light modulated so that the intensity of the light varies periodically from the irradiation unit 20. The irradiated light is reflected by the object 800 and detected as reflected light by the light receiving unit 30 of the distance measurement module 1. As shown in FIG. 4, the detected reflected light (the second row from the top in FIG. 4) has a phase difference φ with respect to the irradiation light (the first row from the top in FIG. 4), and the phase difference φ increases as the distance from the distance measurement module 1 to the object 800 increases, and decreases as the distance from the distance measurement module 1 to the object 800 decreases.

[0049] As described above, the light receiving element 10 according to the present embodiment has, for example, distribution transistors VG1 and VG2 that are differential from each other. Therefore, since the periods during which the distribution transistors VG1 and VG2 operate do not overlap, during the periods of the regions 802a and 802b shown in gray in FIG. 4, the charges accumulated in the photodiode PD are distributed to the charge storage units MEM1 and MEM2, respectively. Specifically, the charges distributed to the charge storage units MEM1 and MEM2 are transferred to the floating diffusion regions FD1 and FD2, and finally converted into signals corresponding to the areas that are the integrated values during the periods of the regions 802a and 802b. Therefore, as is clear from FIG. 4, the difference between the integrated value of the region 802a and the integrated value of the region 802b changes according to the phase difference φ of the reflected light. Therefore, in the present embodiment, the distance to the object 800 can be calculated by calculating the phase difference φ based on the difference between the integrated value of the region 802a and the integrated value of the region 802b. Note that in the present embodiment, it is also possible to calculate the phase difference φ using the ratio of the integrated values instead of the difference between the integrated values and calculate the distance.

[0050] <<5. Background Leading to the Creation of the Present Embodiment>> As described above, the principles of the distance measurement module 1, the light receiving unit 30, the light receiving element 10, and the distance calculation method according to the embodiment of the present disclosure have been described. Here, before further explaining the details of the present embodiment, the background leading to the creation of the present embodiment by the inventors will be briefly explained.

[0051] As described above, the light receiving unit 30 of the distance measurement module 1 repeats light reception a plurality of times at short intervals to increase the signal amount and improve the S / N ratio, enabling highly accurate distance measurement. For example, the light receiving unit 30 is required to perform operations such as light reception and the operation of distributing the generated charges at a frequency of, for example, several hundred MHz or more. Therefore, it is required that the distribution transistors VG1 and VG2 of the light receiving element 10 of the light receiving unit 30 transfer (distribute) the charges generated in the photodiode PD to the charge storage units MEM1 and MEM2 at high speed with low power consumption.

[0052] Therefore, in view of the above requirements, the inventors have created embodiments of the present disclosure. Specifically, in the embodiments of the present disclosure created by the inventors, the gate of the switching transistor VG has a pair of embedded gate portions embedded in the semiconductor substrate 200. Since the embedded gate portions are embedded in the semiconductor substrate 200, the potential around the embedded gate portions is effectively modulated. Therefore, according to the embedded gate portions, the charges generated in the photodiode PD in the deep part of the semiconductor substrate 200 can be transferred to the charge storage portion MEM. Further, in the embodiments of the present disclosure created by the inventors, the gate of the switching transistor VG has two embedded gate portions. Therefore, according to this embodiment, the two embedded gate portions can more effectively modulate the surrounding potential while consuming low power, and as a result, the charges can be transferred to the charge storage portion MEM at a higher speed. Although the parasitic capacitance increases due to the embedded gate portions, resulting in an increase in power consumption, low power consumption can be achieved by optimizing the design and taking the overall balance. Hereinafter, the details of the embodiments of the present disclosure created by the inventors will be sequentially described.

[0053] <<6. First Embodiment>> <6.1 Planar Structure> First, with reference to FIG. 5, an example of the planar structure of the light receiving element 10 according to the first embodiment of the present disclosure will be described. FIG. 5 is an explanatory diagram showing an example of the planar configuration of the light receiving element 10 according to the present embodiment, and is a view when the light receiving element 10 is viewed from above the surface of the semiconductor substrate 200. Note that the left-right direction in FIG. 5 corresponds to the row direction (left-right direction) in FIG. 2A, and the up-down direction in FIG. 5 corresponds to the column direction (up-down direction) in FIG. 2A.

[0054] As shown in FIG. 5, an N-type semiconductor region 100 is formed in the P-type semiconductor substrate 200 at the center of the light receiving element 10, and the N-type semiconductor region 100 constitutes a part of a photodiode (photoelectric conversion section) PD. Further, gate electrodes (first distribution gate, second distribution gate) 150a and 150b of the distribution transistors VG1 and VG2 are arranged so as to be line-symmetrical (substantially line-symmetrical) with respect to a center line 600 that passes through the center point (center) O of the photodiode PD and extends along the vertical direction (column direction) of the light receiving element 10. Note that the gate electrodes 150a and 150b of the distribution transistors VG1 and VG2 are provided so as to overlap at least a part of the N-type semiconductor region 100.

[0055] Specifically, the distribution transistor VG1 includes a gate electrode 150a, a gate insulating film (not shown) positioned between the gate electrode 150a and the semiconductor substrate 200, an N-type semiconductor region 100 as a source region, and an N-type semiconductor region 102a as a drain region. The N-type semiconductor region 100 as the source region is shared with the photodiode PD, and the N-type semiconductor region 102a as the drain region is shared with the charge storage section MEM1. Further, as shown by the broken line in FIG. 5, the gate electrode 150a has a pair of embedded gate portions 170a and 170b (see FIG. 6) embedded in the semiconductor substrate 200. Details of the embedded gate portions 170a and 170b will be described later. The same applies to the distribution transistor VG2 as to the distribution transistor VG1.

[0056] Further, as shown in FIG. 5, gate electrodes 152a and 152b of the charge discharge transistors OFG1 and OFG2 are arranged so as to be line-symmetrical (substantially line-symmetrical) with respect to a center line 602 that passes through the center point O of the photodiode PD and extends along the horizontal direction (row direction) of the light receiving element 10. Note that the gate electrodes 152a and 152b of the charge discharge transistors OFG1 and OFG2 are provided so as to overlap at least a part of the N-type semiconductor region 100.

[0057] Specifically, the charge discharge transistor OFG1 includes a gate electrode 152a, a gate insulating film (not shown) positioned between the gate electrode 152a and the semiconductor substrate 200, an N-type semiconductor region 100 as a source region, and an N-type semiconductor region 104a as a drain region. The N-type semiconductor region 100 as the source region is also used as the photodiode PD. Further, as shown by the dashed line in FIG. 5, the gate electrode 152a has a pair of embedded gate portions embedded in the semiconductor substrate 200. Details of the embedded gate portions will be described later. Also, the charge discharge transistor OFG2 is the same as the charge discharge transistor OFG1.

[0058] In addition, the charge storage parts MEM1 and MEM2 and the transfer transistors TG1 and TG2 are provided so as to be line-symmetric with respect to the center line 600 and sandwich the N-type semiconductor region 102 and the distribution transistors VG1 and VG2 from both sides. Note that the charge storage part MEM1 is arranged adjacent to the transfer transistor TG1 along the vertical direction (column direction) in FIG. 5, and the charge storage part MEM2 is arranged adjacent to the transfer transistor TG2 along the vertical direction (column direction) in FIG. 5.

[0059] Specifically, the charge storage part (first charge storage part) MEM1 includes, for example, an electrode 154a, an insulating film (not shown) provided below the electrode 154a, and an N-type semiconductor region 102a provided below the insulating film. Also, the transfer transistor TG1 includes a gate electrode 156a, a gate insulating film (not shown) positioned between the gate electrode 156a and the semiconductor substrate 200, an N-type semiconductor region 106a as a source region, and an N-type semiconductor region 108a as a drain region. Also, the charge storage part (second charge storage part) MEM2 and the transfer transistor TG2 are the same as the charge storage part MEM1 and the transfer transistor TG1.

[0060] Further, the reset transistors RST1 and RST2, the amplification transistors AMP1 and AMP2, and the selection transistors SEL1 and SEL2 are arranged so as to be line-symmetrical with respect to the center line 602 and sandwich the N-type semiconductor region 102 and the charge discharge transistors OFG1 and OFG2 from both sides. The reset transistor RST1, the amplification transistor AMP1, and the selection transistor SEL1 are arranged adjacent to each other along the left-right direction (row direction) in FIG. 5, and the reset transistor RST2, the amplification transistor AMP2, and the selection transistor SEL2 are also arranged adjacent to each other along the left-right direction (row direction) in FIG. 5.

[0061] Specifically, the reset transistor RST1 includes a gate electrode 158a, a gate insulating film (not shown) located between the gate electrode 158a and the semiconductor substrate 200, an N-type semiconductor region 110a as a source region, and an N-type semiconductor region 112a as a drain region. The N-type semiconductor region 110a as the source region also serves as the floating diffusion region FD1, and the N-type semiconductor region 112a as the drain region also serves as the amplification transistor AMP1. The same applies to the reset transistor RST2 as to the reset transistor RST1.

[0062] Further, the amplification transistor AMP1 includes a gate electrode 160a, a gate insulating film (not shown) located between the gate electrode 160a and the semiconductor substrate 200, an N-type semiconductor region 112a as a drain region, and an N-type semiconductor region 114a as a source region. The N-type semiconductor region 112a as the drain region also serves as the drain region of the reset transistor RST1. The same applies to the amplification transistor AMP2 as to the amplification transistor AMP1.

[0063] Further, the selection transistor SEL1 includes a gate electrode 162a, a gate insulating film (not shown) located between the gate electrode 162a and the semiconductor substrate 200, an N-type semiconductor region 114a as a drain region, and an N-type semiconductor region 116a as a source region. The N-type semiconductor region 114a as the drain region is also used as the source region of the amplification transistor AMP1. The same applies to the selection transistor SEL2 as to the selection transistor SEL1.

[0064] Note that the planar structure of the light receiving element 10 according to the present embodiment is not limited to the example shown in FIG. 5, and may include, for example, other elements and the like, and is not particularly limited.

[0065] <6.2 Cross-sectional structure> Next, with reference to FIGS. 6 to 9, an example of the cross-sectional structure of the light receiving element 10 according to the first embodiment of the present disclosure will be described. FIG. 6 is a cross-sectional view of the light receiving element 10 cut along the line A-A' in FIG. 5. Specifically, the upper side in FIG. 6 is the back side of the semiconductor substrate 200, and the lower side in FIG. 6 is the front side of the semiconductor substrate 200. FIG. 7 is a cross-sectional view of the light receiving element 10 cut along the line B-B' in FIG. 5. The upper side in FIG. 7 is the front side of the semiconductor substrate 200, and the lower side in FIG. 7 is the back side of the semiconductor substrate 200. Further, FIG. 8 is an explanatory diagram for explaining the present embodiment. FIG. 9 is an enlarged view of the region D in FIG. 6, where the upper side in FIG. 9 is the front side of the semiconductor substrate 200, and the lower side in FIG. 9 is the back side of the semiconductor substrate 200.

[0066] First, as shown in FIG. 6, the light receiving element 10 has a semiconductor substrate 200 made of a silicon substrate or the like. Specifically, in the P-type semiconductor substrate 200, N-type semiconductor regions 100a and 100b are formed, whereby a photodiode PD is formed in the semiconductor substrate 200.

[0067] Next, an explanation will be given from the upper side in FIG. 6, that is, from the back side of the semiconductor substrate 200. Above the back surface of the semiconductor substrate 200, an on-chip lens 208 made of a styrene resin, an acrylic resin, a styrene-acrylic copolymer resin, a siloxane resin, or the like, into which reflected light from the object 800 is incident, is provided. Below the on-chip lens 208, a planarization film 204 made of, for example, silicon oxide (SiO2), silicon nitride (SiN), silicon oxynitride (SiON), or the like is provided. Further, below the planarization film 204, an antireflection film 202 made of an insulating film is provided. For example, the antireflection film 202 can be formed of hafnium oxide (HfO2), aluminum oxide (Al2O3), titanium oxide (TiO2), silicon oxide, or the like, or a laminate thereof.

[0068] Above the antireflection film 202 and in the boundary region with the adjacent light receiving element 10, a light shielding film 206 for preventing the reflected light from the object 800 from entering the adjacent light receiving element 10 is provided. The light shielding film 206 is made of a material that blocks light, and can be formed, for example, using a metal material such as tungsten (W), aluminum (Al), copper (Cu), or the like.

[0069] Further, below the light shielding film 206, a pixel isolation portion (first pixel isolation portion) 210 (FFTI) for preventing incident light from penetrating the semiconductor substrate 200 and entering the adjacent light receiving element 10 is provided. The pixel isolation portion 210 is composed of, for example, a trench penetrating from the back surface to the front surface of the semiconductor substrate 200 and an insulating film such as silicon oxide or a metal film such as aluminum embedded in the trench.

[0070] Next, the lower side in FIG. 6, that is, the surface side of the semiconductor substrate 200 will be described. Two distribution transistors VG1 and VG2, which are vertical transistors, are formed so as to sandwich the N-type semiconductor region 100b. Specifically, the distribution transistors VG1 and VG2 each have gate electrodes 150a and 150b made of, for example, a polysilicon film provided on the surface of the semiconductor substrate 200. Further, the gate electrodes 150a and 150b each have embedded gate portions 170a and 170b made of, for example, a polysilicon film that extend into the semiconductor substrate 200 along the thickness direction of the semiconductor substrate 200. In other words, the embedded gate portions 170a and 170b are embedded in the semiconductor substrate 200 and can be said to be in contact with the semiconductor substrate 200 via a gate insulating film (not shown). For example, the embedded gate portions 170a and 170b of the distribution transistors VG1 and VG2 can be formed by forming a trench by dry etching from the surface side of the semiconductor substrate 200, forming a gate insulating film, and further embedding a polysilicon film or the like in the trench. Details of the embedded gate portions 170a and 170b according to the present embodiment will be described later.

[0071] Note that the N-type semiconductor region 100b sandwiched between the embedded gate portions 170a and 170b preferably has a higher impurity concentration than the N-type semiconductor region 100a that constitutes the photodiode PD. Furthermore, it is preferable that the impurity concentration of the N-type semiconductor region 100b also increases as it approaches the surface side of the semiconductor substrate 200.

[0072] Furthermore, charge storage portions MEM1 and MEM2 are provided in the semiconductor substrate 200 so as to sandwich the distribution transistors VG1 and VG2 from the left and right directions. For example, the charge storage portions MEM1 and MEM2 can be MOS (Metal-Oxide-Semiconductor) type capacitors composed of a stack of electrodes 154a and 154b made of a metal film or a polysilicon film, an insulating film made of an oxide film (not shown), and N-type semiconductor regions 102a and 102b (shown as MEM1 and MEM2 in FIG. 6).

[0073] Then, adjacent to the charge storage parts MEM1 and MEM2, gate electrodes 156a and 156b of transfer transistors TG1 and TG2 are provided on the surface of the semiconductor substrate 200. Further, N-type semiconductor regions 110a and 110b, illustrated as floating diffusion regions FD1 and FD2, are formed in the semiconductor substrate 200 close to the gate electrodes 156a and 156b of the transfer transistors TG1 and TG2.

[0074] Furthermore, a wiring layer 300 is provided on the surface of the semiconductor substrate 200. The wiring layer 300 includes an insulating film 302 and a metal film 304. Further, an electrode 306 is provided on the surface of the wiring layer 300 opposite to the semiconductor substrate 200.

[0075] In addition, a substrate 400 is provided on the surface of the wiring layer 300 opposite to the semiconductor substrate 200. The substrate 400 also includes an insulating film 402 and a metal film 404, and an electrode 406 is provided on the surface on the wiring layer 300 side. For example, the electrode 306 of the wiring layer 300 and the electrode 406 of the substrate 400 are formed of copper (Cu) or the like, and by contacting each other, the wiring layer 300 and the substrate 400 can be joined.

[0076] Note that the cross-sectional structure of the light receiving element 10 according to the present embodiment is not limited to the example shown in FIG. 6. For example, it may include other elements or the like and is not particularly limited.

[0077] Next, with reference to FIG. 7, the details of the embedded gate portions 170a and 170b according to the present embodiment will be described. As described above, FIG. 7 is a cross-sectional view when the light receiving element 10 is cut along the line B-B' in FIG. 5. Specifically, it is a cross-sectional view of the gate electrode 150b of the switching transistor VG2 and the embedded gate portions 170b-1 and 170b-2 (in FIG. 7, the illustration of the gate insulating film is omitted). As shown in FIG. 7, in the present embodiment, the gate electrode 150b of the switching transistor VG2 has a pair of embedded gate portions 170b-1 and 170b-2 arranged along the vertical direction in FIG. 5, that is, along the column direction in FIG. 2A. Further, as shown by the broken line in FIG. 5, the embedded gate portions 170b-1 and 170b-2 preferably have a substantially rectangular shape with a long side L (see FIG. 9) extending along the direction from the center point O of the photodiode PD to the charge storage portion MEM2 in the cross-section obtained by cutting the light receiving element 10 along the surface of the semiconductor substrate 200. Also, regarding the gate electrode 150a of the switching transistor VG1, similar to the gate electrode 150b of the switching transistor VG2, it has a pair of embedded gate portions 170 arranged along the vertical direction in FIG. 5, that is, along the column direction in FIG. 2A. Further, the embedded gate portion 170 of the gate electrode 150a of the switching transistor VG1 also preferably has a substantially rectangular shape with a long side L (see FIG. 9) extending along the direction from the center point O of the photodiode PD to the charge storage portion MEM2 in the cross-section obtained by cutting the light receiving element 10 along the surface of the semiconductor substrate 200, as shown by the broken line in FIG. 5.

[0078] Specifically, in this embodiment, as shown in FIG. 8, by applying a voltage to the embedded gate portions 170b-1 and 170b-2 via the gate electrode 150b, the P-type semiconductor region 700 around the embedded gate portions 170b-1 and 170b-2 is modulated. Then, as shown in FIG. 9, the charges (electrons) generated by the photodiode PD in the deep part of the semiconductor substrate 200 pass through the surrounding 700 in the semiconductor substrate 200 modulated by the embedded gate portion 170b and are transferred to the charge storage portion MEM2. In this embodiment, the two embedded gate portions 170b-1 and 170b-2 can modulate the potential of the surrounding 700 more effectively while consuming low power, so that the charges can be transferred to the charge storage portion MEM2 at a higher speed.

[0079] Furthermore, in this embodiment, the embedded gate portions 170b-1 and 170b-2 are formed in a substantially rectangular shape having a long side L (see FIG. 9) extending along the direction from the center point O of the photodiode PD toward the charge storage portion MEM2. By doing so, since the extending direction of the long side L is the same as the direction in which the charges move, the embedded gate portion 170 can effectively modulate the region through which the charges pass and guide the charges to the charge storage portion MEM2 along the modulated region.

[0080] Also, in this embodiment, as shown by the dashed line in FIG. 5, the gate electrodes 152a and 152b of the charge discharge transistors OFG1 and OFG2 may also have a pair of embedded gate portions 170 embedded in the semiconductor substrate 200 and in contact with the semiconductor substrate 200 via a gate insulating film (not shown). By doing so, in this embodiment, the two embedded gate portions 170 of the gate electrodes 152a and 152b of the charge discharge transistors OFG1 and OFG2 can modulate the surrounding potential more effectively with low power consumption and discharge the charges at a higher speed.

[0081] Furthermore, the embedded gate portions 170 of the gate electrodes 152a and 152b of the charge discharge transistors OFG1 and OFG2 also have a substantially rectangular shape with a long side extending along the direction from the center point O of the photodiode PD to the N-type semiconductor regions 104a and 104b connected to the power supply circuit (power supply potential VDD) in the cross section where the light receiving element 10 is cut along the surface of the semiconductor substrate 200, as shown by the broken line in FIG. 5. By doing so, since the region where charges move can be modulated more effectively, charges can be discharged at a higher speed.

[0082] That is, according to the present embodiment, a light receiving element 10 capable of transferring charges at high speed can be provided.

[0083] <6.3 Modification Example> The light receiving element 10 according to the first embodiment of the present disclosure described above can also be modified as follows. Hereinafter, Modification Examples 1 to 7 of the present embodiment will be described. Note that the gate electrodes 150 of the distribution transistors VG in all of the light receiving elements 10 according to Modification Examples 1 to 7 described below have a pair of embedded gate portions 170.

[0084] (Modification Example 1) First, Modification Example 1 will be described with reference to FIG. 10. FIG. 10 is an explanatory diagram showing a planar configuration example of the light receiving element 10 according to Modification Example 1 of the present embodiment. Also in this modification, the gate electrodes 150a and 150b of the distribution transistors VG1 and VG2 have a pair of embedded gate portions 170. Further, in this modification, as shown by the broken line in FIG. 10, each embedded gate portion 170 has a substantially elliptical shape with a major axis extending along the direction from the center point O of the photodiode PD to the charge storage portions MEM1 and MEM2 in the cross section where the light receiving element 10 is cut along the surface of the semiconductor substrate 200. In this modification, by forming the embedded gate portion 170 into a substantially elliptical shape with a major axis extending along the direction from the center point O of the photodiode PD to the charge storage portions MEM1 and MEM2, charges can be induced to the charge storage portions MEM1 and MEM2 at a higher speed, similar to the first embodiment described above.

[0085] Note that also in this modified example, the gate electrodes 152a and 152b of the charge discharge transistors OFG1 and OFG2 may also have a pair of embedded gate portions 170 embedded in the semiconductor substrate 200. Further, in this modified example, the embedded gate portions 170 of the gate electrodes 152a and 152b of the charge discharge transistors OFG1 and OFG2 also have a substantially elliptical shape with a major axis extending along the direction from the center point O of the photodiode PD toward the N-type semiconductor regions 104a and 104b connected to the power supply circuit (power supply potential VDD) in the cross section obtained by cutting the light receiving element 10 along the surface of the semiconductor substrate 200 as shown by the broken line in FIG. 10.

[0086] In addition, in this first modified example, the charge storage portions MEM1 and MEM2 and the transfer transistors TG1 and TG2 are provided so as to be mirror-symmetrical with respect to the center line 600 and sandwich the N-type semiconductor region 102 and the distribution transistors VG1 and VG2 from both sides. Note that the charge storage portion MEM1 is arranged adjacent to the transfer transistor TG1 along the vertical direction (column direction) in FIG. 10, and the charge storage portion MEM2 is arranged adjacent to the transfer transistor TG2 along the vertical direction (column direction) in FIG. 10.

[0087] Further, in this first modified example, the reset transistors RST1 and RST2, the amplification transistors AMP1 and AMP2, and the selection transistors SEL1 and SEL2 are arranged so as to be mirror-symmetrical with respect to the center line 602 and sandwich the N-type semiconductor region 102 and the charge discharge transistors OFG1 and OFG2 from both sides. Note that the reset transistor RST1, the amplification transistor AMP1, and the selection transistor SEL1 are arranged adjacent to each other along the horizontal direction (row direction) in FIG. 10, and the reset transistor RST2, the amplification transistor AMP2, and the selection transistor SEL2 are also arranged adjacent to each other along the horizontal direction (row direction) in FIG. 10.

[0088] (Second Modified Example) Next, Modification Example 2 will be described with reference to FIG. 11. FIG. 11 is an explanatory diagram showing a planar configuration example of the light receiving element 10 according to Modification Example 2 of the present embodiment. Also in this modification example, the gate electrodes 150a and 150b of the distribution transistors VG1 and VG2 have a pair of embedded gate portions 170. Further, in this modification example, as shown by the broken line in FIG. 11, each embedded gate portion 170 has a substantially circular shape in a cross section obtained by cutting the light receiving element 10 along the surface of the semiconductor substrate 200. In this modification example, by forming the embedded gate portion 170 in a substantially circular shape, variations in shape due to manufacturing can be avoided, so that the charge distribution performance by the two distribution transistors VG1 and VG2 can be adjusted to be equal to each other.

[0089] Note that also in this modification example, the gate electrodes 152a and 152b of the charge discharge transistors OFG1 and OFG2 may also have a pair of embedded gate portions 170 embedded in the semiconductor substrate 200. Further, in this modification example, the embedded gate portions 170 of the gate electrodes 152a and 152b can also have a substantially circular shape in a cross section obtained by cutting the light receiving element 10 along the surface of the semiconductor substrate 200 as shown by the broken line in FIG. 11.

[0090] (Modification Example 3) Next, Modification Example 3 will be described with reference to FIG. 12. FIG. 12 is an explanatory diagram showing a cross-sectional configuration example of the light receiving element 10 according to Modification Example 3 of the present embodiment. Also in this modification example, the gate electrodes 150a and 150b of the distribution transistors VG1 and VG2 have a pair of embedded gate portions 170a and 170b. Further, in this modification example, as shown in FIG. 12, the light receiving element 10 has a moth-eye structure 202a provided on the back surface (the surface opposite to the front surface) of the semiconductor substrate 200 with fine irregularities formed thereon. Specifically, as shown in FIG. 12, the moth-eye structure 202a is configured by arranging a plurality of substantially square pyramids having vertices on the semiconductor substrate 200 side in a matrix. In this modification example, by providing the moth-eye structure 202a, a sudden change in refractive index at the interface can be alleviated and reflection can be prevented.

[0091] (Modification Example 4) Next, Modification Example 4 will be described with reference to FIG. 13. FIG. 13 is an explanatory diagram showing a cross-sectional configuration example of the light-receiving element 10 according to Modification Example 4 of the present embodiment. Also in this modification example, the gate electrodes 150a and 150b of the switching transistors VG1 and VG2 have a pair of embedded gate portions 170a and 170b. Further, in this modification example, as shown in FIG. 13, the light-receiving element 10 penetrates from the back surface (the surface opposite to the front surface) of the semiconductor substrate 200 to the middle of the semiconductor substrate 200 along the thickness direction of the semiconductor substrate 200, and has a pixel isolation portion (second pixel isolation portion) 210a (having DTI (deep Trench Isolation)). According to the pixel isolation portion 210a, it is possible to prevent incident light from entering adjacent light-receiving elements 10.

[0092] (Modification Example 5) Next, Modification Example 5 will be described with reference to FIG. 14. FIG. 14 is an explanatory diagram showing a cross-sectional configuration example of the light-receiving element 10 according to Modification Example 5 of the present embodiment. Also in this modification example, the gate electrodes 150a and 150b of the switching transistors VG1 and VG2 have a pair of embedded gate portions 170a and 170b. Further, in this modification example, charge storage portions MEM1 and MEM2 having vertical electrodes 154a and 154b embedded in the N-type semiconductor regions 102a and 102b in the semiconductor substrate 200 are provided. According to this modification example, since the charge storage portions MEM1 and MEM2 have vertical electrodes, the area of the insulating film (not shown) sandwiched between the vertical electrodes and the N-type semiconductor regions 102a and 102b facing the electrodes can be widened. As a result, according to this modification example, since the area becomes larger, the capacitance of the charge storage portions MEM1 and MEM2 can be further increased, and thus, it is possible to secure a wide dynamic range of the light-receiving element 10.

[0093] (Modification Example 6) Next, Modification Example 6 will be described with reference to FIG. 15. FIG. 15 is an explanatory diagram showing a partial cross-sectional configuration example of the light-receiving element 10 according to Modification Example 6 of the present embodiment, and corresponds to the cross-sectional view of FIG. 7. Also in this modification example, the gate electrode 150b of the distribution transistor VG2 has a pair of embedded gate portions 170b-1 and 170b-2. Further, in this modification example, as shown in FIG. 15, each of the embedded gate portions 170b-1 and 170b-2 has a tapered shape that gradually narrows in the thickness direction of the semiconductor substrate 200 from the surface of the semiconductor substrate 200 toward the back surface located on the opposite side of the surface. In other words, in this modification example, the distance (width) between the opposing side surfaces of the pair of embedded gate portions 170b-1 and 170b-2 gradually widens in the thickness direction of the semiconductor substrate 200 from the surface of the semiconductor substrate 200 toward the back surface located on the opposite side of the surface.

[0094] In this modification example, by gradually widening the distance between the opposing side surfaces of the pair of embedded gate portions 170b-1 and 170b-2 along the thickness direction of the semiconductor substrate 200 from the surface of the semiconductor substrate 200, a suitable potential gradient is generated in the thickness direction of the semiconductor substrate 200, and the charges to be transferred are likely to gather near the surface of the semiconductor substrate 200. Then, in this modification example, by collecting and transferring the charges near the surface of the semiconductor substrate 200, a stable charge distribution operation can be performed, and the ranging accuracy can be improved.

[0095] For example, as shown in FIG. 15, each of the embedded gate portions 170b-1 and 170b-2 preferably has a diameter L2 at a position 3 / 4 advanced along the thickness direction of the semiconductor substrate 200 from the surface of the semiconductor substrate 200 with respect to the length (depth) of each of the embedded gate portions 170b-1 and 170b-2 being about 3 / 4 of the diameter L1 at the surface of the semiconductor substrate 200. By doing so, when forming the embedded gate portions 170b-1 and 170b-2, it is possible to avoid the generation of voids in the embedded gate portions 170b-1 and 170b-2 and maintain good embedding properties.

[0096] (Modification Example 7) Next, Modification 7 will be described with reference to FIG. 16. FIG. 16 is an explanatory diagram showing a cross-sectional configuration example of the light-receiving element 10 according to Modification 7 of the present embodiment. In this modification, as shown in FIG. 16, the light-receiving element 10 may have a plurality of, specifically, four distribution transistors VG. Also in this modification, the gate electrode (third distribution gate) 150 of each distribution transistor VG has a pair of embedded gate portions 170, and can distribute charges to the charge storage portions (third charge storage portions) MEM, respectively. Note that also in this modification, the gate electrode 152 of the charge discharge transistor OFG may also have a pair of embedded gate portions embedded in the semiconductor substrate 200.

[0097] <<7. Second Embodiment>> Incidentally, in the first embodiment of the present disclosure described above, a large parasitic capacitance is generated in the distribution transistor VG by having a pair of embedded gate portions 170 embedded in the semiconductor substrate 200. And due to such a large parasitic capacitance, the speed of charge transfer by the distribution transistor VG may become slow. Therefore, in the second embodiment of the present disclosure described below, in order to reduce the parasitic capacitance of the gate electrode 150 of the distribution transistor VG, a low dielectric layer is provided so as to contact a portion other than the portion that functions when transferring charges in the embedded gate portion 170. The details of this embodiment will be sequentially described below.

[0098] <7.1 Embodiment> First, the embedded gate portion 170 of the distribution transistor VG according to the present embodiment will be described with reference to FIGS. 17 and 18. FIG. 17 is an explanatory diagram for explaining the light-receiving element 10 according to the present embodiment, and corresponds to the cross-sectional view of FIG. 7. FIG. 18 is an explanatory diagram showing a planar configuration example of the light-receiving element 10 according to the present embodiment. Specifically, it is a diagram in which, for convenience of explanation, the illustration of the gate electrode 150 and the like is omitted on the surface of the semiconductor substrate 200.

[0099] In this embodiment, as shown in FIGS. 17 and 18, among a pair of embedded gate portions 170b-1 and 170b-2, the side surface of one embedded gate portion 170b-1 that is located on the side opposite to the side facing the other embedded gate portion 170b-2 is in contact with the low dielectric constant layers 172b-1 and 172b-2. The low dielectric constant layer 172b can be formed of, for example, an oxide film (e.g., SiO2) or a nitride film (e.g., SiN). In this way, in this embodiment, by providing the low dielectric constant layer 172 so as to be in contact with a portion of the embedded gate portion 170 other than the portion that functions when transferring charges, an increase in the parasitic capacitance of the gate electrode 150 can be suppressed. As a result, in this embodiment, it is possible to avoid a decrease in the speed of charge transfer by the distribution transistor VG.

[0100] Note that in this embodiment, as shown in FIG. 18, the gate electrode 152 of the charge discharge transistor OFG may also have a pair of embedded gate portions 174 embedded in the semiconductor substrate 200. Further, with respect to the pair of embedded gate portions 174a and 174b of the gate electrode 152 of the charge discharge transistor OFG, the side surface of one embedded gate portion 174b-1 that is located on the side opposite to the side facing the other embedded gate portion 174b-2 may be in contact with the low dielectric constant layers 176b-1 and 176b-2. The low dielectric constant layer 176b can also be formed of, for example, an oxide film or a nitride film. By doing so, an increase in the parasitic capacitance of the gate electrode 152 of the charge discharge transistor OFG can be suppressed, and it is possible to avoid a decrease in the speed of charge discharge by the charge discharge transistor OFG.

[0101] <7.2 Modification Example> Incidentally, the light-receiving element 10 according to the second embodiment of the present disclosure described above can also be modified as follows. Hereinafter, with reference to FIGS. 19 and 20, Modification Examples 1 and 2 of this embodiment will be described. FIG. 19 is an explanatory diagram showing a planar configuration example of the light-receiving element 10 according to Modification Example 1 of this embodiment, and FIG. 20 is an explanatory diagram showing a planar configuration example of the light-receiving element 10 according to Modification Example 2 of this embodiment. Note that FIGS. 19 and 20 are diagrams in which, for the sake of convenience of explanation, illustration of the gate electrode 150 and the like is omitted on the surface of the semiconductor substrate 200, similar to FIG. 18.

[0102] As shown in FIGS. 19 and 20, in these modification examples, one side surface of the embedded gate portion 170 is in contact with the low dielectric layer 178, and the low dielectric layer 178 is composed of an element isolation portion for electrically separating each element on the semiconductor substrate 200. Further, in these modification examples, as shown in FIGS. 19 and 20, for the pair of embedded gate portions 174a and 174b of the gate electrode 152 of the charge discharge transistor OFG, one side surface is also in contact with the low dielectric layer 178, and the low dielectric layer 178 is composed of an element isolation portion for electrically separating each element on the semiconductor substrate 200.

[0103] <7.3 Manufacturing Method> Next, with reference to FIGS. 21A to 21F, an example of a manufacturing method of the embedded gate portion 170 and the low dielectric layer 178 according to this embodiment will be described. FIGS. 21A to 21F are explanatory diagrams for explaining the manufacturing method of the light-receiving element 10 according to this embodiment.

[0104] First, as shown in FIG. 21A, a thermally oxidized silicon layer 500 is formed on the surface of the semiconductor substrate 200 by thermal oxidation. Further, a silicon nitride layer 502, a silicon oxide layer 504, and a patterned resist 506 are formed on the thermally oxidized silicon layer 500.

[0105] Next, dry etching is performed along the pattern of the resist 506, and when the silicon oxide layer 504 is peeled off, a trench 510 as shown in FIG. 21B is formed.

[0106] Then, thermal oxidation is performed to form a thermally oxidized silicon layer 500 on the bottom and side surfaces within the trench 510. Further, as shown in FIG. 21C, a silicon oxide film (low dielectric constant layer) 172 is embedded within the trench 510.

[0107] Further, as shown in FIG. 21D, a patterned resist 508 is formed.

[0108] Next, as shown in FIG. 21E, dry etching is performed on the silicon oxide film 172 along the pattern of the resist 508, and a trench 512 is formed.

[0109] Then, by embedding polysilicon films (embedded gate portions) 170 and 150 into the trench 512 and peeling off the resist 508 and the silicon nitride layer 502, a structure as shown in FIG. 21F can be obtained.

[0110] As described above, according to the present embodiment, by forming the low dielectric constant layer 178 so as to contact the side surface of one of the embedded gate portions 170 that is located on the side opposite to the side surface facing the other embedded gate portion 170, the parasitic capacitance of the gate electrode 150 of the diversion transistor VG can be reduced.

[0111] <<8. Third Embodiment>> Also, in the above-described first and second embodiments and their modifications, the insulating films (not shown) of the charge storage portions MEM1 and MEM2, the gate insulating films (not shown) of the amplification transistors AMP1 and AMP2, etc. may be thinned. By doing so, without increasing the size, the capacitances of the charge storage portions MEM1 and MEM2 can be increased. Further, since the crystal defects in the gate insulating film are reduced, the influence of the crystal defects is reduced due to an increase in the mutual conductance gm of the transistors, and the interface levels are reduced due to shortening of the heat treatment time or lowering of the heat treatment temperature, the random noise of the amplification transistors AMP1 and AMP2 can be reduced.

[0112] Here, with reference to FIGS. 22, 23A, and 23B, a third embodiment of the present disclosure regarding charge storage portions MEM1, MEM2 having a thinned insulating film and amplification transistors AMP1, AMP2 will be described. Note that FIG. 22 is an explanatory diagram showing a planar configuration example of the light receiving element 10 according to the present embodiment, and is a view when the light receiving element 10 is viewed from above the surface of the semiconductor substrate 200, which is the same as the light receiving element 10 of the first embodiment. Further, FIG. 23A is a cross-sectional view when the light receiving element 10 is cut along the C-C' line in FIG. 22, and FIG. 23B is a cross-sectional view when the light receiving element 10 is cut along the D-D' line in FIG. 22. Specifically, in FIGS. 23A and 23B, the upper side in the figure is the surface side of the semiconductor substrate 200, and the lower side in the figure is the back surface side of the semiconductor substrate 200.

[0113] Specifically, in the present embodiment, for example, as shown in FIG. 23A, the insulating film 720a located below the gate electrode 160 covered by the sidewall 730 of the amplification transistor AMP1 is made of, for example, an oxide film (third oxide film), and its film thickness is thinner than that of the insulating film 720 made of an oxide film (third oxide film) located below the gate electrode 158 of the reset transistor RST1 and the gate electrode 162 of the selection transistor SEL1.

[0114] Also, in the present embodiment, for example, as shown in FIG. 23B, the insulating film 720a located below the electrode 154 covered by the sidewall 730 of the charge storage portion MEM1 is made of, for example, an oxide film (first oxide film), and its film thickness is thinner than that of the insulating film 720 made of an oxide film (second oxide film) located below the gate electrode 156 of the transfer transistor TG1.

[0115] Note that in the present embodiment, the insulating film 720a located below the gate electrode 160 of the amplification transistor AMP1 and the insulating film 720a located below the electrode 154 of the charge storage portion MEM1 may be oxide films made of the same material and may also have substantially the same film thickness.

[0116] More specifically, in the present embodiment, the insulating film 720a located below the gate electrode 160 of the amplification transistor AMP1 and the insulating film 720a located below the electrode 154 of the charge storage unit MEM1 are made of an oxide film such as silicon oxide (SiO2) or silicon nitride (SiN). Further, in the present embodiment, in view of the reduction effect of random noise due to the thinning of the film thickness of the insulating film 720a located below the gate electrode 160 of the amplification transistor AMP1 and the insulating film 720a located below the electrode 154 of the charge storage unit MEM1, and the increase in power consumption due to the increase in leakage current, the film thickness of the insulating film 720 located below the gate electrodes 156, 158, and 162 of the other elements (transfer transistor TG, reset transistor RST, and selection transistor SEL) is preferably about half, and more preferably 1.0 nm or more and 5.0 nm or less.

[0117] Furthermore, in the present embodiment, when viewed from above the semiconductor substrate 200, the insulating film 720a located below the gate electrode 160 of the amplification transistor AMP1 and the insulating film 720a located below the electrode 154 of the charge storage unit MEM1 are preferably wider than the gate electrode 160 and the electrode 154 so as not to interfere with adjacent elements.

[0118] Note that, in the present embodiment, the present invention is not limited to thinning only the insulating film 720a of the charge storage units MEM1 and MEM2 and the gate insulating film 720a of the amplification transistors AMP1 and AMP2. In the present embodiment, only the insulating film 720a of the charge storage units MEM1 and MEM2 may be thinned, or the insulating film 720 in contact with the gate electrodes 150, 152, 154, 156, 158, 160, 162 and the electrode 154 of the elements (charge storage unit MEM, transfer transistor TG, distribution transistor VG, charge discharge transistor OFG, amplification transistor AMP, reset transistor RST, and selection transistor SEL) on the light receiving element 10 may be thinned.

[0119] As described above, according to the present embodiment, by thinning the insulating film 720a of the charge storage unit MEM, the gate insulating film 720a of the amplification transistor AMP, etc., the capacitance of the charge storage unit MEM can be increased without increasing the size, and the random noise of the transistor can be reduced. Therefore, in the present embodiment, according to the configuration according to the first embodiment described above, charges can be transferred at high speed, and further, according to the configuration according to the third embodiment, the capacitance of the charge storage unit MEM for storing the transferred charges can be increased. Thus, a ranging module 1 with higher ranging accuracy can be obtained. In addition, since the random noise of the transistor can be reduced according to the configuration according to the third embodiment, the characteristics of the ranging module 1 can be further improved. Note that the present embodiment can be implemented in combination with the first and second embodiments described above and their modifications.

[0120] <<9. Fourth Embodiment>> Incidentally, in the above-described third embodiment, the insulating film 720a of the charge storage unit MEM, the gate insulating film 720a of the amplification transistor AMP, etc. were thinned to increase the capacitance of the charge storage unit MEM and reduce the random noise of the amplification transistor AMP. However, when the thinning of the gate insulating film 720a is advanced, although the effects as described above can be obtained, the leakage current increases, so there is a limit to the thinning. Therefore, the inventors of the present invention conceived of using a high-dielectric constant film having a high dielectric constant that can increase the capacitance of the charge storage unit MEM compared to the above-described oxide film even with the same film thickness instead of the insulating film 720a. By using a high-dielectric constant film as the insulating film 720a, even when the film thickness is reduced, it is possible to increase the capacitance of the charge storage unit MEM and reduce the random noise of the amplification transistor AMP while avoiding an increase in the leakage current.

[0121] Here, referring to FIGS. 24, 25A, and 25B, a fourth embodiment of the present disclosure regarding charge storage parts MEM1 and MEM2 having an insulating film made of a high dielectric constant film and amplification transistors AMP1 and AMP2 will be described. Note that FIG. 24 is an explanatory diagram showing a planar configuration example of the light receiving element 10 according to the present embodiment, and is a view when the light receiving element 10 is seen from above the surface of the semiconductor substrate 200, which is the same as the light receiving element 10 of the first embodiment. Further, FIG. 25A is a cross-sectional view when the light receiving element 10 is cut along the line E-E' of FIG. 24, and FIG. 25B is a cross-sectional view when the light receiving element 10 is cut along the line F-F' of FIG. 24. Specifically, in FIGS. 25A and 25B, the upper side in the figure is the surface side of the semiconductor substrate 200, and the lower side in the figure is the back surface side of the semiconductor substrate 200.

[0122] Specifically, in the present embodiment, for example, as shown in FIG. 25A, an insulating film (third insulating film) 740 located below the gate electrode 160 covered by the sidewall 730 of the amplification transistor AMP1 is made of a high dielectric constant film. And the relative permittivity of the insulating film 740 is higher than that of the insulating film (third insulating film) 720 located below the gate electrode 158 of the reset transistor RST1 and the gate electrode 162 of the selection transistor SEL1.

[0123] Also, in the present embodiment, for example, as shown in FIG. 25B, an insulating film (first insulating film) 740 located below the electrode 154 covered by the sidewall 730 of the charge storage part MEM1 is made of a high dielectric constant film. The relative permittivity of the insulating film 740 is higher than that of the insulating film (second insulating film) 720 located below the gate electrode 156 of the transfer transistor TG1.

[0124] Note that in the present embodiment, the insulating film 740 located below the gate electrode 160 of the amplification transistor AMP1 and the insulating film 740 located below the electrode 154 of the charge storage part MEM1 may be formed of the same material.

[0125] More specifically, in the present embodiment, the high-k dielectric film is a material having a relative permittivity higher than that of silicon oxide (SiO2) (3.9), and preferably has a relative permittivity of 4 or more. In the present embodiment, for example, the high-k dielectric film is a metal oxide film and can be formed of materials such as Al2O3, HfSiON, Y2O3, Ta2O5, La2O3, TiO2, HfO2, ZrO2, HfZrO2, etc.

[0126] When the high-k dielectric film is used as the insulating film 740, for the adjustment of Vth (threshold voltage), metal materials such as TiN, TaN, NiSi, etc. may be used as the materials for forming the gate electrodes 150, 152, 154, 156, 158, 160, 162.

[0127] Furthermore, in the present embodiment, the insulating film 740 located below the gate electrode 160 of the amplification transistor AMP1 and the insulating film 740 located below the electrode 154 of the charge storage unit MEM1 are preferably wider than the gate electrode 160 and the electrode 154 to such an extent that adjacent elements do not interfere when viewed from above the semiconductor substrate 200.

[0128] Note that in the present embodiment, it is not limited to forming only the insulating films 740 of the charge storage units MEM1 and MEM2 and the gate insulating films 740 of the amplification transistors AMP1 and AMP2 with the high-k dielectric film. In the present embodiment, only the insulating film 740 of the charge storage units MEM1 and MEM2 may be formed with the high-k dielectric film, or the gate electrodes 150, 152, 154, 156, 158, 160, 162 of the elements (charge storage unit MEM, transfer transistor TG, distribution transistor VG, charge discharge transistor OFG, amplification transistor AMP, reset transistor RST, and selection transistor SEL) on the light receiving element 10 and the insulating film 720 in contact with the electrode 154 may be formed with the high-k dielectric film.

[0129] As described above, according to this embodiment, by forming the insulating film 740 of the charge storage section MEM, the gate insulating film 740 of the amplification transistor AMP, etc. with a high dielectric constant film, it is possible to increase the capacitance of the charge storage section MEM and reduce the random noise of the amplification transistor AMP without reducing the film thickness compared to the case where SiO2 is used. Therefore, in this embodiment, with the configuration according to the first embodiment described above, charges can be transferred at high speed, and further, with the configuration according to the fourth embodiment, since the capacitance of the charge storage section MEM for storing the transferred charges can be increased, a ranging module 1 with higher ranging accuracy can be obtained. In addition, with the configuration according to the fourth embodiment, since the random noise of the transistor can be reduced, the characteristics of the ranging module 1 can be further improved. Note that this embodiment can be implemented in combination with the above-described first and second embodiments and their modifications.

[0130] <<10. Summary>> As described above, according to the embodiments and modifications of the present disclosure, it is possible to provide a light receiving element 10 and a ranging module 1 that can transfer charges at high speed.

[0131] The present disclosure has been described above by way of embodiments, their modifications, application examples, and usage examples, but the present disclosure is not limited to the above-described embodiments and the like, and various modifications are possible. Note that the effects described in this specification are merely examples. The effects of the present disclosure are not limited to the effects described in this specification. The present disclosure may have effects other than those described in this specification.

[0132] In the above-described embodiments and modifications of the present disclosure, the conductivity types of the above-described semiconductor regions may be reversed. For example, the present embodiments and modifications can be applied to elements that use holes as charges instead of electrons.

[0133] In the above-described embodiments and modified examples of the present disclosure, the semiconductor substrate does not necessarily have to be a silicon substrate, and other substrates (for example, an SOI (Silicon ON Insulator) substrate, a SiGe substrate, etc.) may be used. Further, the semiconductor substrate may be one on which a semiconductor structure or the like is formed on such various substrates.

[0134] In the above-described embodiments and modified examples of the present disclosure, the light receiving element 10 may be formed together with an irradiation unit, a processing circuit, etc. on one chip, or may be provided in one package, and is not particularly limited.

[0135] In the embodiments and modifications of the present disclosure, examples of the methods for forming the above-described respective layers, films, elements, etc. include, for example, physical vapor deposition methods (PVD (Physical Vapor Deposition) methods) and CVD (Chemical Vapor Deposition) methods. Examples of PVD methods include vacuum evaporation methods using resistance heating or high-frequency heating, EB (electron beam) evaporation methods, various sputtering methods (magnetron sputtering methods, RF (Radio Frequency)-DC (Direct Current) combined bias sputtering methods, ECR (Electron Cyclotron Resonance) sputtering methods, facing target sputtering methods, high-frequency sputtering methods, etc.), ion plating methods, laser ablation methods, molecular beam epitaxy (MBE) methods, laser transfer methods, etc. Examples of CVD methods include plasma CVD methods, thermal CVD methods, MO (Metal Organic) CVD methods, photo CVD methods, etc. Further, as other methods, electroplating methods, electroless plating methods, spin coating methods; dipping methods; casting methods; microcontact printing methods; drop casting methods; various printing methods such as screen printing methods, inkjet printing methods, offset printing methods, gravure printing methods, flexographic printing methods; stamping methods; spraying methods; various coating methods such as air doctor coater methods, blade coater methods, rod coater methods, knife coater methods, squeeze coater methods, reverse roll coater methods, transfer roll coater methods, gravure coater methods, kiss coater methods, cast coater methods, spray coater methods, slit orifice coater methods, calendar coater methods can be mentioned. In addition, examples of the patterning methods for each layer include chemical etching such as shadow masks, laser transfer, photolithography, and physical etching using ultraviolet rays, lasers, etc. In addition, examples of planarization techniques include CMP (Chemical Mechanical Polishing) methods, laser planarization methods, reflow methods, etc.That is, the elements according to the embodiments and modifications of the present disclosure can be easily and inexpensively manufactured using the manufacturing processes of existing semiconductor devices.

[0136] Also, each step in the manufacturing method according to the modifications of the embodiments of the present disclosure described above does not necessarily have to be processed in the order described. For example, each step may be processed with the order changed as appropriate. Furthermore, the method used in each step does not necessarily have to be performed according to the method described, and may be performed by other methods.

[0137] <<11. Configuration Example of Electronic Device>> Note that the light receiving element 10 can be applied not only to the distance measuring module 1 as described above, but also to various electronic devices such as, for example, a camera equipped with a distance measuring function and a smartphone equipped with a distance measuring function. Therefore, with reference to FIG. 26, a configuration example of a smartphone 900 as an electronic device to which the present technology is applied will be described. FIG. 26 is a block diagram showing a configuration example of a smartphone 900 as an electronic device to which the distance measuring module 1 according to the embodiment of the present disclosure is applied.

[0138] As shown in FIG. 26, the smartphone 900 includes a CPU (Central Processing Unit) 901, a ROM (Read Only Memory) 902, and a RAM (Random Access Memory) 903. The smartphone 900 also includes a storage device 904, a communication module 905, and a sensor module 907. Furthermore, the smartphone 900 includes a distance measuring module 908 to which the above-described distance measuring module 1 can be applied, and in addition, an imaging device 909, a display device 910, a speaker 911, a microphone 912, an input device 913, and a bus 914. The smartphone 900 may also have a processing circuit such as a DSP (Digital Signal Processor) instead of or together with the CPU 901.

[0139] The CPU 901 functions as an arithmetic processing unit and a control unit, and controls all or part of the operations within the smartphone 900 according to various programs recorded in the ROM 902, the RAM 903, or the storage device 904, etc. The ROM 902 stores programs, arithmetic parameters, etc. used by the CPU 901. The RAM 903 temporarily stores programs used in the execution of the CPU 901 and parameters that change as appropriate during the execution. The CPU 901, the ROM 902, and the RAM 903 are interconnected by a bus 914. Also, the storage device 904 is a data storage device configured as an example of the storage unit of the smartphone 900. The storage device 904 is composed of, for example, a magnetic storage device such as an HDD (Hard Disk Drive), a semiconductor storage device, an optical storage device, etc. This storage device 904 stores programs executed by the CPU 901, various data, and various data acquired from the outside, etc.

[0140] The communication module 905 is a communication interface composed of, for example, a communication device for connecting to the communication network 906. The communication module 905 can be, for example, a wired or wireless LAN (Local Area Network), a Bluetooth (registered trademark), a communication card for WUSB (Wireless USB), etc. Also, the communication module 905 may be a router for optical communication, a router for ADSL (Asymmetric Digital Subscriber Line), or a modem for various communications. The communication module 905 transmits and receives signals, etc. using a predetermined protocol such as TCP / IP, for example, between the Internet and other communication devices. Also, the communication network 906 connected to the communication module 905 is a network connected by wire or wirelessly, and is, for example, the Internet, a home LAN, infrared communication, or satellite communication, etc.

[0141] The sensor module 907 includes various sensors such as, for example, a motion sensor (e.g., an acceleration sensor, a gyro sensor, a geomagnetic sensor, etc.), a biometric information sensor (e.g., a pulse sensor, a blood pressure sensor, a fingerprint sensor, etc.), or a position sensor (e.g., a GNSS (Global Navigation Satellite System) receiver, etc.).

[0142] The distance measurement module 908 is provided on the surface of the smartphone 900, and can acquire, as distance measurement results, uneven shapes and movements of, for example, the user's fingertip, palm, face, etc., facing the surface. Such distance measurement results can be used for user authentication and recognition of the user's gestures. Further, the distance measurement module 908 can also acquire, for example, the distance from the smartphone 900 to the object 800 or the three-dimensional shape data of the surface of the object 800.

[0143] The imaging device 909 is provided on the surface of the smartphone 900 and can image the object 800 etc. located around the smartphone 900. Specifically, the imaging device 909 can be configured to include an imaging element (not shown) such as a CMOS (Complementary MOS) image sensor and a signal processing circuit (not shown) that performs imaging signal processing on the signal photoelectrically converted by the imaging element. Further, the imaging device 909 can further include an optical system mechanism (not shown) composed of an imaging lens, a diaphragm mechanism, a zoom lens, a focus lens, etc. and a drive system mechanism (not shown) that controls the operation of the optical system mechanism. Then, the imaging element condenses the incident light from the object 800 as an optical image, and the signal processing circuit photoelectrically converts the formed optical image in pixel units, reads out the signal of each pixel as an imaging signal, and can acquire an imaging image by performing image processing.

[0144] The display device 910 is provided on the surface of the smartphone 900 and can be, for example, a display device such as an LCD (Liquid Crystal Display) or an organic EL (Electro Luminescence) display. The display device 910 can display an operation screen, a captured image acquired by the imaging device 909 described above, and the like.

[0145] The speaker 911 can output, for example, a call voice, a voice associated with the nest-building content displayed by the display device 910 described above, etc., toward the user.

[0146] The microphone 912 can collect, for example, the user's call voice, a voice including a command to activate the function of the smartphone 900, or the voice of the surrounding environment of the smartphone 900.

[0147] The input device 913 is a device operated by the user, such as a button, a keyboard, a touch panel, a mouse, etc. The input device 913 includes an input control circuit that generates an input signal based on the information input by the user and outputs it to the CPU 901. By operating this input device 913, the user can input various data to the smartphone 900 or instruct a processing operation.

[0148] Above, a configuration example of the smartphone 900 has been shown. Each of the above components may be configured using general-purpose members, or may be configured by hardware specialized for the function of each component. Such a configuration can be appropriately changed according to the technical level at the time of implementation.

[0149] <<12. Application Example to an Endoscopic Surgery System>> The technology according to the present disclosure (this technology) can be applied to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgery system.

[0150] FIG. 27 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (this technology) can be applied.

[0151] In FIG. 27, a state is illustrated in which an operator (doctor) 11131 is performing a surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgery system 11000. As illustrated, the endoscopic surgery system 11000 includes an endoscope 11100, other surgical instruments 11110 such as a pneumoperitoneum tube 11111 and an energy treatment instrument 11112, a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are mounted.

[0152] The endoscope 11100 includes a lens barrel 11101 whose tip region of a predetermined length is inserted into the body cavity of the patient 11132, and a camera head 11102 connected to the base end of the lens barrel 11101. In the illustrated example, an endoscope 11100 configured as a so-called rigid endoscope having a rigid lens barrel 11101 is illustrated, but the endoscope 11100 may be configured as a so-called flexible endoscope having a flexible lens barrel.

[0153] An opening in which an objective lens is fitted is provided at the tip of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 11101 and irradiated toward an observation target in the body cavity of the patient 11132 through the objective lens. Note that the endoscope 11100 may be a direct vision endoscope, a forward oblique endoscope, or a side vision endoscope. Further, an irradiation unit 20 and a light receiving unit 30 of the distance measurement module 1 according to the embodiment of the present disclosure may be incorporated in the tip of the lens barrel 11101. By mounting a part of such a distance measurement module 1, not only surgery by visual inspection of a doctor but also the accuracy of the surgery can be further improved by referring to the distance information by the distance measurement module 1.

[0154] For example, like the configuration of FIG. 28 showing an example of the configuration of the endoscope 11100, an iToF sensor 15004, which is the irradiation unit 20 and the light receiving unit 30 of the distance measurement module 1 according to the embodiment of the present disclosure, is provided inside the camera head 11102. Specifically, the reflected light (observation light) from the observation target passes through the lens barrel 11101, is condensed by the lens 15001 inside the camera head 11102, is reflected by the half mirror 15002, and is received by the iToF sensor 15004. Further, the observation light is photoelectrically converted by the iToF sensor 15004, an electrical signal corresponding to the observation light is generated, and after being stored in the memory 15005, it is transmitted to the distance measurement signal processing device 11209 described later.

[0155] Furthermore, as shown in FIG. 28, an image pickup device 15003 is provided inside the camera head 11102, and the reflected light (observation light) from the observation target passes through the lens barrel 11101, is condensed by the lens 15001, is reflected by the half mirror 15002, and is received by the image pickup device 15003. The observation light is photoelectrically converted by the image pickup device 15003, and an electrical signal corresponding to the observation light, that is, an image signal corresponding to the observation image is generated. The image signal is once stored in the memory 15005 and then transmitted to the camera control unit (CCU) 11201 as RAW data.

[0156] The CCU 11201 is composed of a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and comprehensively controls the operations of the endoscope 11100 and the display device 11202. Further, the CCU 11201 receives the image signal from the camera head 11102, and performs various image processes for displaying an image based on the image signal, such as development processing (demosaicing processing), on the image signal.

[0157] The display device 11202 displays an image based on the image signal processed by the CCU 11201 under the control from the CCU 11201.

[0158] The light source device 11203 is composed of a light source such as an LED (Light Emitting Diode), etc., and supplies irradiation light for photographing a surgical site or the like to the endoscope 11100.

[0159] The input device 11204 is an input interface for the endoscope surgical system 11000. A user can input various types of information and instruction inputs to the endoscope surgical system 11000 via the input device 11204. For example, the user inputs an instruction to change imaging conditions (such as the type of irradiation light, magnification, and focal length, etc.) by the endoscope 11100.

[0160] The treatment instrument control device 11205 controls the driving of the energy treatment instrument 11112 for cauterizing, incising tissues or sealing blood vessels, etc. The pneumoperitoneum device 11206 sends gas into the body cavity of the patient 11132 via the pneumoperitoneum tube 11111 in order to expand the body cavity of the patient for the purpose of securing the visual field by the endoscope 11100 and securing the working space for the surgeon. The recorder 11207 is a device capable of recording various types of information related to the surgery. The printer 11208 is a device capable of printing various types of information related to the surgery in various forms such as text, image, or graph, etc. The distance measurement signal processing device 11209 is provided with the control unit 40 and the processing unit 60 of the distance measurement module 1 according to the embodiment of the present disclosure, and is a device capable of acquiring distance information.

[0161] Note that the light source device 11203 that supplies irradiation light when photographing the surgical site with the endoscope 11100 can be configured from, for example, an LED, a laser light source, or a white light source composed of a combination thereof. When a white light source is configured by a combination of RGB laser light sources, since the output intensity and output timing of each color (each wavelength) can be controlled with high precision, the white balance of the captured image can be adjusted in the light source device 11203. Further, in this case, the laser light from each of the RGB laser light sources is irradiated to the observation target in a time-division manner, and by controlling the driving of the imaging element of the camera head 11102 in synchronization with the irradiation timing, it is also possible to capture images corresponding to each of RGB in a time-division manner. According to this method, a color image can be obtained without providing a color filter on the imaging element.

[0162] Further, the driving of the light source device 11203 may be controlled so as to change the intensity of the output light at predetermined time intervals. By controlling the driving of the imaging element of the camera head 11102 in synchronization with the timing of the change in the intensity of the light and acquiring images in a time-division manner and synthesizing the images, a high-dynamic range image without so-called black crush and white clip can be generated.

[0163] In addition, the light source device 11203 may be configured to supply light in a predetermined wavelength band corresponding to special light observation. In special light observation, for example, by utilizing the wavelength dependence of light absorption in body tissue, a narrow-band light is irradiated as compared with the irradiation light (i.e., white light) during normal observation, so-called narrow-band imaging is performed to capture a predetermined tissue such as blood vessels in the mucosal surface layer with high contrast. Alternatively, in special light observation, fluorescence observation may be performed to obtain an image by fluorescence generated by irradiating excitation light. In fluorescence observation, excitation light is irradiated onto the body tissue to observe the fluorescence from the body tissue (autofluorescence observation), or a reagent such as indocyanine green (ICG) is locally injected into the body tissue and excitation light corresponding to the fluorescence wavelength of the reagent is irradiated onto the body tissue to obtain a fluorescence image. The light source device 11203 can be configured to supply such narrow-band light and / or excitation light corresponding to special light observation.

[0164] FIG. 29 is a block diagram showing an example of the functional configuration of the camera head 11102 and the CCU 11201 shown in FIG. 27.

[0165] The camera head 11102 includes a lens unit 11401, an imaging unit 11402, a driving unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 includes a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are communicably connected to each other by a transmission cable 11400.

[0166] The lens unit 11401 is an optical system provided at a connection portion with the lens barrel 11101. The observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and enters the lens unit 11401. The lens unit 11401 is configured by combining a plurality of lenses including a zoom lens and a focus lens.

[0167] The imaging device that constitutes the imaging unit 11402 may be one (so-called single-plate type) or multiple (so-called multi-plate type). When the imaging unit 11402 is configured as a multi-plate type, for example, image signals corresponding to RGB respectively may be generated by each imaging device, and a color image may be obtained by synthesizing them. Alternatively, the imaging unit 11402 may be configured to have a pair of imaging devices for respectively acquiring image signals for the right eye and the left eye corresponding to 3D (Dimensional) display. By performing 3D display, the surgeon 11131 can more accurately grasp the depth of the biological tissue in the surgical site. When the imaging unit 11402 is configured as a multi-plate type, a plurality of lens units 11401 may be provided corresponding to each imaging device.

[0168] Also, the imaging unit 11402 does not necessarily have to be provided in the camera head 11102. For example, the imaging unit 11402 may be provided immediately behind the objective lens inside the lens barrel 11101.

[0169] The drive unit 11403 is constituted by an actuator, and under the control from the camera head control unit 11405, moves the zoom lens and the focus lens of the lens unit 11401 along the optical axis by a predetermined distance. Thereby, the magnification and focus of the captured image by the imaging unit 11402 can be appropriately adjusted.

[0170] The communication unit 11404 is constituted by a communication device for transmitting and receiving various information to and from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as RAW data.

[0171] In addition, the communication unit 11404 receives a control signal for controlling the drive of the camera head 11102 from the CCU 11201 and supplies it to the camera head control unit 11405. The control signal includes information related to imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of imaging, and / or information specifying the magnification and focus of the captured image.

[0172] Note that the imaging conditions such as the above frame rate, exposure value, magnification, and focus may be appropriately specified by the user, or may be automatically set by the control unit 11413 of the CCU 11201 based on the acquired image signal. In the latter case, so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function are installed in the endoscope 11100.

[0173] The camera head control unit 11405 controls the drive of the camera head 11102 based on the control signal from the CCU 11201 received via the communication unit 11404.

[0174] The communication unit 11411 is composed of a communication device for transmitting and receiving various types of information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted from the camera head 11102 via the transmission cable 11400.

[0175] In addition, the communication unit 11411 transmits a control signal for controlling the drive of the camera head 11102 to the camera head 11102. The image signal and the control signal can be transmitted by telecommunication, optical communication, or the like.

[0176] The image processing unit 11412 performs various types of image processing on the image signal, which is RAW data transmitted from the camera head 11102.

[0177] The control unit 11413 performs various controls related to imaging of the surgical site and other areas by the endoscope 11100, and display of the captured images obtained by imaging the surgical site and other areas. For example, the control unit 11413 generates a control signal for controlling the drive of the camera head 11102.

[0178] Also, the control unit 11413 causes the display device 11202 to display a captured image in which the surgical site and other areas are reflected, based on the image signal that has been subjected to image processing by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition techniques. For example, the control unit 11413 can recognize surgical instruments such as forceps, specific biological sites, bleeding, mist during use of the energy treatment tool 11112, etc., by detecting the shape, color, etc. of the edges of the objects included in the captured image. When causing the display device 11202 to display the captured image, the control unit 11413 may use the recognition result to superimpose and display various surgical support information on the image of the surgical site. By superimposing and displaying the surgical support information and presenting it to the surgeon 11131, the burden on the surgeon 11131 can be reduced, and the surgeon 11131 can surely proceed with the surgery.

[0179] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable corresponding to electrical signal communication, an optical fiber corresponding to optical communication, or a composite cable of these.

[0180] Here, in the illustrated example, communication was performed wired using the transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may be performed wirelessly.

[0181] The above has described an example of an endoscopic surgery system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure can be applied to the imaging unit 11402 among the configurations described above. Specifically, the light receiving element 10 can be applied as a part of the configuration of the imaging unit 11402. By applying the technology according to the present disclosure as a part of the configuration of the imaging unit 11402, the distance to the surgical site can be measured with high precision, and a clearer image of the surgical site can be obtained.

[0182] Here, an endoscopic surgery system has been described as an example. However, the technology according to the present disclosure may also be applied to other systems such as a microsurgery system.

[0183] <<13. Application Examples to Mobile Bodies>> The technology (this technology) according to the present disclosure can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of mobile body such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility device, an airplane, a drone, a ship, or a robot.

[0184] FIG. 30 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile body control system to which the technology according to the present disclosure can be applied.

[0185] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in FIG. 30, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an out-vehicle information detection unit 12030, an in-vehicle information detection unit 12040, and an integrated control unit 12050. Further, as the functional configuration of the integrated control unit 12050, a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (Interface) 12053 are illustrated.

[0186] The drive system control unit 12010 controls the operations of devices related to the vehicle's drive system according to various programs. For example, the drive system control unit 12010 functions as a control device for a driving force generation device for generating the driving force of the vehicle, such as an internal combustion engine or a driving motor, a driving force transmission mechanism for transmitting the driving force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating the braking force of the vehicle.

[0187] The body system control unit 12020 controls the operations of various devices installed in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as a headlamp, a backlamp, a brake lamp, a turn signal, or a fog lamp. In this case, radio waves transmitted from a portable device that substitutes for a key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these inputs of radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0188] The vehicle exterior information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the vehicle exterior information detection unit 12030. The vehicle exterior information detection unit 12030 causes the imaging unit 12031 to capture an image outside the vehicle and receives the captured image. The vehicle exterior information detection unit 12030 may perform object detection processing or distance detection processing, such as for a person, a vehicle, an obstacle, a sign, or characters on the road surface, based on the received image. Also, an iToF sensor 12032 is connected to the vehicle exterior information detection unit 12030. The iToF sensor 12032 can function as the distance measurement module 1 according to the embodiment of the present disclosure.

[0189] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of received light. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. Also, the light received by the imaging unit 12031 may be visible light or non-visible light such as infrared light.

[0190] The in-vehicle information detection unit 12040 detects in-vehicle information. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that images the driver, and the in-vehicle information detection unit 12040 may calculate the degree of driver fatigue or concentration based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0191] The microcomputer 12051 calculates control target values for the driving force generation device, the steering mechanism, or the braking device based on the information inside and outside the vehicle acquired by the out-vehicle information detection unit 12030 or the in-vehicle information detection unit 12040, and can output a control command to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control for realizing functions of an ADAS (Advanced Driver Assistance System) including collision avoidance or shock mitigation of the vehicle, following driving based on the inter-vehicle distance, vehicle speed maintenance driving, collision warning of the vehicle, or lane departure warning of the vehicle.

[0192] Also, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving or the like that autonomously travels without relying on the driver's operation by controlling the driving force generation device, the steering mechanism, or the braking device, etc. based on the information around the vehicle acquired by the out-vehicle information detection unit 12030 or the in-vehicle information detection unit 12040.

[0193] In addition, the microcomputer 12051 can output a control command to the body system control unit 12030 based on the information outside the vehicle acquired by the outside vehicle information detection unit 12030. For example, the microcomputer 12051 can perform cooperative control for the purpose of anti-glare, such as controlling the headlamp according to the position of the preceding vehicle or oncoming vehicle detected by the outside vehicle information detection unit 12030 and switching the high beam to the low beam.

[0194] The audio-visual output unit 12052 transmits at least one of the audio and image output signals to an output device capable of notifying information visually or aurally to the vehicle occupants or outside the vehicle. In the example of FIG. 26, the audio speaker 12061, the display unit 12062, and the instrument panel 12063 are illustrated as the output devices. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0195] FIG. 31 is a diagram showing an example of the installation position of the imaging unit 12031.

[0196] In FIG. 31, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0197] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided at positions such as the front nose, side mirrors, rear bumper, back door of the vehicle 12100, and the upper part of the front windshield inside the vehicle compartment. The imaging unit 12101 provided at the front nose and the imaging unit 12105 provided at the upper part of the front windshield inside the vehicle compartment mainly acquire images in front of the vehicle 12100. The imaging units 12102 and 12103 provided at the side mirrors mainly acquire images on the sides of the vehicle 12100. The imaging unit 12104 provided at the rear bumper or the back door mainly acquires images behind the vehicle 12100. The imaging unit 12105 provided at the upper part of the front windshield inside the vehicle compartment is mainly used for detecting a preceding vehicle or detecting pedestrians, obstacles, traffic lights, traffic signs, or lanes. In addition, the iToF sensor module 12201 in which the irradiation unit 20 and the light receiving unit 30 of the distance measurement module 1 according to the embodiment of the present disclosure are incorporated is provided, for example, at the front nose of the vehicle 12100.

[0198] Note that FIG. 31 shows an example of the imaging ranges of the imaging units 12101 to 12104. The imaging range 12111 indicates the imaging range of the imaging unit 12101 provided at the front nose, and the imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided at the side mirrors, respectively. The imaging range 12114 indicates the imaging range of the imaging unit 12104 provided at the rear bumper or the back door. For example, by overlapping the image data captured by the imaging units 12101 to 12104, an overhead image of the vehicle 12100 seen from above can be obtained.

[0199] At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera including a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

[0200] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 determines the distance to each solid object within the imaging ranges 12111 to 12114 and the temporal change of this distance (relative speed with respect to the vehicle 12100). In particular, it can extract, as the leading vehicle, the solid object that is closest to the traveling path of the vehicle 12100 and travels in substantially the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or more). Further, the microcomputer 12051 can set the inter-vehicle distance to be secured in advance in front of the leading vehicle and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. Thus, cooperative control can be performed for the purpose of autonomous driving, etc., without relying on the driver's operation.

[0201] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 classifies and extracts solid object data regarding solid objects into motorcycles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other solid objects, and can use it for automatic avoidance of obstacles. For example, the microcomputer 12051 discriminates obstacles around the vehicle 12100 into obstacles visible to the driver of the vehicle 12100 and obstacles difficult to visually recognize. Then, the microcomputer 12051 judges the collision risk indicating the degree of risk of collision with each obstacle, and when the collision risk is equal to or higher than the set value and there is a possibility of collision, it can output an alarm to the driver via the audio speaker 12061 or the display unit 12062, or perform forced deceleration or avoidance steering via the drive system control unit 12010 to provide driving support for collision avoidance.

[0202] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether a pedestrian exists in the captured images of the imaging units 12101 to 12104. Such recognition of a pedestrian is performed, for example, by a procedure of extracting feature points in the captured images of the imaging units 12101 to 12104 as infrared cameras and a procedure of performing pattern matching processing on a series of feature points indicating the outline of an object to determine whether it is a pedestrian. When the microcomputer 12051 determines that a pedestrian exists in the captured images of the imaging units 12101 to 12104 and recognizes the pedestrian, the audio-visual image output unit 12052 controls the display unit 12062 to superimpose and display a rectangular outline for emphasizing the recognized pedestrian. Further, the audio-visual image output unit 12052 may control the display unit 12062 to display an icon or the like indicating a pedestrian at a desired position.

[0203] As described above, an example of a vehicle control system to which the technology according to the present disclosure can be applied has been described. The technology according to the present disclosure can be applied to the vehicle exterior information detection unit 12030 and the imaging unit 12031 among the configurations described above. Specifically, the light receiving element 10 or the distance measurement module 1 can be applied to the distance detection processing block of the vehicle exterior information detection unit 12030 or the imaging unit 12031. By applying the technology according to the present disclosure to the vehicle exterior information detection unit 12030 and the imaging unit 12031, the distance to an object such as a person, a vehicle, an obstacle, a sign, or characters on the road surface can be measured with high accuracy, and using the obtained distance information, it becomes possible to reduce the driver's fatigue and increase the safety level of the driver and the vehicle.

[0204] <<14. Supplementary Note>> As described above, the preferred embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, but the technical scope of the present disclosure is not limited to such examples. It is obvious that those having ordinary knowledge in the technical field of the present disclosure can conceive of various modification examples or correction examples within the scope of the technical idea described in the claims, and it is naturally understood that these also belong to the technical scope of the present disclosure.

[0205] In addition, the effects described in this specification are merely illustrative or exemplary and not limiting. That is, the technology according to the present disclosure may exhibit other effects apparent to those skilled in the art from the description of this specification, together with or in place of the above effects.

[0206] Note that the present technology can also adopt the following configuration. (1) A semiconductor substrate, A photoelectric conversion unit provided in the semiconductor substrate for converting light into electric charges, A first charge accumulation unit provided in the semiconductor substrate to which the electric charges are transferred from the photoelectric conversion unit, A first distribution gate provided on the surface of the semiconductor substrate for distributing the electric charges from the photoelectric conversion unit to the first charge accumulation unit, A second charge accumulation unit provided in the semiconductor substrate to which the electric charges are transferred from the photoelectric conversion unit, A second distribution gate provided on the surface of the semiconductor substrate for distributing the electric charges from the photoelectric conversion unit to the second charge accumulation unit, Comprising, The first and second distribution gates each have a pair of embedded gate portions embedded in the semiconductor substrate, A light receiving element. (2) In the light receiving element described in the above (1), a predetermined voltage is applied to the first and second distribution gates at different timings. (3) When viewed from above the surface of the semiconductor substrate, The first and second distribution gates are provided so as to be substantially line-symmetric with respect to the center of the photoelectric conversion unit, The first and second charge accumulation units are provided so as to sandwich the first and second distribution gates from both sides. The light receiving element described in the above (1) or (2). (4) In a cross-section obtained by cutting the light receiving element along the surface of the semiconductor substrate, Each of the embedded gate portions has a substantially rectangular shape having a long side extending along the direction from the center of the photoelectric conversion portion toward the first or second charge accumulation portion. The light receiving element according to (3) above. (5) In a cross section obtained by cutting the light receiving element along the surface of the semiconductor substrate, Each of the embedded gate portions has a substantially elliptical shape having a major axis extending along the direction from the center of the photoelectric conversion portion toward the first or second charge accumulation portion. The light receiving element according to (3) above. (6) In a cross section obtained by cutting the light receiving element along the surface of the semiconductor substrate, Each of the embedded gate portions has a substantially circular shape. The light receiving element according to (3) above. (7) The width between the opposing side surfaces of the pair of embedded gate portions gradually widens in the thickness direction from the surface of the semiconductor substrate toward the back surface of the semiconductor substrate located on the opposite side of the surface. The light receiving element according to (4) above. (8) In a cross section obtained by cutting the light receiving element along the direction in which the pair of embedded gate portions are arranged, Each of the embedded gate portions has a tapered shape that gradually narrows in the thickness direction toward the back surface of the semiconductor substrate located on the opposite side of the surface. The light receiving element according to (4) above. (9) Of the pair of embedded gate portions, the side surface of one of the embedded gate portions that is located on the side opposite to the side surface facing the other embedded gate portion is in contact with the low dielectric constant layer. The light receiving element according to (4) above. (10) The low dielectric constant layer is made of an oxide film or a nitride film. The light receiving element according to (9) above. (11) The low dielectric constant layer is an element isolation portion provided in the semiconductor substrate. The light receiving element according to (9) above. (12) A plurality of third charge storage parts provided in the semiconductor substrate, to which the charges are transferred from the photoelectric conversion part; A plurality of third distribution gates provided on the surface of the semiconductor substrate, for distributing the charges from the photoelectric conversion part to the plurality of third charge storage parts; further comprising: each of the third distribution gates has the pair of embedded gate parts embedded in the semiconductor substrate; The light receiving element according to (1) above. (13) further comprising a moth-eye structure with fine irregularities formed on the surface of the semiconductor substrate opposite to the surface; The light receiving element according to any one of (1) to (12) above. (14) further comprising a first pixel isolation part penetrating the semiconductor substrate; The light receiving element according to any one of (1) to (13) above. (15) further comprising a second pixel isolation part penetrating from the surface of the semiconductor substrate opposite to the surface to the middle of the semiconductor substrate along the thickness direction of the semiconductor substrate; The light receiving element according to any one of (1) to (13) above. (16) One or more floating diffusion regions provided in the semiconductor substrate; A first transfer gate provided on the semiconductor substrate, for transferring the charges transferred to the first charge storage part to the one or more floating diffusion regions; A second transfer gate provided on the semiconductor substrate, for transferring the charges transferred to the second charge storage part to the one or more floating diffusion regions; One or more amplification transistors for amplifying the charges transferred to the floating diffusion regions and outputting them as pixel signals; One or more selection transistors for outputting the pixel signals according to a selection signal; One or more reset transistors for resetting the charges accumulated in the floating diffusion regions; further comprising the light-receiving element according to any one of (1) to (15) above. (17) Each of the first and second charge storage parts has a stack of an electrode, a first oxide film, and a semiconductor layer, Each of the first and second transfer gates has a second oxide film provided between the first and second transfer gates and the semiconductor substrate, The film thickness of the first oxide film is thinner than that of the second oxide film. the light-receiving element according to (16) above. (18) Each of the amplification transistor, the selection transistor, and the reset transistor has a third oxide film provided on the semiconductor substrate, The film thickness of the third oxide film of the amplification transistor is thinner than that of the third oxide films of the selection transistor and the reset transistor. the light-receiving element according to (17) above. (19) Each of the first and second charge storage parts has a stack of an electrode, a first oxide film, and a semiconductor layer, The film thickness of the first oxide film is 5.0 nm or less. the light-receiving element according to any one of (1) to (15) above. (20) Each of the first and second charge storage parts has a stack of an electrode, a first insulating film, and a semiconductor layer Each of the first and second transfer gates has a second insulating film provided between the first and second transfer gates and the semiconductor substrate, The relative permittivity of the first insulating film is higher than that of the second insulating film. the light-receiving element according to (16) above. (21) Each of the amplification transistor, the selection transistor, and the reset transistor has a third insulating film provided on the semiconductor substrate, The relative permittivity of the third insulating film of the amplification transistor is higher than that of the third insulating film of the selection transistor and the reset transistor. The light receiving element according to the above (20). (22) Each of the first and second charge storage parts has a stack of an electrode, a first insulating film, and a semiconductor layer. The relative permittivity of the first insulating film is 4 or more. The light receiving element according to any one of the above (1) to (15). (23) A light receiving device including one or more light receiving elements, The light receiving element is A semiconductor substrate, A photoelectric conversion part provided in the semiconductor substrate for converting light into charges, A first charge storage part provided in the semiconductor substrate to which the charges are transferred from the photoelectric conversion part, A first distribution gate provided on the surface of the semiconductor substrate for distributing the charges from the photoelectric conversion part to the first charge storage part, A second charge storage part provided in the semiconductor substrate to which the charges are transferred from the photoelectric conversion part, A second distribution gate provided on the surface of the semiconductor substrate for distributing the charges from the photoelectric conversion part to the second charge storage part, And has Each of the first and second distribution gates has a pair of embedded gate parts embedded in the semiconductor substrate. Light receiving device. (24) An irradiation part that irradiates an object with light while periodically varying the brightness, An irradiation control part that controls the irradiation part, And further includes The photoelectric conversion part receives the reflected light from the object. The light receiving device according to the above (23).

Explanation of symbols

[0207] 1 Distance measurement module 10 Light-receiving element 12 Pixel array section 20 Irradiation section 30 Light-receiving section 32 Vertical drive circuit section 34 Column signal processing circuit section 36 Horizontal drive circuit section 38 Output circuit section 40 Control section 42 Pixel drive wiring 44 Control circuit section 46 Horizontal signal line 48 Vertical signal line 50 Demultiplexing transistor drive section 52 Signal processing section 54 Data storage section 60 Processing section 100, 102, 102a, 102b, 104a, 104b, 106a, 106b, 108a, 108b, 110a, 110b, 112a, 112b, 114a, 114b, 116a, 116b N-type semiconductor regions 150a, 150b, 152a, 152b, 156a, 156b, 158a, 158b, 160a, 160b, 162a, 162b Gate electrodes 154a, 154b, 306, 406 Electrodes 170a, 170b, 174a, 174b Embedded gate sections 172a, 172b, 176a, 176b, 178 Low-dielectric constant layers 200 Semiconductor substrate 202 Anti-reflection film 202a Mos-eye structure 204 Planarization film 206 Light-shielding film 208 On-chip lens 210, 210a Pixel isolation sections 300 Wiring layer 302, 402, 720, 720a, 740 Insulating films 304, 404 Metal films 400 Substrate 500 Thermally oxidized silicon layer 502 Silicon nitride layer 504 Silicon oxide layer 506, 508 Resist 510, 512 Trench 600, 602 Center Line 700 Surroundings 710 Via 730 Sidewall 800 Object 802a, 802b Regions 900 Smartphone 901 CPU 902 ROM 903 RAM 904 Storage Device 905 Communication Module 907 Sensor Module 908 Distance Measurement Module 909 Imaging Device 910 Display Device 911 Speaker 912 Microphone 913 Input Device AMP, AMP1, AMP2 Amplification Transistor FD, FD1, FD2 Floating Diffusion Region MEM, MEM1, MEM2 Charge Storage Section O Center Point OFG, OFG1, OFG2 Charge Discharge Transistor PD Photodiode RST, RST1, RST2 Reset Transistor SEL, SEL1, SEL2 Selection Transistor TG, TG1, TG2 Transfer Transistor VDD Power Supply Potential VG, VG1, VG2 Distribution Transistor VSL, VSL1, VSL2 Signal Lines

Claims

1. A semiconductor substrate, A photoelectric conversion unit provided in the semiconductor substrate for converting light into electric charges, A first charge storage unit provided in the semiconductor substrate to which the electric charges are transferred from the photoelectric conversion unit, A first distribution gate provided on the surface of the semiconductor substrate for distributing the electric charges from the photoelectric conversion unit to the first charge storage unit, A second charge storage unit provided in the semiconductor substrate to which the electric charges are transferred from the photoelectric conversion unit, A second distribution gate provided on the surface of the semiconductor substrate for distributing the electric charges from the photoelectric conversion unit to the second charge storage unit, A light receiving element comprising: The first and second distribution gates each have a pair of embedded gate portions embedded in the semiconductor substrate, In a cross section of the light receiving element cut along the direction in which the pair of embedded gate portions are arranged, Each of the embedded gate portions has a tapered shape that gradually narrows in the thickness direction toward the back surface of the semiconductor substrate located on the opposite side of the surface, The diameter L2 of each of the embedded gate portions at a depth away from the surface by a predetermined length that is 3 / 4 of the length of each of the embedded gate portions along the thickness direction has a length that is 3 / 4 of the diameter L1 of each of the embedded gate portions on the surface, Light receiving element.

2. In the first and second distribution gates, a predetermined voltage is applied at different timings, the light receiving element according to claim 1.

3. When viewed from above the surface of the semiconductor substrate, The first and second distribution gates are provided so as to be substantially line-symmetric with respect to the center of the photoelectric conversion unit, The first and second charge storage units are provided so as to sandwich the first and second distribution gates from both sides, The light receiving element according to claim 1 or 2.

4. In a cross-section obtained by cutting the light-receiving element along the surface of the semiconductor substrate, each of the embedded gate portions has a substantially rectangular shape with a long side extending along a direction from the center of the photoelectric conversion portion toward the first or second charge storage portion, The light-receiving element according to claim 3.

5. Further comprising a moss-eye structure provided on the surface of the semiconductor substrate opposite to the surface, in which fine irregularities are formed, The light-receiving element according to any one of claims 1 to 4.

6. Further comprising a first pixel isolation portion penetrating the semiconductor substrate, The light-receiving element according to any one of claims 1 to 5.

7. Further comprising a second pixel isolation portion penetrating from the surface of the semiconductor substrate opposite to the surface to the middle of the semiconductor substrate along the thickness direction of the semiconductor substrate, The light-receiving element according to any one of claims 1 to 5.

8. One or more floating diffusion regions provided in the semiconductor substrate, A first transfer gate provided on the semiconductor substrate for transferring the charge transferred to the first charge storage portion to the one or more floating diffusion regions, A second transfer gate provided on the semiconductor substrate for transferring the charge transferred to the second charge storage portion to the one or more floating diffusion regions, One or more amplification transistors for amplifying the charge transferred to the floating diffusion region and outputting it as a pixel signal, One or more selection transistors for outputting the pixel signal according to a selection signal, One or more reset transistors for resetting the charge accumulated in the floating diffusion region, Further comprising, The light-receiving element according to any one of claims 1 to 7.

9. Each of the first and second charge storage parts has a stack of an electrode, a first oxide film, and a semiconductor layer. Each of the first and second transfer gates has a second oxide film provided between the first and second transfer gates and the semiconductor substrate. The film thickness of the first oxide film is thinner than that of the second oxide film. The light receiving element according to claim 8.

10. Each of the amplification transistor, the selection transistor, and the reset transistor has a third oxide film provided on the semiconductor substrate. The film thickness of the third oxide film of the amplification transistor is thinner than that of the third oxide films of the selection transistor and the reset transistor. The light receiving element according to claim 9.

11. Each of the first and second charge storage parts has a stack of an electrode, a first oxide film, and a semiconductor layer. The film thickness of the first oxide film is 5.0 nm or less. The light receiving element according to any one of claims 1 to 7.

12. Each of the first and second charge storage parts has a stack of an electrode, a first insulating film, and a semiconductor layer. Each of the first and second transfer gates has a second insulating film provided between the first and second transfer gates and the semiconductor substrate. The relative permittivity of the first insulating film is higher than that of the second insulating film. The light receiving element according to claim 8.

13. Each of the amplification transistor, the selection transistor, and the reset transistor has a third insulating film provided on the semiconductor substrate. The relative permittivity of the third insulating film of the amplification transistor is higher than that of the third insulating films of the selection transistor and the reset transistor. The light receiving element according to claim 12.

14. Each of the first and second charge storage parts has a stack of an electrode, a first insulating film, and a semiconductor layer, The relative permittivity of the first insulating film is 4 or more. The light receiving element according to any one of Claims 1 to 7.

15. A light receiving device including one or more light receiving elements, The light receiving element is a semiconductor substrate, a photoelectric conversion part provided in the semiconductor substrate for converting light into charges, a first charge storage part provided in the semiconductor substrate to which the charges are transferred from the photoelectric conversion part, a first distribution gate provided on the surface of the semiconductor substrate for distributing the charges from the photoelectric conversion part to the first charge storage part, a second charge storage part provided in the semiconductor substrate to which the charges are transferred from the photoelectric conversion part, a second distribution gate provided on the surface of the semiconductor substrate for distributing the charges from the photoelectric conversion part to the second charge storage part, and has Each of the first and second distribution gates has a pair of embedded gate parts embedded in the semiconductor substrate. In a cross section of the light receiving element cut along the direction in which the pair of embedded gate parts are arranged, Each of the embedded gate parts has a tapered shape that gradually narrows in the thickness direction toward the back surface of the semiconductor substrate located on the opposite side of the surface. The diameter L2 of each of the embedded gate parts at a depth away from the surface by a predetermined length that is 3 / 4 of the length of each of the embedded gate parts in the thickness direction has a length that is 3 / 4 of the diameter L1 of each of the embedded gate parts on the surface. A light receiving device.

16. An irradiation unit that irradiates an object with light while periodically varying the brightness, An irradiation control unit that controls the irradiation unit, further comprising wherein the photoelectric conversion unit receives reflected light from the object The light receiving device according to claim 15.

Images