Method and system for supplying power to a device via a connector

The method and system dynamically allocate and reallocate power to devices connected via a connector, enhancing power supply efficiency and performance by utilizing surplus power for improved computing and data transmission.

JP7698403B2Active Publication Date: 2025-06-25SAMSUNG ELECTRONICS CO LTD
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Patent Information

Application Number
JP2020126780
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-07-02
Filing Date
2020-07-27
Publication Date
2025-06-25
Estimated Expiration
2040-07-27

AI Technical Summary

Technical Problem

Existing systems struggle to efficiently allocate and reallocate power to multiple devices connected via a connector, limiting real-time power supply capabilities.

Method used

A method and system that involves a host controller determining surplus power and allocating it to devices, negotiating power requests, and reallocating power based on availability and device needs, including baseline and boost power strategies.

Benefits of technology

Enhances power supply performance by monitoring and reallocating surplus power, improving computing speed, data transmission, and memory access for connected devices.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a method and a system for improving real-time power supply capability for each of a plurality of devices coupled to a connector.SOLUTION: A method includes the steps of: coupling a device to a host through a connector; receiving, by a host controller, a request for boost power from the device; determining, by the host controller, an amount of available surplus power supplied from one or more power sources to the device through the connector; and allocating at least a portion of the surplus power to the device. The method according to the invention may further include a step of negotiating an amount of boost power according to the amount of surplus power available from the one or more power sources. The method may further include the steps of: monitoring power consumption of the device; and reducing a total power allocation to the device on the basis of the power consumption of the device.SELECTED DRAWING: Figure 4
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Description

Technical Field

[0001] The present invention relates to a technique for supplying power to a device, and more particularly, to a method and system for supplying power to a device via a connector.

Background Art

[0002] A storage device, a graphics processing unit (GPU), and / or a similar device are connected to a host system via a connector. The host system includes one or more power supply units (PSUs) that supply power to the device via the connector.

[0003] The above information disclosed from the background art of the invention in this specification is only for promoting the understanding of the background art of the present invention, and thus may include information that does not constitute the prior art.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Patent Document 2

Patent Document 3

Patent Document 4

Patent Document 5

Patent Document 6

Summary of the Invention

Problems to be Solved by the Invention

[0005] The present invention has been made in view of the above prior art, and an object of the present invention is to provide a method and a system for improving the real-time power supply ability for each of a plurality of devices connected to a connector.

Means for Solving the Problems

[0006] A method according to one aspect of the present invention made to achieve the above object includes steps of connecting a device to a host via a connector, receiving, by a host controller, a power request for the device, determining, by the host controller, an amount of available surplus power supplied from one or more power sources to the device via the connector, and allocating at least a part of the surplus power to the device.

[0007] The power request is for a first amount of power, and the method may further include steps of rejecting, by the host, the request for the first amount of power, and transmitting, from the host, an offer for a second amount of power based at least in part on the amount of available surplus power. The method may further include a step of transmitting, to the host, acceptance of the second amount of power. The method may further include steps of releasing the allocation of at least a part of the power allocated to the device, and reallocating at least a part of the power to the amount of the surplus power. The device includes a first device, and the method may further include a step of reallocating at least a part of the power to a second device connected to the one or more power sources via a second connector. The power may be allocated to the device for an event. The method may further include steps of determining the end of the event, and releasing the power allocation from the device based on the determination of the end of the event. The end of the event may be determined at least in part by the device. The end of the event can be at least partially determined by the host. The method may further include monitoring the power consumption of the device and reducing the allocation of the total power to the device based on the power consumption of the device. The device includes a first device, and the method may further include connecting the second device to the host via a second connector arranged to supply power from one or more power sources to the second device, and allocating a second amount of power to the second device. The method may further include releasing at least a portion of the allocation of the second amount of power from the second device and reallocating at least a portion of the second amount of power to the first device. At least a portion of the second amount of power may be released from the second device based on the power consumption of the second device.

[0008] The system of the present invention made to achieve the above object includes a connector connected to a first device to supply power from one or more power sources to the first device, and a controller, the controller receives a power request for the first device, determines the amount of surplus power available from one or more power sources, and allocates at least a portion of the surplus power to the first device.

[0009] The controller may be configured to allocate a baseline amount of power to the device. The baseline amount of power may be at least partially determined by the form of the connector. The baseline amount of power may be at least partially determined by one or more presence detection pins on the connector. The baseline amount of power may be at least partially determined by communicating with the device via the connector. The controller may include a host central processing unit (Host CPU) that executes an application. The controller may include a service processor. The service processor may include a baseboard management controller.

[0010] An apparatus according to one embodiment includes connectors arranged to be connected to a host and receive power from one or more power supplies via the connectors, and an apparatus controller configured to transmit a request for power supplied from the one or more power supplies to the host.

[0011] The apparatus controller may be configured to negotiate the amount of power with the host. The apparatus may further include a power metering unit configured to measure the power consumption of the apparatus and report the power consumption to the host.

Advantages of the Invention

[0012] The system of the present invention can monitor the surplus power of the apparatus connected to the connector and reallocate it as additional boost power for other apparatuses such as a storage device and a computing device based on this. Therefore, the power supply performance of the system can be improved.

Brief Description of the Drawings

[0013]

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DETAILED DESCRIPTION OF THE INVENTION

[0014] Hereinafter, specific examples of embodiments for carrying out the present invention will be described in detail with reference to the drawings.

[0015] The drawings are not necessarily drawn to scale, and elements of similar structure or function are generally denoted by like reference numerals throughout the drawings for illustrative purposes. The drawings are intended to facilitate the description of the various embodiments described herein. The drawings do not describe all the features of the teachings disclosed herein and do not limit the scope of the claims. To prevent the drawings from being ambiguous, not all components, connections, etc. may be illustrated, and not all components may have reference numerals. However, the pattern for the configuration settings will be apparent from the drawings. The drawings serve to illustrate embodiments of the invention together with the present specification and to explain the principles of the invention together with the detailed description.

[0016] In some embodiments, the host monitors excess power and allocates it as additional boost power on top of the normal or baseline power allocation to a storage device, a computing device, and / or a pluggable device such as these. The pluggable device uses the boost power, either short-term and / or long-term, to improve one or more performance metrics such as, for example, computing speed, data transmission bandwidth, memory access speed, and the like. The excess power is utilized, for example, by one or more underutilized power supply units, settings of the redundant PSUs, an increase in the amount of power available from one or more PSUs, a decrease in the amount of power allocated to other devices, and / or other reasons or combinations thereof.

[0017] In one embodiment, the allocation or deallocation of boost power is initiated by a device, a host, or any combination thereof. For example, a compute storage device requests temporary boost power to perform a compute operation. The host responds to the request by allocating boost power to the device and then deallocates the boost power when the device notifies the host that the operation is complete. However, in other embodiments, the host deallocates the boost power to the compute storage device before the operation is complete, for example, in response to a loss of available power from a power supply unit (PSU). In some embodiments, the request for power allocation or deallocation comes from a source other than the host or the device. For example, a user can transmit a request to the host to increase or decrease the power allocation for one or more devices.

[0018] In some embodiments, the amount of boost power allocated to a device is negotiated between the host and the device. For example, the device requests a specific amount of boost power. For example, if the requested amount of boost power exceeds the available surplus power, the host rejects the request. However, the host provides a reduced amount of boost power, and if this amount of power is accepted by the device, this amount of power is allocated to the device.

[0019] Based on embodiments of the present invention, the host can implement a very diverse range of different power allocation strategies. For example, in some embodiments, the host accommodates the allocation of all baseline power for all devices determined at a system reset (updated based on hot insertion and removal), waits until a device requests boost power, and implements a relatively passive power allocation strategy. Note that it is possible to passively wait until a device reports that it requires less power than the allocated baseline power, and then return the surplus baseline power to the available power pool.

[0020] In other embodiments, the host implements a relatively aggressive power allocation strategy. For example, the host actively identifies unused and / or underutilized portions of the baseline power allocation for some devices and reallocates them for use with boosted power for other devices. For example, the host monitors the power consumption of devices that implement a power monitoring function. When the host identifies a device that uses less power than the baseline power allocation, the host instructs or requests the device to reduce the baseline power allocation. As another embodiment, the host monitors the actual power consumed by a device operating in boost mode. When the host determines that the device is using less power than the allocated boost power, the host instructs or requests the device to exit boost mode, and / or the host reduces the amount of boost power allocated to the device.

[0021] The host also implements a power allocation strategy based at least in part on priorities, service level agreements (SLAs), and the like. For example, in some embodiments, the host receives a request for boosted power from a device with a first priority. If the host does not have sufficient surplus power to accommodate the request, the host releases the power allocation from a second-priority device with a lower priority (e.g., reduces the baseline power and / or the boost power). The power that has been released from the allocation is reallocated to the first-priority device with a higher priority. As another example, in some embodiments, a device is subject to an SLA that specifies that it operates only when there is available surplus power. Thus, the device may have little or no baseline power allocation and periodically requests boosted power allocations, and these boosted power allocations are allocated by the host when there is surplus power, e.g., when other devices release their allocations by requesting boosted power.

[0022] In some embodiments, the host implements not only one or more of the power allocation strategies described herein, but also other strategies and / or any combination thereof.

[0023] As several examples of systems, processes, methods, and / or the like that illustrate details of some possible embodiments according to the present invention, embodiments will be described hereinafter. These embodiments are provided to explain the principles of the present invention, but this principle is not limited to these embodiments, implementation details, etc.

[0024] FIG. 1 is a diagram showing an example of a host system that allocates boost power to a device via a connector according to an embodiment of the present invention. The host system 100 shown in FIG. 1 includes a first power supply unit-1 (PSU-1) 102 arranged to supply power to a connector 104 via a first power supply bus 106. A second power supply unit-2 (PSU-2) 108 is arranged to supply power to the connector 104 via a second power supply bus 110. One or more devices 118 are connected to the host 100 via a connector 120 that can be connected to the corresponding connector 104. A controller 112, also referred to as a host controller, interfaces with the PSU via one or more communication channels 114. The controller 112 interfaces with the connector 104 via one or more communication channels 116. Although shown in a bus-type configuration, the communication channels (114 and 116) can be implemented as individual channels between the controller 112, each PSU (102 and 108), each connector 104, and / or any other configuration.

[0025] The host system 100 is physically implemented in a structure 122 such as a chassis, a rack, or any combination thereof. For example, in one embodiment, the structure 122 is implemented as a server-type chassis that can be mounted in a rack of a data center.

[0026] In some embodiments, some of the components of the host system 100 are physically configured as sub-assemblies. For example, in one embodiment, the controller 112, the connector 104, and the power supply buses (106 and 110) are mounted on one or more circuit boards such as a switchboard, a motherboard, a midplane, a backplane, an interface board, and the like.

[0027] The host system 100 is shown with two PSUs (102 and 108), but one or any number of PSUs may be used, and any number of power supply buses may be used in any configuration. For example, multiple PSUs share a common bus. Additionally, the PSUs do not have to be physically located within the structure 122. For example, in a chassis-based implementation, the PSUs (102 and 108) are mounted on the floor of the rack to which the chassis is attached, an adjacent chassis, or any other location. In some embodiments, some or all of the available system power is provided in the form of power from unspecified sources. For example, a data center provides chassis, racks, etc. having a power quantity such as 12V, 48V, etc.

[0028] The power supply buses (106 and 110) are implemented with a bus-bar, cables, board-to-board power connectors, and / or the like or any combination thereof. The power from the power supply buses (106 and 110) is provided to the connector 104 by using existing power pins, adding additional power pins, redefining spare pins or unconnected pins as power pins, or any other method or combination thereof. In some embodiments, the configuration used to provide boost power to the connector is affected by operating conditions such as implementation details and / or the amount of boost power that can be allocated to the device using the connector. For example, a U.2 connector can provide a standard maximum power of 25W via 12V pins (P13, P14, and P15). In one embodiment, the U.2 connector is configured to provide a boost power amount exceeding the standard 25W by increasing the amount of current supplied via, for example, the 12V pins (P13, P14, and P15). For supplying a greater amount of boost power, instead of using the 12V pins (P13, P14, and P15) to supply additional current, or in addition thereto, spare pins such as one or more unused 5V pins (P7, P8, P9), E15, and / or S16 can be used to additionally provide 12V boost power to the device instead of the connector.

[0029] The connector 104 is implemented with any standard or non-standard connector realized with any physical and / or electrical configuration, or any combination thereof. In one embodiment, it includes not only expandable connectors and form factors such as the "SFF-TA-100X" specification (where X is 2, 6, 7, 8, etc.), but also U.2 connectors, U.3 connectors, M.2 connectors, and the like. For example, "SFF-TA-1002" can specify 1C, 2C, and 4C connectors, while "SFF-TA-1006", "SFF-TA-1-1007", and "SFF-TA-1-1008" can specify various form factors such as E1.S, E1.L, and E3.x (short and long).

[0030] The controller 112 performs any functions associated with providing boost power to one or more devices via a connector as disclosed herein. This includes monitoring and / or managing the power available from the PSUs (102 and 108) and / or any other power source within the host system 100. The controller 112 also includes the function of monitoring and / or managing the allocation of baseline power and / or boost power to the device 118 and / or other loads within the host system 100. The controller 112 not only responds to requests for boost power from the device 118 and / or negotiates the allocation of boost power to the device 118, but also releases the allocation of boost power in response to various conditions, such as a power loss from any one of the PSUs (102 and 108) and / or a notification from the device 118 that boost power is no longer requested or guaranteed.

[0031] The controller 112 is implemented in hardware, software, or any combination thereof. For example, in some embodiments, the controller 112 is implemented as a service processor such as a Baseboard Management Controller (BMC). In some embodiments, the controller 112 is implemented as a central processing unit (CPU) that executes an application to perform the functions of the controller 112. Although illustrated as a single individual component, the functions of the controller 112 are distributed among multiple components and / or integrated into one or more other components. For example, in some embodiments, the host system 100 is implemented as part of a storage controller having a motherboard. In such embodiments, the CPU that implements the storage controller function on the motherboard also implements some or all of the boost power management functions described herein.

[0032] ​The communication channels (114 and 116) are implemented by any hardware component, software component, communication protocol, and / or combinations thereof. Note that the channels (114 and 116) are implemented as separate channels separable from each other and / or from other channels, or integrated into other communication channels used by the device 118. Either or both of the communication channels (114 and 116) are implemented using a system management bus (SMBus), such as a power management bus (PMBus) between the controller 112 and the connector 104 and / or the PSUs (102 and 108), using dedicated conductors, an LPC (Low Pin Count) bus, a GPIO (General Purpose Input / Output) line, etc. In other embodiments, one or more devices 118 communicate with a motherboard CPU or a service processor such as a BMC via a PCIe (Peripheral Component Interconnect express) link using, for example, the NVMe (Nonvolatile Memory Express) protocol. In some embodiments, either or both of the channels (114 and 116) are implemented using the NVMe-MI (NVMe: Management Interface) protocol using a PCIe link, an SMBus connection, etc.

[0033] The host system 100 further includes a circuit and / or other device for the controller 112 to detect the presence, type, form factor, etc. of the device 118 connected to the connector 104. For example, in embodiments using one or more connectors with presence detection pins, a complex programmable logic device (CPLD) or other logic device is used to detect the state of the one or more presence detection pins. The state of any presence detection pin is reported to the controller 112 via, for example, an I 2 C (inter-integrated circuit) bus, GPIO pins, etc.

[0034] Device 118 is connected to host system 100 via a connector and includes any type of device that can draw power from host system 100. In some examples, device 118 includes storage devices such as hard disk drives (HDDs) and solid state drives (SSDs). In additional embodiments, device 118 includes computing devices such as GPUs (graphics processing units) and HPC (high performance computing) devices. In other embodiments, it includes hybrid devices such as computational storage devices that combine storage media with computing resources.

[0035] FIG. 2 is a diagram showing an example of a device that receives boost power via a connector according to an embodiment of the present invention. The device 130 shown in FIG. 2 is used as any one of the devices 118 shown in FIG. 1, for example. Referring to FIG. 2, device 130 includes a connector 132, an interface 134, a device controller 136, and a device function block 138. The device function block 138 includes any hardware, software, and / or combinations thereof for performing one or more functions of the device. For example, in an SSD, the device function block 138 includes a solid state storage medium, a flash translation layer (FTL), etc. As another example, in the case of a GPU, the device function block 138 includes a hardware graphics processing pipeline and support circuits.

[0036] The connector 132 is implemented by any physical or electrical configuration or any combination thereof, and any standard or custom connector, by connecting to any one of the connectors 104 shown in the host system 100 of FIG. 1, for example, to connect device 130 to the host. Device 130 also includes one or more power supply rails 142 that receive system power via connector 132. The power is distributed to various components of device 130.

[0037] Referring again to FIG. 2, interface 134 is implemented as any type of communication interface for connecting device function block 138 to a host system connected via interconnects (141 and 145). Interface 134 also includes storage, general-purpose interfaces, and / or protocols such as SATA (Serial Advanced Technology Attachment), SCSI (Small Computer Systems Interface), SAS (Serial Attached: SCSI), PCIe, NVMe, etc., and network interfaces and / or protocols such as Ethernet, Fibre Channel, InfiniBand, NVM-oF (Non-Volatile Memory Express over Fabric), etc.

[0038] Device controller 136 is implemented in hardware, software, or any combination thereof and communicates with device function block 138 via any type of interconnect 143. Device controller 136 performs any functions related to boost power operation as disclosed herein. Here, it includes requests and / or negotiations for boost power allocation, responses to boost power allocation release, device power consumption monitoring, and / or such operations. Although device controller 136 is shown as a separate component, it may be partially or fully integrated with one or more other components.

[0039] In one embodiment, device controller 136 communicates with the host through communication channel 139 using interface 134. Alternatively or additionally, device controller 136 communicates with the host using communication channel 140 that can be implemented, for example, with SMBus, LPC bus, etc.

[0040] FIG. 3 is a flowchart showing an example of a method for allocating boost power according to an embodiment of the present invention. This method starts from step 150. In step 152, the host controller waits to receive a request for a specific amount of boost power from one or more devices connected to the host. When the host controller receives the request, it starts a negotiation process and the method proceeds to step 154. In step 154, the host controller determines the amount of surplus power available in the host system. For example, this is determined by first determining the total amount of available power from one or more PSUs configured in the host system and then subtracting the total amount of power currently allocated to the devices connected to the host system. In step 156, the host controller determines whether the available surplus power is suitable for accepting the request.

[0041] In some implementations, if the surplus power is not sufficient (i.e., the requested power exceeds the available power), the host controller rejects the request (e.g., by not approving the request or explicitly rejecting the request) and returns to step 152 as indicated by the dotted line to end the negotiation process. In other implementations, if the requested power exceeds the surplus power but there is still available surplus power, the method proceeds to step 158 where the host controller rejects the request but interrupts the negotiation process by providing all or part of the available surplus power to the device. In step 160, if the device rejects the offer, the negotiation process ends and the method returns to step 152. However, if the device accepts the amount of surplus power provided, the method proceeds to step 162 where the device enters the boost mode.

[0042] After step 154, if there is sufficient surplus power, the method proceeds to step 162. In step 162, the host controller updates a record indicating that the requested device is in boost mode and additionally indicates whether the boost mode is indefinite (permanent) or temporary (a one-time event). In the case of a temporary boost mode, the host controller initializes a timer to automatically deallocate the boost power from the requested device at the end of the boost event. Note that in step 162, the host controller updates the record with the newly increased maximum power level assigned to the device, or adds the power level of the boost mode to the total allocated power to the host system.

[0043] In this embodiment, the method proceeds to step 164 where the host controller adjusts the thermal characteristics of the device and / or the host system. For example, depending on the implementation details, the device may emit more heat due to the boost power consumption of the device. In some embodiments, for relatively short boost events, the temperature of the device may not change significantly. However, for relatively long or permanent events, the temperature of the device may increase to a level that, for example, degrades the reliability and performance of the device. Accordingly, the host controller provides additional cooling to the device, for example, by turning on or increasing the speed of one or more fans associated with the device and / or the structure in which the device is located.

[0044] After completing step 164, the method proceeds to step 166 where the host controller approves, for example, the request for the boost power of the device, notifies the device of the approved proposal for the reduction of the boost power, and / or notifies other measures indicating that the device starts consuming power at an increased level in boost mode.

[0045] In step 168, the host controller waits for the completion of the boost event. For example, in the case of a temporary boost event, the host controller waits for the timeout of the timer initialized in step 162. As another example, in the case of an indefinite boost event, the host controller waits to receive a notification from the device that it no longer requires or does not use the allocated boost power. In some embodiments, the host controller may end the boost mode for the device based on other factors, such as determining that some or all of the boost power is to be reallocated to different devices and / or the like if it is observed that the device is overheating or the power consumption of the device has dropped to a lower level and has been maintained for a significant period of time.

[0046] In step 170, the host controller starts the process for the device to end the boost mode. When the boost mode event is ended by the host controller rather than the device, the host controller notifies the device that the boost power has ended. The host controller updates a record indicating that the device is no longer in the boost mode. The host controller also updates a record indicating the new reduced maximum power level allocated to the device. The host controller also returns the boost power to the pool, for example, by subtracting the boost power level from the total power allocated to the host system.

[0047] In one embodiment, in step 172, the host controller readjusts the thermal characteristics of the device and / or the host system, for example, by turning off and / or reducing the speed of one or more fans associated with the device and / or the structure where the device is located. The method returns to step 152.

[0048] In one embodiment, the method shown in FIG. 3 is implemented as a single instance of a method that responds to requests from a single device or allocates boost power to a single device. The method shown in FIG. 3 is implemented as multiple instances, for example, to respond to requests from multiple devices or allocate boost power. In other embodiments, the method shown in FIG. 3 is implemented as a single instance that can be configured to receive boost power requests from multiple devices, for example. For example, the method shown in FIG. 3 is waiting for the end of a boost event for one device at step 168, but may also be capable of processing boost power requests to other devices and / or allocating boost power.

[0049] Not only the operations and / or components described in connection with the embodiment shown in FIG. 3, but any other embodiment described herein are exemplary operations and / or components. In some embodiments, some operations and / or components may be omitted or other operations and / or components may be included. Further, in some embodiments, the temporal and / or spatial order of the operations and / or components is changed.

[0050] In some embodiments, the amount of surplus power supplied as boost power to a device via a connector is determined by subtracting the total amount of power allocated to the device from the total amount of power available in the host system. In some embodiments, the amount of system overhead power is subtracted from the power available from one or more PSUs. For example, a host system includes components such as a service processor, network interface, and / or switch, CPU, memory, system monitor circuit, cooling equipment, etc., which consume power and make it impossible to supply boost power to a device via a connector. Note that, for example, to provide additional cooling of a device in boost mode, the percentage of power available as boost power is subtracted from the available power.

[0051] In one embodiment, a number of PSUs provide flexibility for different power configurations. For example, referring to the embodiment shown in FIG. 1, in a first mode without redundancy, the total output power from the PSUs (102 and 108) becomes available for use by the device 118. This means providing a relatively large amount of surplus power as boost power. In a second mode of high availability, one of the PSUs is configured as a redundant (backup) PSU for the other (active) PSU, thereby reducing the amount of surplus power available as boost power for the device 118. In this second mode, the surplus power is, for example, the same as the headroom between the maximum power capacity of the active PSU and the current power allocation for the device 118. In one embodiment, when power loss occurs from one or more redundant PSUs, one or more devices operating in boost mode are controlled by the host controller to reduce their power consumption to the baseline power allocation or to a reduced boost power level lower than the original boost power level. In some embodiments, when power loss occurs from one or more redundant PSUs, boost power may not be allowed for all or some of the devices, or when there is insufficient headroom in one or more of the remaining active PSUs, boost power may not be allowed for all or some of the devices.

[0052] Table 1 shows an example of the determination of power allocation performed by a host system having two PSUs according to an embodiment of the present invention. The first column indicates the type of boost mode. The second column indicates whether the boost mode can be implemented when only one PSU is available, for example, due to the loss of any one of the PSUs or because the two PSUs are configured for redundant operation. The third column indicates whether the boost mode can be implemented when both PSUs are made fully available.

[0053]

Table 1

[0054] In some embodiments, the host system has one or more causes of surplus power. One potential cause of surplus power is the configuration of a host system in which devices are not attached to all connectors. For example, a system such as a data center chassis or rack has a specific number of slots, and each slot has a connector with a maximum specified power that can be drawn by a device connected to the connector. The host system has one or more PSUs with sufficient capacity (e.g., redundant or non-redundant configuration) to provide the total power required when devices that draw the maximum power of the connectors corresponding to all slots are attached. However, if one or more slots are not filled with devices, the power allocated to the one or more empty slots is used as boost power by the devices at one or more other connectors. In some implementations, the power for unused slots and / or connectors is disabled.

[0055] Another potential cause of surplus power is one or more devices that consume or request less than the maximum power specified for the connector. For example, a host system includes one or more scalable connectors that have different power requirements and accommodate different types of devices. The host system is composed of one or more PSUs with sufficient capacity to provide the total power required when devices that draw the maximum power of the connectors corresponding to all slots are attached. However, if a device with a low maximum power consumption is connected to the maximum power of the connector (e.g., detected by the state of one or more presence detection pins of the connector), the difference between the maximum power of the connector and the maximum power consumption of the actual device connected to the connector can be used as surplus power. As another example, a device connected to a connector notifies the host controller that it requires less power than the maximum power allocated to the connector. The difference between the allocated power and the actual power requirement of the device is returned to the available power pool or reallocated to other devices that request boost power.

[0056] In some embodiments, to determine the allocation of total power for some or all of the devices connected to a connector, the host controller first determines an allocation of baseline power for the devices. In some embodiments, the allocation of baseline power depends on parameters such as, for example, in the case of a host system, the type and number of each connector, the state of the presence detection pins of each connector, the capabilities, type, form factor, and / or devices within a connector that do not have presence detection pins of the host controller that detects presence.

[0057] For example, for each U.2 connector occupied in a host system, the host controller allocates a baseline power of 25 watts (W). As another example, for each "SFF-TA-100X" connector in a host system, the host controller not only performs one or more tests to determine the length, thickness, and / or other parameters of the connected device, but also allocates a baseline power of 12, 16, 20, 25, 40, or 70 watts (W), or some other amount, depending on the states of various presence detection pins. As yet another example, if there are no presence detection pins in the connector and the host controller cannot detect whether a device is attached to the connector, the host controller allocates the maximum baseline power to the connector regardless of whether a device is connected to the connector.

[0058] In some embodiments, the initial allocation of baseline power is determined at system reset and is then updated based on hot insertion and / or removal of devices.

[0059] FIG. 4 is a flowchart showing a method for determining and listing the allocation of baseline power for an apparatus according to an embodiment of the present invention. This method is a hot insertion of an apparatus into a slot having a connector for receiving power from one or more PSUs of a system reset or a host system, and starts from step 180. In step 182, the method detects the presence of an apparatus in the slot (i.e., plugged into the connector) by, for example, a complex programmable logic device (CPLD) reading the state of a presence detection pin on the connector. In step 184, a host controller, such as a service processor implementable in a BMC, receives a notification of the presence of the apparatus in the slot. In step 186, the host controller determines the type of the apparatus present in the slot. This determination is based on, for example, not only the type of the connector (e.g., a standard connector, a scalable connector, etc.), but also one or more presence detection pins indicating the type of the apparatus connected to the connector accommodating a number of types of apparatuses. In step 188, the host controller establishes the allocation of baseline power based on the type of the apparatus determined to be in the slot. In step 190, the host controller performs an enumeration process on the apparatus, which enables the host controller to confirm the type of the apparatus and / or the actual allocation of baseline power to the apparatus. In step 192, the host controller adjusts the allocation of power consumption for the apparatus based on factors such as, for example, a request for boost power, a notification from an apparatus requesting an allocation of power lower than the allocated baseline power. The method ends at step 194.

[0060] In one embodiment, the method shown in FIG. 4 is repeated for one or more other apparatuses that have not yet been enumerated during hot insertion or a system reset.

[0061] FIG. 5 is a flowchart showing a method for determining the allocation of baseline power to a device coupled to a host via an expandable connector according to an embodiment of the present invention. In one embodiment, the types of devices that can be coupled to a host system via a scalable connector have different maximum power levels based on factors such as the form factor of the device, the thickness of the device, and the number of presence detection pins detected when the device is coupled to the connector. The method of the present invention begins at step 200 when the device is coupled to the scalable connector of the host system. In step 202, the host controller obtains information such as the form factor and thickness of the device from the device using a communication channel such as SMBus via, for example, VPD (Vital Product Data). In step 204, the host controller detects the number of presence detection pins detectable via the scalable connector. The presence detection pins are detected using, for example, a complex programmable logic device (CPLD). After step 204, the host controller determines in step 206 that one presence detection has been detected. In some embodiments, this indicates that the device is one of one or more types of devices having a first maximum power level. Accordingly, in step 208, the host controller assigns the first maximum power level as the allocation of baseline power to the device and the method ends.

[0062] Alternatively, after step 204, the host controller determines at step 210 that two presence detection pins have been sensed. In some embodiments, this indicates that the device is one of one or more types of devices having a second baseline maximum power level. However, some of these types of devices are configured at a lower third maximum power level, depending, for example, on the amount of surplus power available in the host system. Accordingly, at step 212, the host controller calculates whether there is sufficient surplus power to provide the second maximum power level. At step 214, the host controller determines that sufficient surplus power is available, and at step 216, the host controller assigns the second maximum power level as the baseline power allocation for the device, and the method ends. Alternatively, at step 218, the host controller determines that sufficient surplus power is not available, and at step 220, the host controller assigns the third maximum power level as the baseline power allocation for the device, and the method ends.

[0063] Alternatively, after step 204, the host controller determines at step 222 that three presence detection pins have been sensed. In some embodiments, this indicates that the device is one of one or more types of devices having a fourth baseline maximum power level. However, some of these types of devices are configured at a fifth maximum power level, based, for example, on the amount of surplus power available in the host system. Accordingly, at step 224, the host controller calculates whether there is sufficient surplus power to provide the fourth maximum power level. At step 226, the host controller determines that sufficient surplus power is available, and at step 228, the host controller assigns the fourth maximum power level as the baseline power allocation for the device, and the method ends. Alternatively, at step 230, the host controller determines that sufficient surplus power is not available, and at step 232, the host controller assigns the fifth maximum power level as the baseline power allocation for the device, and the method ends.

[0064] In one embodiment, the method shown in FIG. 5 is used, for example, for hot insertion of a device. Depending on the implementation details, this method enables a form factor and / or type (e.g., thick or thin) to be quickly determined for the host controller to allocate baseline power to the device. After the device is initialized and the baseline power level is set, negotiation between the device and the host controller proceeds.

[0065] The method shown in FIG. 5 is not limited to any particular implementation details, but in some embodiments is implemented using a scalable connector as described in the "SFF-TA-100X" specification where, for example, X is 2, 6, 7, 8, etc. In such an implementation, any one of the first, second, third, fourth, and fifth power levels corresponds to, for example, 8W, 10W, 12W, 15W, 25W, 40W, 70W, and / or other power levels. In such an implementation, any of the first, second, third, fourth, and fifth power levels corresponds to 8W, 10W, 12W, 15W, 25W, 40W, 70W, and / or other power levels.

[0066] FIG. 6 is a flowchart showing a method for determining the allocation of baseline power to a device connected to a host system via an expandable connector when the system is reset according to an embodiment of the present invention. This method starts from step 201 when the host system is reset (e.g., initialization, cold boot, etc.). In step 203, one or more devices (e.g., all devices) attached to the host system are enumerated. In step 205, the host controller starts an instance of the power allocation process described below for one or more enumerated devices (e.g., for each enumerated device). In step 207, the host controller starts determining the type of the device detected in the slot by sensing, for example, the state of one or more presence detection pins to determine the allocation of baseline power to the device. In step 209, the host controller determines that one presence detection pin has been sensed. In step 211, the first power level is assigned as the maximum power for the device, and the method returns to step 205 to start the power allocation process for other devices.

[0067] Alternatively, after step 207, the method proceeds to step 213, where the host controller obtains information regarding the form factor of the device and / or the number of sensed presence detection pins, which is used to determine the allocation of baseline power to the device. In step 215, the host controller determines whether the device has a maximum baseline power level greater than the second power level. If it does not have the maximum baseline power level, in step 217, the host controller determines whether there is appropriate power for the second power level. If there is appropriate power, the second power level is assigned as the baseline power for the device, and the method returns to step 205. Alternatively, in step 217, if appropriate power cannot be used, the method performs a power level adjustment and management procedure in step 221 before returning to step 205.

[0068] After step 215, when the host controller determines that the device has a maximum baseline power level greater than the second power level, the method proceeds to step 223. In step 223, when the host controller determines that the maximum baseline power consumption of the device is the third power level, the method proceeds to step 225 to determine whether the host controller has appropriate (sufficient) power for the third power level. If appropriate power exists, the third power level is assigned as the baseline power for the device, and the method returns to step 205. Alternatively, if appropriate power cannot be used in step 225, the method performs power level adjustment and management procedures in step 221 before returning to step 205.

[0069] Alternatively, when the host controller determines in step 223 that the maximum baseline power consumption of the device is not the third power level, this indicates that the device may not be supported by the current system configuration. Therefore, the method ends in step 229. In some implementations, the method returns to step 205.

[0070] The method shown in FIG. 6 is not limited to the details of any particular and specific embodiment, but in some embodiments, it is implemented using a scalable connector as described in the "SFF-TA-100X" specification where, for example, X is 2, 6, 7, 8, etc. In such an implementation, the first, second, and third power levels correspond to any appropriate power levels.

[0071] FIG. 7 is a flowchart showing a method for adjusting the power allocation to a device connected to a host system via a connector according to an embodiment of the present invention. The method starts, in step 231, with a newly proposed power allocation for the device (i.e., a newly proposed baseline power allocation). In some embodiments, in step 233, the method first determines that one or more devices (e.g., all devices) connected to the host system have been enumerated. In step 235, the host controller obtains the current power allocation level for the device. This is obtained, for example, from the device, from the record of the current allocation maintained by the host controller, and / or by any other method. In step 237, the host controller compares the current power allocation for the device with the proposed new allocation. If the allocations are the same, the method ends in step 239. If the proposed new allocation is less than the current allocation (if the current allocation is higher than the proposed new allocation), in step 241, the host controller transmits a command, request, etc. to the device to reduce the current allocation. Thereafter, the host controller waits for a successful confirmation in step 243. After being confirmed, the method returns to step 237. Alternatively, if the proposed new allocation is greater than the current allocation (if the current allocation is lower than the proposed new allocation), in step 245, the host controller transmits a command, request, etc. to the device to increase the current allocation amount to the new higher level. In step 247, the host controller waits for a successful confirmation. If confirmed, the method returns to step 237.

[0072] Without being limited to the details of any particular embodiment, in some embodiments, the method shown in FIG. 7 is implemented by adjusting one level at a time during type-up / down. Depending on the details of the embodiment, such a feature can simplify the power management logic design.

[0073] In one embodiment, the method shown in FIG. 7 includes a source other than the host or device and is used to implement requests for power allocation or deallocation from any source of requests. For example, a user transmits a request to the host to request an increase or decrease in the power allocation to one or more devices on the host. The request is transmitted to the host via any communication channel such as a network interface such as Ethernet (registered trademark), Fibre Channel, InfiniBand, etc.

[0074] In some embodiments, after the baseline power allocation for the host system is determined (e.g., at system reset and initially determined based on hot insert and / or removal), the power allocation for the entire system is dynamically adjusted by adding or subtracting various power allocations at different times based on many different factors. Examples of factors are one or more characteristics and / or features of the device, one or more power allocation strategies that can be implemented by the host controller, any service level agreement (SLA) that exists for one or more devices, etc.

[0075] In some embodiments, for example, when a device requests an allocation of boost power in addition to its baseline maximum power allocation, the device is described as boostable. In some embodiments, the boost power request is implemented in an active manner in which the device spontaneously transmits a request for boost power to the host controller. Alternatively or additionally, the boost power request is implemented in a manual manner in which the device waits for polling by the host controller (e.g., in a round-robin fashion) to request an allocation of boost power.

[0076] In some embodiments, the boost power request includes the specific amount of boost power requested by the device. Alternatively or additionally, a predetermined amount of boost power is specified for the device such that, for example, during a system reset operation, the host controller responds to the boost power request and allocates it to the device.

[0077] In some embodiments, the allocation of boost power is implemented as a positive amount that the device can draw surplus power from one or more PSUs. Alternatively or additionally, the boost power is implemented as a negative amount by which the maximum amount of power that the device can draw is decreased from, for example, a baseline amount.

[0078] In some embodiments, the baseline power and / or the power consumption of the boost of the device is controlled by a host system controller. In some embodiments, the host controller forcibly controls the maximum power level of the device. For example, the host controller issues a command specifying the maximum power level of the device, and the device must comply with the maximum power level specified by the host controller. For example, a device compatible with the NVMe cloud SSD specification is commanded by the host controller to reduce its maximum power consumption to one of a variety of predetermined power levels. In some embodiments, the host controller selectively or voluntarily controls or attempts to control the maximum power level of the device. For example, the host controller requests that the device comply with the specified maximum power level. The device may approve the request and limit its maximum power consumption to the requested level, or the device may reject the request and continue to operate at a different maximum power level, such as the baseline power allocation determined by a system reset or hot insertion.

[0079] In some embodiments, the device implements power monitoring that enables the host controller to determine the amount of power actually consumed by the device. For example, a PMU (power monitoring unit) within the device measures the current flowing in through the connectors of one or more power supply rails and reports this measurement information to the host controller through a channel, such as one or more communication channels 116 shown in FIG. 1.

[0080] In one embodiment, the apparatus implements any number of such features and / or any combination thereof.

[0081] FIG. 8 is a flowchart showing a method for releasing the power allocation of a device removed from a host according to an embodiment of the present invention. This method starts from step 240 when the device is removed from the host system, for example, by separating the device from the connector. In step 242, the host controller determines from the host electronic device which device has been removed. In step 244, the host controller searches for information such as the device type and the baseline power allocation regarding the removed device. In step 246, the host controller determines the power allocation for the removed device. In some embodiments, this is the baseline power allocation for the device. In some embodiments, this is, for example, the value obtained by adding any boost power allocation to all baseline power allocations if the device was in boost mode when it was removed. After step 246, the host controller determines in step 248 that the device has a first power allocation that is added back to the available power pool in step 250, and the method ends. Alternatively, after step 246, the host controller determines in step 252 that the device has a second power allocation that is added back to the pool of available power in step 254, and the method ends. Alternatively, after step 246, the host controller determines in step 256 that the device has a third power allocation that is added back to the pool of available power in step 258, and the method ends. In other embodiments, any number of power allocation levels are determined and added back to the available power pool.

[0082] FIG. 9 is a diagram showing an apparatus for monitoring and reporting power usage according to an embodiment of the present invention. The apparatus 260 shown in FIG. 9 includes a connector 262, an interface 264, an apparatus controller 266, and an apparatus function block 268 similar to the embodiment shown in FIG. 2. For example, the apparatus controller 266 includes any hardware, software, and / or combinations thereof for performing any function related to the request and / or reception of boost power, and the apparatus function block 268 includes any hardware, software, and / or combinations thereof for performing one or more functions. However, the embodiment shown in FIG. 9 also includes a power metering unit 270 that measures the amount of power consumed by the apparatus 260 and reports this to the system controller. For example, in one embodiment, the power metering unit 270 measures the consumption current on various power rails available to various components within the apparatus 260. In one embodiment, the power metering unit 270 communicates with the apparatus controller 266 via a communication channel 280 implemented as, for example, an SMBus, an LPC bus, GPIO lines, and / or any other type of communication channel. The power metering unit 270 transmits power monitoring data to the apparatus controller 266, which then transmits the data to the host system controller through the communication channel. In other embodiments, the power metering unit 270 communicates with the host system controller through an individual communication channel passing through the connector 262 or in other ways.

[0083] The power metering unit 270 is implemented in hardware, software, and / or any combination thereof. Although shown as a single or individual component, the functions of the power metering unit 270 may be distributed among multiple components or integrated into one or more other components. In some embodiments, the power metering unit 270 is located outside the apparatus 260, for example, on a circuit board where the connectors of the apparatus are mounted.

[0084] In one embodiment, the power metering unit 270 performs one or more power management functions such as distributing, conditioning, converting, and / or processing the power received via the connector 262 to be compatible with other components. For example, the power metering unit 270 receives a 12V power supply, a 3.3V power supply, and / or other power supplies 278 and converts them to an interface voltage rail 272, a controller voltage rail 274, and / or a voltage rail 276 of a device functional block.

[0085] In some embodiments, the power metering unit 270 periodically records power measurement values. The power measurement values are annotated with information such as a time stamp, a current host identifier (ID), etc. The power measurement values are stored in a log so as to be maintained via a system reset and / or a power cycle, and the log is transmitted to the host system controller via the device controller 266 or through any suitable communication channel, protocol, etc.

[0086] FIG. 10 is a flowchart showing a method for collecting power consumption data in an apparatus according to an embodiment of the present invention. For example, the method implemented using the power measurement unit 270 shown in FIG. 9 starts from step 282. In step 284, the method performs a power measurement, for example, by setting a time interval between measurements (e.g., 5 seconds). In step 286, the method checks whether measurement data has been received from all power rails. If measurement data has not been received from all power rails, the method proceeds to step 288 to obtain measurement data for the power rail. In step 290, the received power measurement value is annotated with a timestamp. In step 292, the received power measurement value is annotated with a host identifier (ID). In step 294, the power measurement value including the annotation is stored in the power log. Then the method returns to step 286. After measurement data has been received from all power rails, the method proceeds to step 296 where one or more power logs are stored in the persistent memory. In step 298, one or more power logs are transmitted to the host system controller, and the method returns to step 284.

[0087] FIG. 11 is a flowchart showing a method for dynamically reducing the power allocated to a host system according to an embodiment of the present invention. The method shown in FIG. 11 is used, for example, by a host system controller in which one or more devices implement a power monitoring function as shown in FIG. 10. The method shown in FIG. 11 can be used, for example, to reduce the allocation of baseline power and / or boost power to a device and to reallocate power to other devices requesting a boost power allocation.

[0088] Referring again to FIG. 11, the method starts at step 300. At step 302, the controller identifies whether one or more devices are in an idle state or consuming power in the vicinity of an idle level. For example, this is determined by obtaining one or more power measurements at the device and comparing the percentage of maximum power, the absolute power level, and / or other means to an idle threshold. At step 304, the controller requests (e.g., by using a low power consumption level as a new maximum power allocation) that one or more devices consuming power at idle and / or in the vicinity of the idle level continue to operate at a low power level. This request is made on an optional, voluntary, or mandatory basis (i.e., the request is essentially a command).

[0089] At step 306, the controller identifies that one or more devices are consuming power at an assigned maximum power level, e.g., one or more other power levels that may be less than 75% maximum, 50% maximum. At step 308, the controller optionally and / or voluntarily requests that one or more devices operating at such a reduced power level continue to operate at an even lower power level (e.g., by using a lower power consumption as a new maximum power allocation). At step 310, the controller identifies one or more empty connectors (e.g., connectors associated with slots). At step 312, the controller requests that one or more power metering units located outside the device and associated with one or more empty connectors operate at a lower power consumption allocation (e.g., at an idle power level) and / or be disabled. The method ends at step 314.

[0090] FIG. 12 is a diagram showing an example of a host system that provides boost power to a device via a connector according to an embodiment of the present invention. For illustrative purposes, the embodiment shown in FIG. 12 will be described in connection with a storage system 400 that uses an "SFF-TA-100X" connector for an SSD. However, the principles of the present invention are not limited to any particular type of system, device, connector, etc.

[0091] The storage system 400 includes two motherboards (402A and 402B). The first motherboard 402A of the motherboards (402A and 402B) includes a CPU 404A, one or more high-speed connectors 412A, one or more additional connectors 414A, a baseboard management controller (BMC) 416A, and a hot-swap controller 418A.

[0092] The first motherboard 402A is connected to the midplane 422 via one or more high-speed connectors 412A and one or more additional connectors 414A. The second motherboard 402B is connected to the midplane 422 via one or more high-speed connectors 412B and one or more additional connectors 414B.

[0093] Storage devices (424-00 to 424-23), collectively referred to by reference numeral 424, are connected to the midplane 422 via connectors of the storage devices. In this embodiment, there are up to 24 or more storage devices. However, the system is configured to accommodate any number of storage devices. This configuration is not limited to any particular type of storage device or connector, but in this exemplary embodiment, the connector is implemented as an "SFF-TA-100X" connector.

[0094] On the first motherboard 402A, the PCIe switch 408A is connected to one or more high-speed connectors 412A via conductive traces, cables, or any suitable connection device 432A, providing, for example, four PCIe lanes each. The PCIe clock distribution function is provided separately from or integrated with the PCIe switch 408A. The CPU 404A includes local support resources such as memory, local storage, power supply, etc. The CPU 404A not only enables data transmission to the storage device 424 via the PCIe switch 408A using, for example, the NVMe protocol, but also performs various system management functions. The CPU 404A is connected to the PCIe switch 408A and the BMC 416A via links having various numbers of PCIe lanes with various generations of speeds adapted to the expected traffic, as indicated by the arrows in FIG. 12. The BMC 416A is connected to the PCIe switch 408A via a PCIe link, as indicated by the arrows in the figure. The BMC 416A is connected to the CPU 404A via an LPC (Low Pin Count) interface 434A.

[0095] The system management bus (SMBus) is connected between the BMC 416A and the midplane 422 and / or the storage device 424 using any one of the additional connectors 414A through a dedicated connector or in any other suitable way. One or more additional connectors 414A provide board-to-board power connection between the hot-swap controller 418A and the storage device 424 via the midplane 422.

[0096] The second motherboard 402B includes connections with essentially the same components as the first motherboard 402A, but the reference numerals end with B instead of A.

[0097] On the left side of the midplane 422, storage devices (424-00 to 424-02) are connected to the midplane 422 via a 2C connector 426, which indicates that a baseline power allocation of, for example, 35 watts (W) is provided to the storage devices. On the right side of the midplane 422, storage devices (424-22 and 424-23) are connected to the midplane 422 via a 1C connector, which indicates that a baseline power allocation of, for example, 25 watts (W) is provided to the storage devices.

[0098] The embodiment shown in FIG. 12 also includes one or more complex programmable logic devices (CPLDs) 440 configured to detect the state of one or more presence detection pins on the connectors for the storage devices. The one or more CPLDs 440 are connected to the presence detection pins on the one or more connectors via traces 432. Although shown as a single trace, there are multiple traces for detecting the states of multiple pins on each connector. The one or more CPLDs 440 communicate with the BMCs (416A and 416B) via, for example, SMBus by I 2 C, or via GPIO terminals, LPC bus, etc. The one or more CPLDs 440 determine the type, form factor, etc. of the devices connected to the connectors by the BMC. Although the one or more CPLDs 440 are shown on the midplane 422, in other embodiments, these are located on the motherboard, one or more individual boards, or any other suitable location.

[0099] FIG. 13 is a diagram illustrating another example of a method for allocating power to a device via a connector according to an embodiment of the present invention. This method begins at step 318 by connecting the device to the host via the connector. This method further includes the step of receiving, at step 320, a request for boost power from the device by the host controller. The method further includes the step of determining, at step 322, by the host controller, the amount of surplus power available to the device via the connector from one or more power sources. This method further includes the step of allocating, at step 324, at least a portion of the surplus power to the device as boost power.

[0100] The operations and / or components described in connection with the embodiment shown in FIG. 13, as well as any other embodiments described herein, are exemplary operations and / or components. In some embodiments, some operations and / or components may be omitted or other operations and / or components may be included. Note that in one embodiment, the temporal and / or spatial order of the operations and / or components may be changed.

[0101] In one embodiment, depending on the details of the embodiment, one or more systems, methods, and / or devices according to such a disclosure provide one or more advantages. For example, using power that is dynamically adjusted according to the workload of the device can reduce costs in some implementations where more power is used than would be allocated in other ways without degrading the performance of the device.

[0102] In one embodiment, depending on the details of the embodiment, one or more systems, methods, and / or devices according to the present invention can improve the performance and ability to more effectively and / or efficiently provision for loads related to artificial intelligence (AI) and / or machine learning (ML), which may be difficult to provision in other ways.

[0103] In one embodiment, depending on the details of the embodiment, one or more systems, methods, and / or apparatuses according to the present invention are implemented in a manner with little or no change to connectors, midplanes, chassis, and / or the like.

[0104] In one embodiment, depending on the details of the embodiment, one or more systems, methods, and / or apparatuses according to the present invention can more effectively and / or efficiently improve the provisioned performance and / or capabilities for a compute storage acceleration workload that exceeds the maximum power allocation during a particular computing operation.

[0105] In one embodiment, depending on the details of the implementation form, one or more systems, methods, and / or apparatuses according to the present invention can more effectively and / or efficiently improve the provisioned performance and / or capabilities compared to a system that uses performance and / or power limits to maintain power consumption at a particular maximum power level.

[0106] In some additional embodiments, in response to one or more problem states such as, for example, an SSD not operating correctly, a short circuit, and / or other types of malfunction and / or conditions, power to storage or other devices is disabled via a connector (e.g., a scalable connector). For example, when a standard NVMe device is installed in a connector for an NVMe-oF device, the power is disabled. For example, the power disable defined for the scalable connector is used to disable the power, and the device is notified to turn off one or more systems connected to one or more power rails.

[0107] In some embodiments, a host controller, such as a service processor like BMC, generates one or more power profiles and / or usage scenarios in response to obtaining measurement values of power consumption from a device. For example, the host controller periodically reads power measurement values from one or more devices connected to a chassis via one or more connectors, which is implemented with one or more scalable connectors in some embodiments. In one embodiment, the NVMe-MI protocol is used via SMBus, PCIe, etc. to read power log pages generated by, for example, a device that monitors power consumption. The read power data is processed to represent trends, diagnostic purposes, etc.

[0108] FIG. 14 is a diagram showing an example of power consumption in a device having a power monitoring function according to an embodiment of the present invention. The example shown in FIG. 14 shows raw power consumption (e.g., watts / hour) over a certain period. Some embodiments provide graphs of different combinations of parameters indicating the behavior of power consumption in relation to time. Some examples of graphs generated based on the present invention include the power consumption of the entire chassis over time, the power consumption during the day, at night, on weekdays, on weekends, etc., and the long-term power consumption by month / year.

[0109] In some embodiments, the power consumption data obtained based on the present invention is used for various purposes including power supply, determination of future requirements, cooling, planning, etc. In one embodiment, host identifier (ID) information annotated with power consumption measurements is used, for example, to profile the power consumption by various hosts or applications. Such information provides insights into the power demands of storage for various applications and is used to calculate, for example, the storage cost per host or application.

[0110] The above-described embodiments have been described in the context of details of various embodiments, but the principles of the present invention are not limited to these or any other specific details. For example, although some functions have been described as being implemented by specific components, in other embodiments, the functions are distributed among different systems and components in different locations and have various user interfaces. Specific embodiments have been described as having specific processes, steps, etc., but such terms also include embodiments in which such specific processes, steps, etc. are implemented by a number of processes, steps, etc., or in which a number of processes, steps, etc. are integrated into a single process, step, etc. References to components or elements refer to only a part of the component or element. For example, a reference to an integrated circuit refers to all or a part of the integrated circuit, and a reference to a block refers to the entire block or one or more sub-blocks. The use of terms such as "first" and "second" in the present invention and the claims is only for distinguishing what they modify and does not indicate any spatial or temporal order unless it is determined from the context that they clearly have a different meaning. A reference to the first one may not imply the existence of the second one.

[0111] As described above, the embodiments of the present invention have been described in detail with reference to the drawings. However, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the technical idea of the present invention.

Explanation of Reference Numerals

[0112] 100 Host (System) 102, 108 First and Second Power Supply Units (PSU) 104, 120, 132, 262 Connectors 106, 110 First and Second Power Feeding Buses 112 (Host) Controller 114, 116, 139, 140, 280 Communication Channels 118, 130, 260 Devices 122 Structure 134 and 264 interfaces 136 and 266 device controllers 138 and 268 device function blocks 141, 143, and 145 interconnects 142 power supply rail 270 power metering unit 272 interface voltage rail 274 controller voltage rail 276 voltage rail for device function blocks 278 power supply 400 storage system 402A and 402B, the first and second motherboards 404A and 404B CPUs 408A and 408B PCIe switches 412A and 412B high-speed connectors 414A and 414B additional connectors 416A and 416B baseboard management controllers (BMCs) 418A and 418B hot-swap controllers 422 midplane 424-00 to 424-02, 424-22, 424-23 storage devices 432 trace 432A and 432B connecting devices 434A and 434B LPC (Low Pin Count) interfaces 440 complex programmable logic device (CPLD)

Claims

1. A method for supplying power to a device via a connector by a host controller, comprising: supplying power to the device by the host using a connector configured to transmit a first communication channel and a second communication channel; communicating between the host and the device functions of the device using the first communication channel by the host and the device; assigning a power allocation including a first amount of power to the device by the host; receiving, by the host, a request for a second amount of power caused by the device from the device using the second communication channel; determining, by the host, the amount of surplus power available from one or more power sources; transmitting, by the host, an offer of a third amount of power based at least in part on the amount of surplus power to the device using the second communication channel based on the request for the second amount of power. A method characterized by comprising:

2. The method according to claim 1, further comprising receiving, by the device, the offer of the third amount of power.

3. The method according to claim 1, further comprising negotiating, by the host and the device, the first amount of power.

4. The method according to claim 2, further comprising changing, by the host, at least a part of the power allocation based on the third amount of power.

5. The device includes a first device, The connector includes a first connector and a second connector, The method according to claim 1, further comprising reallocating, by the host, at least a part of the power allocation to a second device connected to the one or more power sources using the second connector.

6. The method according to claim 1, wherein the power allocation is allocated to the device for operation.

7. Determining, by the host or the device, the state of the operation; The method according to claim 6, further comprising modifying, by the host, the power allocation based on the determination of the state of the operation.

8. The method according to claim 6, characterized in that the state of the operation is at least partially determined by the device.

9. The method according to claim 6, characterized in that the state of the operation is at least partially determined by the host.

10. The method according to claim 1, further comprising the step of adjusting the power allocation by the host based on the power consumption of the device.

11. The device includes a first device, The connector includes a first connector and a second connector, The power allocation includes a first power allocation, The method is Connecting the second device to the host by the host using the second connector arranged to supply power from one or more power sources to the second device; Allocating a second power allocation to the second device by the host. The method according to claim 1, further comprising the steps of:

12. The method according to claim 1, characterized in that the first amount of power includes a baseline portion based on the baseline power of the device.

13. The method according to claim 12, further comprising the step of adjusting the baseline portion of the power allocation by the host.

14. The method according to claim 12, characterized in that the third amount of power includes a boost portion based at least in part on the amount of surplus power available from the one or more power sources.

15. The method according to claim 14, further comprising the step of adjusting the power allocation by the host based on the boost portion of the third amount of power.

16. A connector connectable to a device configured to transmit a first communication channel and a second communication channel to supply power from one or more power sources to the device; A host controller, The host controller is Allocating a power allocation including a first amount of power to the device, Receiving a request for a second amount of power caused by the device from the device using the second communication channel, Determining the amount of surplus power available from one or more power sources, A system characterized by transmitting, based on the request for the second amount of power, a proposal (offer) for a third amount of power based at least in part on the amount of surplus power to the device using the second communication channel.

17. The system according to claim 16, wherein the first amount of power includes the amount of baseline power. **Claim 18** The system according to claim 17, wherein the amount of baseline power is at least partially determined by the form of the connector. **Claim 19** The system according to claim 17, wherein the amount of baseline power is at least partially determined by one or more presence detection pins on the connector. **Claim 20** The system according to claim 17, wherein the amount of baseline power is at least partially determined by communicating with the device via the connector. **Claim 21** The system according to claim 16, wherein the host controller includes a central processing unit of a host that executes an application. **Claim 22** The system according to claim 16, wherein the host controller includes a service processor. **Claim 23** The system according to claim 22, wherein the service processor includes a baseboard management controller. **Claim 24** A first connector connectable to a first device configured to transmit a first communication channel and a second communication channel to supply power from one or more power sources to the first device; A second connector connectable to a second device to supply power from one or more power sources to the second device; A host controller, comprising: The host controller: Communicates with the device functions of the first device using the first connector and the first communication channel; Assigns a first power allocation to the first device; Receives a measured value of the power consumption of the first device from the first device using the first connector and the second communication channel; A system, characterized in that at least a part of the first power allocation is reallocated to the second device based on the measured value.

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