Semiconductor device and semiconductor system

The semiconductor device addresses crystal defects and leakage current issues in α-Ga2O3 semiconductor devices by incorporating an insulator layer with a taper angle of 10° or less, enhancing semiconductor performance and reducing losses.

JP7699341B2Active Publication Date: 2025-06-27FLOSFIA
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Patent Information

Application Number
JP2021533091
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2019-07-16
Filing Date
2020-07-15
Publication Date
2025-06-27
Estimated Expiration
2040-07-15

AI Technical Summary

Technical Problem

Semiconductor devices using α-Ga2O3 as a semiconductor face issues such as crystal defects due to stress concentration under the end of the field insulating film, impaired semiconductor characteristics, and leakage current problems when conventional electrode configurations are applied.

Method used

A semiconductor device is designed with a semiconductor layer, a Schottky electrode, and an insulator layer where the insulator layer has a taper angle of 10° or less, eliminating crystal defects and enhancing depletion layer extension, while suppressing leakage current.

Benefits of technology

The proposed solution effectively improves crystal defects and extends the depletion layer in the semiconductor device, achieving low loss and suppressed leakage current, thereby addressing the limitations of existing semiconductor devices using α-Ga2O3.

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Abstract

Provided is a semiconductor device that is particularly useful as a power device and achieves improvement in crystal defects that are caused by stress concentration in a semiconductor layer that is caused by an insulator film. A semiconductor device that comprises at least a semiconductor layer, a Schottky electrode, and an insulator layer that is provided between the Schottky electrode and a portion of the semiconductor layer. The semiconductor layer includes a crystalline oxide semiconductor, and the insulator layer has a taper angle of no more than 10°.
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Description

Technical Field

[0001] The present invention relates to a semiconductor device useful as a power device or the like and a semiconductor system using the semiconductor device.

Background Art

[0002] Gallium oxide (Ga2O3) is a transparent semiconductor having a wide bandgap of 4.8 - 5.3 eV at room temperature and hardly absorbs visible light and ultraviolet light. Therefore, it is a promising material particularly for use in optoelectronic devices operating in the deep ultraviolet region and transparent electronics. In recent years, development of photodetectors, light-emitting diodes (LEDs), and transistors based on gallium oxide (Ga2O3) has been carried out (see Non-Patent Document 1).

[0003] In addition, gallium oxide (Ga2O3) has five crystal structures: α, β, γ, σ, and ε. Generally, the most stable structure is β-Ga2O3. However, since β-Ga2O3 has a β-gallia structure, it is generally different from the crystal systems used in electronic materials and the like, and its use in semiconductor devices is not necessarily suitable. Also, the growth of β-Ga2O3 thin films requires a high substrate temperature and a high degree of vacuum, which also increases the manufacturing cost. As described in Non-Patent Document 2, in β-Ga2O3, even a dopant (Si) with a high concentration (for example, 1×10 19 / cm 3 or more) could not be used as a donor unless annealed at a high temperature of 800°C to 1100°C after ion implantation. On the other hand, α-Ga2O3 has the same crystal structure as the already widely used sapphire substrate, so it is suitable for use in optoelectronic devices. Furthermore, since it has a wider bandgap than β-Ga2O3, it is particularly useful for power devices. Therefore, there is a situation where a semiconductor device using α-Ga2O3 as a semiconductor is eagerly awaited.

[0004] Patent Documents 1 and 2 describe semiconductor devices using β-Ga2O3 as a semiconductor and using a two-layer structure consisting of a Ti layer and an Au layer, a three-layer structure consisting of a Ti layer, an Al layer, and an Au layer, or a four-layer structure consisting of a Ti layer, an Al layer, a Ni layer, and an Au layer as electrodes that provide ohmic characteristics compatible with this material. Patent Document 3 also describes semiconductor devices using β-Ga2O3 as a semiconductor and using either Au, Pt, or a laminate of Ni and Au as electrodes that provide Schottky characteristics compatible with this material. However, when the electrodes described in Patent Documents 1 to 3 are applied to semiconductor devices using α-Ga2O3 as a semiconductor, there are problems such as not functioning as Schottky electrodes or ohmic electrodes, the electrodes not bonding to the film, or the semiconductor characteristics being impaired. Furthermore, the electrode configurations described in Patent Documents 1 to 3 have not been able to obtain a practically satisfactory semiconductor device, such as leakage current occurring from the electrode ends.

[0005] Patent Document 4 examines semiconductor devices using α-Ga2O3 as a semiconductor and using an electrode containing at least one metal selected from Groups 4 to 9 of the periodic table as a Schottky electrode. Note that Patent Document 4 relates to a patent application by the present applicant.

[0006] Semiconductor devices using a field insulating film to exhibit the semiconductor characteristics (such as breakdown voltage) of α-Ga2O3 have also been examined (Patent Document 4). However, there are problems such as crystal defects due to stress concentration occurring in the semiconductor layer of α-Ga2O3 under the end of the field insulating film, and the depletion layer not extending due to these crystal defects.

Prior Art Documents

Patent Documents

[0007]

Patent Document 1

Patent Document 2

Patent Document 3

Patent Document 4

Non-Patent Document

[0008]

Non-Patent Document 1

Non-Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0009] An object of the present invention is to provide a semiconductor device in which crystal defects due to stress concentration in a semiconductor layer under an end portion of an insulator layer are improved.

Means for Solving the Problems

[0010] As a result of intensive studies to achieve the above object, the present inventors have found that a semiconductor device including at least a semiconductor layer, a Schottky electrode, and an insulator layer, wherein the insulator layer is provided between a part of the semiconductor layer and the Schottky electrode, the semiconductor layer includes a crystalline oxide semiconductor, and the insulator layer has a taper angle of 10° or less, has no crystal defects due to stress concentration in the semiconductor layer under the end portion of the insulator layer, can extend a depletion layer well in the semiconductor layer, and has low loss with suppressed leakage current, and has found that the above-described conventional problems can be solved all at once. Further, after obtaining the above findings, the present inventors have completed the present invention through further repeated studies.

[0011] That is, the present invention relates to the following inventions. [1] A semiconductor device including at least a semiconductor layer, a Schottky electrode, and an insulator layer, wherein the insulator layer is provided between a part of the semiconductor layer and the Schottky electrode, the semiconductor layer includes a crystalline oxide semiconductor, and the insulator layer has a taper angle of 10° or less. [2] The semiconductor device according to [1], wherein the crystalline oxide semiconductor contains a Group 13 metal of the periodic table. [3] The semiconductor device according to [1] or [2], wherein the crystalline oxide semiconductor contains at least one metal selected from aluminum, indium, and gallium. [4] The semiconductor device according to any one of [1] to [3], wherein the crystalline oxide semiconductor contains at least gallium. [5] The semiconductor device according to any one of [1] to [4], wherein the crystalline oxide semiconductor has a corundum structure. [6] The semiconductor device according to any one of [1] to [5], wherein at least a part of the insulator layer has a thickness of 1 μm or more. [7] The semiconductor device according to any one of [1] to [6], wherein the taper of the insulator layer has a decreasing film thickness toward the inside of the semiconductor device. [8] The semiconductor device according to any one of [1] to [7], wherein the Schottky electrode has a structure in which the film thickness decreases toward the outside of the semiconductor device. [9] The semiconductor device according to [8], wherein the Schottky electrode has a taper angle.

[10] The semiconductor device according to any one of [1] to [9], which is a power device.

[11] The semiconductor device according to any one of [1] to

[10] , which is a Schottky barrier diode.

[12] A semiconductor system including a semiconductor device, wherein the semiconductor device is the semiconductor device according to any one of [1] to

[11] .

Effect of the Invention

[0012] In the semiconductor device of the present invention, crystal defects due to stress concentration in the semiconductor layer under the end of the insulator layer are improved.

Brief Description of the Drawings

[0013]

Figure 1

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Figure 14

Embodiments for Carrying Out the Invention

[0014] The semiconductor device of the present invention is a semiconductor device including at least a semiconductor layer, a Schottky electrode, and an insulator layer, wherein the insulator layer is provided between a part of the semiconductor layer and the Schottky electrode, the semiconductor layer includes a crystalline oxide semiconductor, and the insulator layer is characterized by having a taper angle of 10° or less. Here, the taper angle means the inclination angle formed by the side surface (the surface facing the surface of the insulator layer in contact with the semiconductor layer) and the bottom surface (the surface of the insulator layer in contact with the semiconductor layer) when the taper portion is observed from a direction perpendicular to its cross-section (a plane perpendicular to the surface of the insulator layer).

[0015] The insulating layer (hereinafter also referred to as "insulating film") is not particularly limited as long as it has insulating properties and may be a known insulating layer. In the present invention, it is preferable that the insulating film is a film containing Si or Al, and more preferably a film containing Si. As the film containing Si, a silicon oxide-based film is a preferable example. Examples of the silicon oxide-based film include SiO2 film, phosphorus-added SiO2 (PSG) film, boron-added SiO2 film, phosphorus-boron-added SiO2 film (BPSG film), SiOC film, SiOF film, and the like. Examples of the film containing Al include Al2O3 film, AlGaO film, InAlGaO film, AlInZnGaO4 film, AlN film, and the like. The means for forming the insulating film is not particularly limited, and examples include CVD method, atmospheric pressure CVD method, plasma CVD method, mist CVD method, sputtering method, and the like. In the present invention, it is preferable that the means for forming the insulating film is the mist CVD method, plasma CVD method, or atmospheric pressure CVD method. Also, the film thickness of the insulating film is not particularly limited, but it is preferable that at least a part of the film thickness of the insulating film is 1 μm or more. According to the present invention, even when such a thick insulating film is laminated on the semiconductor layer, a semiconductor device without crystal defects due to stress concentration in the semiconductor layer can be more preferably obtained.

[0016] The insulating film has a taper angle of 10° or less, but the means for forming such a taper angle is not particularly limited, and in the present invention, the taper angle can be formed according to a conventional method. As a preferable means for forming the taper angle, for example, a thin film having an etching rate faster than that of the insulating film is formed on the insulating film, then a resist is applied on the thin film, and the taper angle is formed by photolithography and etching. In the present invention, the lower limit of the taper angle is not particularly limited, but preferably it is 0.2°, more preferably 1.0°, and most preferably 2.2°.

[0017] The semiconductor layer (hereinafter also referred to as "semiconductor film") is not particularly limited as long as it contains a crystalline oxide semiconductor. However, in the present invention, it is preferable that the semiconductor layer mainly contains a crystalline oxide semiconductor. Further, in the present invention, it is preferable that the crystalline oxide semiconductor contains one or more metals selected from Group 9 (e.g., cobalt, rhodium, or iridium, etc.) and Group 13 (e.g., aluminum, gallium, or indium, etc.) of the periodic table. Examples of the crystalline oxide semiconductor include metal oxides containing one or more metals selected from aluminum, gallium, indium, rhodium, cobalt, and iridium. In the present invention, it is preferable that the crystalline oxide semiconductor contains a Group 13 metal of the periodic table, more preferably contains at least one metal selected from aluminum, indium, and gallium, and most preferably contains at least gallium. The crystal structure of the crystalline oxide semiconductor is also not particularly limited. Examples of the crystal structure of the crystalline oxide semiconductor include a corundum structure, a β-gallium structure, or a hexagonal crystal structure (e.g., ε-type structure, etc.). In the present invention, it is preferable that the crystalline oxide semiconductor has a corundum structure. Note that "main component" means that the crystalline oxide semiconductor is preferably contained in an atomic ratio of 50% or more, more preferably 70% or more, still more preferably 90% or more, and may be 100% with respect to all components of the semiconductor layer. Also, the thickness of the semiconductor layer is not particularly limited and may be 1 μm or less or 1 μm or more. However, in the present invention, it is preferably 1 μm or more, and more preferably 10 μm or more. The surface area of the semiconductor film is not particularly limited, but it may be 1 mm 2 or more, or it may be 1 mm 2 or less. However, it is preferably 10 mm 2 to 300 cm 2 , and more preferably 100 mm 2 to 100 cm 2It is more preferable. Further, the semiconductor layer is usually single-crystalline, but may be polycrystalline. Further, the semiconductor layer is a multilayer film including at least a first semiconductor layer and a second semiconductor layer. When a Schottky electrode is provided on the first semiconductor layer, it is also preferable that the carrier density of the first semiconductor layer is smaller than the carrier density of the second semiconductor layer. In this case, the second semiconductor layer usually contains a dopant, and the carrier density of the semiconductor layer can be appropriately set by adjusting the doping amount.

[0018] It is preferable that the semiconductor layer contains a dopant. The dopant is not particularly limited and may be a known one. Examples of the dopant include n-type dopants such as tin, germanium, silicon, titanium, zirconium, vanadium or niobium, or p-type dopants such as magnesium, calcium, zinc, etc. In the present invention, it is preferable that the n-type dopant is Sn, Ge or Si. The content of the dopant is preferably 0.00001 atomic% or more, more preferably 0.00001 atomic% to 20 atomic%, and most preferably 0.00001 atomic% to 10 atomic% in the composition of the semiconductor layer. More specifically, the concentration of the dopant is usually about 1×10 16 / cm 3 ~1×10 22 / cm 3 It may be, or the concentration of the dopant may be, for example, about 1×10 17 / cm 3 or less at a low concentration. Further, according to the present invention, the dopant may be contained at a high concentration of about 1×10 20 / cm 3 or more. Also, the concentration of the fixed charge of the semiconductor layer is not particularly limited, but in the present invention, it is preferably 1×10 17 / cm 3 or less because the semiconductor layer can form a depletion layer better.

[0019] The semiconductor layer may be formed by known means. Examples of the means for forming the semiconductor layer include, for example, CVD method, MOCVD method, MOVPE method, mist CVD method, mist epitaxy method, MBE method, HVPE method, pulse growth method, or ALD method. In the present invention, it is preferable that the means for forming the semiconductor layer is the mist CVD method or the mist epitaxy method. In the mist CVD method or the mist epitaxy method, for example, a raw material solution is atomized (atomization step), the droplets are suspended, and after atomization, the obtained atomized droplets are transported to the substrate with a carrier gas (transport step), and then the atomized droplets are thermally reacted in the vicinity of the substrate to form a semiconductor layer by laminating a semiconductor film containing a crystalline oxide semiconductor as a main component on the substrate (film formation step).

[0020] (Atomization step) In the atomization step, the raw material solution is atomized. The atomization means of the raw material solution is not particularly limited as long as it can atomize the raw material solution and may be known means, but in the present invention, atomization means using ultrasonic waves is preferable. The atomized droplets obtained using ultrasonic waves have an initial velocity of zero and float in the air, so they are preferable. For example, instead of spraying like a spray, they are a mist that can float in space and be transported as a gas, so there is no damage due to collision energy, which is very suitable. The droplet size is not particularly limited and may be droplets of about several mm, but is preferably 50 μm or less, and more preferably 100 nm to 10 μm.

[0021] (Raw material solution) The raw material solution is not particularly limited as long as it can be atomized or made into droplets and contains a raw material capable of forming a semiconductor film, and may be an inorganic material or an organic material. In the present invention, it is preferable that the raw material is a metal or a metal compound, and more preferably contains one or more metals selected from aluminum, gallium, indium, iron, chromium, vanadium, titanium, rhodium, nickel, cobalt, and iridium.

[0022] In the present invention, as the raw material solution, a solution or dispersion obtained by dissolving or dispersing the metal in an organic solvent or water in the form of a complex or a salt can be preferably used. Examples of the form of the complex include acetylacetonate complex, carbonyl complex, ammine complex, hydride complex, and the like. Examples of the form of the salt include organometallic salts (such as metal acetates, metal oxalates, metal citrates, etc.), metal sulfide salts, metal nitrate salts, metal phosphate salts, metal halide salts (such as metal chloride salts, metal bromide salts, metal iodide salts, etc.), and the like.

[0023] Further, it is preferable to mix additives such as hydrohalic acids and oxidants in the raw material solution. Examples of the hydrohalic acid include hydrobromic acid, hydrochloric acid, hydroiodic acid, etc. Among them, hydrobromic acid or hydroiodic acid is preferable because the generation of abnormal grains can be more efficiently suppressed. Examples of the oxidant include peroxides such as hydrogen peroxide (H2O2), sodium peroxide (Na2O2), barium peroxide (BaO2), benzoyl peroxide (C6H5CO)2O2, hypochlorous acid (HClO), perchloric acid, nitric acid, ozone water, organic peroxides such as peracetic acid and nitrobenzene, and the like.

[0024] The raw material solution may contain a dopant. By including a dopant in the raw material solution, doping can be performed well. The dopant is not particularly limited as long as it does not inhibit the object of the present invention. Examples of the dopant include n-type dopants such as tin, germanium, silicon, titanium, zirconium, vanadium, or niobium, or p-type dopants such as Mg, H, Li, Na, K, Rb, Cs, Fr, Be, Ca, Sr, Ba, Ra, Mn, Fe, Co, Ni, Pd, Cu, Ag, Au, Zn, Cd, Hg, Ti, Pb, N, or P. The content of the dopant is appropriately set by using a calibration curve showing the relationship between the concentration of the dopant in the raw material and the desired carrier density.

[0025] The solvent of the raw material solution is not particularly limited and may be an inorganic solvent such as water, an organic solvent such as alcohol, or a mixed solvent of an inorganic solvent and an organic solvent. In the present invention, it is preferable that the solvent contains water, and more preferably, it is water or a mixed solvent of water and alcohol.

[0026] (Transportation step) In the transportation step, the atomized droplets are transported into the film-forming chamber with a carrier gas. The carrier gas is not particularly limited as long as it does not inhibit the object of the present invention. For example, oxygen, ozone, an inert gas such as nitrogen or argon, or a reducing gas such as hydrogen gas or forming gas are preferable examples. Also, the type of the carrier gas may be one type, but may also be two or more types. A dilution gas with a reduced flow rate (for example, a 10-fold dilution gas, etc.) may be further used as the second carrier gas. Also, the supply location of the carrier gas is not limited to only one location, but may be two or more locations. The flow rate of the carrier gas is not particularly limited, but is preferably 0.01 to 20 L / min, and more preferably 1 to 10 L / min. In the case of the dilution gas, the flow rate of the dilution gas is preferably 0.001 to 2 L / min, and more preferably 0.1 to 1 L / min.

[0027] (Film-forming step) In the film formation step, the semiconductor film is formed on the substrate by causing the atomized droplets to undergo a thermal reaction in the vicinity of the substrate. The thermal reaction only requires the atomized droplets to react with heat, and the reaction conditions and the like are not particularly limited as long as they do not impede the object of the present invention. In this step, the thermal reaction is usually carried out at a temperature equal to or higher than the evaporation temperature of the solvent, but preferably at a temperature not too high (for example, 1000 ° C) or lower, more preferably 650 ° C or lower, and most preferably 300 ° C to 650 ° C. Further, the thermal reaction may be carried out under any atmosphere of vacuum, non-oxygen atmosphere (for example, inert gas atmosphere, etc.), reducing gas atmosphere and oxygen atmosphere as long as it does not impede the object of the present invention, but it is preferably carried out under an inert gas atmosphere or an oxygen atmosphere. Further, it may be carried out under any conditions of atmospheric pressure, pressure and reduced pressure, but in the present invention, it is preferably carried out under atmospheric pressure. Note that the film thickness can be set by adjusting the film formation time.

[0028] (Substrate) The substrate is not particularly limited as long as it can support the semiconductor film. The material of the substrate is also not particularly limited as long as it does not impede the object of the present invention, and it may be a known substrate, an organic compound, or an inorganic compound. The shape of the substrate may be any shape and is effective for any shape. For example, plate-like shapes such as flat plates and disks, fibrous shapes, rod-like shapes, cylindrical shapes, prismatic shapes, tubular shapes, spiral shapes, spherical shapes, ring shapes, etc. can be mentioned. In the present invention, a substrate is preferred. The thickness of the substrate is not particularly limited in the present invention.

[0029] The substrate is plate-shaped and is not particularly limited as long as it can serve as a support for the semiconductor film. It may be an insulator substrate, a semiconductor substrate, a metal substrate, or a conductive substrate. However, it is preferable that the substrate is an insulator substrate, and it is also preferable that the substrate has a metal film on its surface. Examples of the substrate include a base substrate mainly composed of a substrate material having a corundum structure, a base substrate mainly composed of a substrate material having a β-gallia structure, and a base substrate mainly composed of a substrate material having a hexagonal crystal structure. Here, "main component" means that the substrate material having the specific crystal structure is preferably contained at 50% or more, more preferably 70% or more, still more preferably 90% or more, by atomic ratio, with respect to all components of the substrate material, and it may be 100%.

[0030] The substrate material is not particularly limited as long as it does not inhibit the object of the present invention and may be a known one. Examples of the substrate material having a corundum structure include α-Al2O3 (sapphire substrate) or α-Ga2O3, and more preferable examples include an a-plane sapphire substrate, an m-plane sapphire substrate, an r-plane sapphire substrate, a c-plane sapphire substrate, and an α-type gallium oxide substrate (a-plane, m-plane, or r-plane). Examples of the base substrate mainly composed of a substrate material having a β-gallia structure include a β-Ga2O3 substrate or a mixed crystal substrate containing Ga2O3 and Al2O3 and having Al2O3 more than 0 wt% and 60 wt% or less. Examples of the base substrate mainly composed of a substrate material having a hexagonal crystal structure include a SiC substrate, a ZnO substrate, and a GaN substrate.

[0031] In the present invention, annealing treatment may be performed after the film formation step. The annealing treatment temperature is not particularly limited as long as it does not inhibit the object of the present invention, and is usually 300°C to 650°C, preferably 350°C to 550°C. Also, the annealing treatment time is usually 1 minute to 48 hours, preferably 10 minutes to 24 hours, and more preferably 30 minutes to 12 hours. Note that the annealing treatment may be performed in any atmosphere as long as it does not inhibit the object of the present invention. It may be in a non-oxygen atmosphere or in an oxygen atmosphere. Examples of the non-oxygen atmosphere include an inert gas atmosphere (for example, a nitrogen atmosphere) or a reducing gas atmosphere, etc. In the present invention, an inert gas atmosphere is preferred, and a nitrogen atmosphere is more preferred.

[0032] Also, in the present invention, the semiconductor film may be provided directly on the substrate, or the semiconductor film may be provided via other layers such as a stress relaxation layer (for example, a buffer layer, an ELO layer, etc.), a sacrificial release layer, etc. The forming means of each layer is not particularly limited and may be a known means, but in the present invention, the mist CVD method is preferred.

[0033] In the present invention, after using known means such as peeling the semiconductor film from the substrate or the like, it may be used as the semiconductor layer in a semiconductor device, or it may be directly used as the semiconductor layer in a semiconductor device.

[0034] The Schottky electrode (hereinafter also referred to as the "electrode layer") has conductivity and is not particularly limited as long as it can be used as a Schottky electrode and does not inhibit the object of the present invention. The constituent material of the electrode layer may be a conductive inorganic material or a conductive organic material. In the present invention, the material of the electrode is preferably a metal. Suitable examples of the metal include at least one metal selected from Groups 4 to 10 of the periodic table. Examples of the metal of Group 4 of the periodic table include titanium (Ti), zirconium (Zr), hafnium (Hf), etc. Examples of the metal of Group 5 of the periodic table include vanadium (V), niobium (Nb), tantalum (Ta), etc. Examples of the metal of Group 6 of the periodic table include chromium (Cr), molybdenum (Mo), and tungsten (W), etc. Examples of the metal of Group 7 of the periodic table include manganese (Mn), technetium (Tc), rhenium (Re), etc. Examples of the metal of Group 8 of the periodic table include iron (Fe), ruthenium (Ru), osmium (Os), etc. Examples of the metal of Group 9 of the periodic table include cobalt (Co), rhodium (Rh), iridium (Ir), etc. Examples of the metal of Group 10 of the periodic table include nickel (Ni), palladium (Pd), platinum (Pt), etc. In the present invention, it is preferable that the electrode layer contains at least one metal selected from Groups 4 and 9 of the periodic table, and more preferably contains a metal of Group 9 of the periodic table. The layer thickness of the electrode layer is not particularly limited, but is preferably 0.1 nm to 10 μm, more preferably 5 nm to 500 nm, and most preferably 10 nm to 200 nm. Also, in the present invention, it is preferable that the electrode layer is composed of two or more layers having different compositions from each other. By configuring the electrode layer in such a preferable manner, not only can a semiconductor device with more excellent Schottky characteristics be obtained, but also the effect of suppressing leakage current can be more favorably exhibited.

[0035] When the electrode layer is composed of two or more layers including a first electrode layer and a second electrode layer, the second electrode layer preferably has conductivity and a higher conductivity than the first electrode layer. The constituent material of the second electrode layer may be a conductive inorganic material or a conductive organic material. In the present invention, the material of the second electrode is preferably a metal. In the present invention, the material of the second electrode is preferably a metal. As the metal, preferably, for example, at least one metal selected from Group 8 to Group 13 of the periodic table can be mentioned. As the metals of Group 8 to Group 10 of the periodic table, the metals respectively exemplified as the metals of Group 8 to Group 10 of the periodic table in the description of the electrode layer can be mentioned. As the Group 11 metals of the periodic table, for example, copper (Cu), silver (Ag), gold (Au), etc. can be mentioned. As the Group 12 metals of the periodic table, for example, zinc (Zn), cadmium (Cd), etc. can be mentioned. Further, as the Group 13 metals of the periodic table, for example, aluminum (Al), gallium (Ga), indium (In), etc. can be mentioned. In the present invention, the second electrode layer preferably contains at least one metal selected from Group 11 and Group 13 metals of the periodic table, and more preferably contains at least one metal selected from silver, copper, gold, and aluminum. The layer thickness of the second electrode layer is not particularly limited, but is preferably 1 nm to 500 μm, more preferably 10 nm to 100 μm, and most preferably 0.5 μm to 10 μm. In the present invention, it is preferable that the film thickness of the insulator film under the outer end portion of the electrode layer is thicker than the film thickness of the insulator film from the opening to a distance of 1 μm, because the breakdown voltage characteristics of the semiconductor device can be made more excellent.

[0036] The forming means of the electrode layer is not particularly limited and may be a known means. Specifically, as the forming means of the electrode layer, for example, a dry method or a wet method can be mentioned. Examples of the dry method include sputtering, vacuum evaporation, CVD, etc. Examples of the wet method include screen printing, die coating, etc.

[0037] In the present invention, it is preferable that the Schottky electrode has a structure in which the film thickness decreases toward the outside of the semiconductor device. In this case, the Schottky electrode may have a taper angle, or the Schottky electrode may be composed of two or more layers including a first electrode layer and a second electrode layer, and the outer end portion of the first electrode layer may be located outside the outer end portion of the second electrode layer. In the present invention, when the Schottky electrode has a taper angle, such a taper angle is not particularly limited as long as it does not impede the object of the present invention, but is preferably 80° or less, more preferably 60° or less, and most preferably 40° or less. The lower limit of the taper angle is also not particularly limited, but is preferably 0.2°, more preferably 1°. Further, in the present invention, when the outer end portion of the first electrode layer is located outside the outer end portion of the second electrode layer, the distance between the outer end portion of the first electrode layer and the outer end portion of the second electrode layer is preferably 1 μm or more because the leakage current can be more effectively suppressed. Further, in the present invention, it is also preferable that at least a part of the portion of the first electrode layer that protrudes outside the outer end portion of the second electrode layer (hereinafter also referred to as the "protruding portion") has a structure in which the film thickness decreases toward the outside of the semiconductor device because the withstand voltage of the semiconductor device can be made more excellent. Further, by combining such a preferable electrode configuration with the above-described preferable constituent material of the semiconductor layer, a semiconductor device with better suppressed leakage current and lower loss can be obtained.

Example

[0038] Hereinafter, preferred embodiments of the present invention will be described in more detail with reference to the drawings, but the present invention is not limited to these embodiments.

[0039] FIG. 1 shows the main part of a Schottky barrier diode (SBD) which is one of the preferred embodiments of the present invention. The SBD of FIG. 1 includes an ohmic electrode 102, an n-type semiconductor layer 101a, an n+-type semiconductor layer 101b, Schottky electrodes 103a and 103b, and an insulator film 104. Here, the insulator film 104 has a taper angle of 10° with a decreasing film thickness toward the inside of the semiconductor device. Further, the insulator film 104 has an opening and is provided between a part of the n-type semiconductor layer 101a and the Schottky electrodes 103a and 103b. The semiconductor device of FIG. 1 can improve the crystal defects at the ends, form a depletion layer better, further improve the electric field relaxation, and better suppress the leakage current due to the insulator film 104. Also, examples in the cases where the taper angles of the insulator film 104 are 6.3° and 3.3° are shown in FIGS. 2 and 3, respectively.

[0040] FIG. 4 shows the main part of a Schottky barrier diode (SBD) which is one of the preferred embodiments of the present invention. The SBD of FIG. 4 is different from the SBD of FIG. 1 in that the Schottky electrode 103 is composed of a metal layer 103a, a metal layer 103b, and a metal layer 103c. In the semiconductor device of FIG. 4, since the outer ends of the metal layer 103b and / or the metal layer 103c as the first electrode layer are located outside the outer ends of the metal layer 103a as the second electrode layer, the leakage current can be suppressed better. Furthermore, since the part of the metal layer 103b and / or the metal layer 103c that protrudes outside the outer end of the metal layer 103a has a taper region with a decreasing film thickness toward the outside of the semiconductor device, it has a structure with better breakdown voltage resistance.

[0041] Examples of the constituent material of the metal layer 103a include the above-described metals exemplified as the constituent material of the second electrode layer. Further, examples of the constituent material of the metal layer 103b and the metal layer 103c include the above-described metals exemplified as the constituent material of the first electrode layer. The forming means of each layer in FIG. 1 is not particularly limited as long as it does not inhibit the object of the present invention, and may be a known means. For example, after film formation by a vacuum evaporation method, a CVD method, a sputtering method, various coating techniques, means of patterning by a photolithography method, or means of directly patterning using a printing technique or the like can be mentioned.

[0042] Hereinafter, the preferred manufacturing process of the SBD in FIG. 4 will be described, but the present invention is not limited to these preferred manufacturing methods. FIG. 5(a) shows an insulator film 104 laminated on the n-type semiconductor layer 101a of a laminate of an ohmic electrode 102, an n-type semiconductor layer 101a, and an n+-type semiconductor layer 101b. As the insulator layer 104, preferably, for example, a SiO2 film obtained by the PECVD method can be mentioned. A thin film 106 having an etching rate faster than that of the insulator film 104 is laminated on the laminate of FIG. 5(a) to obtain the laminate of FIG. 5(b). Examples of the thin film having a fast etching rate include a SiO2 thin film obtained by the SOG method, a SiO2 thin film doped with phosphorus (PSG), and the like. The thickness of the thin film 106 is not particularly limited, but for example, it may be 1 μm or less. By appropriately adjusting the material and film thickness of the thin film 106, a desired taper angle can be obtained. Here, in order to obtain a desired taper angle, it is important to laminate the insulator film 104 and the thin film 106 having an etching rate faster than that of the insulator film 104 in this order. A resist 107 is laminated on the laminate of FIG. 5(b) to obtain the laminate of FIG. 5(c). Further, the laminate of FIG. 6(d) is obtained by photolithography and etching on the laminate of FIG. 5(c). The photolithography method and the etching method may each be a known method. Examples of the etching method include a dry etching method or a wet etching method. By further performing etching to remove the resist 107 and the thin film 106 on the laminate of FIG. 6(d), the laminate of FIG. 6(e) is obtained. The taper angle of the insulator film 104 in FIG. 6(e) is 10°. In the present invention, it is important to make the taper angle 10° or less. For example, when a laminate is obtained with a taper angle of 45°, as shown in FIG. 11, there is a problem that crystal defects occur. That is, defects are scattered inside the semiconductor layer 101a near the end of the tapered portion of the insulator film 104 in the figure. On the other hand, no defects are found in the region away from the tapered portion of the insulator film 104 (near the right end of the figure) or in the region where there is no insulator film (near the left end of the figure).This defect is considered to be caused by a large difference in the linear thermal expansion coefficient between the insulator film 104 and the semiconductor layer 101a, resulting in a large stress occurring at locations where the mechanical stress generated during the formation of the insulator film 104 or other heat treatment processes changes significantly. In order to reduce such changes in mechanical stress and make it difficult for defects to occur, it is essential to set the taper angle to 10° or less. This problem is a new finding obtained by the inventors through their research.

[0043] Next, metal layers 103a, 103b, and 103c are formed on the laminate of FIG. 6(e) using the dry method or the wet method to obtain the laminate of FIG. 7(f). Thereafter, an extra portion among the metal layer 103a, the metal layer 103b, and the metal layer 103c is removed using a known etching technique to obtain the laminate of FIG. 7(g). In this etching, for example, it is preferable to form the outer end portion of the first electrode to have a tapered shape by etching while retracting the resist. The semiconductor device obtained as described above has a configuration in which crystal defects at the end portions are improved, a depletion layer is formed more favorably, electric field relaxation is further improved, and leakage current can be suppressed more favorably.

[0044] In the SBD of FIG. 7(g), when an α-Ga2O3 layer is used as the n-type semiconductor layer 101a and SiO2 films (taper angles = 2.2°, 3.3°, 6.3°, 10°, 20°, 45°) are used as the insulator film 104, the relationship between the horizontal position of the reverse current (@Vr = 0 to 720 V) at a temperature of 300 K and the surface electric field of the α-Ga2O3 layer was evaluated by simulation. The evaluation results are shown in FIG. 12. As is clear from FIG. 12, compared with the case of using an SiO2 film having a taper angle of 45°, in the case of using an SiO2 film having a taper angle of 2.2° to 20°, the electric field concentration in the surface electric field is significantly alleviated, and it can be seen that in the case of using an SiO2 film having a taper angle of 2.2° to 10°, the electric field concentration in the surface electric field is even more significantly alleviated. Also, in this simulation, the results for the case of using an SiO2 film having a taper angle of 45° are shown in FIG. 12, but as described above, there is a problem that crystal defects occur, and the electric field concentration shown in the simulation further deteriorates. Further, when SiO2 films (taper angles = 3.3°, 6.3°, 10°) are used as the insulator film 104, the potential distribution at 600 V at a temperature of 300 K was evaluated by simulation. The evaluation results are shown in FIG. 13. As is clear from FIG. 13, it can be seen that in the case of using SiO2 films having taper angles of 3.3°, 6.3°, and 10°, the electric field relaxation is good.

[0045] In the SBD of FIG. 4, Al was used as the metal layer 103a of the Schottky electrode, Ti as the metal layer 103b, and Co as the metal layer 103c. An α-Ga2O3 layer was used as the n-type semiconductor layer 101a and the n+-type semiconductor layer 101b, respectively, an SiO2 film was used as the dielectric film 104, and a Ti / Ni / Au laminate was used as the ohmic electrode 102 to fabricate an SBD, and I-V measurement was performed. The results of the I-V measurement in which the current value on the vertical axis was normalized by the current value at a reverse applied voltage of -200 V are shown in FIG. 14. As an example, the I-V measurement results of the SBD fabricated by forming a tapered portion so that the taper angle θ is 10° are shown in FIG. 14(a), and as a comparative example, the I-V measurement results of the SBD fabricated by forming a tapered portion so that the taper angle θ is 45° are shown in FIG. 14(b). The vertical axis has a logarithmic scale. As is clear from FIGS. 14(a) and 14(b), it was found that the leakage current was significantly suppressed in the case of the product of this example.

[0046] The semiconductor device is particularly useful for power devices. Examples of the semiconductor device include, for example, diodes (e.g., PN diodes, Schottky barrier diodes, junction barrier Schottky diodes, etc.) or transistors (e.g., MOSFETs, MESFETs, etc.). Among them, diodes are preferred, and Schottky barrier diodes (SBDs) are more preferred.

[0047] In addition to the above-described matters, the semiconductor device of the present invention can be suitably used as a power module, an inverter, or a converter by using known means, and further, for example, it can be suitably used in a semiconductor system using a power supply device. The power supply device can be produced from or as the semiconductor device by connecting it to a wiring pattern or the like using known means. An example of a power supply system is shown in FIG. 8. FIG. 8 shows a power supply system 170 configured using a plurality of the power supply devices 171 and 172 and a control circuit 173. As shown in FIG. 9, the power supply system can be used for a system device 180 by combining an electronic circuit 181 and a power supply system 182. Note that an example of a power supply circuit diagram of the power supply device is shown in FIG. 10. FIG. 10 shows a power supply circuit of a power supply device including a power circuit and a control circuit. After switching a DC voltage at a high frequency by an inverter 192 (configured by MOSFETs A to D) and converting it to AC, insulation and voltage transformation are performed by a transformer 193, and after rectification by a rectifying MOSFET 194 (A to B'), smoothing is performed by a DCL 195 (smoothing coils L1 and L2) and a capacitor, and a DC voltage is output. At this time, the output voltage is compared with a reference voltage by a voltage comparator 197, and the inverter 192 and the rectifying MOSFET 194 are controlled by a PWM control circuit 196 so as to obtain a desired output voltage.

Industrial Applicability

[0048] The semiconductor device of the present invention can be used in various fields such as semiconductors (e.g., compound semiconductor electronic devices), electronic components, electrical equipment components, optical and electrophotographic related devices, and industrial members. In particular, it is useful for power devices.

Explanation of Reference Numerals

[0049] 101a n-type semiconductor layer 101b n+-type semiconductor layer 102 Ohmic electrode 103 Schottky electrode 103a Metal layer 103b Metal layer 103c Metal layer 104 Insulator film 106 Film 107 Resist 170 Power Supply System 171 Power Supply Device 172 Power Supply Device 173 Control Circuit 180 System Device 181 Electronic Circuit 182 Power Supply System 192 Inverter 193 Transformer 194 Rectifying MOSFET 195 DCL 196 PWM Control Circuit 197 Voltage Comparator

Claims

1. A semiconductor device comprising at least a semiconductor layer, a Schottky electrode, and an insulator layer, wherein the insulator layer is provided between a part of the semiconductor layer and the Schottky electrode, the semiconductor layer includes a crystalline oxide semiconductor containing at least gallium, the insulator layer contains Si or Al, at least a part of the insulator layer has a thickness greater than 1 μm, and the insulator layer has a taper angle of 10° or less.

2. A semiconductor device comprising at least a semiconductor layer, a Schottky electrode, and an insulator layer, wherein the insulator layer is provided between a part of the semiconductor layer and the Schottky electrode, the semiconductor layer includes a crystalline oxide semiconductor, the insulator layer has a linear side surface in a cross section perpendicular to the surface of the insulator layer, and the angle formed by the side surface and the bottom surface of the insulator layer is 10° or less.

3. The semiconductor device according to claim 2, wherein the crystalline oxide semiconductor contains at least gallium.

4. The semiconductor device according to claim 2, wherein at least a part of the insulator layer has a thickness greater than 1 μm.

5. The semiconductor device according to any one of claims 1 to 4, wherein the crystalline oxide semiconductor has a corundum structure.

6. The semiconductor device according to any one of claims 1 to 5, wherein the taper of the insulator layer has a decreasing film thickness toward the inside of the semiconductor device.

7. The semiconductor device according to any one of claims 1 to 6, wherein the Schottky electrode has a structure with a decreasing film thickness toward the outside of the semiconductor device.

8. The semiconductor device according to claim 7, wherein the Schottky electrode has a taper angle.

9. The semiconductor device according to any one of claims 1 to 8, which is a power device.

10. The semiconductor device according to any one of claims 1 to 9, which is a Schottky barrier diode.

11. A semiconductor system comprising a semiconductor device, wherein the semiconductor device is the semiconductor device according to any one of claims 1 to 10.

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