Power conversion device
The power conversion device addresses the risk of overcurrent by using a control circuit to determine time ratios for switching elements based on detected voltages and currents, achieving stable operation and preventing damage.
Patent Information
- Application Number
- JP2022021595
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-02-15
- Publication Date
- 2025-06-27
- Estimated Expiration
- 2042-02-15
AI Technical Summary
Conventional power conversion devices lack positive control over reactor currents, leading to a risk of overcurrent and potential damage.
A power conversion device with a control circuit that determines time ratios for switching elements based on detected voltages and currents, ensuring stable control of reactor currents.
The solution enables stable operation of the power conversion device by preventing overcurrent and ensuring stable control of DC voltages across loads.
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Abstract
Description
Technical Field
[0001] The present disclosure relates to a power conversion device.
Background Art
[0002] Conventionally, a power conversion device that achieves miniaturization and high efficiency by including a switching element capable of low-loss and high-speed switching operation is known (see, for example, Patent Document 1). For example, as shown in FIG. 3, the power conversion device 1' includes a DC power supply 10', a leg 31' in which switching elements 41' and 42' that do not turn on simultaneously are connected in series, a leg 32' in which switching elements 43' and 44' that do not turn on simultaneously are connected in series, a load 21' connected in parallel to the leg 31', a load 22' connected in parallel to the leg 32', a reactor 61' connected between the midpoint a of the switching elements 41' and 42' and the terminal c, a reactor 62' connected between the midpoint d of the switching elements 43' and 44' and the terminal b, and a control circuit 80' that determines the duty ratio of the on-time of each switching element.
[0003] Also, the states of the switching elements 41' and 42' are controlled based on complementary operations. That is, if the switching element 41' is on, then 42' is controlled to be off. The reverse is also true. The states of the switching elements 43' and 44' are also controlled based on complementary operations. That is, if the switching element 43' is on, then 44' is off. The reverse is also true.
[0004] The switching element 41' is switched based on the duty ratio d1 of the on-time determined by the following equation. The duty ratio d1 of the on-time is expressed by the following equation using the voltage command value V O1 ref of the voltage between the terminals of the leg 31', the voltage command value V O2 ref of the voltage between the terminals of the leg 32', and the voltage E of the DC power supply 10'. The switching element 42' is switched based on the logical negation of the duty ratio d1 of the on-time.
[0005]
Number
[0006] The switching element 44' is switched and controlled based on the duty ratio d4 of the on-time determined by the following equation. The duty ratio d4 of the on-time is the voltage command value V of the voltage between the terminals of leg 31' O1 ref, the voltage command value V of the voltage between the terminals of leg 32' O2 ref, and the voltage E of the DC power supply 10' are used and expressed by the following equation. The switching element 43' is switched and controlled based on the logical negation of the duty ratio d4 of the on-time.
[0007] [Number]
[0008] Furthermore, the power conversion device 1' detects the current i of the reactor 61' L1 and the current i of the reactor 62' L2 and, after applying a high-pass filter process to each current i L1 , i L2 and multiplying by arbitrary gains K1 and K2, stabilizes the DC voltage V of the load 21' O1 and the DC voltage V of the load 22'. O2
[0009] At this time, the switching element 41' is switched and controlled based on the duty ratio d1' of the on-time determined by the following equation. The duty ratio d1' of the on-time is expressed by the following equation using a HPF that passes the high-frequency component of the current i of the reactor 61' L1 and an arbitrary gain K1.
[0010] [Number]
[0011] At this time, the switching element 44' is switched and controlled based on the duty ratio d4' of the on-time determined by the following equation. The duty ratio d4' of the on-time is the current i of the reactor 62'L2 The HPF that passes the high-frequency component and an arbitrary gain K2 are represented by the following equation.
[0012]
Equation
[0013] Based on equations (3) and (4), the power conversion device 1' controls each switching element to obtain a good DC voltage V O1 , V O2 Therefore, the voltage applied to each switching element can be suppressed within a predetermined range, and miniaturization and high efficiency can be achieved. Here, V O1 is the voltage across the load 21'. Also, V O2 is the voltage across the load 22'. According to equation (3), V O1 is controlled to be equal to V O1 ref. Also, according to equation (4), V O2 is controlled to be equal to V O2 ref.
Prior Art Documents
Patent Documents
[0014]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0015] However, in the conventional power conversion device 1', since the currents in the reactors 61', 62' were not positively controlled, there was a risk of overcurrent occurring in each reactor and causing damage.
[0016] An object of the present invention made in view of such circumstances is to provide a power conversion device capable of stable control.
Means for Solving the Problems
[0017] A power conversion device according to an embodiment includes a first leg in which a first switching element and a second switching element are connected in series, a second leg in which a third switching element and a fourth switching element are connected in series, a first load connected in parallel to the first leg, a second load connected in parallel to the second leg, a first voltage detector that detects a first voltage of the first load and outputs a first voltage signal, a second voltage detector that detects a second voltage of the second load and outputs a second voltage signal, a first midpoint between the first switching element and the second switching element, and a first reactor connected to the third switching element, a second midpoint between the third switching element and the fourth switching element, and a second reactor connected to the second switching element, a first current detector that detects a current of the first reactor and outputs a first current signal, a second current detector that detects a current of the second reactor and outputs a second current signal, and a control circuit that determines a first time ratio of an on-time of the first switching element and a second time ratio of an on-time of the second switching element based on the second voltage signal and the first current signal, and determines a third time ratio of an on-time of the third switching element and a fourth time ratio of an on-time of the fourth switching element based on the first voltage signal and the second current signal. In the power conversion device, a positive terminal of a DC power supply is connected to a terminal of the first switching element that is not connected to the first midpoint, and a cathode terminal of the DC power supply is connected to a terminal of the fourth switching element that is not connected to the second midpoint. The control circuit includes an output voltage command generator that generates an output voltage command, a carrier wave generator that generates a predetermined carrier wave, a first subtractor that calculates a first deviation between the output voltage command and the second voltage signal, a first amplifier that controls to make the first deviation a zero or a value close to zero and generates a first amplified signal, a second subtractor that calculates a second deviation between the first amplified signal and the first current signal, a second amplifier that controls to make the second deviation a zero or a value close to zero and generates a second amplified signal, a first comparator that compares the second amplified signal with the predetermined carrier wave and outputs a first comparison result to the first switching element, and a first logic negation circuit that outputs a logical negation of the first comparison result to the second switching element.A third subtractor that calculates a third deviation between the output voltage command and the first voltage signal, a third amplifier that controls the third deviation to be zero or a value close to zero to generate a third amplified signal, a fourth subtractor that calculates a fourth deviation between the third amplified signal and the second current signal, a fourth amplifier that controls the fourth deviation to be zero or a value close to zero to generate a fourth amplified signal, a second comparator that compares the fourth amplified signal with the predetermined carrier wave and outputs a second comparison result to the fourth switching element, and a second logic inverter circuit that outputs a logical negation of the second comparison result to the third switching element.
Advantages of the Invention
[0018] According to the present invention, a power conversion device capable of stable control can be provided.
Brief Description of the Drawings
[0019]
Figure 1
Figure 2A
Figure 2B
Figure 3
Embodiments for Carrying Out the Invention
[0020] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. The same reference numerals are generally assigned to the same components, and redundant descriptions are omitted.
[0021] <Configuration of Power Conversion Device> With reference to FIG. 1, an example of the configuration of the power conversion device 1 according to the present embodiment will be described.
[0022] The power conversion device 1 includes a DC power supply 10, a first load 21, a second load 22, a first leg 31, a second leg 32, a first reactor 61, a second reactor 62, a first voltage detector 71, a second voltage detector 72, a first current detector 81, a second current detector 82, and a control circuit 2.
[0023] One terminal (for example, the positive terminal) of the DC power supply 10 is connected to one terminal of the first voltage detector 71, one terminal of the first load 21, and one terminal of the first leg 31. Also, the other terminal (for example, the negative terminal) of the DC power supply 10 is connected to the other terminal of the second leg 32, the other terminal of the second load 22, and the other terminal of the second voltage detector 72.
[0024] The configuration of the DC power supply 10 is not particularly limited. For example, it is a battery. When the power conversion device 1 is mounted on a train, the DC power supply 10 corresponds to, for example, the overhead line of the train or the power supply system through which DC power is transmitted.
[0025] The first load 21 is, for example, a capacitive load. The first load 21 is connected in parallel with the first leg 31. For example, one terminal of the first load 21 is connected to one terminal of the first leg 31, and the other terminal is connected to the other terminal of the first leg 31.
[0026] The second load 22 is, for example, a capacitive load. The second load 22 is connected in parallel with the second leg 32. For example, one terminal of the second load 22 is connected to one terminal of the second leg 32, and the other terminal is connected to the other terminal of the second leg 32.
[0027] The first leg 31 preferably includes at least two switching elements. For example, the first leg 31 is configured by connecting a first switching element 41 and a second switching element 42 in series. The first time ratio of the on-time of the first switching element 41 and the second time ratio of the on-time of the second switching element 42 are controlled by the control circuit 2.
[0028] The second leg 32 preferably includes at least two switching elements. The second leg 32 is configured, for example, by connecting a third switching element 43 and a fourth switching element 44 in series. The third time ratio of the on-time of the third switching element 43 and the fourth time ratio of the on-time of the fourth switching element 44 are controlled by the control circuit 2.
[0029] The first switching element 41, the second switching element 42, the third switching element 43, and the fourth switching element 44 may be configured, for example, by connecting an IBGT (Insulated Gate Bipolar Transistor) and a diode in antiparallel. For example, when each switching element is composed of an IBGT, the emitter of the first switching element 41 is connected to the collector of the second switching element 42, and the emitter of the third switching element 43 is connected to the collector of the fourth switching element 44. Note that each switching element is not limited thereto, and may be, for example, an FET (Field Effect Transistor), a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), or the like.
[0030] The first reactor 61 is provided between a first midpoint a provided between the first switching element 41 and the second switching element 42 and the terminal c. One terminal of the first reactor 61 is connected to the first midpoint a, and the other terminal is connected to one terminal of the first current detector 81.
[0031] The second reactor 62 is provided between the terminal b and a second midpoint d provided between the third switching element 43 and the fourth switching element 44. One terminal of the second reactor 62 is connected to the terminal b, and the other terminal is connected to one terminal of the second current detector 82.
[0032] The first voltage detector 71 is connected in parallel with the first load 21. One terminal of the first voltage detector 71 is connected to one terminal of the first load 21 and one terminal of the first leg 31, and the other terminal is connected to the other terminal of the first load 21 and the other terminal of the first leg 31. The first voltage detector 71 detects the voltage (DC voltage) of the first load 21 and outputs a first voltage signal to the control circuit 2.
[0033] The second voltage detector 72 is connected in parallel with the second leg 32. One terminal of the second voltage detector 72 is connected to one terminal of the second load 22 and one terminal of the second leg 32, and the other terminal is connected to the other terminal of the second load 22 and the other terminal of the second leg 32. The second voltage detector 72 detects the voltage (DC voltage) of the second load 22 and outputs a second voltage signal to the control circuit 2.
[0034] The first voltage detector 71 and the second voltage detector 72 may be known voltage sensors for detecting DC voltage, and may be physically configured by, for example, an isolation amplifier or the like.
[0035] One terminal of the first current detector 81 is connected to the other terminal of the first reactor 61, and the other terminal is connected to terminal c. The first current detector 81 detects the current of the first reactor 61 and outputs a first current signal to the control circuit 2.
[0036] One terminal of the second current detector 82 is connected to the other terminal of the second reactor 62, and the other terminal is connected to the second midpoint d. The second current detector 82 detects the current of the second reactor 62 and outputs a second current signal to the control circuit 2.
[0037] The first current detector 81 and the second current detector 82 may be, for example, CT (current transducer).
[0038] Based on the second voltage signal input from the second voltage detector 72 and the first current signal input from the first current detector 81, the control circuit 2 determines the first time ratio of the on-time of the first switching element 41 and the second time ratio of the on-time of the second switching element 42. Also, based on the first voltage signal input from the first voltage detector 71 and the second current signal input from the second current detector 82, the control circuit 2 determines the third time ratio of the on-time of the third switching element 43 and the fourth time ratio of the on-time of the fourth switching element 44.
[0039] The control circuit 2 includes an output voltage command generator 101, a first subtractor 201, a second subtractor 202, a third subtractor 203, a fourth subtractor 204, a first amplifier 301, a second amplifier 302, a third amplifier 303, a fourth amplifier 304, a first comparator 401, a second comparator 402, a carrier wave generator 500, a first logical negation circuit 601, and a second logical negation circuit 602.
[0040] The output voltage command generator 101 generates an output voltage command for controlling the first voltage of the first load 21 and the second voltage of the second load 22 to an arbitrary DC voltage. The output voltage command generator 101 outputs the output voltage command to the first subtractor 201 and the third subtractor 203.
[0041] The carrier wave generator 500 generates a predetermined carrier wave such as a sawtooth wave or a triangular wave, for example. The carrier wave generator 500 outputs the predetermined carrier wave to the first comparator 401 and the second comparator 402.
[0042] The first subtractor 201 calculates the first deviation between the output voltage command input from the output voltage command generator 101 and the second voltage signal input from the second voltage detector 72, and outputs the first deviation to the first amplifier 301.
[0043] The first amplifier 301 may perform, for example, PI control arithmetic operations, generate a first amplified signal that is controlled such that the first deviation input from the first subtractor 201 becomes zero or a value close to zero, and output it to the second subtractor 202. For example, the first amplifier 301 may output, to the second subtractor 202 as the first amplified signal, the sum of an amplification arithmetic result obtained by multiplying the first deviation by a constant and an integration arithmetic result obtained by integrating the first deviation.
[0044] The second subtractor 202 calculates a second deviation between the first amplified signal input from the first amplifier 301 and the first current signal input from the first current detector 81, and outputs the second deviation to the second amplifier 302.
[0045] The second amplifier 302 may perform, for example, PI control arithmetic operations, generate a second amplified signal that is controlled such that the second deviation input from the second subtractor 202 becomes zero or a value close to zero, and output it to the first comparator 401.
[0046] The first comparator 401 compares the second amplified signal input from the second amplifier 302 with a predetermined carrier wave input from the carrier wave generator 500, and outputs the first comparison result to the first switching element 41 and the first logical negation circuit 601. For example, the first comparator 401 compares the magnitudes of the second amplified signal and the predetermined carrier wave, and based on the comparison result, outputs a control signal indicating the time ratio of the on-time controlled by PWM to the first switching element 41 and the first logical negation circuit 601. Thereby, the first time ratio of the on-time of the first switching element 41 is determined, and the open / closed state of the first switching element 41 is controlled.
[0047] The first logical negation circuit 601 outputs the logical negation of the first comparison result input from the first comparator 401 to the second switching element 42. For example, the first logical negation circuit 601 outputs a logical negation signal of a control signal indicating the time ratio of the on-time controlled by PWM to the second switching element 42. Thereby, the second time ratio of the on-time of the second switching element 42 is determined, and the open / closed state of the second switching element 42 is controlled.
[0048] The third subtractor 203 calculates a third deviation between the output voltage command input from the output voltage command generator 101 and the first voltage signal input from the first voltage detector 71, and outputs the third deviation to the third amplifier 303.
[0049] The third amplifier 303 may perform, for example, PI control calculation, generates a third amplified signal controlled such that the third deviation input from the third subtractor 203 becomes zero or a value close to zero, and outputs it to the fourth subtractor 204. For example, the third amplifier 303 may output, as the third amplified signal to the fourth subtractor 204, the sum of an amplification calculation result obtained by multiplying the third deviation by a constant and an integration calculation result obtained by integrating the third deviation.
[0050] The fourth subtractor 204 calculates a fourth deviation between the third amplified signal input from the third amplifier 303 and the second current signal input from the second current detector 82, and outputs the fourth deviation to the fourth amplifier 304.
[0051] The fourth amplifier 304 may perform, for example, PI control calculation, generates a fourth amplified signal controlled such that the fourth deviation input from the fourth subtractor 204 becomes zero or a value close to zero, and outputs it to the second comparator 402.
[0052] The second comparator 402 compares the fourth amplified signal input from the fourth amplifier 304 with a predetermined carrier wave input from the carrier wave generator 500, and outputs the second comparison result to the fourth switching element 44 and the second logic negation circuit 602. For example, the second comparator 402 compares the magnitudes of the fourth amplified signal and the predetermined carrier wave, and based on the comparison result, outputs a control signal indicating the time ratio of the on-time controlled by PWM to the fourth switching element 44 and the second logic negation circuit 602. Thereby, the fourth time ratio of the on-time of the fourth switching element 44 is determined, and the opening and closing state of the fourth switching element 44 is controlled.
[0053] The second logical negation circuit 602 outputs the logical negation of the second comparison result input from the second comparator 402 to the third switching element 43. For example, the second logical negation circuit 602 outputs a logical negation signal of a control signal indicating the duty ratio of the PWM-controlled on-time to the third switching element 43. Thereby, the third duty ratio of the on-time of the third switching element 43 is determined, and the open / closed state of the third switching element 43 is controlled.
[0054] By including the control circuit 2 described above, the power conversion device 1 according to the present embodiment enables stable control. In addition, general feedback control theories known in the art, such as PI control, can be applied to the first amplifier 301, the second amplifier 302, the third amplifier 303, and the fourth amplifier 304. Further, the limit value of the PI control gain can be quantitatively calculated according to the Routh-Hurwitz stability criterion, and the series-parallel chopper circuit can be quantitatively analyzed using a Bode diagram, so that the entire power conversion device 1 can be designed to ensure its stability theoretically. Also, by positively controlling the currents of the first reactor 61 and the second reactor 62, a power conversion device 1 capable of stable operation while preventing damage due to overcurrent as much as possible can be realized. Further, a power conversion device 1 capable of controlling the first voltage of the first load 21 and the second voltage of the second load 22 as arbitrary and stable DC voltages can be realized.
[0055] <Simulation Results> As shown in FIG. 2A, since the power conversion device 1 according to the present embodiment controls the coil current, even under adverse conditions such as unbalanced circuit constants, unbalanced load currents, and fluctuating input voltages, the DC voltage V of the first load 21 O1 and the DC voltage V of the second load 22 O2 can be seen to follow the commanded 500V relatively well.
[0056] On the other hand, as shown in FIG. 2B, since the conventional power conversion device 1' does not control the coil current, it can be seen that excessive current may occur in the device.
[0057] Although the above-described embodiments have been described as representative examples, it is obvious to those skilled in the art that many changes and substitutions can be made within the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited by the above-described embodiments, and various modifications and changes are possible without departing from the scope of the claims. For example, it is possible to combine a plurality of constituent blocks described in the configuration diagram of the embodiment into one, or to divide one constituent block.
Explanation of Reference Numerals
[0058] 1 Power conversion device 2 Control circuit 10 DC power supply 21 First load 22 Second load 31 First leg 32 Second leg 61 First reactor 62 Second reactor 71 First voltage detector 72 Second voltage detector 81 First current detector 82 Second current detector 101 Output voltage command generator 201 First subtractor 202 Second subtractor 203 Third subtractor 204 Fourth subtractor 301 First amplifier 302 Second amplifier 303 Third amplifier 304 Fourth amplifier 401 First comparator 402 Second comparator 403 Third comparator 404 Fourth comparator 500 Carrier generator 601 First logic inverter 602 Second logic inverter
Claims
【Claim 1】 a first leg in which a first switching element and a second switching element are connected in series; a second leg in which a third switching element and a fourth switching element are connected in series; a first load connected in parallel with the first leg; a second load connected in parallel with the second leg; a first voltage detector that detects a first voltage of the first load and outputs a first voltage signal; a second voltage detector that detects a second voltage of the second load and outputs a second voltage signal; a first midpoint between the first switching element and the second switching element, and a first reactor connected to the third switching element; a second midpoint between the third switching element and the fourth switching element, and a second reactor connected to the second switching element; a first current detector that detects a current of the first reactor and outputs a first current signal; a second current detector that detects a current of the second reactor and outputs a second current signal; a control circuit that determines a first time ratio of an on-time of the first switching element and a second time ratio of an on-time of the second switching element based on the second voltage signal and the first current signal, and determines a third time ratio of an on-time of the third switching element and a fourth time ratio of an on-time of the fourth switching element based on the first voltage signal and the second current signal; and in a power conversion device in which a positive terminal of a DC power supply is connected to a terminal of the first switching element that is not connected to the first midpoint, and a negative terminal of the DC power supply is connected to a terminal of the fourth switching element that is not connected to the second midpoint, the control circuit includes: an output voltage command generator that generates an output voltage command; a carrier generator that generates a predetermined carrier; a first subtractor that calculates a first deviation between the output voltage command and the second voltage signal; a first amplifier that controls to make the first deviation a value equal to or close to zero and generates a first amplified signal; a second subtractor that calculates a second deviation between the first amplified signal and the first current signal; a second amplifier that controls to make the second deviation a value equal to or close to zero and generates a second amplified signal; a first comparator that compares the second amplified signal with the predetermined carrier and outputs a first comparison result to the first switching element; a first logic inverter circuit that outputs a logical negation of the first comparison result to the second switching element; A third subtractor that calculates a third deviation between the output voltage command and the first voltage signal; A third amplifier that generates a third amplified signal by controlling such that the third deviation becomes zero or a value close to zero; A fourth subtractor that calculates a fourth deviation between the third amplified signal and the second current signal; A fourth amplifier that generates a fourth amplified signal by controlling such that the fourth deviation becomes zero or a value close to zero; A second comparator that compares the fourth amplified signal with the predetermined carrier wave and outputs a second comparison result to the fourth switching element; A second logic inverter circuit that outputs a logical negation of the second comparison result to the third switching element; A power conversion device comprising the same.
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