Semiconductor device
By optimizing the lead frame and bonding material thicknesses in semiconductor devices, voids are minimized, enhancing heat dissipation and reliability, and expanding the safe operating area.
Patent Information
- Application Number
- JP2022044756
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-03-19
- Publication Date
- 2025-06-30
- Estimated Expiration
- 2042-03-19
AI Technical Summary
Semiconductor devices with voids in the solder experience decreased heat dissipation, a narrowed safe operating area, and are vulnerable to thermal runaway, affecting their reliability and performance.
The semiconductor device incorporates a lead frame with specific bed portions and outer leads, a semiconductor chip with controlled bonding material thicknesses, and connectors with defined thickness and positioning to minimize voids and enhance bonding, thereby improving heat dissipation and reliability.
This configuration results in a semiconductor device with a wider safe operating area and higher reliability by effectively reducing thermal resistance and ensuring consistent current passage.
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Abstract
Description
Technical Field
[0001] Embodiments of the present invention relate to semiconductor devices.
Background Art
[0002] A semiconductor device having a semiconductor chip such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is used for applications such as power conversion. For example, when the above-described semiconductor device is a vertical MOSFET, a source electrode provided on the upper surface of the semiconductor chip is connected to, for example, a connector provided on the MOSFET. Both surfaces of the MOSFET are joined to a connector or a lead via solder. However, when the solder contains voids, the heat dissipation of the MOSFET decreases, the safe operating area becomes narrow, and the structure may be vulnerable to thermal runaway.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] The problem to be solved by the present invention is to provide a semiconductor device having a wide safe operating area and high reliability.
Means for Solving the Problems
[0005] The semiconductor device according to the embodiment includes a lead frame having a first bed portion with a first upper surface and a first outer lead connected to the first bed portion, and a first post portion having a second bed portion with a second upper surface and a second outer lead connected to the second bed portion. The first bed portion is provided so as to be disposed between the first outer lead and the first post portion. The semiconductor device further includes a second post portion having a third bed portion with a third upper surface and a third outer lead connected to the third bed portion, a semiconductor chip provided on the first upper surface and having an electrode and a control electrode, a fourth upper surface provided on the electrode and having a first opening provided on the electrode and a second opening provided on the control electrode, and an insulating film provided on the fourth upper surface. A first bonding material is provided between the first upper surface and the semiconductor chip to bond the first upper surface and the semiconductor chip. The first film thickness of the first bonding material portion under the control electrode is thinner than the second film thickness of the second bonding material portion on the second portion of the first bed portion provided between the first portion of the first bed portion under the first bonding material portion and the first outer lead. The semiconductor device further includes a first connector having a first end portion provided on the electrode and a second end portion provided on the second upper surface, a second bonding material provided between the electrode and the first end portion to bond the electrode and the first end portion, and a third bonding material provided between the second upper surface and the second end portion to bond the second upper surface and the second end portion. Second upper surface and a third bonding material provided between the second upper surface and the second end portion to bond the second upper surface and the second end portion. The first end portion has a fifth connector in contact with the second bonding material and a sixth connector in contact with the second bonding material and having a shorter distance from the second end portion. The thickness of the fifth connector in the direction perpendicular to the first upper surface is thinner than the thickness of the sixth connector in the direction perpendicular to the first upper surface, and the lower surface of the sixth connector in contact with the second bonding material protrudes downward more than the lower surface of the fifth connector in contact with the second bonding material. .
Brief Description of the Drawings
[0006]
Figure 1
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Figure 9
Embodiments for Carrying Out the Invention
[0007] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following description, the same members and the like are denoted by the same reference numerals, and the description of the members and the like that have been described once will be omitted as appropriate.
[0008] In this specification, in order to indicate the positional relationship of components and the like, the upward direction of the drawing is described as "up" and the downward direction of the drawing is described as "down". In this specification, the concepts of "up" and "down" are not necessarily terms indicating the relationship with the direction of gravity.
[0009] (First Embodiment) The semiconductor device of this embodiment includes a lead frame having a first bed portion with a first upper surface and a first outer lead connected to the first bed portion, and a first post portion having a second bed portion with a second upper surface and a second outer lead connected to the second bed portion. The first bed portion is provided between the first outer lead and the first post portion. The semiconductor device also includes a second post portion having a third bed portion with a third upper surface and a third outer lead connected to the third bed portion. A semiconductor chip is provided on the first upper surface and has a fourth upper surface with an electrode and a control electrode, a first opening provided on the electrode, and a second opening provided on the control electrode. The semiconductor chip also has an insulating film provided on the fourth upper surface. A first connector is provided between the first upper surface and the semiconductor chip to bond the first upper surface and the semiconductor chip. The first film thickness of the first bonding material portion under the control electrode is thinner than the second film thickness of the second bonding material portion on the second portion of the first bed portion provided between the first portion of the first bed portion under the first bonding material portion and the first outer lead. The first connector has a first end portion provided on the electrode and a second end portion provided on the second upper surface. A second bonding material is provided between the electrode and the first end portion to bond the electrode and the first end portion, and a third bonding material is provided between the second upper surface and the second end portion to bond the control electrode and the second end portion.
[0010] FIG. 1 is a schematic top view of the semiconductor device 100 of this embodiment. FIG. 1(a) is a schematic top view of the semiconductor device 100 of this embodiment. FIG. 1(b) is a schematic top view showing the semiconductor chip 10, the insulating film 12, the second bonding material 20, and the fourth bonding material 80 of this embodiment. FIG. 2 is a schematic cross-sectional view of the main part of the semiconductor device 100 of this embodiment. FIG. 2(a) is a schematic view of the A-A' cross-section in FIG. 1. FIG. 2(b) is a schematic view of the B-B' cross-section in FIG. 1.
[0011] The semiconductor device 100 of this embodiment will be described with reference to FIGS. 1 and 2.
[0012] The lead frame 2 is a member containing a conductive material such as Cu (copper) on which the semiconductor chip 10 is disposed. The lead frame 2 has a first bed portion 3 and a first outer lead 6. The first bed portion 3 has a first upper surface 4. The semiconductor chip 10 is provided on the first upper surface 4. The first outer lead 6 is connected to the first bed portion 3. The first outer lead 6 is used for connecting the semiconductor chip 10 and an external circuit (not shown).
[0013] Here, an X direction, a Y direction that intersects perpendicularly to the X direction, and a Z direction that intersects perpendicularly to the X and Y directions are defined. The first upper surface 4 is arranged parallel to the XY plane.
[0014] The first post portion (first lead post, source lead post) 54 includes a second bed portion 58 and a second outer lead 56. The first post portion 54 contains a conductive material such as Cu. The second bed portion 58 has a second upper surface 57. Here, the first bed portion 3 is provided so as to be disposed between the first outer lead 6 and the first post portion 54. The second outer lead 56 is used for connecting the semiconductor chip 10 and an external circuit (not shown).
[0015] The second post portion (second lead post, gate lead post) 64 includes a third bed portion 68 and a third outer lead 66. The third bed portion 68 has a third upper surface 67. The second post portion 64 contains a conductive material such as Cu. Here, for example, the first bed portion 3 is provided so as to be disposed between the first outer lead 6 and the second post portion 64. The third outer lead 66 is used for connecting the semiconductor chip 10 and an external circuit (not shown).
[0016] For example, the second post portion 64 is provided adjacent to the first post portion 54. For example, the second post portion 64 is provided side by side with the first post portion 54.
[0017] The semiconductor chip 10 is provided on the first upper surface 4 of the lead frame 2. The semiconductor chip 10 is formed by providing a vertical MOSFET, an IGBT (Insulated Gate Bipolar Transistor), or the like on a semiconductor substrate such as Si (silicon), SiC (silicon carbide), GaAs (gallium arsenide), or GaN (gallium nitride).
[0018] The semiconductor chip 10 has a fourth upper surface 18. An electrode 14 and a control electrode 16 are provided on the fourth upper surface 18. For example, when the semiconductor chip 10 has a MOSFET, the electrode 14 corresponds to the source electrode of the MOSFET. Also, when the semiconductor chip 10 has a MOSFET, the control electrode 16 corresponds to the gate electrode of the MOSFET.
[0019] The semiconductor chip 10 has an insulating film 12. The insulating film 12 is provided on the fourth upper surface 18. The insulating film 12 has a first opening 12a and a second opening 12b. The first opening 12a and the second opening 12b each penetrate the insulating film 12. The first opening 12a is provided above the electrode 14. The second opening 12b is provided above the control electrode 16. The insulating film 12 contains an insulating material such as polyimide, for example.
[0020] The first bonding material 70 is provided between the first upper surface 4 and the semiconductor chip 10. The first bonding material 70 bonds the first upper surface 4 and the semiconductor chip 10. For example, when a MOSFET is provided in the semiconductor chip 10, the first bonding material 70 bonds a drain electrode (not shown) of the semiconductor chip 10 and the first upper surface 4.
[0021] The first film thickness t1 of the first bonding material portion 70a of the first bonding material 70 under the control electrode 16 is thinner than the second film thickness t2 of the second bonding material portion 70b above the second portion 3b of the first bed portion 3 provided between the first portion 3a of the first bed portion 3 under the first bonding material portion 70a and the first outer lead 6 (FIG. 2(b)).
[0022] The difference between the second film thickness t2 and the first film thickness t1 is preferably 15 μm or more. Further, the difference between the second film thickness t2 and the first film thickness t1 is more preferably 30 μm or more.
[0023] The first connector 50 has a first end portion 51a and a second end portion 51b. The first end portion 51a is provided on the electrode 14. The second end portion 51b is provided on the second upper surface 57. The first connector 50 contains a conductive material such as Cu, for example. Note that an inorganic adhesion strengthening layer containing, for example, Fe and Cr and forming M-O-Si (a triple bond between O-Si, M is a metal element) by covalent bonding with an epoxy resin or an organic adhesion strengthening layer having an M-O-polymer bond may be provided on the surface of the first connector 50. Further, surface roughening such as blackening treatment for roughening the Cu surface with sulfuric acid may be performed.
[0024] The second bonding material 20 is provided between the electrode 14 and the first end portion 51a. The second bonding material 20 bonds the electrode 14 and the first end portion 51a.
[0025] The third bonding material 59 is provided between the second upper surface 57 and the second end portion 51b. The third bonding material 59 bonds the second upper surface 57 and the second end portion 51b.
[0026] The second connector 60 has a third end portion 61a and a fourth end portion 61b. The second connector 60 contains a conductive material such as Cu, for example. Note that an inorganic adhesion strengthening layer containing, for example, Fe and Cr and forming M-O-Si (a triple bond between O-Si, M is a metal element) by covalent bonding with an epoxy resin or an organic adhesion strengthening layer having an M-O-polymer bond may be provided on the surface of the second connector 60. Further, surface roughening such as blackening treatment for roughening the Cu surface with sulfuric acid may be performed. The third end portion 61a is electrically connected to the semiconductor chip 10 via a fourth bonding material 80 provided on the control electrode 16.
[0027] Note that the first connector 50 and the second connector 60 are hard connectors that cannot be easily bent and are different from the wires used for bonding.
[0028] Note that a wire may be used instead of the second connector 60.
[0029] The fifth bonding material 69 is provided between the third upper surface 67 and the fourth end portion 61b. The fifth bonding material 69 joins the third upper surface 67 and the fourth end portion 61b.
[0030] The second bonding material 20 may contain voids 22 inside the second bonding material 20. In FIG. 1(b), voids 22a and 22b are shown. However, it is preferable that the first bonding material 70 provided under the second opening 12b and within a distance L1 of 1 mm from the second opening 12b has no voids.
[0031] The joint portion 53 is a portion where the first end portion 51a is joined to the second bonding material 20. In FIG. 1(b), the joint portion 53 is indicated by a broken line. The first bonding material 70 under the joint portion 53 of the first end portion 51a joined to the second bonding material 20 may contain voids 22 having a maximum diameter of 15 μm or more.
[0032] The maximum diameter of the void 22 can be measured, for example, by a cross-sectional micrograph or the like.
[0033] The area of the joint portion 53 of the first end portion 51a joined to the second bonding material 20 is preferably 80% or more of the area of the fourth upper surface 18.
[0034] As the first bonding material 70, the second bonding material 20, the third bonding material 59, the fourth bonding material 80, and the fifth bonding material 69, for example, solders containing Pb (lead) and Sn (tin), solders containing Pb, Ag (silver), and Sn (tin), solders containing Sn and Sb (antimony), solders containing Au (gold) and Sn, solders containing Au and Si, or solders containing Au and Ge (germanium) can be preferably used. The first bonding material 70, the second bonding material 20, the third bonding material 59, the fourth bonding material 80, and the fifth bonding material 69 are, for example, the first solder, the second solder, the third solder, the fourth solder, and the fifth solder, respectively.
[0035] FIG. 3 is a schematic cross-sectional view showing a main part of the semiconductor device 100 of the embodiment. In FIG. 3, among the semiconductor device 100, the first bed portion 3, the first bonding material 70, and the semiconductor chip 10 are illustrated. The semiconductor chip 10 may have a burr protruding downward from the bottom surface 17 of the semiconductor chip 10 and having a length in a direction perpendicular to the fourth upper surface 18 of 15 μm or more. Burrs 11a and 11b are illustrated in FIGS. 3 and 2(a). The length L of the burr 11a in the direction perpendicular to the fourth upper surface 18 11 may be 15 μm or more. The length L of the burr 11b in the direction perpendicular to the fourth upper surface 18 12 may be 15 μm or more.
[0036] Burrs 11c and 11d are shown in FIG. 2(b). For the burrs 11c and 11d as well, similar to the burrs 11a and 11b, the length in the direction perpendicular to the first upper surface 4 may be 15 μm or more.
[0037] Next, the operation and effect of the semiconductor device of the present embodiment will be described.
[0038] FIG. 4 is a schematic cross-sectional view for explaining the operation and effect of the semiconductor device of the present embodiment. FIG. 4 is a schematic cross-sectional view showing a part of the manufacturing process of the semiconductor device 100.
[0039] Figures 4(a) and 4(b) illustrate the first cream solder 70c that becomes the first bonding material 70 after curing, the second cream solder 20a that becomes the second bonding material 20 after curing, the third cream solder 59a that becomes the third bonding material 59 after curing, the fourth cream solder 80a that becomes the fourth bonding material 80 after curing, and the fifth cream solder 69a that becomes the fifth bonding material 69 after curing. In such a state, the semiconductor device being manufactured is heated, for example, in a vacuum to perform reflow. At this time, voids 22 containing flux components, moisture, etc. contained in the cream solder are formed. In Figure 4(a), void 22c is illustrated as the formed void 22. In Figure 4(b), void 22f is illustrated as the formed void 22. As described above, since the heating is performed in a vacuum, void 22c attempts to be released to the outside of the first cream solder 70c. Therefore, void 22c moves to the end of the first cream solder 70c and becomes voids 22d and 22e. Similarly, void 22f attempts to be released to the outside of the first cream solder 70c. Therefore, void 22f becomes voids 22g and 22h. Here, when the first cream solder 70c is cured to become the first bonding material 70, void 22 may remain inside the first bonding material 70 without being released to the outside of the first bonding material 70. Such void 22 is considered to have a higher thermal resistance compared to the portion where other first bonding materials 70 are provided. This is because the thermal conductivity of the flux components and moisture contained in void 22 is considered to be lower compared to the electrically conductive materials such as metals contained in the first bonding material 70. Also, when void 22 remains and exists inside the first bonding material 70, the electrical resistivity of the portion of void 22 is larger compared to the electrical resistivity of the other portions of the first bonding material 70. Therefore, when void 22 remains, the magnitude of the current that can be passed becomes smaller. Therefore, such void 22 narrows the safe operating region of the semiconductor device 100 and reduces the reliability.
[0040] The degree of the adverse effect that the void 22 has on reliability varies depending on the location where the void 22 is formed. A part of the heat generated in the semiconductor chip 10 is transmitted to the outside of the semiconductor chip 10 via, for example, the first end portion 51a of the first connector 50. Here, the void 22 may remain under and around the control electrode 16. In this case, since the distance from the first end portion 51a is relatively long, the heat generated under and around the control electrode 16 is less likely to pass through the first end portion 51a of the first connector 50. Therefore, it has been required not to leave the void 22 under and around the control electrode 16.
[0041] Further, the semiconductor chip 10 may have a burr 11 formed during dicing and protruding downward from the semiconductor chip 10. Such a burr 11 may inhibit the release of the void 22 to the outside of the first bonding material 70.
[0042] Therefore, in the semiconductor device 100 of the present embodiment, the first film thickness t1 of the first bonding material portion 70a under the control electrode 16 is thinner than the second film thickness t2 of the second bonding material portion 70b on the second portion 3b of the first bed portion 3 provided between the first portion 3a of the first bed portion 3 under the first bonding material portion 70a and the first outer lead 6. The semiconductor device 100 is provided with a first bonding material 70.
[0043] According to the semiconductor device 100 of the present embodiment, the formed voids 22c and 22f move to the side with the larger film thickness inside the first cream solder 70c. This is because moving to the side with the larger film thickness is easier for the void 22 to move because the movement resistance is smaller for the void 22 than moving to the side with the smaller film thickness. For this reason, it becomes difficult for the void 22 to remain under and around the control electrode 16. Therefore, the thermal resistance of the semiconductor device can be kept low. In addition, the magnitude of the current that can be energized in the semiconductor device can be ensured. Therefore, it is possible to provide a semiconductor device with a wide safe operating region and high reliability.
[0044] Note that the difference between the second film thickness t2 and the first film thickness t1 is preferably 15 μm or more. This is to facilitate the movement of the voids 22 within the first cream solder 70c. Also, voids 22 with a maximum diameter of 15 μm or more particularly deteriorate the thermal conductivity. Therefore, it is preferable to facilitate the movement of the voids 22 with a maximum diameter of 15 μm or more.
[0045] The first bonding material 70 provided under the second opening 12b and within a range of 1 mm or less from the second opening 12b preferably does not contain voids 22 with a maximum diameter of 15 μm or more. This is because if voids 22 remain in such locations, it particularly becomes a problem of a decrease in reliability due to deterioration of the thermal conductivity.
[0046] The first bonding material 70 under the joint portion 53 of the first end portion 51a bonded to the second bonding material 20 may contain voids 22 with a maximum diameter of 15 μm or more. This is because the reliability is relatively less likely to decrease. That is, even if the first bonding material 70 under the joint portion 53 contains voids 22 with a maximum diameter of 15 μm or more, heat can easily escape from the first end portion 51a.
[0047] The area of the joint portion 53 of the first end portion 51a bonded to the second bonding material 20 is preferably 80% or more of the area of the fourth upper surface 18. This is because when the area of the joint portion 53 is large, even if voids 22 remain, heat can easily escape from the first end portion 51a.
[0048] In the semiconductor device 100 of the present embodiment, the semiconductor chip 10 may have a burr 11 that protrudes downward from the lower surface 17 of the semiconductor chip 10 and has a length in the direction perpendicular to the fourth upper surface 18 of 15 μm or more. Since the film thickness of the first bonding material 70 has the above relationship, even if the semiconductor chip 10 has a burr 11, the discharge of the voids 22 is facilitated.
[0049] According to the semiconductor device of the present embodiment, it is possible to provide a semiconductor device with a wide safe operating region and high reliability.
[0050] (Second Embodiment) The semiconductor device of the present embodiment is different from the semiconductor device of the first embodiment in that, when viewed from above, the area of the joint portion of the first end portion joined to the second bonding material is 50% or more and 70% or less of the area of the fourth upper surface.
[0051] Further, the semiconductor device of the present embodiment is different from the semiconductor device of the first embodiment in that, when viewed from above, the center of the joint portion of the first end portion joined to the second bonding material is disposed between the center of the first opening and the first post portion.
[0052] Here, the description of the content overlapping with the first embodiment is omitted.
[0053] FIG. 5 is a schematic cross-sectional view of the semiconductor device 110 of the present embodiment. FIG. 5(a) is a schematic cross-sectional view of the semiconductor device 110 of the present embodiment. Note that FIG. 5(b) shows a schematic cross-sectional view of the semiconductor device 100 of the first embodiment for comparison. FIG. 6 is a schematic top view of the main part of the semiconductor device 110 of the present embodiment. FIG. 6 is a schematic top view showing the semiconductor chip 10, the insulating film 12, the second bonding material 20, the first post portion 54, and the fourth bonding material 80 of the present embodiment.
[0054] The semiconductor device 110 of the present embodiment will be described with reference to FIGS. 5 and 6.
[0055] In the semiconductor device 110 of the present embodiment, when viewed from above, in other words, when viewed from the Z direction, the length in the Y direction of the joint portion 113 of the first end portion 51a joined to the second bonding material 20 is L2. On the other hand, in the semiconductor device 100 of the first embodiment, when viewed from above, the length in the Y direction of the joint portion 53 of the first end portion 51a joined to the second bonding material 20 is L1. L1 is longer than L2.
[0056] Thereby, when viewed from above, the area of the joint portion 113 of the first end portion 51a joined to the second bonding material 20 can be set to 50% or more and 70% of the area of the fourth upper surface 18.
[0057] Also, when viewed from above, the center 112 of the joint portion 113 of the first end portion 51a joined to the second bonding material 20 is disposed between the center 12c of the first opening 12a and the first post portion 54.
[0058] Note that, when viewed from above, the method of setting the area of the joint portion 113 of the first end portion 51a joined to the second bonding material 20 to be 50% or more and 70% of the area of the fourth upper surface 18 is not limited to the above.
[0059] Also, when viewed from above, the method of disposing the center 112 of the joint portion 113 of the first end portion 51a joined to the second bonding material 20 between the center 12c of the first opening 12a and the first post portion 54 is not limited to the above.
[0060] In the case of the semiconductor device 110 of the present embodiment, the first connector 50 is more likely to tilt toward the side of the first post portion 54. Therefore, it is possible to easily realize a first bonding material 70 in which the first film thickness t1 of the first bonding material portion 70a of the first bonding material 70 under the control electrode 16 is thinner than the second film thickness t2 of the second bonding material portion 70b on the second portion 3b of the first bed portion 3 provided between the first portion 3a of the first bed portion 3 under the first bonding material portion 70a and the first outer lead 6.
[0061] According to the semiconductor device of the present embodiment, it is possible to provide a semiconductor device with a wide safe operating area and high reliability.
[0062] (Third Embodiment) The semiconductor device of the present embodiment is different from the semiconductor devices of the first and second embodiments in that the distance between the center of gravity of the first connector and the tip of the first end portion is longer than the distance between the center of gravity of the first connector and the tip of the second end portion. Here, descriptions of the content overlapping with the first and second embodiments are omitted.
[0063] FIG. 7 is a schematic cross-sectional view of the first connector used in the semiconductor device of the present embodiment.
[0064] FIG. 7(a) is a schematic cross-sectional view of a first connector 250 used in the semiconductor device of the present embodiment. The first connector 250 includes a second end portion 51b and has a third connector 51g extending in a first direction and a fourth connector 51h connected to the third connector 51g and extending in a second direction intersecting the first direction. The fourth connector 51h has a convex portion 51e on an upper surface 51h1 of the fourth connector 51h. A distance d1 between the center of gravity 251 of the first connector 250 and a tip 51c of the first end portion 51a is longer than a distance d2 between the center of gravity 251 of the first connector 250 and a tip 51d of the second end portion 51b.
[0065] FIG. 7(b) is a schematic cross-sectional view of a first connector 252 used in the semiconductor device of the present embodiment. The fourth connector 51h has a convex portion 51f on a lower surface 51h2 of the fourth connector 51h. A distance d1 between the center of gravity 253 of the first connector 252 and a tip 51c of the first end portion 51a is longer than a distance d2 between the center of gravity 253 of the first connector 252 and a tip 51d of the second end portion 51b.
[0066] By using the first connector 250 and the first connector 252 of the present embodiment, the first connector 250 and the first connector 252 are more likely to be inclined by the side of the first post portion 54. Therefore, it is possible to easily realize a first bonding material 70 in which a first film thickness t1 of a first bonding material portion 70a of the first bonding material 70 under the control electrode 16 is thinner than a second film thickness t2 of a second bonding material portion 70b on a second portion 3b of the first bed portion 3 provided between a first portion 3a of the first bed portion 3 under the first bonding material portion 70a and the first outer lead 6.
[0067] According to the semiconductor device of the present embodiment, it is possible to provide a highly reliable semiconductor device with a wide safe operating region.
[0068] (Fourth Embodiment) The semiconductor device of this embodiment is different from the semiconductor devices of the first to third embodiments in that the first connector includes a second end portion, a third connector (first connector portion) extending in a first direction, and a fourth connector (second connector portion) connected to the third connector and extending in a second direction that intersects the first direction at an angle of less than 90 degrees. Here, descriptions of content overlapping with the first to third embodiments are omitted.
[0069] FIG. 8 is a schematic cross-sectional view of the semiconductor device 130 of this embodiment. The angle θ at which the first direction in which the third connector 51g extends intersects the second direction in which the fourth connector 51h extends is less than 90 degrees.
[0070] By using the first connector 350 of this embodiment, the first connector 350 is more likely to be inclined by the side of the first post portion 54. Therefore, the first film thickness t1 of the first bonding material portion 70a of the first bonding material 70 under the control electrode 16 can be easily realized to be thinner than the second film thickness t2 of the second bonding material portion 70b on the second portion 3b of the first bed portion 3 provided between the first portion 3a of the first bed portion 3 under the first bonding material portion 70a and the first outer lead 6.
[0071] According to the semiconductor device of this embodiment, it is possible to provide a semiconductor device with a wide safe operating region and high reliability.
[0072] (Fifth Embodiment) The semiconductor device of this embodiment has a first end portion including a fifth connector (third connector portion) in contact with the second bonding material and a sixth connector (fourth connector portion) in contact with the second bonding material and having a shorter distance from the second end portion. The thickness of the fifth connector in the direction perpendicular to the first upper surface is thinner than the thickness of the sixth connector in the direction perpendicular to the first upper surface, which is different from the semiconductor devices of the first to fourth embodiments. Here, descriptions of content overlapping with the semiconductor devices of the first to fourth embodiments are omitted.
[0073] FIG. 9 is a schematic cross-sectional view of the semiconductor device 140 of this embodiment.
[0074] In the first connector 450 of the present embodiment, the first end portion 51a has a fifth connector 51i that contacts the second bonding material 20 and a sixth connector 51j that contacts the second bonding material 20 and is closer to the second end portion 51b. The thickness t of the fifth connector 51i in the direction perpendicular to the first upper surface 4 11 is thinner than the thickness t of the sixth connector 51j in the direction perpendicular to the first upper surface 4 12 . And the lower surface 51j1 of the sixth connector 51j protrudes downward more than the lower surface 51i1 of the fifth connector 51i.
[0075] By using the first connector 450 of the present embodiment, the first connector 350 is more likely to tilt toward the side of the first post portion 54. Therefore, it is possible to easily realize the first bonding material 70 in which the first film thickness t1 of the first bonding material portion 70a of the first bonding material 70 under the control electrode 16 is thinner than the second film thickness t2 of the second bonding material portion 70b on the second portion 3b of the first bed portion 3 between the first portion 3a of the first bed portion 3 under the first bonding material portion 70a and the first outer lead 6.
[0076] According to the semiconductor device of the present embodiment, it is possible to provide a semiconductor device with a wide safe operating area and high reliability.
[0077] Although some embodiments and examples of the present invention have been described, these embodiments and examples are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the gist of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are included in the invention described in the claims and its equivalent scope.
Explanation of Reference Numerals
[0078] 2: Lead frame 3: First bed portion 3a: First portion 3b: Second portion 4: First upper surface 6: First outer lead 10: Semiconductor chip 12: Insulating film 12a: First opening 12b: Second opening 12c: Center 14: Electrode 16: Control electrode 18: Fourth upper surface 20: Second bonding material 22: Void 50: First connector 51a: First end 51b: Second end 51c: Tip 51d: Tip 51g: Third connector 51h: Fourth connector 51i: Fifth connector 51j: Sixth connector 53: Joint 54: First post portion (first lead post, source lead post) 56: Second outer lead 57: Second upper surface 58: Second bed portion 59: Third bonding material 64: Second post portion (second lead post, gate lead post) 66: Third outer lead 67: Third upper surface 68: Third bed portion 70: First bonding material 70a: First bonding material portion 70b: Second bonding material portion 100: Semiconductor device 110: Semiconductor device 130: Semiconductor device 140: Semiconductor device 250: First connector 251: Center of gravity 252: First connector 252: Center of gravity 253: Center of gravity 350: First connector 450: First Connector L1: Distance d1: Distance d2: Distance t1: First Film Thickness t11: Thickness t12: Thickness t2: Second Film Thickness θ: Angle
Claims
1. A lead frame having a first bed portion with a first upper surface and a first outer lead connected to the first bed portion, A first post portion having a second bed portion with a second upper surface and a second outer lead connected to the second bed portion, wherein the first bed portion is provided so as to be disposed between the first outer lead and the first post portion, A second post portion having a third bed portion with a third upper surface and a third outer lead connected to the third bed portion, Provided on the first upper surface, A fourth upper surface having an electrode and a control electrode, An insulating film provided on the fourth upper surface, having a first opening provided on the electrode and a second opening provided on the control electrode, A semiconductor chip having, Provided between the first upper surface and the semiconductor chip, joining the first upper surface and the semiconductor chip, the first film thickness of the first bonding material portion under the control electrode being thinner than the second film thickness of the second bonding material portion on the second portion of the first bed portion provided between the first portion of the first bed portion under the first bonding material portion and the first outer lead, A first connector having a first end provided on the electrode and a second end provided on the second upper surface, A second bonding material provided between the electrode and the first end, joining the electrode and the first end, A third bonding material provided between the second upper surface and the second end, joining the second upper surface and the second end, Comprising, The first end has a fifth connector in contact with the second bonding material and a sixth connector in contact with the second bonding material and having a shorter distance from the second end, The thickness of the fifth connector in the direction perpendicular to the first upper surface is thinner than the thickness of the sixth connector in the direction perpendicular to the first upper surface, The lower surface of the sixth connector in contact with the second bonding material protrudes downward more than the lower surface of the fifth connector in contact with the second bonding material, A semiconductor device.
2. The difference between the second film thickness and the first film thickness is 15 μm or more, The semiconductor device according to Claim 1.
3. The first bonding material provided under the second opening and within a distance of 1 mm from the second opening does not contain voids having a maximum diameter of 15 μm or more, The semiconductor device according to Claim 1 or Claim 2.
4. The first bonding material under the joint of the first end joined to the second bonding material includes voids having a maximum diameter of 15 μm or more. The semiconductor device according to claim 1 or claim 2.
5. The area of the joint of the first end joined to the second bonding material is 80% or more of the area of the fourth upper surface. The semiconductor device according to claim 4.
6. When viewed from above, the area of the joint of the first end joined to the second bonding material is 50% or more and 70% or less of the area of the fourth upper surface. When viewed from above, the center of the joint of the first end joined to the second bonding material is disposed between the center of the first opening and the first post portion. The semiconductor device according to claim 4 or claim 5.
7. The distance between the center of gravity of the first connector and the tip of the first end is longer than the distance between the center of gravity of the first connector and the tip of the second end. The semiconductor device according to any one of claims 1 to 4.
8. The first connector includes the second end and a third connector extending in a first direction, and a fourth connector connected to the third connector and extending in a second direction intersecting the first direction at an angle of less than 90 degrees. The semiconductor device according to any one of claims 1 to 4 having the above.
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