Integrated circuit
The integrated circuit adjusts the feedback signal level dynamically to accommodate the large dynamic range of pen signals, enabling efficient and cost-effective detection using delta-sigma modulation.
Patent Information
- Application Number
- JP2022580052
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-06-25
- Publication Date
- 2025-07-04
- Estimated Expiration
- 2041-06-25
AI Technical Summary
Conventional delta-sigma modulation circuits are too large and costly to effectively detect the pen signal transmitted by an active pen due to the large dynamic range of the pen signal, causing the feedback signal to stop oscillating and preventing accurate detection.
An integrated circuit that includes a subtractor, integrator, quantizer, DAC, and gain control unit to dynamically adjust the feedback signal level based on the pen signal level, allowing the delta-sigma modulation circuit to operate efficiently without a multi-bit quantizer.
Enables accurate detection of pen signals with a delta-sigma modulation circuit by maintaining oscillation of the feedback signal across varying pen signal levels, reducing size and cost in the integrated circuit.
Smart Images

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Abstract
Description
Technical Field
[0001] The present invention relates to an integrated circuit, and more particularly to an integrated circuit for detecting a pen signal transmitted by an active pen.
Background Art
[0002] A capacitance detection device for detecting a passive pointer such as a finger or a passive pen is known. This type of capacitance detection device includes a sensor having a plurality of X electrodes and Y electrodes, and an integrated circuit that sends a detection signal to the plurality of X electrodes and sequentially detects the detection signal at the plurality of Y electrodes. The integrated circuit performs a process of deriving the position of the passive pointer based on the detection intensity of the detection signal at each Y electrode.
[0003] Detection of the detection signal in the integrated circuit is performed using an A / D conversion circuit. Patent Document 1 discloses an example of using a delta-sigma modulation circuit as this type of A / D conversion circuit. By using a delta-sigma modulation circuit, quantization noise generated in the A / D conversion circuit can be reduced, so that the detection accuracy of the detection signal can be improved.
[0004] Also, an active pen that transmits an AC signal by applying an AC voltage to the pen tip electrode is known. Patent Document 2 discloses an example of this type of active pen. Hereinafter, the AC signal transmitted by the active pen is referred to as a "pen signal".
Prior Art Documents
Patent Documents
[0005]
Patent Document 1
Patent Document 2
Summary of the Invention
Problems to be Solved by the Invention
[0006] Here, if the delta-sigma modulation circuit can also be used for detecting the pen signal, it is considered that the detection accuracy of the pen signal can be improved. However, conventionally, it has not been practical to detect the pen signal using the delta-sigma modulation circuit. The reasons therefor will be described in detail below.
[0007] First, as a premise, the delta-sigma modulation circuit includes a subtracter that subtracts a feedback signal from an input signal, an integrator that integrates the output signal of the subtracter, a comparator that quantizes the output signal of the integrator, and an amplifier that generates the feedback signal by amplifying a pulse signal indicated by a series of output values ("+1" or "-1") of the comparator. Further, the dynamic range of the pen signal input to the A / D conversion circuit is a very large value compared to that of the detection signal for the passive pointer. This is because the level (amplitude) of the pen signal arriving at the sensor changes greatly in response to the change in the distance between the pen tip electrode and the touch surface accompanying the user operation.
[0008] According to the above configuration of the delta-sigma modulation circuit, since the level of the feedback signal is constant regardless of the level of the pen signal which is the input signal, when the pen tip electrode approaches the touch surface and the level of the pen signal becomes larger than a certain level, the output signal of the subtracter stops oscillating. Then, since the output value of the comparator also stops oscillating, it becomes impossible to perform detection and demodulation of the pen signal using the output value of the delta-sigma modulation circuit. To prevent this, it is necessary to make the level of the feedback signal follow the level of the input signal. For this purpose, the configuration that has been conventionally considered specifically was to configure the quantization circuit at the output stage by using a multi-bit configuration using a large number (for example, 129) of comparators.
[0009] However, a delta-sigma modulation circuit configured to include a large number of comparators is large in size and high in price. In addition, in an integrated circuit for pen signal detection, since it is normal to provide an A / D conversion circuit for each electrode in the sensor, the increase in the size and cost of the delta-sigma modulation circuit becomes even more significant. As a result, conventionally, using a delta-sigma modulation circuit for pen signal detection has been difficult in terms of size and cost.
[0010] Therefore, one object of the present invention is to provide an integrated circuit in which a delta-sigma modulation circuit can be used to detect a pen signal.
Means for Solving the Problems
[0011] The integrated circuit according to the present invention is an integrated circuit that detects a pen signal transmitted from an active pen, and includes a subtractor that subtracts a feedback signal from the pen signal input from a sensor, an integrator that integrates the output signal of the subtractor, a quantizer that quantizes the output signal of the integrator, and a DAC that generates the feedback signal based on the output value of the quantizer, a delta-sigma modulation unit, a processing unit that detects the level of the pen signal based on the output value of the delta-sigma modulation unit, and a gain control unit that controls the level of the feedback signal based on the level of the pen signal detected by the processing unit.
Effects of the Invention
[0012] According to the present invention, the level of the feedback signal can be made to follow the level of the pen signal without using a quantizer having a multi-bit configuration. Therefore, it becomes possible to use a delta-sigma modulation circuit to detect a pen signal.
Brief Description of the Drawings
[0013]
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Embodiments for Carrying Out the Invention
[0014] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.
[0015] FIG. 1 is a diagram showing the configuration of a position detection system 1 according to an embodiment of the present invention. As shown in the figure, the position detection system 1 includes an active pen 2 and an electronic device 3 which is a position detection device for detecting the active pen 2. Examples of the electronic device 3 include a tablet computer and a device equipped with a digitizer.
[0016] The electronic device 3 has a touch surface 3a, a sensor 30 arranged directly below the touch surface 3a, a sensor controller 31 connected to the sensor 30, and a host processor 32 for controlling each part of the electronic device 3 including these.
[0017] The sensor 30 is a device having a structure in which a plurality of sensor electrodes 30x and 30y are arranged in the touch surface 3a. The plurality of sensor electrodes 30x each extend in the y direction parallel to the touch surface 3a and are arranged at equal intervals in the x direction orthogonal to the y direction in the touch surface 3a. The plurality of sensor electrodes 30y each extend in the x direction and are arranged at equal intervals in the y direction.
[0018] Here, the electronic device 3 may have a display (not shown) disposed so as to overlap with the sensor 30. In this case, the plurality of sensor electrodes 30x (or the plurality of sensor electrodes 30y) can be used also as a common electrode of the display (an electrode for commonly supplying a ground potential to each pixel). The electronic device 3 in the case of performing this dual use constitutes a so-called "in-cell type" position detection device. On the other hand, the electronic device 3 in the case of not performing the dual use constitutes a so-called "on-cell type" or "out-cell type" position detection device. The present invention can be suitably applied to any of the electronic devices 3.
[0019] The sensor controller 31 is an integrated circuit having a function of deriving the positions of the active pen 2 and the passive pointer in the touch surface 3a, deriving the inclination of the active pen 2, and further receiving data from the active pen 2. The sensor controller 31 is configured to sequentially supply the derived positions and inclination, and the received data to the host processor 32.
[0020] The sensor controller 31 is configured to perform two-way communication with the active pen 2 via the capacitance CX generated between the active pen 2 and the sensor 30. Although details will be described later, the derivation of the position and inclination of the active pen 2 and the reception of data from the active pen 2 are realized through this two-way communication. In the following description, a signal transmitted from the sensor controller 31 to the active pen 2 by the above two-way communication is referred to as an uplink signal US, and a signal transmitted from the active pen 2 to the sensor controller 31 is referred to as a downlink signal DS (pen signal). Also, although details will be described later, the active pen 2 has two electrodes for transmitting the downlink signal DS. Hereinafter, the downlink signal DS transmitted from the pen tip electrode 21, which is one of these electrodes, is referred to as a downlink signal DSa, and the downlink signal DS transmitted from the ring electrode 22, which is the other electrode, may be distinguished and referred to as a downlink signal DSb.
[0021] The sensor controller 31 is also configured to supply (transmit) a passive pointer detection signal to each of the plurality of sensor electrodes 30x and sequentially receive them with the plurality of sensor electrodes 30y. Although details will be described later, the derivation of the position of the passive pointer is realized through the passive pointer detection signal thus transmitted and received. The transmission and reception of the passive pointer detection signal and the transmission and reception of the uplink signal US and the downlink signal DS described above are executed in a time-division manner.
[0022] The host processor 32 is the central processing unit of the electronic device 3 and is configured to be able to execute various programs including a drawing application. The drawing application is a program that causes the host processor 32 to execute a process of generating digital ink based on the position, inclination, and data supplied from the sensor controller 31, and a process of storing the generated digital ink in the memory in the electronic device 3 and displaying it on the display.
[0023] As shown in FIG. 1, the sensor controller 31 includes a switching unit 40, a receiving unit 41, a transmitting unit 42, and a processing unit 43. The switching unit 40 is a functional unit that switches the connection destinations of the plurality of sensor electrodes 30x and 30y between the transmitting unit 42 and the receiving unit 41 according to the control by the processing unit 43.
[0024] The receiving unit 41 is a functional unit that performs detection and demodulation of the received signal Va supplied from each of the plurality of sensor electrodes 30x and 30y connected via the switching unit 40, and is configured to have a receiving circuit for each of the sensor electrodes 30x and 30y. The received signal Va may include any one or more of the above-described downlink signal DSa, downlink signal DSb, and passive pointer detection signal. The frequencies of the carrier signals of the downlink signal DSa, downlink signal DSb, and passive pointer detection signal are different from each other, and each receiving circuit is configured to separately detect the downlink signal DSa, downlink signal DSb, and passive pointer detection signal by performing detection for each frequency.
[0025] The transmission unit 42 is a functional unit that supplies an uplink signal US or a passive pointer detection signal to the sensor electrode 30x or the sensor electrode 30y connected via the switching unit 40 in accordance with the control by the processing unit 43. Normally, when transmitting the uplink signal US, a plurality of sensor electrodes 30x (or a plurality of sensor electrodes 30y) are simultaneously connected to the transmission unit 42. As a result, the same uplink signal US is transmitted simultaneously from each sensor electrode 30x (or each sensor electrode 30y). Further, the passive pointer detection signal is composed of bit strings with different contents for each sensor electrode 30x and is supplied in parallel to each sensor electrode 30x.
[0026] The processing unit 43 is a functional unit that derives the position and inclination of the active pen 2, receives data from the active pen 2, and derives the position of the passive pointer through the control of the switching unit 40, the receiving unit 41, and the transmitting unit 42. Hereinafter, the processing performed by the processing unit 43 will be described in detail.
[0027] First, the processing regarding the active pen 2 will be described. The processing unit 43 first causes the transmission unit 42 to transmit the uplink signal US at a fixed period. The uplink signal US is a signal that notifies the active pen 2 of the transmission timing of the downlink signal DS and the reception timing of the next uplink signal US, and also has a role of supplying a command to the active pen 2. The active pen 2 generates the downlink signal DS in accordance with the command supplied by the uplink signal US, transmits it at the timing notified by the uplink signal US, and receives the next uplink signal US at the timing notified by the uplink signal US.
[0028] The downlink signal DSa is a signal including a first position signal which is an unmodulated carrier signal and a data signal which is a carrier signal modulated by data. The modulation method used for modulating to generate the data signal is typically DQPSK (Differential Quadrature Phase-Shift Keying) modulation, but other modulation methods such as QAM (Quadrature Amplitude Modulation) may also be used. Further, the downlink signal DSb is a signal including a second position signal which is an unmodulated carrier signal. The processing unit 43 derives the position of the active pen 2 based on the distribution of the levels (received intensities) of the first position signal at each of the sensor electrodes 30x, 30y. Further, the processing unit 43 controls the switching unit 40 and the receiving unit 41 so as to receive the data signal at one or more sensor electrodes 30x, 30y closest to the derived position, thereby acquiring the data transmitted by the active pen 2. The processing unit 43 further derives the position of the ring electrode 22 based on the distribution of the received intensities of the second position signal at each of the sensor electrodes 30x, 30y, and derives the inclination of the active pen 2 based on the difference between the derived position of the ring electrode 22 and the position of the active pen 2 derived based on the first position signal.
[0029] Next, regarding the processing related to the passive pointer, the processing unit 43 is configured to repeat, for each of the sensor electrodes 30y, control such that, with one of the sensor electrodes 30y selected and connected to the receiving unit 41, the transmission unit 42 is controlled to supply, in parallel one bit at a time, bit sequences prepared in advance for each of the sensor electrodes 30x to each of the sensor electrodes 30x. The transmission unit 42 under the control of the processing unit 43 generates each bit by phase-modulating a predetermined carrier signal and supplies it to each of the sensor electrodes 30x.
[0030] The receiving unit 41 is configured to acquire the level of the signal supplied from the selected sensor electrode 30y bit by bit and supply it to the processing unit 43 each time. Thus, the level of the signal supplied to the processing unit 43 reflects the change in the capacitance formed at the intersection of the currently selected sensor electrode 30y and each sensor electrode 30x. Therefore, the processing unit 43 derives the position of the passive pointer based on the level of the signal supplied from the receiving unit 41.
[0031] Next, the active pen 2 is an active type electrostatic stylus that communicates bidirectionally with the sensor controller 31. As shown in FIG. 1, it includes a core body 20, a pen tip electrode 21, a ring electrode 22, a pressure sensor 23, a battery 24, an integrated circuit 25, and a stop filter 26.
[0032] The core body 20 is a member that constitutes the pen shaft of the active pen 2. The tip of the core body 20 forms the pen tip of the active pen 2, and the end abuts against the pressure sensor 23. The pen tip electrode 21 and the ring electrode 22 are conductors provided at different positions. The pen tip electrode 21 is disposed at the pen tip of the active pen 2, and the ring electrode 22 is disposed to surround the core body 20 at a position closer to the center of the active pen 2 than the pen tip electrode 21.
[0033] The pressure sensor 23 is a sensor that detects the pressure applied to the tip of the core body 20. The pressure detected by the pressure sensor 23 is supplied to the integrated circuit 25 as a pen pressure value and is arranged in the data signal of the downlink signal DSa by the integrated circuit 25. The battery 24 serves to supply the power necessary for the integrated circuit 25 to operate.
[0034] The integrated circuit 25 is an integrated circuit composed of various circuits including a boost circuit, a transmission circuit, a reception circuit, and a processing circuit. The transmission circuit is connected to the pen tip electrode 21 and the ring electrode 22 and plays a role of transmitting the downlink signal DS by applying a change to the pen tip electrode 21 or the ring electrode 22 using the boost circuit.
[0035] The receiving circuit is connected to the ring electrode 22 and plays the role of receiving the uplink signal US by detecting the uplink signal US using the ring electrode 22. The processing circuit generates a downlink signal DS based on the uplink signal US received by the receiving circuit and performs processing to cause the generated downlink signal DS to be transmitted to the transmitting circuit.
[0036] The stop filter 26 is a filter circuit inserted between the ring electrode 22 and the integrated circuit 25 in order to enable simultaneous detection of the uplink signal US using the ring electrode 22 and transmission of the downlink signal DSa from the pen tip electrode 21. Specifically, the stop filter 26 may be configured by a band-stop filter (notch filter) that blocks a specific frequency band including the frequency of the downlink signal DSa, or a high-pass filter configured to pass the pulse wave constituting the uplink signal US while blocking the pulse wave constituting the downlink signal DSa. By using the stop filter 26, when the active pen 2 fails to receive the uplink signal US and loses the transmission timing of the downlink signal DS, etc., it is possible to continue detecting the uplink signal US while also transmitting the downlink signal DSa, thereby enabling continuous input by the active pen 2.
[0037] FIG. 2 is a diagram showing an example of the configuration of the receiving circuit arranged in the receiving unit 41. As shown in the figure, the receiving circuit in the receiving unit 41 includes a delta-sigma (ΔΣ) modulation unit 50, a processing unit 60, and a gain control unit 70. Among these, the delta-sigma modulation unit 50 includes a subtractor 51, an amplifier 52, an integrator 53, a quantizer 54, and a DAC (Digital Analog Converter) 55. Note that FIG. 2 shows an example in which the delta-sigma modulation unit 50 is configured by a single-stage configuration having only one integrator 53, but as illustrated in FIG. 4 described later, the delta-sigma modulation unit 50 may be configured by a multi-stage configuration having a plurality of integrators 53.
[0038] The subtractor 51 is a device that subtracts the feedback signal FB, which is the output signal of the DAC 55, from the received signal Va input from the corresponding sensor electrode 30x or sensor electrode 30y. The amplifier 52 serves to control the level of the output signal of the subtractor 51. The integrator 53 is a device that integrates the output signal of the subtractor 51 input via the amplifier 52.
[0039] The quantizer 54 is a device that quantizes the output signal of the integrator 53, and is composed of one comparator that outputs "1" or "-1" by determining the threshold value of the output signal of the integrator 53. Therefore, the delta-sigma modulation unit 50 is configured to perform 1-bit delta-sigma modulation. The output value of the quantizer 54 is supplied to the processing unit 60 as the output value Vo of the delta-sigma modulation unit 50.
[0040] The DAC 55 is a device that generates the feedback signal FB based on the output value of the quantizer 54. Specifically, the feedback signal FB is generated by amplifying a pulse signal indicating a series of output values of the quantizer 54 at a given amplification factor (gain). The specific value of the given amplification factor is set in the DAC 55 by the gain control unit 70.
[0041] The processing unit 60 is a functional unit that restores the received signal Va based on a series of output values Vo output from the delta-sigma modulation unit 50, and generates the in-phase component IOUT, quadrature component QOUT, level LEVEL (amplitude), and phase PHASE of the received signal Va by performing quadrature detection. When the received signal Va is a data signal, the processing unit 60 also performs a process of generating a symbol sequence SYMBOL by demodulating the received signal Va based on the generated phase PHASE (and level LEVEL if necessary). The in-phase component IOUT, quadrature component QOUT, level LEVEL, phase PHASE, and symbol sequence SYMBOL generated by the processing unit 60 are supplied to the processing unit 43 shown in FIG. 1. The processing unit 43 derives the position and inclination of the active pen 2 and the position of the passive pointer based on the level LEVEL thus supplied, while acquiring the data transmitted by the active pen 2 based on the symbol sequence SYMBOL.
[0042] The gain control unit 70 is a functional unit that controls the level of the feedback signal FB based on the level Level of the received signal Va generated by the processing unit 60. Although the details of this level Level will be described later, it is generated based on the signal before noise removal and may be different from the above-mentioned level LEVEL. The gain control unit 70 according to the example of FIG. 2 controls the level of the feedback signal FB by controlling the amplification factor of the pulse signal in the DAC 55 based on the level Level.
[0043] According to the above configuration, the level of the feedback signal FB can be made to follow the level of the received signal Va without using a quantizer with a multi-bit configuration. Therefore, it becomes possible to use the delta-sigma modulation unit 50 to detect the downlink signal DS (pen signal) with a large dynamic range.
[0044] FIG. 3 is a diagram showing another example of the configuration of the receiving circuit arranged in the receiving unit 41. In this example, a gain adjustment unit 56 is provided at the output stage of the quantizer 54, and the gain control unit 70 controls the gain of this gain adjustment unit 56, which is different from the example of FIG. 2. Even in this case, the level of the feedback signal FB can be made to follow the level of the received signal Va without using a quantizer with a multi-bit configuration, so that the same effect as the example shown in FIG. 2 can be obtained.
[0045] FIG. 4 is a diagram showing the configuration of the receiving circuit according to the example shown in FIG. 3 in more detail. However, FIG. 4 shows an example in the case where the delta-sigma modulation unit 50 has a two-stage configuration. Hereinafter, the configuration and operation of the receiving circuit will be described in more detail with reference to this FIG. 4.
[0046] As shown in FIG. 4, the delta-sigma modulation unit 50 includes subtracters 51a, 51b, amplifiers 52a, 52b, integrators 53a, 53b, a quantizer 54, and DACs 55a, 55b constituted by analog circuits, and a gain adjustment unit 56 constituted by a digital circuit.
[0047] The subtractor 51a subtracts the feedback signal FBa, which is the output signal of the DAC 55a, from the received signal Va and supplies it to the amplifier 52a. The amplifier 52a controls the level of the output signal of the subtractor 51a and supplies it to the integrator 53a. The integrator 53a integrates the output signal of the subtractor 51a input via the amplifier 52a and supplies it to the subtractor 51b. The subtractor 51b subtracts the feedback signal FBb, which is the output signal of the DAC 55b, from the output signal of the integrator 53a and supplies it to the amplifier 52b. The amplifier 52b controls the level of the output signal of the subtractor 51b and supplies it to the integrator 53b. The integrator 53b integrates the output signal of the subtractor 51b input via the amplifier 52b and supplies it to the quantizer 54.
[0048] The quantizer 54 is a comparator having a non-inverting input terminal to which the output signal of the integrator 53b is supplied and an inverting input terminal to which the ground potential is supplied, and is configured to output “+1” when the potential of the non-inverting input terminal is greater than the potential of the inverting input terminal, and “-1” otherwise.
[0049] The gain adjuster 56 generates the output value Vo by multiplying the output value of the quantizer 54 by a given multiplication value (gain) and supplies it to each of the processing unit 60 and the DACs 55a and 55b. The specific value of the given multiplication value is set in the gain adjuster 56 by the gain control unit 70.
[0050] The DACs 55a and 55b each generate the feedback signals FBa and Fb by amplifying a pulse signal indicating a series of output values Vo at a predetermined amplification factor. The specific value of the predetermined amplification factor may be the same or different between the DAC 55a and the DAC 55b, and is set in advance for each.
[0051] The processing unit 60 is configured to include a low-pass filter 61, quadrature demodulators 62a and 62b, a noise detector 63, a noise filter 64, an accumulator 65, a demodulator 66, and an arithmetic unit 67.
[0052] The low-pass filter 61 is a decimation filter that obtains and outputs a running average by counting (adding) the output value Vo at regular intervals. The output signal of the low-pass filter 61 becomes a digital signal obtained by restoring the received signal Va.
[0053] The quadrature demodulation unit 62a is a functional unit that performs quadrature detection of the output signal of the low-pass filter 61 with a predetermined frequency Fa. Also, the quadrature demodulation unit 62b is a functional unit that performs quadrature detection of the output signal of the low-pass filter 61 with a predetermined frequency Fb different from the frequency Fa. Although FIG. 4 shows two quadrature demodulation units 62a and 62b, the actual number of quadrature demodulation units arranged in the processing unit 60 is determined by the number of frequencies used. In a typical example, it is necessary to provide three quadrature demodulation units in order to perform detection at the frequencies of the carrier signals of the downlink signal DSa, the downlink signal DSb, and the signal for passive pointer detection, respectively. When tilt detection of the active pen 2 is not required, it may be possible not to use the downlink signal DSb. In that case, two quadrature demodulation units may be provided in order to perform detection of the downlink signal DSa and the signal for passive pointer detection, respectively. Also, it may be possible to transmit the downlink signal DSa from each of a plurality of active pens 2 by frequency division multiplexing. In this case, it is necessary to provide a quadrature demodulation unit for each frequency of the carrier signal of the downlink signal DSa. Hereinafter, the description will continue on the premise of using two quadrature demodulation units 62a and 62b as shown in FIG. 4.
[0054] The quadrature detection performed by the quadrature demodulation units 62a and 62b is specifically a process of obtaining the convolution sum (inner product) of the output signal of the low-pass filter 61 with the sine wave and cosine wave of the corresponding frequency, respectively. The quadrature demodulation units 62a and 62b are configured to output the in-phase component IOUT, which is the convolution sum with the cosine wave, and the quadrature component QOUT, which is the convolution sum with the sine wave, to the noise filter 64.
[0055] The noise detector 63 is a functional unit that detects impulse noise (e.g., liquid crystal noise generated from a display) included in the output value Vo and supplies the detected impulse noise to the noise filter 64. The noise filter 64 performs a process of removing the impulse noise supplied from the noise filter 64 from the signals (in-phase component IOUT and quadrature component QOUT) supplied from the quadrature demodulation units 62a and 62b.
[0056] The accumulator 65 obtains a degree-of-match vector based on the signals (in-phase component IOUT and quadrature component QOUT) after the impulse noise has been removed by the noise filter 64. Further, the accumulator 65 obtains a moving average of each of the length and slope of the degree-of-match vector using a window of a predetermined time length, and sequentially outputs the obtained average value of the length as the level LEVEL (amplitude) and the average value of the slope as the phase PHASE to the processing unit 43 shown in FIG. 1. The accumulator 65 is also configured to output the signals (in-phase component IOUT and quadrature component QOUT) themselves supplied from the noise filter 64 to the processing unit 43. In FIG. 4, an "a" is appended to the end of each of the in-phase component IOUT, quadrature component QOUT, level LEVEL, and phase PHASE corresponding to the quadrature demodulation unit 62a, and a "b" is appended to the end of each of the in-phase component IOUT, quadrature component QOUT, level LEVEL, and phase PHASE corresponding to the quadrature demodulation unit 62b.
[0057] The demodulator 66 is a functional unit that acquires the data transmitted by the active pen 2 by demodulating the output value Vo based on the data acquired by the accumulator 65. For example, when the data signal included in the downlink signal DSa is generated by DQPSK modulation, the demodulator 66 is configured to acquire the data transmitted by the active pen 2 based on the phase PHASE acquired by the accumulator 65. Also, for example, when the data signal included in the downlink signal DSa is generated by QAM, the demodulator 66 is configured to acquire the data transmitted by the active pen 2 based on the level LEVEL and phase PHASE acquired by the accumulator 65. The demodulator 66 generates a symbol sequence SYMBOL indicating the acquired data and outputs it to the processing unit 43. In FIG. 4, an "a" is appended to the end of the symbol sequence SYMBOL corresponding to the quadrature demodulation unit 62a, and a "b" is appended to the end of the symbol sequence SYMBOL corresponding to the quadrature demodulation unit 62b.
[0058] The calculator 67 is a functional unit that derives the level Level (amplitude) for each frequency of the received signal Va using the results of quadrature detection by the quadrature demodulation units 62a and 62b, and performs statistical processing on the derived level Level. The derivation of the level Level may be executed by performing the same processing as the accumulator 65 based on the output signals (in-phase component IOUT and quadrature component QOUT) of the quadrature demodulation units 62a and 62b respectively. The statistical processing may be smoothing processing for smoothing the derived level Level, or prediction processing for predicting future level Levels based on the level Levels derived so far. The calculator 67 is configured to supply the level Level for each frequency obtained by the statistical processing to the gain control unit 70. In FIG. 4, an "_a" is appended to the end of the level Level corresponding to the quadrature demodulation unit 62a (frequency Fa), and a "_b" is appended to the end of the level Level corresponding to the quadrature demodulation unit 62b (frequency Fb).
[0059] The gain control unit 70 includes an adder 71, a low-pass filter 72, and a control unit 73. The adder 71 is a level determination unit that determines the value of the level Level used for controlling the levels of the feedback signals FBa and Fb based on the plurality of levels Level supplied from the arithmetic unit 67. Specifically, the value of the level Level used for controlling the levels of the feedback signals FBa and Fb may be determined by performing an addition process of adding up the plurality of levels Level or a selection process of selecting one of the plurality of levels Level (for example, the maximum one).
[0060] The low-pass filter 72 is a functional unit that generates the control amount LPinfo of the gain adjustment unit 56 based on the level Level determined by the adder 71. In a specific example, the low-pass filter 72 may be configured by a decimation filter that obtains and outputs an addition average by counting (adding) the level Level output from the adder 71 at regular intervals. The control unit 73 controls the gain (multiplication value) of the gain adjustment unit 56 according to the control amount LPinfo generated by the low-pass filter 72.
[0061] Here, the reason for not using the level LEVEL acquired by the accumulator 65 as the level supplied from the processing unit 60 to the gain control unit 70 is that it is preferable to control the gain of the gain adjustment unit 56 based on the level of the signal including noise. As described above, by controlling the gain of the gain adjustment unit 56 using the level Level obtained based on the signal before noise removal, it becomes possible to make the level of the feedback signal follow the level of the received signal Va (the received signal Va in a state including noise) actually input to the delta-sigma modulation unit 50.
[0062] FIG. 5 is a diagram showing simulation results of the received signal Va and the output value Vo. FIG. 5(a) shows the simulation results of a comparative example in which control by the gain control unit 70 is not performed, and FIGS. 5(b) and 5(c) show the simulation results of an embodiment in which control by the gain control unit 70 is performed. In this simulation, the delta-sigma modulation unit 50 has a single-stage configuration, and the received signal Va is a sine wave with a predetermined period. Also, in FIGS. 5(a) and 5(b), the level (amplitude) of the received signal Va is increased every two periods, while in FIG. 5(c), the level (amplitude) of the received signal Va is decreased every two periods. Further, in each figure, the received signal Va, the output value Vo, and the output signal ΔV of the subtractor 51 are plotted.
[0063] As shown in FIG. 5(a), when control by the gain control unit 70 is not performed, when the level of the received signal Va increases as the active pen 2 approaches the touch surface 3a, the output signal ΔV of the subtractor 51 stops oscillating, and as a result, the output value Vo also stops oscillating. Since the received signal Va cannot be restored from the output value Vo in this way, the quadrature detection by the processing unit 60 stops functioning.
[0064] As shown in FIG. 5(b), if control by the gain control unit 70 is performed, even when the level of the received signal Va increases as the active pen 2 approaches the touch surface 3a, the oscillation state of the output signal ΔV of the subtractor 51 is maintained, and as a result, the oscillation state of the output value Vo is also maintained. Therefore, it becomes possible to make the quadrature detection by the processing unit 60 function normally. Note that since there is a certain time lag until the level of the received signal Va is detected by the processing unit 60, as shown in FIG. 5(b), after the level of the received signal Va increases, the output value Vo stops oscillating for a certain period, but the influence of this time lag on the demodulation by the demodulation unit 66 and the detection of the position and inclination by the processing unit 43 is minor.
[0065] Further, as understood from FIG. 5(c), according to the control by the gain control unit 70, when the level of the reception signal Va decreases as the active pen 2 moves away from the touch surface 3a, the gain of the gain adjustment unit 56 can be decreased. And even in this case, the oscillation states of the output signal ΔV and the output value Vo are maintained. From this result, it is understood that according to the control by the gain control unit 70, even if the level of the reception signal Va varies variously, a state where the quadrature detection by the processing unit 60 can be performed normally can be maintained.
[0066] As described above, the preferred embodiments of the present invention have been explained. However, the present invention is not limited to such embodiments at all, and it goes without saying that the present invention can be implemented in various modes without departing from the gist thereof.
[0067] FIG. 6 is a diagram showing a reception circuit included in the reception unit 41 according to a modification of the present embodiment. As understood by comparing this figure with FIG. 4, this modification is different from the present embodiment in that the comparator 57a, 57b, the gain adjustment unit 58a, 58b, and the adder 59 are provided in the delta-sigma modulation unit 50.
[0068] The comparators 57a, 57b are not quantizers, but are comparators that respectively detect that the absolute value of the level of the output signal of the integrator 53b exceeds a predetermined value. In one example, the comparator 57a outputs "1" when the level of the output signal of the integrator 53b exceeds a predetermined value Vref (Vref>0), and outputs "0" otherwise. The comparator 57b is configured to output "1" when the level of the output signal of the integrator 53b is lower than the predetermined value -Vref, and output "0" otherwise.
[0069] The gain adjustment units 58a, 58b are respectively functional units that multiply the output values of the comparators 57a, 57b by a predetermined value. In one example, the predetermined value multiplied by the gain adjustment unit 58a is 64, and the predetermined value multiplied by the gain adjustment unit 58a is -64.
[0070] The adder 59 is a functional unit that controls the levels of the feedback signals FBa and Fb by adding the output values of the gain adjusters 58a and 58b to the output value of the gain adjuster 56. Since the output values of the gain adjusters 58a and 58b become non-zero values only when the absolute value of the level of the output signal of the integrator 53b exceeds a predetermined value, the adder 59 controls the levels of the feedback signals FBa and Fb when it is detected by the comparators 57a and 57b that the absolute value of the level of the output signal of the integrator 53b has exceeded the predetermined value.
[0071] According to this modification, when the level of the received signal Va becomes large beyond the adjustment range of the gain control unit 70, and as a result, the absolute value of the output signal of the integrator 53b becomes too large, the levels of the feedback signals FBa and Fb can be controlled to reduce the absolute value of the output signal of the integrator 53b. Therefore, even if the level of the received signal Va may become large beyond the adjustment range of the gain control unit 70, it becomes possible to use the delta-sigma modulation unit 50 to detect the downlink signal DS (pen signal).
[0072] Also, in the above embodiment, the case where the active pen 2 and the sensor controller 31 perform bidirectional communication has been described. However, the present invention is also preferably applicable to the case where the active pen 2 and the sensor controller 31 perform unidirectional communication from the active pen 2 to the sensor controller 31.
[0073] Also, in the above embodiment, an example using the quantizer 54 configured by one comparator has been described. However, the present invention is also applicable to the case of using a multi-bit quantizer including a plurality of comparators.
Explanation of Reference Numerals
[0074] 1 Position detection system 2 Active pen 3 Electronic device 3a Touch surface 20 Core 21 Pen tip electrode 22 Ring electrode 23 Pressure sensor 24 Battery 25 Integrated circuit 26 Stop filter 30 Sensor 30x, 30y Sensor electrodes 31 Sensor controller 32 Host processor 40 Switching unit 41 Receiver 42 Transmitter 43 Processing unit 50 Delta-sigma modulation unit 51, 51a, 51b Subtractors 52, 52a, 52b Amplifiers 53, 53a, 53b Integrators 54 Quantizer 55, 55a, 55b DACs 56 Gain adjuster 57a, 57b Comparators 58a, 58b Gain adjusters 59 Adder 60 Processing unit 61 Low-pass filter 62a, 62b Quadrature demodulation units 63 Noise detector 64 Noise filter 65 Accumulator 66 Demodulator 67 Arithmetic unit 70 Gain control unit 71 Adder 72 Low-pass filter 73 Control unit DS, DSa, DSb Downlink signals FB, FBa, FBb Feedback signals Fa, Fb Frequencies IOUT, IOUTa, IOUTb In-phase components LEVEL, LEVELa, LEVELb Levels Level, Level_a, Level_b Levels LPinfo Control quantity PHASE, PHASEa, PHASEb Phase QOUT Quadrature component SYMBOL Symbol sequence US Uplink signal Va Received signal Vo Output value
Claims
1. An integrated circuit for detecting a pen signal transmitted from an active pen, comprising: a subtractor for subtracting a feedback signal from the pen signal input from a sensor; an integrator for integrating the output signal of the subtractor; a quantizer for quantizing the output signal of the integrator; and a delta-sigma modulation unit including a DAC for generating the feedback signal based on the output value of the quantizer; a processing unit for detecting the level of the pen signal based on the output value of the delta-sigma modulation unit; a gain control unit for controlling the level of the feedback signal based on the level of the pen signal detected by the processing unit; a gain adjustment unit for generating the output value of the delta-sigma modulation unit by adjusting the gain of the output value of the quantizer, wherein the DAC generates the feedback signal based on the output value of the delta-sigma modulation unit; the gain control unit controls the gain of the gain adjustment unit based on the level of the pen signal detected by the processing unit, thereby controlling the level of the feedback signal and the output value of the delta-sigma modulation unit; an integrated circuit.
2. The delta-sigma modulation unit is configured to perform 1-bit delta-sigma modulation in which the quantizer is constituted by one comparator. The integrated circuit according to claim 1.
3. From the subtractor to the quantizer in the delta-sigma modulation unit is constituted by an analog circuit, and the gain adjustment unit is constituted by a digital circuit. The integrated circuit according to claim 1.
4. The processing unit includes a low-pass filter for restoring the pen signal based on the output value of the delta-sigma modulation unit, and a quadrature demodulation unit for performing quadrature demodulation of the pen signal restored by the low-pass filter. The processing unit detects the level using the result of the quadrature demodulation. The integrated circuit according to any one of claims 1 to 3.
5. The processing unit detects the level by performing statistical processing on the level derived using the result of the quadrature demodulation. The integrated circuit according to claim 4.
6. The statistical processing is a smoothing process for smoothing the derived level or a prediction process for predicting the future level based on the derived level. The integrated circuit according to claim 5.
7. An integrated circuit for detecting a pen signal transmitted from an active pen, comprising: An adder that subtracts a feedback signal from the pen signal input from the sensor, An integrator that integrates the output signal of the adder, A quantizer that quantizes the output signal of the integrator, and A delta-sigma modulation unit including a DAC that generates the feedback signal based on the output value of the quantizer, A processing unit that detects the level of the pen signal based on the output value of the delta-sigma modulation unit, A gain control unit that controls the level of the feedback signal based on the level of the pen signal detected by the processing unit, The processing unit, A low-pass filter that restores the pen signal based on the output value of the delta-sigma modulation unit, and a quadrature demodulation unit that performs quadrature demodulation of the pen signal restored by the low-pass filter, A noise filter that removes noise from the output signal of the quadrature demodulation unit, The processing unit detects the level using the result of the quadrature demodulation, The processing unit detects the level based on the output signal of the quadrature demodulation unit before noise is removed by the noise filter, An integrated circuit.
8. An integrated circuit for detecting a pen signal transmitted from an active pen, An adder that subtracts a feedback signal from the pen signal input from the sensor, An integrator that integrates the output signal of the adder, A quantizer that quantizes the output signal of the integrator, and A delta-sigma modulation unit including a DAC that generates the feedback signal based on the output value of the quantizer, A processing unit that detects the level of the pen signal based on the output value of the delta-sigma modulation unit, A gain control unit that controls the level of the feedback signal based on the level of the pen signal detected by the processing unit, The processing unit includes a low-pass filter that restores the pen signal based on the output value of the delta-sigma modulation unit, and a plurality of quadrature demodulation units that perform quadrature demodulation of the pen signal restored by the low-pass filter at different frequencies, The processing unit detects the level using the result of the quadrature demodulation for each quadrature demodulation unit, An integrated circuit.
9. The gain control unit includes a level determination unit that determines the level of the pen signal used for controlling the level of the feedback signal based on a plurality of the levels detected by the processing unit, The integrated circuit according to Claim 8.
10. The level determination unit determines the level of the pen signal used for controlling the level of the feedback signal by performing a summation process of summing the plurality of levels detected by the processing unit, or a selection process of selecting one of the plurality of levels detected by the processing unit. The integrated circuit according to claim 9.
11. The plurality of quadrature demodulation units include a first quadrature demodulation unit that performs quadrature detection at the frequency of the carrier signal of the pen signal, and a second quadrature demodulation unit that performs quadrature detection at the frequency of the carrier signal of the passive pointer detection signal used for detecting a passive pointer. The integrated circuit according to any one of claims 8 to 10.
12. The pen signal includes first and second pen signals transmitted using carrier signals having different frequencies from each other. The plurality of quadrature demodulation units include a first quadrature demodulation unit that performs quadrature detection at the frequency of the carrier signal of the first pen signal, and a second quadrature demodulation unit that performs quadrature detection at the frequency of the carrier signal of the second pen signal. The integrated circuit according to any one of claims 8 to 10.
13. The first and second pen signals are generated by different active pens from each other. The integrated circuit according to claim 12.
14. The first and second pen signals are transmitted from different electrodes arranged in one active pen. The integrated circuit according to claim 12.
15. The delta-sigma modulation unit a comparator that detects that the absolute value of the level of the output signal of the integrator exceeds a predetermined value, and an adder that controls the level of the feedback signal when the comparator detects that the absolute value of the level of the output signal of the integrator exceeds the predetermined value. The integrated circuit according to any one of claims 1 to 14.
Citation Information
Patent Citations
Method and system for detecting capacitance using sigma-delta measurement
JP2008542760A
Pensis system for internal pressure, inclination and rotation
JP2018510436A
Methods and systems for detecting a capacitance using sigma-delta measurement techniques
US20070046299A1
Position indicator, position detection device, position detection circuit, and position detection method
WO2015111159A1
Method for transmitting transmission data from sensor controller to pen, and pen
WO2020230223A1