Field emission device and method for manufacturing the same

Abstract

To suppress discharge between an emitter and a gate electrode, and suppress influence on other field emission elements even when discharge occurs in a certain field emission element.SOLUTION: A field emission element 10 includes: an emitter 12 formed on a substrate 11 and having a pointed tip unit 12a; and a gate electrode 15 having an opening 15a formed on the substrate via insulation layers 13, 14 and through which the tip unit of the emitter is exposed. The gate electrode is made of a polycrystalline multilayer graphene film.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a field emission device that emits electrons from the tip of an emitter by applying a high voltage between the emitter and a gate electrode, and a method for manufacturing the same.

Background Art

[0002] A field emission type electron source in which an emitter having a conical shape perpendicular to a substrate and a pull-out gate electrode for applying an electric field for emitting electrons from the emitter are integrated is expected to be applied to display devices such as flat panel displays and traveling wave tubes (ultra-high frequency tubes).

[0003] A spin type emitter is known as a field emission device (see, for example, Non-Patent Document 1). The inventor of the present application has disclosed a gate electrode integrated type field emission device having a volcanic type pull-out gate electrode (see Patent Document 1).

[0004] When a field emission device array is applied to a traveling wave tube or an X-ray source, it emits a large current. When a large current is emitted, unexpected discharge occurs between the emitter and the gate electrode, and due to this discharge, the emitter and the gate electrode are melted, the emitter and the gate electrode are short-circuited, and the entire device stops functioning.

[0005] As an unexpected discharge, it is also conceivable that a part of the electrons emitted from the emitter enters the gate electrode, thereby locally releasing gas from the gate electrode, and the gas release triggers the discharge. When discharge occurs between the emitter and the gate electrode, a structure has been proposed in which an electrode as a fuse for power supply is blown within a small block of the field emission device array (see, for example, Patent Documents 2 and 3).

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

[0007] [Non-Patent Document 1] C. A. Spindt, et al., J. Appl. Phys. 47, 5248 (1976) [Summary of the Invention] [Problems to be Solved by the Invention]

[0008] As a result of the studies by the inventor of the present application, in the field emission element array having the structures of Patent Documents 2 and 3, when discharge occurs between the emitter and the gate electrode in a small block, the melted electrode scatters, and it has been found that an undesirable situation occurs in which a short circuit also occurs in the field emission element array of the surrounding small blocks.

[0009] An object of the present invention is to provide a field emission element that avoids discharge between the emitter and the gate electrode and suppresses adverse effects on other field emission elements even if discharge occurs. [Means for Solving the Problems]

[0010] According to one aspect of the present invention, there is provided a field emission element including an emitter with a pointed tip formed on a substrate, and a gate electrode having an opening exposing the tip of the emitter formed on the substrate with an insulating layer therebetween, wherein the gate electrode is made of a polycrystalline multilayer graphene film.

[0011] According to the above aspect, since the gate electrode having an opening that exposes the tip of the emitter is made of a multilayer graphene film, even if a part of the electrons emitted from the emitter enters the gate electrode, abnormal discharge due to gas emission can be avoided. Even if the electrons enter the gate electrode and become hot, they sublime without melting, and no defect occurs that causes a short circuit between the emitter and the gate electrode, and it is possible to provide a field emission element that suppresses adverse effects on other field emission elements.

[0012] According to another aspect of the present invention, there is provided a method for manufacturing a field emission element including a pointed emitter formed on a substrate and a gate electrode having an opening that exposes the tip of the emitter formed on the substrate via an insulating layer and made of a polycrystalline multilayer graphene film. The method includes forming a metal film at a position where the gate electrode is to be formed and an amorphous carbon film thereon, and forming a polycrystalline multilayer graphene film in which the amorphous carbon film is crystallized at the position of the metal film by a layer exchange method of heating the metal film and the amorphous carbon film in a vacuum.

[0013] According to the above another aspect, as the gate electrode, a polycrystalline multilayer graphene film is formed by using a layer exchange method of a metal film and an amorphous carbon film. Metal atoms of the metal film remain between the layers of the multilayer graphene film, and peeling of the multilayer graphene film itself can be suppressed by the fact that the orientation plane of graphene fluctuates in a direction parallel to the film surface of the multilayer graphene film in a part of the region of the multilayer graphene film.

Brief Description of the Drawings

[0014]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

[0015] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following description, elements common to a plurality of drawings are denoted by the same reference numerals, and repeated detailed descriptions thereof are omitted.

[0016] [First Embodiment] FIG. 1 is a cross-sectional view showing the configuration of a field emission device according to the first embodiment of the present invention. Referring to FIG. 1, the field emission device 10 according to the present embodiment includes a substrate 11, an emitter 12 having a pointed tip portion 12a formed on the substrate 11, a first insulating layer 13 and a second insulating layer 14 formed on the substrate 11 so as to surround the emitter 12, and a gate electrode 15 having an opening 15a exposing the tip portion 12a of the emitter 12 on the second insulating layer 14. By applying a high voltage, for example, 50 to 100 V, between the gate electrode 15 and the emitter 12, electrons are drawn out from the tip portion 12a of the emitter 12 and emitted to the outside.

[0017] The substrate 11 is a conductive substrate. As the substrate 11, a substrate made of an insulating material, for example, a silicon substrate, may be used. In this case, an emitter electrode layer (not shown) made of a metal material is formed on the substrate 11. The substrate 11 or the emitter electrode layer is electrically connected to the emitter 12.

[0018] The first insulating layer 13 is made of an insulating material, such as a silicon oxide film or an aluminum oxide film with a thickness of 500 nm. An opening 13a communicating with the opening 15a of the gate electrode 15 is formed in the first insulating layer 13. The opening 13a is formed to retreat from the emitter 12 more than the opening 15a.

[0019] The second insulating layer 14 is formed on the first insulating layer 13 and is made of an insulating material that is difficult to permeate oxygen molecules and water molecules, such as a silicon nitride film. The second insulating layer 14 has a thickness of, for example, 30 nm. The second insulating layer 14 suppresses the oxygen molecules and water molecules released from the first insulating layer 13 from adversely affecting the formation of the multilayer graphene film of the gate electrode 15 on the second insulating layer 14. In addition, the second insulating layer 14 is preferably provided in terms of suppressing surface discharge. When the first insulating layer 13 is a thermal oxide film of silicon, the second insulating layer 14 may be omitted in that it does not adversely affect the formation of the multilayer graphene film. An opening 14a communicating with the opening 13a and the opening 15a is formed in the second insulating layer 14.

[0020] The second insulating layer 14 is preferably slightly conductive in that it can prevent discharge due to the charge-up of the field emission element 10, and the electrical resistance value is preferably 1 GΩ to 10 GΩ.

[0021] The emitter 12 has a shape with a pointed tip 12a, such as a conical or pyramidal shape. The emitter 12 is, for example, conical with a height of 800 nm and a diameter of 700 nm. The emitter 12 is made of a metal material such as molybdenum, nickel, or tungsten.

[0022] The gate electrode 15 is made of a polycrystalline multilayer graphene film. The multilayer graphene film is formed by stacking a plurality of two-dimensional sheet-like single-layer graphene sheets composed of a six-membered ring network of carbon atoms. Even if a part of the electrons emitted from the emitter 12 is incident on the multilayer graphene film, gas emission does not occur, and abnormal discharge due to gas emission can be avoided. The multilayer graphene film has a sublimation point of 3500 °C or higher, extremely high heat resistance, and extremely high thermal conductivity. Therefore, even if the electrons are incident and the temperature exceeds 3500 °C, it sublimates without melting, and no defect occurs that would cause a short circuit between the emitter 12 and the gate electrode 15.

[0023] Figure 2 is an explanatory diagram of the polycrystalline multilayer graphene film of the gate electrode, where (a) is a plan view and (b) is a cross-sectional view. Referring to Figures 2(a) and (b) in combination with Figure 1, the multilayer graphene film of the gate electrode 15 is composed of polycrystals in which a large number of crystal grains 15b having grain boundaries 15c are formed. Each crystal grain 15b is formed by stacking multiple layers of graphene 15d. In most regions 15e, the orientation plane direction of each graphene 15d is substantially parallel to the film plane of the multilayer graphene film, and this is the preferred orientation direction. As shown in Figure 2(b), in the interior of the crystal grain 15b or near the grain boundary, there is a part of the region 15f where the orientation plane is inclined from the orientation plane of the surrounding region 15e that forms the preferred orientation direction. That is, in a part of the region 15f of the multilayer graphene film of the gate electrode 15, the orientation plane fluctuates from a direction parallel to the film plane of the multilayer graphene film. The region 15f where the orientation plane fluctuates is about 1% in terms of area ratio when the multilayer graphene film is viewed in plan. Thus, the presence of the region 15f where the orientation plane fluctuates from a direction parallel to the film plane of the multilayer graphene film makes it difficult for the multilayer graphene film to peel off.

[0024] Since the orientation plane of the multilayer graphene film of the gate electrode 15 is partially fluctuating, when the grain size of the crystal grains 15b becomes small, the electrical resistivity in the orientation plane direction increases. On the other hand, for the multilayer graphene film, when the grain size of the crystal grains 15b is large, it is easy to peel off, and when it is small, it is difficult to peel off. The size of the crystal grains 15b is preferably such that the average grain size is 300 nm to 3000 nm in terms of a good balance between the electrical resistivity and the difficulty of peeling, and particularly preferably the average grain size is 700 nm to 1500 nm. The measurement of the average grain size is performed using, for example, a transmission electron microscope (TEM) for the multilayer graphene film. The multilayer graphene film peeled off is placed on the mesh of the TEM, observed from a direction perpendicular to the orientation plane, the particle diameter in a certain direction of the crystal grains 15b is measured, and about 20 particle diameters are arithmetically averaged to obtain the average grain size.

[0025] The multilayer graphene film of the gate electrode 15 contains metal atoms between the graphene layers. The metal atoms are the atoms constituting the metal film used in the layer exchange method and include one metal selected from the group of Cr, Mn, Fe, Co, Ni, Ru, Ir, and Pt. Thereby, it is difficult for the multilayer graphene film to peel off. As will be described later, this metal atom is preferably Ni because it has a low melting point and it is easy to form a multilayer graphene film by the layer exchange method. It is particularly preferable that the metal atoms are contained in the multilayer graphene film in an amount of 0.1% by weight to 1% by weight in terms of suppressing the peeling of the multilayer graphene film.

[0026] According to the present embodiment, since the gate electrode 15 having the opening 15a for exposing the tip portion 12a of the emitter 12 is made of a multilayer graphene film, even if a part of the electrons emitted from the emitter 12 enters the gate electrode 15, abnormal discharge due to gas emission can be avoided. Even if the electrons enter the gate electrode 15 and become hot, they sublime without melting, and no defect occurs that causes a short circuit between the emitter 12 and the gate electrode 15, and further, an electron field emission element 10 can be provided that suppresses adverse effects on other field emission elements.

[0027] [Method for manufacturing a field emission element according to the first embodiment] Figs. 3 and 4 are process diagrams of a method for manufacturing a field emission element according to the first embodiment. With reference to Figs. 3(a) to (d) and Figs. 4(a) to (b) in combination with Fig. 1, the method for manufacturing the field emission element 10 will be described.

[0028] In the process of Fig. 3(a), a first insulating layer 13A such as a silicon oxide film or an aluminum oxide film is formed on a conductive substrate 11 by a known film-forming technique such as chemical vapor deposition (CVD) method or sputtering method. When using a substrate made of an insulating material, for example, a silicon substrate, as the substrate 11, a metal film is formed as an emitter electrode layer on the silicon substrate by sputtering method or vacuum evaporation method, and the first insulating layer 13A is formed thereon. Alternatively, conductivity may be imparted to the silicon substrate by ion implantation or the like, and the first insulating layer 13A may be formed on the surface by thermal oxidation.

[0029] Next, a second insulating layer 14A is formed on the first insulating layer 13A by a known film-forming technique such as CVD method or sputtering method. The second insulating layer 14A is made of an insulating material that is difficult to permeate oxygen molecules and water molecules from the first insulating layer 13 so as to eliminate the adverse effect on the growth of the multilayer graphene film serving as the gate electrode. The second insulating layer 14A is preferably a silicon nitride film that is difficult to permeate oxygen molecules and water molecules. The second insulating layer 14A preferably has a thickness of 20 nm or more in terms of being able to make it difficult to permeate oxygen molecules and water molecules. When the first insulating layer 13A is a thermal oxide film of silicon, even without the second insulating layer 14A, a multilayer graphene film could be formed on the first insulating layer 13A by the method of the process in Fig. 3(b) through experiments, so the formation of the second insulating layer 14A may be omitted.

[0030] Next, a metal film 16A is formed on the second insulating layer 14A by a known film formation method such as a sputtering method or an electron beam evaporation method. The thickness of the metal film 16A is set to be the same as the thickness of the multilayer graphene film 15A formed by the layer exchange method in the process of FIG. 3(b). The thickness of the metal film 16A may be set in consideration of electric field concentration or the like so that the field emission element 10 finally formed is likely to emit electrons. The thickness of the metal film 16A is preferably 50 nm to 500 nm, and particularly preferably 100 nm to 200 nm, from the viewpoint of film quality such as crystallinity, electrical resistivity, and thermal conductivity of the multilayer graphene film of the gate electrode 15 finally formed.

[0031] The metal film 16A is one metal selected from the group of Cr, Mn, Fe, Co, Ni, Ru, Ir, and Pt. The layer exchange method and the elements of the metal film are disclosed in the literature Y. Nakajima et.al, ACS Appl. Mater. Interfaces 2018, 10, 41664-41669. The metal film 16A is preferably a Ni film in terms of the low formation temperature of the multilayer graphene film.

[0032] Next, an amorphous carbon film 18 is formed on the metal film 16A by a known film formation technique such as a CVD method or a sputtering method. The thickness of the amorphous carbon film 18 is set to be the same as the thickness of the metal film 16A.

[0033] Note that by forming an aluminum oxide film (not shown) with a thickness of about 2 nm between the metal film 16A and the amorphous carbon film 18, the film quality of the finally formed multilayer graphene film can be improved (see H. Murata et al., Scientific reports, (2019) 9, 4068).

[0034] Next, in the process of FIG. 3(b), the substrate 11 on which the first insulating layer 13A, the second insulating layer 14A, the metal film 16A, and the amorphous carbon film 18 are laminated in the process of FIG. 3(a) is heat-treated in a vacuum, so that the amorphous carbon film 18 crystallizes at the position of the metal film 16A to form a multilayer graphene film 15A, and the metal of the metal film 16A moves to the position of the amorphous carbon film 18 to form a metal film 16B. This process is called the layer exchange method. The heating conditions are appropriately selected according to the metal material of the metal film 16A, but are generally about 800° C. for about 1 hour. When the metal of the metal film 16A is Ni, the layer exchange occurred even under the heating conditions of 500° C. for 1 hour.

[0035] In this process, metal atoms of the metal film 16A remain between the layers of the multilayer graphene film 15A. It is particularly preferable that the metal atoms are contained in the multilayer graphene film in an amount of 0.1 wt% to 1 wt% in particular, in terms of suppressing the peeling of the multilayer graphene film. Further, in the multilayer graphene film 15A, a region where the orientation plane fluctuates from a direction parallel to the film surface exists, so that the multilayer graphene film 15A that is difficult to peel is formed.

[0036] Next, in the process of FIG. 3(c), a removal process of the outermost metal film 16B is performed. The removal process is performed using an acidic chemical solution for the metal film 16B. When the metal film 16B is Ni, a nitric acid-based chemical solution may be used, and when the metal film 16B is another metal, aqua regia may be used. At this time, the chemical solution does not adversely affect the multilayer graphene film 15A and can remove the metal film 16B.

[0037] Next, a circular pattern with a diameter of about 1 μm is formed on the multilayer graphene film 15A by photolithography, and an etching process is performed to remove the underlying multilayer graphene film 15A, the second insulating layer 14A, and the first insulating layer 13A to expose the surface of the substrate 11, thereby forming a recess 17 composed of openings 13a to 15a. For the etching process, a reactive ion etching (RIE) method can be used. In the etching by the RIE method, oxygen gas is used for the multilayer graphene film 15A, sulfur hexafluoride (SF6) gas is used when the second insulating layer 14A is a silicon nitride (SiN) film, and a mixed gas of methane tetrafluoride (CF4) and hydrogen (H2) gas, trifluoromethane (CHF3) gas, etc. are used when the first insulating layer 13A is a silicon oxide (SiO2) film. The gas used in the RIE method can be a known gas according to the material to be etched.

[0038] Next, an etching process is performed using buffered hydrofluoric acid (BHF) solution to remove the second insulating layer 14A, the first insulating layer 13A, and the second insulating layer 14A in the lateral direction (in-plane direction of the film). Since the etching rates of the SiN film and the SiO2 film with respect to the BHF solution are different, as shown in Fig. 3(c), the first insulating layer 13A has a structure that retreats from the center of the openings 13a and 14a more than the second insulating layer 14A.

[0039] Next, in the process of Fig. 3(d), while rotating the substrate 11, a sacrificial layer material is vapor-deposited on the substrate 11 from an oblique direction to form a sacrificial layer 19 that covers the surface of the multilayer graphene film that becomes the gate electrode 15 and the sidewalls of the opening 15a. The angle of oblique vapor deposition is set so that the sidewalls of the opening 15a are sufficiently covered with the sacrificial layer material. The material of the sacrificial layer 19 is not particularly limited as long as it can be easily removed with an acid or alkaline chemical solution, and for example, aluminum or magnesium oxide can be used.

[0040] Next, in the process of FIG. 4(a), a conical emitter 12 is formed on the surface of the substrate 11 in the recess 17 by electron beam evaporation or ionized sputtering of the emitter material from a direction perpendicular to the substrate 11. By this evaporation, the emitter material 12A is deposited on the surface of the sacrificial layer 19. The ionized sputtering method is performed by, for example, the method disclosed in Japanese Patent No. 6093968. In the ionized sputtering method, the range of selection of the emitter material is wider than that of the electron beam evaporation method. For example, borides such as LaB6, carbides having conductivity such as TiC, ZrC, HfC, NbC, TaC, Mo2C, WC, carbide semiconductors such as SiC and GeC (including those doped with impurities), nitrides having conductivity such as TiN, VN, CrN, ZrN, NbN, MoN, HfN, TaN, WN, nitride semiconductors such as AlN and GaN (including those doped with impurities), Sr2RuO4, SrRuO3, RuO2, IrO2, Sr4Ru3O 10 , oxides having conductivity such as CaRuO3, BaRuO3, LaNiO3, La3Ni2O7, ReO3, SrFeO3, SrCoO3, SrIrO3, ZnO, InO2, InGaZnO can also be used.

[0041] In this process, the deposition of the emitter material applies stress to the multilayer graphene film of the gate electrode 15 through the sacrificial layer 18, making it easier to peel off. However, in the multilayer graphene film 15A of the present embodiment, metal atoms remain between the layers in the process of FIG. 3(b) above, and the orientation plane of each crystal grain of the multilayer graphene film 15A fluctuates from a direction parallel to the film surface of the multilayer graphene film, so that the peeling of the multilayer graphene film itself can be suppressed.

[0042] Next, in the process of FIG. 4(b), the sacrificial layer 19 is dissolved by a chemical solution of an acid or an alkali, and the emitter material 12A deposited on the sacrificial layer 19 is peeled off to expose the surface of the gate electrode 15. When aluminum is used as the material of the sacrificial layer 19, an alkaline chemical solution such as sodium hydroxide can be used. Thereby, only aluminum can be removed without dissolving the emitter 12 and the gate electrode 15. When magnesium oxide is used as the material of the sacrificial layer 19, an acid that does not dissolve the material of the emitter 12, such as dilute acetic acid, can be used. Through the above process, the field emission element 10 is formed.

[0043] According to the manufacturing method of the present embodiment, as the gate electrode 15, a polycrystalline multilayer graphene film 15A is formed by using a layer exchange method of a metal film 16A and an amorphous carbon film 18. Metal atoms of the metal film 16A remain between the layers of the multilayer graphene film, and the orientation planes of the respective crystal grains of the multilayer graphene film fluctuate from a direction parallel to the film surface of the multilayer graphene film, thereby suppressing the peeling of the multilayer graphene film itself.

[0044] [Second Embodiment] FIG. 5 is a cross-sectional view showing the configuration of a field emission element according to the second embodiment of the present invention. Referring to FIG. 5, the field emission element 50 according to the present embodiment includes a substrate 11, an emitter 52 having a pointed tip portion 52a formed on the substrate 11, a first insulating layer 53 and a second insulating layer 54 formed on the substrate 11 so as to surround the emitter 52, and a gate electrode 55 having an opening 55a exposing the tip portion 52a of the emitter 52 on the second insulating layer 54. Each component of the field emission element 50 is formed of the same material as the field emission element 10 of the first embodiment, and a detailed description thereof is omitted. The field emission element 50 of the present embodiment has a so-called volcanic shape. The gate electrode 55 has a shape in which the peripheral portion 55b of the opening 55a portion extends along and spaced apart from the surface of the tip portion 52a of the emitter 52, and the opening 55a has a reduced diameter compared to the base portion 55c of the peripheral portion 55b.

[0045] The gate electrode 55 is made of a multilayer graphene film similar to the field emission element 10 of the first embodiment. The gate electrode 55 has a portion formed parallel to the substrate 11 (hereinafter also referred to as the parallel portion 55d) and a peripheral portion 55b that bends obliquely upward and extends at the base portion 55c. The orientation direction of the multilayer graphene film of the gate electrode 55 is such that the parallel portion 55d is parallel to the substrate 11, and the peripheral portion 55b is obliquely upward parallel to the peripheral portion 55b. The multilayer graphene film is formed such that the orientation direction of the multilayer graphene film also bends along the shape that bends at the base portion 55c. Even if discharge occurs between the gate electrode 55 and the emitter 52 and an overcurrent flows near the opening 55a of the gate electrode 55, since the multilayer graphene film is oriented so that current easily flows from the peripheral portion 55b of the gate electrode 55 toward the peripheral parallel portion 55d, the gate electrode 55 is less likely to generate Joule heat and less likely to reach a high temperature, and further has a structure that easily escapes the generated heat to the periphery.

[0046] The height of the peripheral portion 55b of the gate electrode 55 is preferably formed to be the same as or higher than the tip portion 52a of the emitter 52, for example, about 100 nm higher, in terms of easy occurrence of electric field concentration during electron emission and the ability to suppress the spread of the emitted electron beam to some extent.

[0047] The second insulating layer 54 is formed to cover the lower surface of the gate electrode 55. It is preferable that the second insulating layer 54 is formed to cover all the surfaces of the peripheral portion of the gate electrode 55 facing the emitter 52, in terms of suppressing surface discharge by increasing the creepage distance of the insulator.

[0048] The first insulating layer 53 is formed to cover the base portion of the emitter 52 and expose the tip portion 52a. Thereby, unnecessary electron emission due to a triple junction or the like can be suppressed.

[0049] According to the present embodiment, it has the same effects as the first embodiment, and further has a volcanic structure. Therefore, even if a discharge occurs between the gate electrode 55 and the emitter 52, the multilayer graphene film is oriented so that current easily flows from the peripheral portion of the gate electrode toward the peripheral parallel portion. Thus, Joule heat is hardly generated and it is difficult to reach a high temperature, and damage due to discharge of the field emission element 50 can be suppressed.

[0050] FIGS. 6 and 7 are process diagrams of a method for manufacturing a field emission element according to the second embodiment. The method for manufacturing the field emission element 10 will be described with reference to FIGS. 6(a) to (d) and FIGS. 7(a) to (b) in combination with FIG. 5.

[0051] In the process of FIG. 6(a), a pointed emitter 52 is formed on the substrate 11. Specifically, a method of etching a silicon substrate to form a pointed shape can be used. Any method that can form a conical or pyramidal shape is not particularly limited.

[0052] Next, in the process of FIG. 6(b), a first insulating layer 53A covering the surface of the substrate 11 and the emitter 52 is formed by the same method as in the first embodiment. It is preferable to use the CVD method to cover the entire emitter 52. For example, a silicon oxide film may be formed by a plasma-assisted CVD method using tetraethoxysilane gas.

[0053] Next, a second insulating layer 54A, for example, a silicon nitride film, covering the surface of the first insulating layer 53A is formed. Known film formation methods such as the CVD method and the sputtering method can be used. However, since the first insulating layer 53A inherits the conical shape of the emitter 52, it is preferable to use a film formation method with high covering property, for example, the reactive sputtering method.

[0054] Next, a metal film 56A is formed on the second insulating layer 54A, and further an amorphous carbon film 58 is formed. The metal film 56A and the amorphous carbon film 58 are formed in the same manner as the metal film 16A and the amorphous carbon film 58 of the first embodiment, respectively.

[0055] Next, in the step of FIG. 6(c), the substrate 11 on which the first insulating layer 53A, the second insulating layer 54A, the metal film 56A, and the amorphous carbon film 58 are laminated in the step of FIG. 6(b) is heat-treated in a vacuum, and an amorphous carbon film 58 crystallizes at the position of the metal film 56A to form a multilayer graphene film 55A, and the metal of the metal film 56A moves to the position of the amorphous carbon film 58 to form a metal film 56B. The step of FIG. 6(c) is performed in the same manner as the step of FIG. 3(b) of the first embodiment.

[0056] Next, in the step of FIG. 7(a), the removal process of the outermost metal film 56B is performed in the same manner as the step of FIG. 3(c) of the first embodiment.

[0057] Next, in the step of FIG. 7(b), the multilayer graphene film 55A and the second insulating layer 54A directly above the tip of the emitter are removed. This selective removal process can use a so-called etch-back method. Specifically, a photoresist having a flat film thickness covering the multilayer graphene film 55A and extending over the entire substrate 11 is applied. Next, the photoresist is uniformly etched by oxygen plasma, and further, the convex multilayer graphene film 55A directly above the tip 52a of the emitter 52 is exposed, and the multilayer graphene film 55A is etched until the second insulating layer 54A is exposed to form an opening 55a. The height of the opening 55a of the gate electrode 55 is controlled by the etching time or the like.

[0058] Next, the second insulating layer 54A exposed in the opening 55a of the gate electrode 55 is etched to expose the first insulating layer 53A and form an opening 54a. When the second insulating layer 54A is a silicon nitride film, for example, sulfur hexafluoride (SF6) gas can be used as the etching gas.

[0059] Next, in the step of FIG. 7(c), the removal process of the first insulating layer 53A exposed from the openings 54a and 55a is performed to expose the tip 52a of the emitter 52. In this removal process, a buffered hydrofluoric acid solution can be used. Through the above steps, the field emission element 50 is formed.

[0060] According to the manufacturing method of the present embodiment, the gate electrode 55 of the polycrystalline multilayer graphene film is formed by using the layer exchange method. In addition to the parallel portion 55d parallel to the substrate 11, the gate electrode 55 is formed with a peripheral portion 55b extending obliquely upward following the conical shape of the emitter 52. Since the orientation direction of the graphene in the multilayer graphene film is formed along the shape of the gate electrode 55, it is formed such that the orientation direction changes at the base portion 55c. Thereby, the effects of the field emission element 50 described above are achieved.

[0061] [Third Embodiment] FIG. 8 is a cross-sectional view showing the configuration of a field emission element according to the third embodiment of the present invention. Referring to FIG. 8, the field emission element 80 according to the present embodiment includes a substrate 11, an emitter 52 having a pointed tip portion 52a formed on the substrate 11, a first insulating layer 53 and a second insulating layer 54 formed on the substrate 11 so as to surround the emitter 52, a gate electrode 55 having an opening 55a exposing the tip portion 52a of the emitter 52 on the second insulating layer 54, a third insulating layer 81 and a fourth insulating layer 82 formed on the gate electrode 55 so as to surround the emitter 52 and the opening 55a of the gate electrode 55, and a focusing electrode 83 having an opening 83a exposing the emitter 52 and the gate electrode 55 on the fourth insulating layer 82. The field emission element 80 is a modified example of the volcanic-type field emission element 50 according to the second embodiment, and has a configuration in which a focusing electrode 83 is provided in the field emission element 50.

[0062] The third insulating layer 81 is made of the same material as the first insulating layer 53. The fourth insulating layer 82 is made of the same material as the second insulating layer 54 and is provided to prevent surface discharge. This is to prevent the formation of a so-called triple junction at the boundary between the third insulating layer 81, the focusing electrode 83, and the vacuum. A triple junction is a point where three of a metal (conductive substance), an insulator (substance other than vacuum and air), and a vacuum are in contact. Unnecessary electron emission occurs due to field emission by a strong electric field from the triple junction. The fourth insulating layer 82 preferably has slightly higher conductivity than a material having complete insulating properties, similar to the second insulating layer 54.

[0063] The focused electrode 83 is made of a conductive material, for example, a metal material such as niobium, and a multilayer graphene film may also be used. Since a potential between the potential applied to the gate electrode 55 and the potential applied to the emitter 52 is generally applied to the focused electrode 83, the probability that electrons emitted from the emitter 52 flow in is low, so a multilayer graphene film is not necessary.

[0064] The method for manufacturing the field emission element 80 performs the steps of FIGS. 6(a) to 6(c) and FIG. 7(a) in the same manner as the field emission element 50 according to the second embodiment, and further forms a third insulating layer 81, a fourth insulating layer, and a focused electrode 83 on the multilayer graphene film 55A. Next, using an etch-back method as in FIG. 7(b), openings of the focused electrode 83 and the fourth insulating layer 82 are formed, and further, the third insulating layer 81 is removed with BHF solution from these openings to form openings. Next, the step of FIG. 7(c) is performed. When forming the third insulating layer 81, the fourth insulating layer, and the focused electrode 83 on the multilayer graphene film 55A, stress is applied to the multilayer graphene film and it is likely to peel off. However, since the orientation plane of each crystal grain of the multilayer graphene film 55A fluctuates from a direction parallel to the film surface of the multilayer graphene film, and metal atoms of the metal film 56A remain between the layers of the multilayer graphene film 55A, peeling of the multilayer graphene film can be suppressed as in the first and second embodiments.

[0065] [Fourth Embodiment] FIG. 9 is a cross-sectional view showing the configuration of a field emission element according to the fourth embodiment of the present invention. Referring to FIG. 9, the field emission element 90 according to the present embodiment has the same configuration as the field emission element 80 according to the third embodiment, except that a fifth insulating layer 91 is provided between the gate electrode 55 and the third insulating layer 81.

[0066] The fifth insulating layer 91 is an adhesion layer for enhancing the adhesion between the multilayer graphene film of the gate electrode 55 and the third insulating layer 81. The fifth insulating layer 91 is preferably made of a material that does not contain oxygen, such as silicon nitride. The fifth insulating layer 91 is formed, for example, by a reactive sputtering method using nitrogen gas with pure silicon as a target.

[0067] As described above in detail for the preferred embodiments of the present invention, the present invention is not limited to such specific embodiments, and various modifications and changes are possible within the scope of the present invention described in the claims.

Explanation of Reference Numerals

[0068] 10, 50, 80, 90 Field emission elements 11 Substrate 12, 52 Emitter 13, 53 First insulating layer 14, 54 Second insulating layer 15, 55 Gate electrode 15A, 55A Multilayer graphene film 16A, 16B, 56A, 56B Metal film 18, 58 Amorphous carbon film 83 Focusing electrode 91 Fifth insulating layer

Claims

1. An emitter with a sharp tip formed on a substrate, and a gate electrode formed on the substrate with an insulating layer therebetween and having an opening exposing the tip of the emitter, and comprising: the gate electrode is made of a polycrystalline multilayer graphene film containing a plurality of crystallites, a field emission element, wherein in a partial region of the plurality of crystallites, an orientation direction of the multilayer graphene film is formed so as to deviate from a preferred orientation direction.

2. The field emission element according to claim 1, wherein the crystallites have an average particle diameter of 300 nm to 3000 nm when the multilayer graphene film is viewed in plan view.

3. The field emission element according to claim 1 or 2, wherein the multilayer graphene film contains 0.1% by weight to 1% by weight of metal atoms.

4. The field emission element according to any one of claims 1 to 3, wherein the gate electrode has a shape in which a peripheral portion of the opening extends along and spaced apart from a surface of the tip of the emitter, and the opening has a diameter smaller than a base portion of the peripheral portion.

5. The field emission element according to claim 4, wherein the multilayer graphene film has an orientation direction of crystallites formed corresponding to a shape of the gate electrode.

6. The field emission element according to claim 4 or 5, further comprising another insulating layer on the gate electrode outside the opening of the gate electrode, and a focusing electrode having another opening exposing a tip portion of the emitter and a tip portion of the gate electrode on the another insulating layer.

7. The field emission element according to claim 6, further comprising an adhesion layer between the gate electrode and the another insulating layer.

8. A method for manufacturing a field emission element, comprising: an emitter with a sharp tip formed on a substrate, and a gate electrode formed on the substrate with an insulating layer therebetween and having an opening exposing the tip of the emitter and made of a polycrystalline multilayer graphene film, forming a metal film at a position where the gate electrode is to be formed, and an amorphous carbon film thereon; and forming a polycrystalline multilayer graphene film containing a plurality of crystallites in which the amorphous carbon film is crystallized at a position of the metal film by a layer exchange method of heating the metal film and the amorphous carbon film in a vacuum, the method including forming the orientation direction of the multilayer graphene film in a partial region of the plurality of crystallites so as to deviate from a preferred orientation direction.

9. A step of forming a recess exposing the substrate in the multilayer graphene film and the insulating layer, A step of forming the emitter on the substrate within the recess, further comprising the manufacturing method according to claim 8.

10. Before forming the metal film, a step of forming the emitter on the substrate, After forming the multilayer graphene film, a step of forming the opening in the multilayer graphene film to expose the tip of the emitter, further comprising the manufacturing method according to claim 8.

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