Electronic device

Abstract

To provide an electronic device capable of reducing damage due to high temperature and high pressure.SOLUTION: An electronic device according to an embodiment includes a semiconductor substrate, a chip, and a connection part. The chip has a different thermal expansion rate from that of the semiconductor substrate. The connection part includes a porous metal layer for connecting connection pads that are arranged on opposing principle surfaces of the semiconductor substrate and the chip. The chip is a semiconductor laser. The semiconductor substrate includes a drive circuit that drives the semiconductor laser. The semiconductor laser includes a substrate and a light emitting element provided on one main surface of the substrate. The light emitting element emits laser light in a direction from the one main surface of the substrate to the other main surface opposite to the one main surface.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present disclosure relates to an electronic device.

Background Art

[0002] As a technique for mounting chips of electronic components on a semiconductor substrate, for example, there is flip chip mounting in which a metal bump protruding from the upper surface of the semiconductor substrate and a connection pad provided on the lower surface of the chip are pressed against each other and heated to make a connection (see, for example, Japanese Patent Application Laid-Open No. 2011-077308). As the material of the bump, generally, bulk gold, copper, solder, or the like is used.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, when a chip having a coefficient of thermal expansion different from that of the semiconductor substrate is flip chip mounted on the semiconductor substrate using bulk gold or copper as the bump material, it is necessary to make a connection with the bump at high temperature and high pressure, and the chip is damaged and the reliability of the electronic device is reduced.

[0005] Also, when solder is used as the bump material, the semiconductor substrate and the chip can be connected at relatively low temperature and low pressure. However, since the connection strength is lower than that of gold or copper bumps, when the coefficients of thermal expansion of the semiconductor substrate and the chip are different, the reliability is reduced in terms of connection strength.

Means for Solving the Problems

[0006] According to the present disclosure, an electronic device is provided. The electronic device includes a semiconductor substrate, a chip, and a connection portion. The chip has a coefficient of thermal expansion different from that of the semiconductor substrate. The connection portion includes a porous metal layer that connects connection pads provided on opposing main surfaces of the semiconductor substrate and the chip. The chip is a semiconductor laser. The semiconductor substrate has a drive circuit for driving the semiconductor laser. The semiconductor laser includes a substrate and a light-emitting element provided on one main surface of the substrate. The light-emitting element emits laser light in a direction from one main surface of the substrate toward the other main surface opposite to the one main surface.

Brief Description of the Drawings

[0007] A more complete understanding of the present invention and the attendant advantages thereof will be readily apparent by reading the following detailed description of the invention in conjunction with the accompanying drawings.

[0008]

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MODE FOR CARRYING OUT THE INVENTION

[0009] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In each of the following embodiments, the same parts are denoted by the same reference numerals and the same hatching, and redundant descriptions are omitted.

[0010] [1. Cross-sectional structure of the electronic device] As shown in FIG. 1, the electronic device 1 according to the present disclosure includes a semiconductor substrate 2, a chip 3, and a connection portion (hereinafter referred to as a bump 4) that connects connection pads 21 and 31 provided on the opposing main surfaces of the semiconductor substrate 2 and the chip 3. Hereinafter, the semiconductor substrate 2, the chip 3, and the connection pads 21 and 31 will be described in detail. Other embodiments may include other exemplary details.

[0011] Chip 3 is, for example, a semiconductor laser, and connection pads 31, a light emitting portion 32 of the semiconductor laser, etc. are formed inside a substrate of GaAs (gallium arsenide). The light emitting portion 32 includes a plurality of two-dimensionally arranged light emitting elements 321 that emit laser light. Note that the electronic components formed on the device of chip 3 may be any electronic components other than the light emitting portion 32 of the semiconductor laser. Also, the substrate of chip 3 may be a semi-insulating substrate such as InP (indium phosphide), for example.

[0012] The semiconductor substrate 2 is, for example, a Si (silicon) substrate, and a drive circuit 22 that drives a semiconductor laser is formed inside. Note that the electronic circuit formed inside the semiconductor substrate 2 may be any electronic circuit other than the drive circuit 22 of the semiconductor laser.

[0013] In the electronic device 1, chip 3 is flip-chip mounted on the semiconductor substrate 2, and the drive circuit 22 inside the semiconductor substrate 2 and chip 3, which is a semiconductor laser, are electrically connected by bumps 4.

[0014] Here, in a general flip-chip mounting, a chip is mounted on a semiconductor substrate by heating while pressure-bonding bulk Au (gold), Cu (copper), and metal bumps such as solder provided on the opposing main surfaces of the semiconductor substrate or the chip.

[0015] However, when the thermal expansion coefficients of the semiconductor substrate and the chip differ by, for example, 0.1 ppm / °C or more, the following problems occur when bulk Au, Cu, and solder, etc. are used as the bump material.

[0016] For example, when using bulk Au as the bump material, in order to stably connect a semiconductor substrate and a chip with different thermal expansion coefficients by bumps, it is necessary to heat to a high temperature of 300°C or more and apply a high pressure of 100 MPa or more between the semiconductor substrate and the chip.

[0017] Also, when using bulk Cu as the bump material, heating at 380°C or higher is required. Thus, when using bulk Au or Cu as the bump material, it is necessary to perform connection by bumps under high temperature and high pressure, and such high temperature and high pressure may damage the chip, and the reliability of the electronic device may decrease.

[0018] On the other hand, when using solder as the bump material, connection by bumps can be performed at a lower temperature and pressure compared to Au and Cu, but solder is inferior to Au and Cu in heat resistance and connection strength. For this reason, when the temperature of the chip expands due to heat generation of an electronic component such as a semiconductor laser mounted on the chip, an open failure may occur due to the difference in the coefficient of thermal expansion between the semiconductor substrate and the chip, and the reliability of the electronic device may be reduced.

[0019] Here, as described above, the semiconductor substrate 2 according to the present disclosure is a Si substrate and has a coefficient of thermal expansion of 5.7 ppm / °C. On the other hand, the base material of the chip 3 according to the present disclosure is GaAs and has a coefficient of thermal expansion of 2.6 ppm / °C.

[0020] Thus, the electronic device 1 has a much larger difference in the coefficient of thermal expansion between the semiconductor substrate 2 and the chip 3 than 0.1 ppm / °C. For this reason, when the bump material of the electronic device 1 is bulk Au, Cu, or solder, the above problems may occur and the reliability may decrease.

[0021] Therefore, the bump 4 of the electronic device 1 includes, for example, a porous metal layer 41 of Au. The porous metal layer 41 includes Au particles having a particle diameter of 0.005 μm to 1.003 μm. Note that the component of the porous metal layer 41 may be, for example, Cu, Ag (silver), or Pt (platinum).

[0022] The porous metal layer 41 containing metal particles with a particle diameter of 0.005 μm to 1.0 μm can perform metal bonding at a temperature lower than the melting point of the bulk metal due to the size effect of the particle diameter. For example, when the component of the porous metal layer 41 is Au, the semiconductor substrate 2 and the chip 3 can be connected at a temperature of about 100°C, when it is Ag, at about 250°C, and when it is Cu, at about 150°C. Thereby, the electronic device 1 can reduce the damage to the chip 3 caused by heat, so that the reliability can be improved.

[0023] For example, the ratio of the height of the porous metal layer 41 and the bump 4, for example, the ratio of the thickness or the longitudinal extension of the porous metal layer 41 to the thickness or the longitudinal extension of the bump 4 may be 90% or more, and may also be 95% or more. Here, the longitudinal extension is the extension along the longitudinal direction, and the longitudinal direction may be the stacking direction of the semiconductor substrate 2 and the chip 3, for example, the direction perpendicular to the main surface of the semiconductor substrate 2 or the chip 3. In addition to the porous metal layer 41, the bump 4 may include one or more layers having a porosity smaller than that of the non-porous or porous metal layer 41. For example, such a porosity is the volume fraction of voids. Examples of the metal layer will be described below with reference to, for example, the metal films 42 and 43. Further, since the porous metal layer 41 is elastic, for example, even if the chip 3 expands at a different coefficient of thermal expansion from the semiconductor substrate 2 due to the heat generation of the semiconductor laser, it elastically deforms, so that the occurrence of open failures can be suppressed. Thereby, the electronic device 1 having the ratio of the height of the porous metal layer 41 and the bump 4 described above can improve the reliability as compared with the case of using solder bumps, for example.

[0024] Such an electronic device 1 is manufactured by laminating a chip 3 on a semiconductor substrate 2 provided with bumps 4 on the upper surface, and connecting the chip 3 to the semiconductor substrate 2 by flip-chip mounting by connecting to the connection pads 31 without melting the porous metal layer 41 of the bumps 4.

[0025] Further, the electronic device 1 may be manufactured by laminating a chip 3 provided with bumps including a porous metal layer 41 on the lower surface on a semiconductor substrate 2, and connecting the chip 3 to the semiconductor substrate 2 by connecting the porous metal layer 41 of the bumps to the connection pads 21 without melting the porous metal layer 41, for example, by flip chip mounting. Note that the bumps may be provided on both the semiconductor substrate 2 and the chip 3 before lamination.

[0026] When the bump 4 is provided on the semiconductor substrate 2 side, a metal film 42 is provided between the porous metal layer 41 and the connection pad 21 on the semiconductor substrate 2 side. Further, when the bump is provided on the chip 3 side, a metal film is provided between the porous metal layer 41 and the connection pad 31 on the chip 3 side.

[0027] In the present disclosure, by setting the ratio of the film thickness of the metal film 42 to the thickness of the bump 4 in the direction orthogonal to the main surface of the semiconductor substrate 2 in the bump 4 to 2% to 10% or less, it is possible to achieve fine pitch conversion with the pitch of the bump 4 being 20 μm or less. Such fine pitch conversion will be described later in conjunction with the bump 4 forming process.

[0028] [2. Bump forming process] Next, with reference to FIGS. 2A to 3D, the bump forming process according to the present disclosure will be described. FIGS. 2A to 2D are explanatory diagrams showing the process of forming the bump 4 on the semiconductor substrate 2 according to the present disclosure. FIGS. 3A to 3D are explanatory diagrams showing the process of forming the bump 4a (see FIG. 3D) on the chip 3 according to the present disclosure.

[0029] As shown in FIG. 2A, when forming the bump 4 on the semiconductor substrate 2, first, a photoresist layer 51 is formed on the surface of the semiconductor substrate 2 on the side where the connection pad 21 is provided. Thereafter, through holes are formed in the photoresist layer 51 at positions where the bumps 4 will be formed later by photolithography technology to expose the surface of the connection pad 21.

[0030] At this time, through holes are formed such that the distance between the centers of adjacent through holes is 20 μm (20-μm pitch). Although such through holes are filled with the paste 40 containing metal particles that will become the material of the porous metal layer 41 in a later process, since the fine structure is a 20-μm pitch, if the paste 40 is filled in this state, the fine structure may be damaged and collapse.

[0031] Therefore, as shown in FIG. 2B, a metal film 42 is formed on the upper surfaces of the photoresist layer 51 and the connection pad 21, for example, by sputtering. As the material of the metal film 42, a metal of the same component as the metal particles contained in the paste 40 to be filled in the through holes later is selected. Here, a metal film 42 of Au is formed.

[0032] Thereby, since the surface of the photoresist layer 51 is cured by being coated with the metal film 42, it is possible to prevent the fine structure from collapsing when the through holes are filled with the paste 40 containing metal particles.

[0033] Also, if the film thickness of the metal film 42 formed here is too thick, the opening of the through hole becomes narrow, and it becomes difficult to fill the through hole with the paste 40 containing metal particles. Therefore, here, a thin metal film 42 is formed such that the ratio of the film thickness of the metal film 42 to the depth D of the through hole, in other words, the thickness in the direction orthogonal to the main surface of the semiconductor substrate 2 in the bump 4 formed later (the height D of the bump 4) is 10% or less.

[0034] For example, when forming bumps 4 with a height of 10 μm arranged at a 20-μm pitch, the film thickness of the metal film 42 is set to 0.2 μm. Thereby, since it is possible to prevent the opening of the through hole from becoming narrow even when the metal film 42 is formed, the through hole can be sufficiently filled with the paste 40 containing metal particles in a later process.

[0035] Subsequently, as shown in FIG. 2C, the through holes formed in the photoresist layer 51 are filled with a paste 40 containing, for example, Au particles having a purity of 99.9 wt% or more and a particle diameter of 0.005 μm to 1.0 μm. As a method of filling the through holes with the paste 40, any method can be used, such as screen printing, or a method of spreading the dropped paste 40 with a squeegee.

[0036] Thereafter, after drying and sintering the paste 40, the photoresist layer 51 is peeled off with a stripping solution or the like. As a result, as shown in FIG. 2D, a bump 4 having a two-layer structure in which a metal film 42 of Au and a porous metal layer 41 containing Au particles having a particle diameter of 0.005 μm to 1.0 μm are sequentially laminated is formed on the surface of the connection pad 21.

[0037] Thus, the bump 4 includes a metal film 42 having a ratio of film thickness to the height of the bump 4 of 10% or less. Such a metal film 42 is formed on the surfaces of the photoresist layer 51 and the connection pad 21 in order to prevent the collapse of the fine structure of the bump 4 patterned in the photoresist layer 51. As a result, the bump 4 can be made to have a fine pitch with a pitch of 20 μm or less.

[0038] In addition, since the metal film 42 is formed on the surface of the connection pad 21 by sputtering, even if the connection pad 21 is made of a metal having a component different from that of the metal film 42, it is firmly joined to the connection pad 21.

[0039] The metal film 42 may be formed of a metal having a component different from that of the porous metal layer 41 laminated on the surface. However, when it is formed of Au having the same component, the porous metal layer 41 is joined to the metal film 42 with a stronger bonding force than when it is provided on another metal film having a different component. When the bump 4 is made of a component other than Au (for example, Cu, Ag (silver), or Pt (platinum)), the metal film 42 may similarly be made of a component other than Au (for example, Cu, Ag (silver), or Pt (platinum)).

[0040] Next, the process of forming the bumps 4a shown in FIG. 3D on the chip 3 will be described. As shown in FIG. 3A, when forming the bumps 4a on the chip 3, first, a photoresist layer 52 is formed on the surface of the chip 3 on the side where the connection pads 31 are provided. Then, by photolithography technology, a through hole is formed at the position in the photoresist layer 52 where the bumps 4a will be formed later to expose the surface of the connection pads 31.

[0041] After that, as shown in FIG. 3B, a metal film 43 is formed on the upper surfaces of the photoresist layer 52 and the connection pads 31, for example, by sputtering. As the material of the metal film 43, the same component as the particles contained in the paste 40 to be filled into the through holes later is selected, for example, Au.

[0042] Thereby, since the surface of the photoresist layer 52 is cured by being coated with the metal film 43, it is possible to prevent the fine structure from collapsing when the paste 40 containing particles, for example, Au particles, is filled into the through holes.

[0043] Also, here too, a thin metal film 43 is formed such that the ratio of the film thickness of the metal film 43 to the depth D of the through hole, in other words, the thickness in the direction perpendicular to the main surface of the chip 3 in the bumps 4a to be formed later (the height D of the bumps 4a) is 10% or less.

[0044] For example, when forming bumps with a height of 10 μm arranged at a pitch of 20 μm, similar to the bumps 4 on the semiconductor substrate 2 side, the film thickness of the metal film 43 is set to 0.2 μm. Thereby, since it is possible to prevent the opening of the through hole from becoming narrow even when the metal film 43 is formed, the paste 40 containing Au particles can be sufficiently filled into the through hole in a later process.

[0045] Subsequently, as shown in FIG. 3C, the through holes formed in the photoresist layer 52 are filled with a paste 40 containing, for example, particles with a purity of 99.9 wt% or more, such as Au particles with a particle diameter of 0.005 μm to 1.0 μm.

[0046] Thereafter, after drying and sintering the paste 40, the photoresist layer 52 is peeled off with a stripping solution or the like. As a result, as shown in FIG. 3D, a bump 4a having a two-layer structure in which, for example, a metal film 43 of Au and a porous metal layer 41 containing Au particles having a particle diameter of 0.005 μm to 1.0 μm are sequentially laminated on the surface of the connection pad 31 is completed.

[0047] Thus, the bump 4a includes a metal film 43 in which the ratio of the film thickness to the height of the bump 4a is 10% or less. As a result, the bump 4a can be made to have a fine pitch with a pitch of 20 μm or less, similar to the bump 4 on the semiconductor substrate 2 side.

[0048] Further, according to the bump 4a, similar to the bump 4 on the semiconductor substrate 2 side, the metal film 43 and the connection pad 31 can be firmly joined, and the metal film 43 and the porous metal layer 41 can be firmly joined.

[0049] In the above-described embodiment, the case where the chip 3 provided with no bump 4a is mounted on the semiconductor substrate 2 provided with the bump 4 and the case where the chip 3 provided with the bump 4a is mounted on the semiconductor substrate 2 provided with no bump 4 have been described, but this is merely an example.

[0050] The electronic device according to the present disclosure may have a configuration in which the chip 3 provided with the bump 4a is mounted on the semiconductor substrate 2 provided with the bump 4. In such a configuration, the metal films 42 and 43 have a ratio of the film thickness to half of the thickness in the direction orthogonal to the main surfaces of the semiconductor substrate 2 and the chip 3 in the laminate of the bumps 4 and 4a serving as the connection portions connecting the semiconductor substrate 2 and the chip 3 of 10% or less, preferably 5% or less.

[0051] In the above-described embodiment, the case where the base material of the chip 3 is a base material other than Si has been described. However, the base material of the chip 3 may be Si doped with impurities as long as the coefficient of thermal expansion is different from that of the semiconductor substrate 2.

[0052] The chip 3 including the light emitting portion 32 of the semiconductor laser described above, and the semiconductor substrate 2 including the drive circuit 22 of the semiconductor laser are mounted on a distance measuring device such as a ToF sensor or a structured light, for example. When the light emitting portion 32 of the semiconductor laser is mounted on a distance measuring device, it functions as a light source of a ToF sensor or a light source of a structured light, for example.

[0053] Next, with reference to FIG. 4, a distance measuring device on which the electronic device 1 according to the embodiment is mounted will be described. FIG. 4 is a block diagram showing an example of the configuration of the distance measuring device 100 according to the embodiment. As shown in FIG. 4, the distance measuring device 100 includes a light source device 110, an imaging device 120, and a control unit 130.

[0054] The light source device 110 includes the chip 3 provided with the light emitting portion 32, the semiconductor substrate 2 provided with the drive circuit 22, a power supply circuit 111, and a light emitting side optical system 112. The imaging device 120 includes an imaging side optical system 121, an image sensor 122, and an image processing unit 123.

[0055] The control unit 130 includes a distance measuring unit 131. The control unit 130 may be included in the light source device 110, may be included in the imaging device 120, or may be configured separately from the light source device 110 and the imaging device 120.

[0056] The light emitting portion 32 includes a plurality of light emitting elements 321 (see FIG. 1) two-dimensionally arranged to emit laser light. Each light emitting element 321 has, for example, a VCSEL (Vertical Cavity Surface Emitting Laser) structure.

[0057] The drive circuit 22 has an electric circuit for driving the light emitting portion 32. The power supply circuit 111 generates a power supply voltage for the drive circuit 22 from an input voltage supplied from, for example, a battery (not shown) provided in the distance measuring device 100. The drive circuit 22 drives the light emitting portion 32 with the power supply voltage.

[0058] The light emitted from the light emitting unit 32 is irradiated onto the subject S to be distance-measured through the light emitting side optical system 112. Then, the reflected light of the light irradiated in this way from the subject S enters the imaging surface of the image sensor 122 through the imaging side optical system 121.

[0059] The image sensor 7 has an imaging element such as a CCD (Charge Coupled Device) sensor or a CMOS (Complementary Metal Oxide Semiconductor) sensor, receives the reflected light from the subject S incident through the imaging side optical system 121 as described above, and converts it into an electrical signal for output.

[0060] The image sensor 122 performs, for example, CDS (Correlated Double Sampling) processing, AGC (Automatic Gain Control) processing, etc. on the electrical signal obtained by photoelectrically converting the received light, and further performs A / D (Analog / Digital) conversion processing.

[0061] Then, the image sensor 122 outputs an image signal as digital data to an image processing unit 123 described later. Also, the image sensor 122 outputs a frame synchronization signal to the drive circuit 22. Thereby, the drive circuit 22 can cause the light emitting element 321 in the light emitting unit 32 to emit light at timing corresponding to the frame period of the image sensor 122.

[0062] The image processing unit 123 is constituted by an image processing processor such as a DSP (Digital Signal Processor), for example. The image processing unit 123 performs various image signal processes on the digital signal (image signal) input from the image sensor 122.

[0063] The control unit 130 is constituted by, for example, a microcomputer having a CPU (Central Processing Unit), a ROM (Read Only Memory), a RAM (Random Access Memory), etc., or an information processing device such as a DSP. The control unit 130 performs control of the drive circuit 22 for controlling the light emission operation by the light emitting unit 32 and control related to the imaging operation by the image sensor 122.

[0064] Further, the control unit 130 has a function as a distance measurement unit 131. The distance measurement unit 131 measures the distance to the subject S based on an image signal input via the image processing unit 123 (that is, an image signal obtained by receiving the reflected light from the subject S).

[0065] Further, the distance measurement unit 131 measures the distance for each part of the subject S in order to enable specification of the three-dimensional shape of the subject S. Also, the control unit 130 may be configured to perform control on the power supply circuit 111.

[0066] Here, a specific distance measurement method in the distance measurement device 100 will be described. As the distance measurement method in the distance measurement device 100, for example, a distance measurement method using the STL (Structured Light) method or the ToF (Time of Flight) method can be adopted.

[0067] The STL method is a method of measuring the distance based on an image obtained by imaging the subject S irradiated with light having a predetermined light / dark pattern such as a dot pattern or a lattice pattern.

[0068] In the STL method, pattern light with a dot pattern is irradiated onto the subject S. The pattern light is divided into a plurality of blocks, and different dot patterns are assigned to each block so that the dot patterns do not overlap between the blocks. When the STL method is adopted, the light emitting unit 32 functions as the STL light source.

[0069] In addition, the ToF method measures the distance to an object by detecting the flight time (time difference) of light from the light emitting unit 32 until it is reflected by the object and reaches the image sensor 122.

[0070] When adopting the so-called direct ToF method as the ToF method, an SPAD (Single Photon Avalanche Diode) is used as the image sensor 122, and the light emitting unit 32 is driven by pulses.

[0071] In this case, the distance measuring unit 131 calculates the time difference from emission to reception of the light emitted from the light emitting unit 32 and received by the image sensor 122 based on the image signal input via the image processing unit 123, and calculates the distance to each part of the subject S based on the time difference and the speed of light.

[0072] When adopting the so-called indirect ToF method (phase difference method) as the ToF method, for example, an IR (infrared light) image sensor is used as the image sensor 7. When adopting the ToF method, the light emitting unit 32 functions as the light source of the ToF sensor.

[0073] Next, with reference to FIG. 5, an arrangement example of the components in the distance measuring device 100 according to the embodiment will be described. FIG. 5 is an explanatory diagram showing an arrangement example of the components in the distance measuring device 100 according to the embodiment.

[0074] As shown in FIG. 5, the distance measuring device 100 has a light source device 110 and an imaging device 120 mounted on the same plane of the mounting substrate 101. In FIG. 5, the illustration of the control unit 130 is omitted. The imaging device 120 includes an image sensor 122 in which a plurality of imaging elements 124 are arranged, and an image processing unit 123, and the image sensor 122 is provided laminated on the image processing unit 123.

[0075] Further, the light source device 110 includes a chip 3 having a light emitting portion 32 and a semiconductor substrate 2 having a drive circuit 22, and the chip 3 is flip-chip mounted on the semiconductor substrate 2. Thus, the semiconductor substrate 2 and the chip 3 have a stacked structure.

[0076] Therefore, the light source device 110 can be miniaturized by reducing the occupied area on the mounting substrate 101, for example, as compared with the case where the semiconductor substrate 2 and the chip 3 are mounted side by side on the same plane.

[0077] Note that the light source device 110 may have a configuration in which a chip 3 having a light emitting portion 32 is stacked and flip-chip mounted on a semiconductor substrate provided with a temperature sensor, and a semiconductor substrate 2 having a drive circuit 22 is mounted on the same plane as the semiconductor substrate 2 on the mounting substrate 101.

[0078] In such a configuration, the temperature sensor detects the temperature near the light emitting portion 32. The drive circuit 22 drives and controls the light emitting portion 32 according to the temperature near the light emitting portion 32 detected by the temperature sensor. Thereby, the drive circuit 22 can suppress fluctuations in the light emission characteristics of the light emitting portion 32 caused by temperature changes.

[0079] Further, the semiconductor substrate 2 and the chip 3 are connected by bumps 4 including the porous metal layer 41 of Au described above. Thereby, since the semiconductor substrate 2 and the chip 3 can be connected under relatively low temperature and low pressure conditions, damage due to heat can be reduced.

[0080] Also, when the semiconductor substrate 2 is silicon and GaAs materials are used for the chip 3, even if the chip 3 generates heat and expands with a thermal expansion coefficient different from that of the semiconductor substrate 2, the porous metal layer 41 elastically deforms, so that an open failure can be suppressed from occurring in the bumps 4.

[0081] Further, in the light source device 110, the chip 3 is stacked on the semiconductor substrate 2 and flip-chip mounted by the bump 4 including the porous metal layer 41 of Au. According to such a configuration, the speed of light emission can be increased as compared with the case where the semiconductor substrate 2 and the chip 3 are arranged and mounted on the same plane. Thereby, the distance measurement unit 131 can improve the distance measurement accuracy. Next, the increase in the speed of light emission and the improvement in the distance measurement accuracy will be described with reference to FIGS. 6 and 7.

[0082] FIG. 6 is a circuit diagram showing an equivalent model of the drive circuit 22 according to the embodiment. FIG. 7 is an explanatory diagram of the rise time and fall time of the current flowing through the light emitting element 321 according to the embodiment. As shown in FIG. 6, when the drive circuit 22 causes a current to flow through the light emitting element 321 to emit light, a large light emission current I1 is caused to flow through the light emitting element 321 serving as the active resistance R.

[0083] At this time, a shunt current I2 also flows through the parasitic capacitance C of the bump 4 connecting the drive circuit 22 and the light emitting unit 32, and a drive current I3 also flows through the parasitic inductance L. However, a reverse electromotive current I4 flows through the parasitic inductance L.

[0084] Therefore, as shown by the one-dot chain line in FIG. 7, it is ideal that the current flowing through the light emitting element 321 rises instantaneously and falls instantaneously. However, actually, as shown by the thick solid line, due to the influence of the reverse electromotive current I4, the light emission current I1 is dulled during high-current driving.

[0085] As a result, the rise time (rise time: Tr) and fall time (fall time: Tf) of the light emission current I1 flowing through the light emitting element 321 become longer. The rise time Tr and fall time Tf become longer as the connection line connecting the drive circuit 22 and the light emitting unit 32 becomes longer.

[0086] Therefore, in the case of the light source device in which the semiconductor substrate 2 and the chip 3 are arranged and mounted on the same plane, since the drive circuit 22 in the semiconductor substrate 2 and the light emitting unit 32 in the chip 3 are connected by a long bonding wire, the rise time Tr and the fall time Tf become long.

[0087] In contrast, in the light source device 110 according to the embodiment, since the drive circuit 22 and the light emitting unit 32 are connected by bumps 4 shorter than bonding wires, it is possible to suppress an increase in the rise time Tr and the fall time Tf. Therefore, the light source device 110 can increase the speed of light emission compared to a light source device in which the semiconductor substrate 2 and the chip 3 are mounted side by side on the same plane.

[0088] Further, in the case of a light source device in which the semiconductor substrate 2 and the chip 3 are mounted side by side on the same plane, the rise time Tr of the distance measuring unit 131 may become long and the distance measuring accuracy may decrease. For example, when the distance measuring device 100 is a ToF sensor, the distance measuring unit 131 measures the distance to the subject S based on the time from the timing when the emission luminance of the light emitting element 321 reaches a peak to the timing when the received light luminance by the image sensor 122 reaches a peak.

[0089] At this time, in the light source device in which the semiconductor substrate 2 and the chip 3 are mounted side by side on the same plane, as described above, the rise time Tr becomes long. Along with this, since the emission luminance of the light emitting element 321 gradually increases, the received light luminance by the image sensor 122 also gradually increases.

[0090] For this reason, the distance measuring unit 131 erroneously determines that the received light luminance has reached a peak before the received light luminance by the image sensor 122 reaches the original peak, and measures the distance to the subject S shorter than the actual distance, resulting in a decrease in the distance measuring accuracy.

[0091] In contrast, since the light source device 110 according to the embodiment can increase the speed of light emission, the emission luminance of the light emitting element 321 can be rapidly increased. Therefore, the received light luminance by the image sensor 122 also rapidly increases.

[0092] Therefore, the distance measurement unit 131 can accurately measure the distance to the subject S by more accurately determining the timing at which the received light luminance by the image sensor 122 reaches the original peak, so that the distance measurement accuracy can be improved.

[0093] Next, with reference to FIG. 8, an example of the cross-sectional structure of the light source device 110 will be described. FIG. 8 is an explanatory diagram of the cross-sectional structure of the light source device 110 according to the embodiment. As shown in FIG. 8, the light source device 110 has a structure in which chips 3 are stacked and flip-chip mounted on an Si semiconductor substrate 2 on which a drive circuit 22 (see FIG. 1) is formed.

[0094] For example, a plurality of light-emitting elements 321 are formed on the surface (lower surface in FIG. 8) of the GaAs substrate 141 of the chip 3. Each of the plurality of light-emitting elements 321 has the GaAs substrate 141 side as the cathode and the semiconductor substrate 2 side as the anode, and the cathodes are connected to each other. Note that each of the light-emitting elements 321 may have the GaAs substrate 141 side as the anode and the semiconductor substrate 2 side as the cathode. In this case, the anodes are connected to each other.

[0095] In addition, for each of the plurality of light-emitting elements 321, an anode electrode 142 and a cathode electrode 143 are provided side by side on the same plane. The plurality of light-emitting elements 321 emit light when current flows from the anode electrode 142 to the cathode electrode 143, and emit laser light in the direction from the surface (lower surface) to the back surface (upper surface) of the GaAs substrate 141, as indicated by the white arrow in FIG. 8.

[0096] The semiconductor substrate 2 is provided with a plurality of connection pads 150 on the surface facing the chip 3. The plurality of connection pads 150 are provided at positions facing the anode electrode 142 and the cathode electrode 143 of the stacked chips, respectively.

[0097] The connection pad 150, the anode electrode 142, and the cathode electrode 143 are connected by bumps 4 including a porous metal layer 41 of Au. Further, the connection pad 150 connected to the cathode electrode 143 is connected to ground (not shown) via a wiring 151.

[0098] Also, one end of each switch 154 is connected to the connection pad 150 connected to each anode electrode 142 via a wiring 152 and a pad 153 provided between one end of the switch 154 and the connection pad 150. The other end of the switch 154 is connected to a current source that supplies a light-emitting current I1. When the electrode 142 becomes the cathode electrode and the electrode 143 becomes the anode electrode, the switch 154 is connected to each electrode that becomes the cathode.

[0099] Each switch 154 is individually controlled by a drive circuit 22. Thereby, the drive circuit 22 can individually and independently control each light-emitting element 321. As a result, when the distance measuring device 100 performs distance measurement by the STL method, the light source device 110 can irradiate the subject S with pattern light having various types of dot patterns. Each switch 154 may be shared by a plurality of light-emitting elements 321 and controlled for each group of some light-emitting elements 321.

[0100] Next, with reference to FIGS. 9A to 9C, the assembling process of the light source device 110 will be described. FIGS. 9A to 9C are explanatory views of the assembling process of the light source device 110 according to the embodiment. Here, the connection process between the chip 3 and the semiconductor substrate 2 will be described.

[0101] Also, here, among the components shown in FIGS. 9A to 9C, for the components having the same configuration as those shown in FIG. 8, the same reference numerals as those shown in FIG. 8 are given, and redundant explanations are omitted. Here, a case where a bump 4a (see FIG. 3D) is provided on the anode electrode 142 side of the light-emitting element 321 will be described, but a bump 4 (see FIG. 2D) may be provided on the connection pad 150 side of the semiconductor substrate 2.

[0102] As shown in FIG. 9A, when the bump 4a is provided on the anode electrode 142 side of the light-emitting element 321, that is, on the chip 3 side, for example, a Au metal film 43 is provided between the porous metal layer 41 containing Au and the anode electrode 142.

[0103] The metal film 43 has a thickness such that the ratio of the film thickness to the height of the bump 4a is less than 10%, more preferably less than 5%. For example, when the porous metal layer 41 with a height (thickness) of 10 μm is formed, the metal film 43 is formed to have a film thickness of 0.2 μm.

[0104] Similarly, when the bump 4 (see FIG. 2D) is provided on the connection pad 150 side of the semiconductor substrate 2, the metal film 42 is formed to have a thickness such that the ratio of the film thickness to the height of the bump 4 is less than 10%, more preferably less than 5%. For example, when the porous metal layer 41 with a height (thickness) of 10 μm is formed, the metal film 42 is formed to have a film thickness of 0.2 μm.

[0105] Such a metal film 43 is formed to strengthen the fine structure of the photoresist layer 52 (see FIG. 3B) on which patterning for forming the bump 4a on the chip 3 is performed. Thereby, when the height of the bump 4a is approximately 10 μm, it becomes possible to achieve a fine pitch with a pitch of 20 μm or less.

[0106] Here, it is described assuming that the component of the connection pad 150 on the semiconductor substrate 2 side is the same Au as the porous metal layer 41. However, when the component of the connection pad 150 is other than Au, a Au film having the same component as the porous metal layer 41 is formed on the surface of the connection pad 150. Thereby, the connection strength between the connection pad 150 and the porous metal layer 41 can be increased.

[0107] When connecting such a chip 3 and the semiconductor substrate 2, as shown in FIG. 9A, first, the chip 3 is placed on the semiconductor substrate 2, and alignment is performed between the connection pad 150 provided on the upper surface of the semiconductor substrate 2 and the bump 4a provided on the anode electrode 142 on the chip 3 side.

[0108] Subsequently, as shown in FIG. 9B, the chip 3 is lowered so that the lower surface of the bump 4a abuts against the upper surface of the connection pad 150 and a predetermined pressure is applied. Then, it is heated to a relatively low temperature of about 100° C., and the connection pad 150 and the anode electrode 142 are connected by the bump 4a without melting the porous metal layer 41 of the bump 4a.

[0109] At this time, the porous metal layer 41 is slightly compressed in the thickness direction by the temperature at which it is overheated and the pressure applied, and the height (thickness) becomes smaller. As a result, in the state after the chip 3 and the semiconductor substrate 2 are connected by the bump 4a, the ratio of the film thickness of the metal film 43 to the height of the bump 4a is less than 20%.

[0110] Also, when the bump 4 (see FIG. 2D) is provided on the connection pad 150 side of the semiconductor substrate 2, similarly, in the state after the chip 3 and the semiconductor substrate 2 are connected by the bump 4, the ratio of the film thickness of the metal film 42 to the height of the bump 4 is less than 20%.

[0111] Here, the side surface of the light-emitting element 321 provided on the chip 3 and the side surface and the peripheral edge of the lower surface of the anode electrode 142 provided on the anode of the light-emitting element 321 are covered with an insulating film 144. Such an insulating film 144 may contain, for example, at least one of SiO2 (silicon oxide) and SiN (silicon nitride).

[0112] Also, the side surface and the peripheral edge of the upper surface of the connection pad 150 provided on the upper surface of the semiconductor substrate 2 are covered with an insulating film 155. Such an insulating film 155 may contain, for example, at least one of SiO2 and SiN. The diameter of the portion not covered by the insulating film 155 on the upper surface of the connection pad 150, in other words, the diameter of the upper opening in the insulating film 155, is formed larger than the diameter of the bump 4a.

[0113] As a result, even if there is a slight deviation between the position of the connection pad 150 and the position of the bump 4a, the bump 4a can surely connect the connection pad 150 and the anode electrode 142 of the light-emitting element 321.

[0114] Thereafter, as shown in FIG. 9C, by filling the insulating resin 102 between the semiconductor substrate 2 and the chip 3 and between the connection portions of the semiconductor substrate 2 and the chip 3, the adjacent bumps 4a are insulated from each other, and the assembly of the light source device 110 is completed.

[0115] As a result, in the light source device 110, since the adjacent bumps 4a are insulated from each other by the insulating resin 102, it is possible to prevent a short circuit failure between the bumps 4a and to prevent an open failure of the bump 4a due to an impact.

[0116] [3. Effects] The electronic device 1 includes a semiconductor substrate 2, a chip 3, and a connection portion (bump 4). The chip 3 has a coefficient of thermal expansion different from that of the semiconductor substrate 2. The bump 4 includes a porous metal layer 41 that connects the connection pads 21 and 31 provided on the opposing main surfaces of the semiconductor substrate 2 and the chip 3.

[0117] As a result, the electronic device 1 can connect the connection pads 21 and 31 of the semiconductor substrate 2 and the chip 3 by a low-temperature and low-pressure process as compared with the case where the connection pads 21 and 31 of the semiconductor substrate 2 and the chip 3 are connected by a bulk metal bump. Therefore, the electronic device 1 can reduce the damage caused by high temperature and high pressure, and thus can improve the reliability.

[0118] Further, the chip 3 has a coefficient of thermal expansion different from that of the semiconductor substrate 2 by 0.1 ppm / °C or more. As a result, in the electronic device 1, for example, even if the chip 3 generates heat and expands at a coefficient of thermal expansion different from that of the semiconductor substrate 2, since the porous metal layer 41 elastically deforms, it is possible to suppress the occurrence of an open failure at the bump 4.

[0119] Further, the chip 3 is a semiconductor laser, and the semiconductor substrate 2 has a drive circuit 22 for driving the semiconductor laser. As a result, in the electronic device 1, even if the chip 3 expands with a coefficient of thermal expansion different from that of the semiconductor substrate 2 due to heat generation accompanying the light emission of the semiconductor laser, the porous metal layer 41 elastically deforms, so that an open failure can be suppressed from occurring in the bump 4.

[0120] Further, the chip 3 is a semiconductor laser. The semiconductor substrate has a temperature sensor. As a result, the drive circuit 22 for driving the semiconductor laser controls the driving of the light emitting portion 32 according to the temperature near the light emitting portion 32 detected by the temperature sensor, thereby suppressing fluctuations in the light emission characteristics of the light emitting portion 32 caused by temperature changes.

[0121] Further, the semiconductor laser has a plurality of light emitting elements 321 arranged two-dimensionally for emitting laser light. For the plurality of light emitting elements 321, the anode electrode 142 and the cathode electrode 143 are provided on the same plane. As a result, the semiconductor laser can be easily connected to the drive circuit 22.

[0122] Further, the semiconductor substrate 2 has a switch 154. The switch 154 is connected to the anode electrode 142 or the cathode electrode 143. As a result, when the distance measuring device 100 measures distance by the STL method, the drive circuit 22 can irradiate the subject S with pattern light of various types of dot patterns by individually controlling each switch 154.

[0123] Further, the switch 154 is connected for each of the plurality of light emitting elements 321. The light emitting elements 321 are controlled for light emission in groups. As a result, the distance measuring device 100 can irradiate the subject S with various types of pattern light by changing the light emission pattern for each group of the light emitting elements 321.

[0124] Further, the switch 154 is connected to each light emitting element 321. The light emitting elements 321 are individually controlled for light emission. Thereby, the distance measuring device 100 can irradiate the subject S with pattern light of an arbitrary light emission pattern.

[0125] Also, the light emitting elements 321 are formed on a common substrate. Thereby, the semiconductor laser can share one anode electrode 142 or cathode electrode 143 among the plurality of light emitting elements 321.

[0126] Further, each anode electrode 142 or each cathode electrode 143 and each switch 154 are connected by a connection portion (bump 4). Thereby, the light source device 110 can connect the semiconductor substrate 2 and the chip 3 by a low-temperature and low-pressure process as compared with the case of connecting the semiconductor substrate 2 and the chip 3 by a bulk metal bump. Therefore, the light source device 110 can reduce the damage caused by high temperature and high pressure, and thus can improve the reliability.

[0127] The light emitting element 321 has a VCSEL structure. Thereby, the light source device 110 can reduce power consumption and enable mass production.

[0128] Also, an insulating resin 102 is filled between the semiconductor substrate 2 and the chip 3 and between the connection portions (bumps 4). Thereby, in the light source device 110, adjacent bumps 4 are insulated by the insulating resin 102, so that a short circuit failure between the bumps 4 can be prevented and an open failure of the bump 4 due to impact can be prevented.

[0129] Also, the porous metal layer 41 contains metal particles having a particle diameter of 0.005 μm to 1.0 μm. Due to the size effect of the metal particles, such a porous metal layer 41 enables metal bonding at a temperature lower than the melting point of the bulk metal. Thereby, in the electronic device 1, the connection pads 21 and 31 of the semiconductor substrate 2 and the chip 3 are connected by the porous metal layer 41 that enables metal bonding at a relatively low temperature, so that the reliability can be improved by reducing the damage caused by heat.

[0130] Further, at least one of the bump 4 has metal films 42 and 43 having the same component as the porous metal layer 41 between the porous metal layer 41 and the connection pad 21 on the semiconductor substrate 2 side and between the porous metal layer 41 and the connection pad 31 on the chip 3 side.

[0131] Thereby, even when the components of the connection pads 21 and 31 and the porous metal layer 41 are different, the connection pads 21 and 31 can be firmly connected by the metal films 42 and 43 and the porous metal layer 41.

[0132] Further, the metal films 42 and 43 are thin films formed to cure the surfaces of the patterned photoresist layers 51 and 52 used in the process of forming the bumps 4 and 4a. Thereby, since the bumps 4 and 4a having a fine structure can be formed, the fine pitch of the bumps 4 and 4a can be achieved.

[0133] Further, the ratio of the film thickness of the metal film 42 to the thickness in the direction orthogonal to the main surface of the semiconductor substrate 2 in the bump 4 is less than 10%, preferably less than 5%. Also, the ratio of the film thickness of the metal film 43 to the thickness in the direction orthogonal to the main surface of the chip 3 in the bump 4a is less than 10%, preferably less than 5%.

[0134] Thereby, it is possible to prevent the through holes for forming the bumps 4 and 4a, which are patterned in the photoresist layers 51 and 52, from becoming narrower due to the formation of the metal films 42 and 43. As a result, the paste 40 containing metal particles that become the material of the bumps 4 and 4a can be appropriately filled into the through holes patterned in the photoresist layers 51 and 52.

[0135] Further, in the case of an electronic device in which the semiconductor substrate 2 and the chip 3 are connected by the bumps 4 and 4a, the ratio of the film thickness of the metal films 42 and 43 to half of the thickness in the direction orthogonal to the main surfaces of the semiconductor substrate 2 and the chip 3 in the laminate of the bumps 4 and 4a is less than 10%, preferably less than 5%.

[0136] This can prevent the through holes for forming the bumps 4 and 4a patterned in the photoresist layers 51 and 52 from becoming narrower due to the formation of the metal films 42 and 43. As a result, the paste 40 containing metal particles that will become the material of the bumps 4 and 4a can be appropriately filled into the through holes patterned in the photoresist layers 51 and 52.

[0137] Further, the electronic device 1 includes a semiconductor substrate 2 and bumps 4. The bumps 4 include a metal film 42 and a porous metal layer 41 that are sequentially laminated on the surface of connection pads 21 provided on the main surface of the semiconductor substrate 2. And the metal film 42 has a ratio of film thickness to the thickness in the direction orthogonal to the main surface of the semiconductor substrate 2 in the bump 4 of less than 10%.

[0138] Thereby, the semiconductor substrate 2 enables the fine pitch of the bumps 4 and, compared with the case of using bulk metal bumps, enables flip chip mounting of the chip 3 having a coefficient of thermal expansion different from that of the semiconductor substrate 2 by a low-temperature and low-pressure process.

[0139] Further, the semiconductor substrate 2 has, for example, a drive circuit 22 that drives a semiconductor laser for flip chip mounting. The drive circuit 22 independently controls each light-emitting element by controlling each switch 154 that connects between each anode electrode 142 of a plurality of light-emitting elements 321 included in the semiconductor laser. Thereby, when the distance measuring device 100 measures distance by the STL method, the drive circuit 22 can cause the light source device 110 to irradiate the subject S with pattern light of various types of dot patterns.

[0140] Further, the electronic device 1 includes a chip 3 and bumps 4a. The bumps 4a include a metal film 43 and a porous metal layer 41 that are sequentially laminated on the surface of connection pads 31 provided on the main surface of the chip 3. And the metal film 43 has a ratio of film thickness to the thickness in the direction orthogonal to the main surface of the chip 3 in the bump 4a of 10% or less.

[0141] As a result, the chip 3 enables fine pitch of the bumps 4a, and flip chip mounting on the semiconductor substrate 2 having a coefficient of thermal expansion different from that of the chip 3 can be achieved by a low-temperature and low-pressure process as compared with the case of using bulk metal bumps.

[0142] Also, the chip 3 is a semiconductor laser. The semiconductor laser has a plurality of light-emitting elements 321 two-dimensionally arranged to emit laser light. For the plurality of light-emitting elements 321, an anode electrode 142 and a cathode electrode 143 are provided on the same plane. Thereby, the semiconductor laser can be easily connected to the drive circuit 22.

[0143] Also, since the chip 3 can be bonded via the bumps 4 on the drive circuit 22, the area of the mounting substrate 101 can be reduced.

[0144] Note that the effects described in this specification are merely illustrative and not limiting, and there may be other effects.

[0145] Note that the present technology can also have the following configurations. (1) A semiconductor substrate, A chip having a coefficient of thermal expansion different from that of the semiconductor substrate, A connection portion including a porous metal layer that connects connection pads provided on opposing main surfaces of the semiconductor substrate and the chip An electronic device having the same. (2) The chip is The electronic device according to (1) above, having a coefficient of thermal expansion different from that of the semiconductor substrate by 0.1 ppm / °C or more. The electronic device according to (1) above, having a coefficient of thermal expansion different from that of the semiconductor substrate by 0.1 ppm / °C or more. (3) The chip is A semiconductor laser, The semiconductor substrate is The electronic device according to (1) or (2) above, having a drive circuit for driving the semiconductor laser. The electronic device according to (1) or (2) above, having a drive circuit for driving the semiconductor laser. (4) The chip is a semiconductor laser, wherein the semiconductor substrate has a temperature sensor the electronic device according to any one of (1) to (3). (5) wherein the semiconductor laser has a plurality of light-emitting elements two-dimensionally arranged to emit laser light, each of the plurality of light-emitting elements has an anode electrode and a cathode electrode provided on the same plane the electronic device according to (3) or (4). (6) wherein the semiconductor substrate has a switch, wherein the switch is connected to the anode electrode or the cathode electrode the electronic device according to (5). (7) wherein the switch is connected to each group of the plurality of light-emitting elements, wherein the light-emitting elements are light-emission controlled for each group the electronic device according to (6). (8) wherein the switch is connected to each of the light-emitting elements, wherein the light-emitting elements are individually light-emission controlled the electronic device according to (6). (9) each of the anode electrodes or each of the cathode electrodes and each of the switches are connected by the connection portion the electronic device according to any one of (6) to (8). (10) wherein the light-emitting elements are formed on a common substrate the electronic device according to any one of (5) to (9). (11) wherein the light-emitting elements Having a VCSEL (Vertical Cavity Surface Emitting Laser) structure The electronic device according to any one of (5) to (10) above. (12) An insulating resin is filled between the semiconductor substrate and the chip and between the connection portions. The electronic device according to any one of (1) to (11) above. (13) The porous metal layer The electronic device according to any one of (1) to (12) above, including metal particles having a particle diameter of 0.005 μm to 1.0 μm. (14) The connection portion The electronic device according to any one of (1) to (13) above, having a metal film of the same component as the porous metal layer on at least one of between the porous metal layer and the connection pad on the semiconductor substrate side and between the porous metal layer and the connection pad on the chip side. (15) The metal film The electronic device according to (14) above, wherein the ratio of the film thickness to the thickness in the direction perpendicular to the main surface in the connection portion is 10% or less. (16) The metal film The electronic device according to (15) above, wherein the ratio of the film thickness to the thickness in the direction perpendicular to the main surface in the connection portion is less than 5%. (17) The metal film The electronic device according to (14) above, wherein the ratio of the film thickness to half of the thickness in the direction perpendicular to the main surface in the connection portion is 10% or less. (18) The metal film The electronic device according to (17) above, wherein the ratio of the film thickness to half of the thickness in the direction perpendicular to the main surface in the connection portion is less than 5%. (19) The ratio of the height in the direction perpendicular to the main surface in the porous metal layer and the connection part is greater than 90%, and the electronic device according to any one of (1) to (18). (20) A semiconductor substrate, A bump including a metal film and a porous metal layer sequentially laminated on the surface of a connection pad provided on the main surface of the semiconductor substrate, and having, The metal film, The ratio of the film thickness to the thickness in the direction perpendicular to the main surface in the bump is 10% or less, Electronic device. (21) The semiconductor substrate, Has a drive circuit for driving a semiconductor laser mounted by flip chip, The drive circuit, Controls each switch connecting between each of a plurality of light emitting elements included in the semiconductor laser and a current source to independently control each of the light emitting elements, The electronic device according to (20). (22) A chip, A bump including a metal film and a porous metal layer sequentially laminated on the surface of a connection pad provided on the main surface of the chip, and having, The metal film, The ratio of the film thickness to the thickness in the direction perpendicular to the main surface in the bump is 10% or less, an electronic device. (23) The chip, Is a semiconductor laser, The semiconductor laser, Has a plurality of light emitting elements two-dimensionally arranged for emitting laser light, Each of the plurality of light emitting elements, An anode electrode and a cathode electrode are provided on the same plane, The electronic device according to (22).

[0146] Although the preferred embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the technical scope of the present disclosure is not limited to such examples. It is obvious that those having ordinary knowledge in the technical field of the present disclosure can conceive of various modification examples or correction examples within the scope of the technical idea described in the claims, and these are naturally understood to belong to the technical scope of the present disclosure. The aspects and features described above, together with at least one of the examples and figures previously described, can be combined with other examples, and may be replaced with the preferred features of such other examples, or the preferred features of such other examples may be additionally introduced. For example, the above-described structural and / or functional details may be similarly applied to an electronic device configured as described in (19) to (23).

Claims

1. A semiconductor substrate, a chip having a coefficient of thermal expansion different from that of the semiconductor substrate, a connection portion including a porous metal layer connecting connection pads provided on opposing main surfaces of the semiconductor substrate and the chip, and an insulating film covering side surfaces and peripheral portions of upper surfaces of the connection pads provided on an upper surface of the semiconductor substrate. The electronic device has: The chip is a semiconductor laser, The semiconductor substrate has a drive circuit for driving the semiconductor laser, The semiconductor laser has a substrate and a light-emitting element provided on one main surface of the substrate, The light-emitting element emits laser light in a direction from one main surface of the substrate toward the other main surface opposite to the one main surface, In the insulating film, a diameter of a recess opening not covered by the insulating film on the upper surface of the connection pad is larger than a diameter of the connection portion. An electronic device.

2. The chip has a coefficient of thermal expansion different from that of the semiconductor substrate by 0.1 ppm / °C or more. The electronic device according to claim 1.

3. The semiconductor laser has a plurality of two-dimensionally arranged light-emitting elements that emit laser light, For each of the plurality of light-emitting elements, an anode electrode and a cathode electrode are provided on the same plane, The semiconductor substrate has a switch, The switch is connected to the anode electrode or the cathode electrode, and is connected for each group of the plurality of light-emitting elements. The light-emitting elements are light-emission controlled for each group. The electronic device according to claim 1.

4. The semiconductor laser has a plurality of two-dimensionally arranged light-emitting elements that emit laser light, For each of the plurality of light-emitting elements, an anode electrode and a cathode electrode are provided on the same plane, The semiconductor substrate has a switch, The switch is connected to the anode electrode or the cathode electrode, and is connected for each light-emitting element. The light-emitting elements are individually light-emission controlled. The electronic device according to claim 1.

5. Each of the anode electrodes or each of the cathode electrodes and each of the switches are connected by the connection portion. The electronic device according to claim 3.

6. The light-emitting elements are formed on a common substrate. The electronic device according to claim 3.

7. The light-emitting elements have a VCSEL (Vertical Cavity Surface Emitting Laser) structure. The electronic device according to claim 3.

8. An insulating resin is filled between the semiconductor substrate and the chip and between the connection portions. The electronic device according to claim 1.

9. The porous metal layer contains metal particles having a particle diameter of 0.005 μm to 1.0 μm. The electronic device according to claim 1.

10. The connection portion has a metal film having the same composition as the porous metal layer on at least one of the between the porous metal layer and the connection pad on the semiconductor substrate side and between the porous metal layer and the connection pad on the chip side. The electronic device according to claim 1.

11. The metal film has a ratio of film thickness to the thickness in the direction perpendicular to the main surface in the connection portion of 10% or less. The electronic device according to claim 10.

12. The metal film has a ratio of film thickness to the thickness in the direction perpendicular to the main surface in the connection portion of less than 5%. The electronic device according to claim 11.

13. The metal film has a ratio of film thickness to half of the thickness in the direction perpendicular to the main surface in the connection portion of 10% or less. The electronic device according to claim 10.

14. The metal film has a ratio of film thickness to half of the thickness in the direction perpendicular to the main surface in the connection portion of less than 5%. The electronic device according to claim 13.

15. The ratio of the thickness or the longitudinal extension of the porous metal layer to the thickness or the longitudinal extension of the connection portion is 90% or more. The electronic device according to claim 1.

16. The semiconductor substrate has a temperature sensor. The electronic device according to claim 1.

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