Semiconductor device

Abstract

To provide a display device in which an influence due to a fluctuation of a threshold value voltage of a transistor containing an oxide semiconductor film, has a high reliability, has a good display characteristic, and reaches a low-power consumption.SOLUTION: In a pixel 601 containing a selection transistor 400b, a driving transistor 400a, and a light emission element 350, a channel is formed onto an oxide semiconductor film as the driving transistor, and the length of the channel is 0.5 μm or more and is 4.5 μm or less, preferably is larger than 1 μm is 4 μm or less, and is preferably larger than 1 μm, and is 3.5 μm or less, and is preferably larger 1 μm and is 2.5 μm or less. On the oxide semiconductor film, first and second gate electrodes that are overlapped to upper and lower layers of the oxide semiconductor film respectively are included, and a transistor to which gate electrode is electrically connected is adopted. Also, the length of the channel of the selection transistor in which a magnetic field effect movement level is not required as compared with the driving transistor becomes larger than that of at least the driving transistor.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The invention disclosed in this specification and the like relates to a display device and a method for manufacturing the same. In particular, one aspect of the present invention relates to a display device including a transistor having an oxide semiconductor film and a method for manufacturing the same.

Background Art

[0002] A display device using a light-emitting element such as organic electroluminescence (hereinafter also referred to as EL) has high visibility, is optimal for thinning, and has no viewing angle limitation, and thus has attracted attention as a display device to replace a cathode ray tube (CRT) or a liquid crystal display device. An active matrix type display device using a light-emitting element usually includes at least a light-emitting element, a transistor (switching (selection) transistor) for controlling the input of a video signal to a pixel, and a transistor (driving transistor) for controlling the current value supplied to the light-emitting element, which are provided in each pixel. The transistors used in display devices are composed of silicon semiconductors such as amorphous silicon, single crystal silicon, or polycrystalline silicon formed on a glass substrate.

[0003] In recent years, technology using a metal oxide (oxide semiconductor) having semiconductor characteristics as a transistor instead of a silicon semiconductor has attracted attention. For example, as an oxide semiconductor, a transistor using zinc oxide or In-Ga-Zn oxide is manufactured, and a technique of using the transistor for a switching transistor of a pixel of a display device or the like is disclosed (see Patent Document 1).

[0004]

Prior Art Documents

Patent Document

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] In a display device including a light-emitting element, the drain current of a driving transistor is supplied to the light-emitting element. Therefore, when the driving transistor deteriorates and the threshold voltage fluctuates, the luminance of the light-emitting element also fluctuates. Therefore, suppressing the fluctuation of the threshold voltage of the driving transistor is an important issue in improving the image quality of the display device. In addition, for high-speed driving of the display device, it is desirable to use a transistor with a high field-effect mobility as the driving transistor. On the other hand, for reducing the power consumption of the display device, it is desirable to apply a transistor having an electrical characteristic in which the threshold voltage is positive (also referred to as normally-off characteristic) as the selection transistor. Or, as the selection transistor, it is desirable to apply a transistor in which the value of the drain current (Id) - gate voltage (Vg) characteristic curve at a gate voltage of 0V (cut-off current (Icut)) is reduced. In view of the above problems, one aspect of the present invention is to provide a display device in which the influence due to the fluctuation of the threshold voltage of the transistor is reduced. Or, one aspect of the present invention is to provide a highly reliable display device.

[0007]

[0008]

[0009] ​​​​​​​​​​

[0010] In addition, one aspect of the present invention aims to provide a display device having good display characteristics as one of the problems. This is one of the problems.

[0011] In addition, one aspect of the present invention aims to provide a display device that achieves low power consumption as one of the problems. This is one of the problems.

[0012] Note that the description of these problems does not prevent the existence of other problems. One aspect of the present invention is not required to solve all of these problems. In addition, problems other than the above will become apparent from the description in the detailed specification and the like, and it is possible to extract problems other than the above from the description in the detailed specification and the like. will become apparent from the description in the detailed specification and the like, and it is possible to extract problems other than the above from the description in the detailed specification and the like. is possible.

Means for Solving the Problems

[0013] In a pixel including a selection transistor, a driving transistor, and a light-emitting element, as the driving transistor, a channel is formed in an oxide semiconductor film, and the channel length is 0.5 μm or more and 4 .5 μm or less, preferably more than 1 μm and 4 μm or less, more preferably more than 1 μm and 3.5 μm or less, and still more preferably more than 1 μm and 2.5 μm or less. Apply a transistor. In addition, as the driving transistor, it has a first gate electrode and a second gate electrode that overlap the upper layer and the lower layer of the oxide semiconductor film, respectively, and each gate electrode is electrically connected to each other. By this, the field-effect mobility and on-current of the driving transistor can be improved, and a display device capable of performing good display even at a high driving frequency can be obtained. In addition, the channel length of the selection transistor of the pixel that does not require the field-effect mobility as high as that of the driving transistor is at least longer than the channel length of the driving transistor. connected to each other. By this, the field-effect mobility and on-current of the driving transistor can be improved, and a display device capable of performing good display even at a high driving frequency can be obtained. In addition, the channel length of the selection transistor of the pixel that does not require the field-effect mobility as high as that of the driving transistor is at least longer than the channel length of the driving transistor. connected to each other. By this, the field-effect mobility and on-current of the driving transistor can be improved, and a display device capable of performing good display even at a high driving frequency can be obtained. In addition, the channel length of the selection transistor of the pixel that does not require the field-effect mobility as high as that of the driving transistor is at least longer than the channel length of the driving transistor. connected to each other. By this, the field-effect mobility and on-current of the driving transistor can be improved, and a display device capable of performing good display even at a high driving frequency can be obtained. In addition, the channel length of the selection transistor of the pixel that does not require the field-effect mobility as high as that of the driving transistor is at least longer than the channel length of the driving transistor. device can be obtained. In addition, the channel length of the selection transistor of the pixel that does not require the field-effect mobility as high as that of the driving transistor is at least longer than the channel length of the driving transistor. device can be obtained. In addition, the channel length of the selection transistor of the pixel that does not require the field-effect mobility as high as that of the driving transistor is at least longer than the channel length of the driving transistor. than that of the driving transistor. By increasing the aperture ratio, it is possible to achieve low power consumption while increasing the pixel aperture ratio. do.

[0014] More specifically, for example, the following configuration can be adopted.

[0015] One embodiment of the present invention is a light-emitting element and a first transistor that functions as a driving transistor of the light-emitting element. The transistor is electrically connected to the first transistor and functions as a selection transistor. and a second transistor, the first transistor being a first transistor on an insulating surface. A gate electrode, a first insulating film on the first gate electrode, and a first gate electrode via the first insulating film. a first oxide semiconductor film overlapping the first electrode and electrically connected to the first oxide semiconductor film; a pair of electrodes having ends on the first oxide semiconductor film and a second insulating film on the first oxide semiconductor film; a first gate electrode and a second insulating film provided on the first oxide semiconductor film, the first gate electrode and the second insulating film being interposed therebetween; and a second gate electrode overlapping the second gate electrode, the second gate electrode being a second a second transistor having a region facing a side surface of the first oxide semiconductor film with the insulating film interposed therebetween; The capacitor includes a third gate electrode on the insulating surface, a first insulating film on the third gate electrode, and a first a second oxide semiconductor film overlapping with the third gate electrode via an insulating film; a pair of electrodes electrically connected to the second oxide semiconductor film and having ends on the first oxide semiconductor film; The distance between the pair of electrodes of the first transistor is 0.5 μm or more and 4.5 μm or less, and the second The distance between the pair of electrodes of the first transistor is wider than the distance between the pair of electrodes of the second transistor. The display device is characterized in that

[0016] Another embodiment of the present invention is a light-emitting element and a transistor that functions as a driving transistor of the light-emitting element. A pixel includes a first transistor and a second transistor electrically connected to the first transistor and functioning as a selection transistor. The first transistor includes a first gate electrode on an insulating surface, a first insulating film on the first gate electrode, a first oxide semiconductor film overlapping the first gate electrode via the first insulating film, a pair of electrodes electrically connected to the first oxide semiconductor film and having ends on the first oxide semiconductor film, a second insulating film on the first oxide semiconductor film, and a second gate electrode provided on the first oxide semiconductor film via the second insulating film and overlapping the first gate electrode. The second gate electrode has a region facing a side surface of the first oxide semiconductor film via the second insulating film in the channel width direction. The second transistor includes a third gate electrode on an insulating surface, a first insulating film on the third gate electrode, a second oxide semiconductor film overlapping the third gate electrode via the first insulating film, and a pair of electrodes electrically connected to the second oxide semiconductor film and having ends on the second oxide semiconductor film. The distance between the pair of electrodes of the first transistor is 0.5 μm or more and 4.5 μm or less. The distance between the pair of electrodes of the second transistor is wider than the distance between the pair of electrodes of the first transistor, and the value of the cut-off current of the second transistor is smaller than the value of the cut-off current of the first transistor. Moreover, in the above display device, the second transistor may have a fourth gate electrode provided on the second oxide semiconductor film via the second insulating film and overlapping the third gate electrode, and the third gate electrode and the fourth gate electrode may have a region in contact with each other.

[0017]

[0018] ​​​​​​​​​​​​​​​​In addition, in the above-described display device, it is preferable that the first gate electrode and the second gate electrode have a region in contact with each other.

[0019] In addition, in the above-described display device, at least one of the first insulating film and the second insulating film preferably has an oxide insulating film containing more oxygen than oxygen satisfying the stoichiometric composition.

Advantages of the Invention

[0020] According to one aspect of the present invention, it is possible to provide a display device in which the influence of variations in the threshold voltage of a transistor including an oxide semiconductor film is reduced.

[0021] In addition, according to one aspect of the present invention, it is possible to provide a highly reliable display device.

[0022] In addition, according to one aspect of the present invention, it is possible to provide a display device having good display characteristics.

[0023] In addition, according to one aspect of the present invention, it is possible to provide a display device that achieves low power consumption.

Brief Description of the Drawings

[0024]

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Embodiments for Carrying Out the Invention

[0025] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and those skilled in the art can easily understand that the form and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention is not to be construed as being limited to the description of the embodiments and examples shown below. In addition, in the embodiments and examples described below, the same part or the part having the same function is commonly used with the same reference numeral or the same hatch pattern in different drawings, and the repeated description thereof will be omitted.

[0026] In each figure described in this specification, the size, thickness, or area of each component is not clearly indicated. may be exaggerated for clarity and are not necessarily limited to scale .

[0027] In addition, ordinal numbers such as 1st, 2nd, etc., used in this specification are used to avoid confusion of components. Therefore, for example, "the first" can be changed to "the second This can be explained by replacing it with "the" or "the third" etc. as appropriate.

[0028] The function of the "source" and "drain" is to change the direction of the current during circuit operation. For this reason, in this specification and other documents, the terms "source" and "drive" are used interchangeably. The terms "rain" and "rainfall" may be used interchangeably.

[0029] Voltage refers to the potential difference between two points, and potential refers to the electrostatic potential at a certain point. This refers to the electrostatic energy (electrical potential energy) possessed by a unit charge in a field. However, in general, the potential at a certain point is the potential relative to a reference potential (for example, ground potential). The difference is simply called potential or voltage, and potential and voltage are often used synonymously. Therefore, in this specification, unless otherwise specified, potential may be read as voltage. However, voltage may be read as potential.

[0030] In this specification, when an etching process is performed after a photolithography process, The mask formed in the photolithography process is removed.

[0031] (Embodiment 1) In this embodiment, a display device according to one embodiment of the present invention and a manufacturing method thereof will be described with reference to the drawings. will be described below.

[0032] <Configuration Example of Display Device> Fig. 1(A) shows a block diagram of an example of a display device. The display device shown in Fig. 1(A) has a pixel section 600, a scanning line driving circuit 604, a signal line driving circuit 606, m scanning lines 607 that are each arranged in parallel or substantially parallel and whose potential is controlled by the scanning line driving circuit 604, and n signal lines 609 that are each arranged in parallel or substantially parallel and whose potential is controlled by the signal line driving circuit 606. Further, the pixel section 600 has a plurality of pixels 601 arranged in a matrix. Also, the scanning line driving circuit 604 and the signal line driving circuit 606 may be collectively referred to as a driving circuit section.

[0033] Each scanning line 607 is electrically connected to n pixels 601 arranged in any one of the rows among the pixels 601 arranged in m rows and n columns in the pixel section 600. Also, each signal line 609 is electrically connected to m pixels 601 arranged in any one of the columns among the pixels 601 arranged in m rows and n columns. Both m and n are integers of 1 or more. Also, each capacitance line 615 is electrically connected to n pixels 601 arranged in any one of the rows among the pixels 601 arranged in m rows and n columns. When the capacitance lines 615 are arranged in parallel or substantially parallel along the signal lines 609, they are electrically connected to m pixels 601 arranged in any one of the columns among the pixels 601 arranged in m rows and n columns.

[0034] <Configuration Example of Pixel> Fig. 1(B) shows an example of a circuit configuration that can be used for the pixel 601 of the display device shown in Fig. 1(A).

[0035] The pixel 601 shown in FIG. 1(B) includes a transistor 400 that functions as a selection transistor b, a transistor 400a that functions as a driving transistor, a capacitor element 370, and a light-emitting element 350.

[0036] One of the source electrode and the drain electrode of the transistor 400a is electrically connected to one of the electrodes of the light-emitting element 350, and the other of the source electrode and the drain electrode of the transistor 400a is electrically connected to an anode line (not shown) to which a high power supply potential is applied. Also, the transistor 400a has a pair of gate electrodes that overlap with each other with a semiconductor film interposed therebetween, and one of the gate electrodes of the transistor 400a is connected to the other of the gate electrodes of the transistor 400a , one of the source electrode and the drain electrode of the transistor 400b, and one of the electrodes of the capacitor element 370 electrically. The gate electrode of the transistor 400b is electrically connected to the scanning line 607, and the other of the source electrode and the drain electrode of the transistor 400b is electrically connected to the signal line 609. Also, the other electrode of the capacitor element 370 is electrically connected to the capacitor line 615, and the other electrode of the light-emitting element 350 is electrically connected to a cathode line (not shown) to which a low power supply potential is applied. (not shown).

[0037] The transistor 400a has a function of controlling the current flowing through the light-emitting element 350 by being turned on or off. (not shown).

[0038] In order to obtain sufficient luminance for the light-emitting element 350, it is required to apply a transistor with a high on-current as the transistor 400a that functions as a driving transistor. Also, for display (not shown). ​In order to improve the driving frequency of the device and achieve smoother video display, a transistor with a high field-effect mobility is required to be applied.

[0039] Therefore, in the display device of the present embodiment, as the transistor 400a, the channel length is 0.5 μm or more and 4.5 μm or less, preferably more than 1 μm and 4 μm or less, more preferably more than 1 μm and 3.5 μm or less, and even more preferably more than 1 μm and 2.5 μm or less is applied. Since the on-current of the transistor increases as the ratio of the channel length to the channel width (L / W ratio) decreases, by reducing the channel length of the transistor 400a to about the above range, the on-current can be improved. Or, by reducing the channel length to about the above range and also reducing the channel width, the transistor size can be reduced while keeping the on-current constant, and the aperture ratio of the pixel can be improved.

[0040] Further, the transistor 400a has an oxide semiconductor film in which a channel is formed, and a first gate electrode and a second gate electrode that overlap with each other with the oxide semiconductor film interposed therebetween. Also, the first gate electrode and the second gate electrode included in the transistor 400a are electrically connected. In this way, by providing a pair of gate electrodes with the oxide semiconductor film interposed therebetween and electrically connecting the pair of gate electrodes, unlike the case where a constant potential is applied only to one of the pair of gate electrodes, the same potential is applied to the pair of gate electrodes, so that the channel formation region increases and an increase in the drain current of the transistor 400a can be realized. Therefore, the size of the transistor 400a can be reduced while suppressing a decrease in the on-current.

[0041] Further, in order to connect the first gate electrode and the second gate electrode, the second gate electrode is provided so as to overlap at least one of the side surfaces in the channel width direction of the oxide semiconductor film. As a result, an electric field is also applied to the side surfaces in the channel width direction of the oxide semiconductor film, and it becomes possible to expand the region where current flows. Therefore, the field-effect mobility of the transistor 400a can be improved. Further, by providing a pair of electrically connected gate electrodes, a depletion layer is likely to be formed in the oxide semiconductor film, so that the subthreshold characteristics of the transistor 400a can be improved. Also, by shortening the channel length, the threshold voltage of the transistor may change in the negative direction. However, in the transistor 400a, in addition to the first gate electrode, by providing a second gate electrode (back gate electrode) on the back channel region side, generation of negative charges in the back channel region can be prevented, and the shift of the threshold voltage of the transistor in the negative direction can be suppressed.

[0042] The transistor 400b has a function of controlling the writing of a data signal by being turned on or off. As the transistor 400b, it is preferable to apply a transistor having electrical characteristics (also referred to as normal-off characteristics) in which the threshold voltage is positive. Also, it is preferable to apply a transistor with reduced cut-off current.

[0043] Also, by shortening the channel length, the threshold voltage of the transistor may change in the negative direction. However, in the transistor 400a, in addition to the first gate electrode, by providing a second gate electrode (back gate electrode) on the back channel region side, generation of negative charges in the back channel region can be prevented, and the shift of the threshold voltage of the transistor in the negative direction can be suppressed. The transistor 400b has a function of controlling the writing of a data signal by being turned on or off. As the transistor 400b, it is preferable to apply a transistor having electrical characteristics (also referred to as normal-off characteristics) in which the threshold voltage is positive. Also, it is preferable to apply a transistor with reduced cut-off current. The transistor 400b has a function of controlling the writing of a data signal by being turned on or off. As the transistor 400b, it is preferable to apply a transistor having electrical characteristics (also referred to as normal-off characteristics) in which the threshold voltage is positive. Also, it is preferable to apply a transistor with reduced cut-off current.

[0044] The transistor 400b has a function of controlling the writing of a data signal by being turned on or off. As the transistor 400b, it is preferable to apply a transistor having electrical characteristics (also referred to as normal-off characteristics) in which the threshold voltage is positive. Also, it is preferable to apply a transistor with reduced cut-off current.

[0045] As the transistor 400b, it is preferable to apply a transistor having electrical characteristics (also referred to as normal-off characteristics) in which the threshold voltage is positive. Also, it is preferable to apply a transistor with reduced cut-off current. As the transistor 400b, it is preferable to apply a transistor having electrical characteristics (also referred to as normal-off characteristics) in which the threshold voltage is positive. Also, it is preferable to apply a transistor with reduced cut-off current. As the transistor 400b, it is preferable to apply a transistor having electrical characteristics (also referred to as normal-off characteristics) in which the threshold voltage is positive. Also, it is preferable to apply a transistor with reduced cut-off current.

[0046] ​As described above, by reducing the channel length of the transistor, a high on-current can be obtained, while the threshold voltage of the transistor may vary in the negative direction (negative shift). In the display device of the present embodiment, the channel length of the transistor 400a that functions as a driving transistor requiring a high on-current and a high field-effect mobility is set to be 0.5 μm or more and 4.5 μm or less, and a pair of electrically connected gate electrodes are provided, thereby improving the on-current and the field-effect mobility while suppressing the negative shift of the threshold voltage.

[0047] On the other hand, since the transistor 400b that functions as a selection transistor does not require as high a field-effect mobility as the transistor 400a, by making its channel length larger than the channel length of the transistor 400a, the negative shift of the threshold voltage of the transistor 400b is suppressed. As a result, it is possible to achieve high-speed operation and low power consumption of the display device.

[0048] For example, when the channel length of the transistor 400a is 0.5 μm or more and 4.5 μm or less, the channel length of the transistor 400b can be set to 6 μm. However, the channel length of the transistor 400b only needs to be larger than at least the channel length of the transistor 400a, and can be appropriately set according to the characteristics required for the display device.

[0049] Also, the value of the cut-off current of the transistor 400b is preferably smaller than the value of the cut-off current of the transistor 400a. For example, by making the ratio of the channel length to the channel width (L / W ratio) of the transistor 400b larger than the L / W ratio of the transistor 400a, ​By doing so, the value of the cutoff current of transistor 400b can be made smaller than the value of the cutoff current of transistor 400a. Also, when the channel widths of transistor 400a and transistor 4 00b are equal, by making the channel length of transistor 400b larger than the channel length of transistor 400a, it becomes possible to reduce the value of the cutoff current of transistor 400b.

[0050] Note that transistor 400b may have a configuration having a pair of gate electrodes electrically connected in the same manner as transistor 400a. However, when transistor 400b has the above-described configuration, an area for connecting the pair of gate electrodes is required, and as a result, the area of transistor 400b becomes large, and the aperture ratio of the pixel decreases. Therefore, a single-gate structure is preferable for transistor 400b. Also, when the display device is enlarged, the parasitic capacitance of the gate wiring of transistor 400b affects the operation speed of the display device. Therefore, transistor 400b preferably has a single-gate structure with a small parasitic capacitance of the gate wiring.

[0051] As the light-emitting element 350, for example, an organic electroluminescence element (organic EL element) or an inorganic EL element can be used.

[0052] <Circuit symbol of transistor> Here, regarding the circuit symbol of the transistor having a pair of gate electrodes that overlap with an oxide semiconductor film interposed therebetween, it is shown in FIG. 10(A). In the circuit symbol shown in FIG. 10(A), the pair of gate electrodes are indicated by FG and BG, and the source electrode is indicated by S and the drain electrode is indicated by D.

[0053] Figure 10(B2) shows an example of a cross-sectional view of the transistor 400 that can be represented by the circuit symbol in Figure 10(B1). The transistor 400a shown in Figure 10(B2) has a pair of electrodes 20a, 20b that function as source electrodes or drain electrodes, which partially overlap with the gate electrode 31 on the oxide semiconductor film 1 7a. In the circuit symbol shown in Figure 10(B1), similar to the circuit symbol shown in Figure 10(A), a pair of gate electrodes are denoted as FG and BG, and the source electrode is denoted as S and the drain electrode as D .

[0054] In the transistor 400a shown in Figure 10(B2), in the channel length direction, the distance Wsd between the ends of the pair of electrodes 20a, 20b is shorter than the distance Wbg between the ends of the gate electrode 31 . And in the cross-sectional view in the channel length direction, a pair of ends of the gate electrode 31 overlap with the pair of electrodes 20a, 20b

[0055] Figure 10(C2) shows an example of a cross-sectional view of the transistor 400 that can be represented by the circuit symbol in Figure 10(C1). The transistor 400a shown in Figure 10(C2) has a pair of electrodes 20a, 20b that function as source electrodes or drain electrodes, which do not overlap with the gate electrode 31 on the oxide semiconductor film 1 7a. In the circuit symbol shown in Figure 10(C1), similar to the circuit symbol shown in Figure 10(A), a pair of gate electrodes are denoted as FG and BG, and the source electrode is denoted as S and the drain electrode as D .

[0056] In the transistor 400a shown in Figure 10(C2), in the channel length direction, the distance Wsd between the pair of electrodes 20a, 20b is longer than the distance Wbg between the ends of the gate electrode 31. Then In the cross-sectional view in the channel length direction, a pair of end portions of the gate electrode 31 do not overlap with a pair of electrodes 20a and 20b.

[0057] In the drawings attached to this specification, the circuit symbol shown in FIG. 10(A) includes the transistor 400a having the structure represented by the circuit symbol in FIG. 10(B1) and the transistor 400a having the structure represented by the circuit symbol in FIG. 10(C1). shall be included.

[0058] <Configuration Example of Transistor Included in Pixel> Next, a specific configuration of the transistor included in the pixel of the display device will be described.

[0059] FIGS. 2(A1) to 2(C2) show a top view and a cross-sectional view of the transistor 40 0a and the transistor 400b included in the pixel 601 of the display device. FIG. 2(A1) is a top view of the transistor 400a having a function as a driving transistor, and FIG. 2(A2) is a top view of the transistor 400b having a function as a selection transistor. FIG. 2(B) is a cross-sectional view between the dashed-dotted line A1 - B1 in FIG. 2(A1) and the dashed-dotted line A2 - B2 in FIG. 2(A2), FIG. 2(C1) is a cross-sectional view between the dashed-dotted line C1 - D1 in FIG. 2(A1), and FIG. 2( C2) is a cross-sectional view between the dashed-dotted line C2 - D2 in FIG. 2(A2). In FIGS. 2(A1) and 2(A2), for clarity, the substrate 11, the insulating film 15, etc. are omitted. In FIGS. 2(A1), 2(B), and 2(C1), the transistor 400a shown is a channel etch type transistor, including a gate electrode 13a provided on the substrate 11, an insulating film 15 formed on the substrate 11 and the gate electrode 13a, and, via the insulating film 15, the gate electrode 1

[0060] and 13a, and a semiconductor layer formed on the insulating film 15, and a source electrode 14a and a drain electrode 14b formed on the semiconductor layer. 3a, and a semiconductor layer formed on the insulating film 15, and a source electrode 14a and a drain electrode 14b formed on the semiconductor layer. An oxide semiconductor film 17a overlapping with 3a and a pair of electrodes 20a , 20b. Further, an insulating film 15, an oxide semiconductor film 17a, and a pair of electrodes 20a , 20b are provided with an insulating film 28 composed of an oxide insulating film 23, an oxide insulating film 25, and a nitride insulating film 27, and a gate electrode 31 formed on the insulating film 28. The gate electrode 31 is connected to the gate electrode 13a at openings 42 and 43 provided in the insulating film 15 and the insulating film 28. Also, an electrode 32 connected to one of the pair of electrodes 20a and 20b, here the electrode 20b, is formed on the nitride insulating film 27. Note that the electrode 32 functions as a pixel electrode. .

[0061] The transistor 400b shown in FIGS. 2(B) and 2(C2) is a channel-etch type transistor, and includes a gate electrode 13b provided on a substrate 11, an insulating film 15 formed on the substrate 11 and the gate electrode 13b, an oxide semiconductor film 17b overlapping with the gate electrode 13b via the insulating film 15, and a pair of electrodes 20c, 20d in contact with the oxide semiconductor film 17b. Also, on the insulating film 15, the oxide semiconductor film 17b, and the pair of electrodes 20c, 20d, there is an insulating film 28 composed of an oxide insulating film 23, an oxide insulating film 25, and a nitride insulating film 27. .

[0062] In the transistor 400a and the transistor 400b, the insulating film 15 functions as a gate insulating film (the first gate insulating film in the transistor 400a). Also, the insulating film 28 functions as the second gate insulating film of the transistor 400a and functions as a protective insulating film in the transistor 400b.

[0063] The transistor 400a shown in this embodiment has a channel length of 0.5 μm or more and 4.5 μm Hereinafter, preferably more than 1 μm and 4 μm or less, more preferably more than 1 μm and 3.5 μm or less, more preferably more than 1 μm and 2.5 μm or less. Also, the transistor 400a has an oxide semiconductor film 17a provided between the gate electrode 13a and the gate electrode 31 in the channel width direction, with an insulating film 15 and an insulating film 28 interposed therebetween. Further, as shown in FIG. 2(A1), the gate electrode 31 overlaps with the end portion of the oxide semiconductor film 17a via the insulating film 28 when viewed from above. An oxide semiconductor film 17a included in the transistor 400a has a configuration in which side surfaces in the channel length direction overlap with a pair of electrodes 20a and 20b, and side surfaces in the channel width direction overlap with the gate electrode 31. When the end portion of the oxide semiconductor film 17a is exposed to plasma by an etching process for processing the oxide semiconductor film 17a into an island shape, chlorine radicals, fluorine radicals, etc. generated from the etching gas easily bond to the metal elements constituting the oxide semiconductor. Therefore, at the end portion of the oxide semiconductor film 17a, oxygen that was bonded to the metal element is likely to desorb, so oxygen deficiency is formed and n-type conversion may easily occur. In particular, when the region surrounded by the broken lines 33 and 34 among the end portions of the oxide semiconductor film 17a is n-type converted, a leakage current easily flows between the pair of electrodes 20a and 20b through this region. However, in the transistor 400a, since the above-described region overlaps with the gate electrode 31, the electric field applied to the region can be controlled by controlling the potential of the gate electrode 31 (including the gate electrode 13a having the same potential as the gate electrode 31). Therefore, the end portion of the oxide semiconductor film 17a is prevented from being n-type converted. As shown in FIG. 2(A1), the gate electrode 31 overlaps with the end portion of the oxide semiconductor film 17a via the insulating film 28 when viewed from above. membrane 17a overlaps.

[0064] The oxide semiconductor film 17a included in the transistor 400a has side surfaces in the channel length direction overlapping with a pair of electrodes 20a and 20b, and side surfaces in the channel width direction overlapping with the gate electrode 31. A configuration in which the side surfaces in the channel width direction overlap with the gate electrode 31. The end portion of the oxide semiconductor film 17a is exposed to plasma during an etching process for processing the oxide semiconductor film 17a into an island shape. Chlorine radicals, fluorine radicals, etc. generated from the etching gas easily bond to the metal elements constituting the oxide semiconductor. Therefore, at the end portion of the oxide semiconductor film 17a, oxygen that was bonded to the metal element is likely to desorb, so oxygen deficiency is formed and n-type conversion may easily occur. When exposed to plasma, chlorine radicals, fluorine radicals, etc. generated from the etching gas easily bond to the metal elements constituting the oxide semiconductor. Therefore, at the end portion of the oxide semiconductor film 17a, oxygen that was bonded to the metal element is likely to desorb, so oxygen deficiency is formed and n-type conversion may easily occur. In a state where oxygen that was bonded to the metal element is likely to desorb, oxygen deficiency is formed and n-type conversion may easily occur. Therefore, oxygen deficiency is formed and n-type conversion may easily occur. In particular, when the region surrounded by the broken lines 33 and 34 among the end portions of the oxide semiconductor film 17a is n-type converted, A leakage current easily flows between the pair of electrodes 20a and 20b through this region. However, in the transistor 400a, since the above-described region overlaps with the gate electrode 31, By controlling the potential of the gate electrode 31 (including the gate electrode 13a having the same potential as the gate electrode 31), the electric field applied to the region can be controlled. Since the above region overlaps with the gate electrode 31, the electric field applied to the region can be controlled by controlling the potential of the gate electrode 31 (including the gate electrode 13a having the same potential as the gate electrode 31). Therefore, by controlling the potential of the gate electrode 31 (including the gate electrode 13a having the same potential as the gate electrode 31), the electric field applied to the region can be controlled. Therefore, the electric field applied to the region can be controlled, so the end portion of the oxide semiconductor film 17a is prevented from being n-type converted. Even if there was, the leakage current that can flow between the pair of electrodes 20a and 20b can be controlled by the potential applied to the pair of gate electrodes.

[0065] Specifically, when a potential is applied to the pair of gate electrodes such that the transistor 400a is in a non-conducting state, the off-current flowing between the pair of electrodes 20a and 20b can be suppressed to a small value through the end portions of the oxide semiconductor film 17a surrounded by the dashed line 33 and the dashed line 34. Therefore, in the transistor 400a, the channel length is shortened in order to obtain a large on-current. As a result, even if the length between the pair of electrodes 20a and 20b at the end portion of the oxide semiconductor film 17a becomes short, the off-current can be suppressed to a small value. That is, the transistor 400a can obtain a large on-current in the conducting state, and can suppress the off-current to a small value in the non-conducting state. It is a transistor.

[0066] Also, the channel length of the transistor 400b shown in this embodiment is larger than the channel length of the transistor 400 a. Thereby, the variation of the threshold voltage of the transistor 400b having a single gate structure in the negative direction can be suppressed, and the value of the cut-off current can be suppressed to a small value.

[0067] The insulating film 15 and the insulating film 28 have a plurality of openings. Typically, as shown in FIG. 2(B), it has an opening 41 that exposes one of the pair of electrodes 20a and 20b. Also, as shown in FIG. 2( C1), in the channel width direction, it has openings 42 and 43 that sandwich the oxide semiconductor film 17a. That is, it has openings 42 and 43 outside the side surfaces of the oxide semiconductor film 17a. ​​​. At the opening 41, one of the pair of electrodes 20a and 20b, here the electrode 20b, is connected to the electrode 3 2. Also, at the openings 42 and 43, the gate electrode 13a and the gate electrode 31 are connected. That is, in the channel width direction, the gate electrode 13a and the gate electrode 31 surround the oxide semiconductor film 17a via the insulating film 15 and the insulating film 28. Also, at the side surfaces of the openings 42 and 43, the gate electrode 31 faces the side surface of the oxide semiconductor film 17a.

[0068] Note that, as shown in Fig. 2(C1), in the channel width direction, the distance d between the side surface of the oxide semiconductor film 17a and the gate electrode 31 at the openings 42 and 43 is set to be not less than 1 times and not more than 7.5 times the sum of the film thickness t1 of the insulating film 15 and the film thickness t2 of the insulating film 28. When the distance d between the side surface of the oxide semiconductor film 17a and the gate electrode 31 at the openings 42 and 43 is not less than 1 times the sum of the film thickness t1 of the insulating film 15 and the film thickness t2 of the insulating film 28, as shown by the electric field lines 444 in Fig. 2(D), the electric field of the gate electrode 31 affects the side surface of the oxide semiconductor film 17a, and also the side surface and the end portion including the vicinity thereof, so that the generation of parasitic channels at the side surface or the end portion of the oxide semiconductor film 17a can be suppressed. On the other hand, when the distance d between the side surface of the oxide semiconductor film 17a and the gate electrode 31 at the openings 42 and 43 is not more than 7.5 times the sum of the film thickness t1 of the insulating film 15 and the film thickness t2 of the insulating film 28, the area of the transistor can be made smaller. The oxide semiconductor film 17a included in the transistor 400a and the oxide semiconductor film 17b included in the transistor 400b can be formed in the same manufacturing process. Oxide

[0069] ​​​The semiconductor film 17a and the oxide semiconductor film 17b are formed of a metal oxide containing at least In or Zn. Typically, they are formed of In-Ga oxide, In-Zn oxide, In-M-Zn oxide (where M is Al, Ga, Y, Zr, La, Ce, or Nd), etc.

[0070] When the oxide semiconductor film 17a and the oxide semiconductor film 17b are In-M-Zn oxide, the atomic ratio of In and M excluding Zn and O is such that In is 25 atomic% or more, M is less than 75 atomic%, and more preferably In is 34 atomic% or more, and M is less than 66 atomic%.

[0071] The oxide semiconductor film 17a and the oxide semiconductor film 17b have an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more. Thus, by using an oxide semiconductor with a wide energy gap, the off-current of the transistor 400a and the transistor 400b can be reduced.

[0072] The thickness of the oxide semiconductor film 17a and the oxide semiconductor film 17b is 3 nm or more and 200 nm or less, preferably 3 nm or more and 100 nm or less, and more preferably 3 nm or more and 50 nm or less.

[0073] When the oxide semiconductor film 17a and the oxide semiconductor film 17b are In-M-Zn oxide (where M is Al, Ga, Y, Zr, La, Ce, or Nd), the atomic ratio of the metal elements of the sputtering target used to form the In-M-Zn oxide preferably satisfies In≥M and Zn≥M. As such an atomic ratio of the metal elements of the sputtering target, ​​​​, In:M:Zn = 1:1:1, In:M:Zn = 1:1:1.2, In:M:Zn = 3 :1:2 is preferable. Note that the atomic ratios of the oxide semiconductor film 17a and the oxide semiconductor film 17b each include a variation of plus or minus 40% of the atomic ratio of the metal elements contained in the above sputtering target as an error.

[0074] As the oxide semiconductor film 17a and the oxide semiconductor film 17b, an oxide semiconductor film with a low carrier density is used. For example, the oxide semiconductor film 17a and the oxide semiconductor film 17b have a carrier density of 1×10 17 per cm 3 or less, preferably 1×10 15 per cm 3 or less, more preferably 1×10 13 per cm 3 or less, even more preferably 1×10 11 per cm 3 or less of the oxide semiconductor film is used.

[0075] Note that it is not limited to these, and those with appropriate compositions for each oxide semiconductor film may be used according to the semiconductor characteristics and electrical characteristics (field effect mobility, threshold voltage, etc.) of the required transistor. In addition, in order to obtain the semiconductor characteristics of the required transistor, it is preferable to make the carrier density, impurity concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. of the oxide semiconductor film 17a and the oxide semiconductor film 17b appropriate. a and the oxide semiconductor film 17b.

[0076] Note that as the oxide semiconductor film 17a and the oxide semiconductor film 17b, by using an oxide semiconductor film with a low impurity concentration and a low defect level density, a transistor with even more excellent electrical characteristics can be preferably fabricated. Note that as impurities, hydrogen, nitrogen, alkali metals ​ Examples include metals or alkaline earth metals. In this specification, an oxide semiconductor with a low impurity concentration and a low density of defect levels (low oxygen deficiency) is referred to as highly pure and genuine or substantially highly pure and genuine. An oxide semiconductor that is highly pure and genuine or substantially highly pure and genuine has few carrier generation sources, so that the carrier density can be lowered. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film tends to have electrical characteristics (also referred to as normally-off characteristics) in which the threshold voltage is positive. Also, an oxide semiconductor film that is highly pure and genuine or substantially highly pure and genuine may have a low trap level density because the defect level density is low. Further, a transistor using an oxide semiconductor film that is highly pure and genuine or substantially highly pure and genuine has an extremely small off-current, and when the voltage between the source electrode and the drain electrode (drain voltage) is in the range of 1 V to 10 V, the off-current can be below the measurement limit of a semiconductor parameter analyzer, that is, 1×10 A or less. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film has small fluctuations in electrical characteristics and high reliability. Note that the charge trapped in the trap levels of the oxide semiconductor film may take a long time to disappear and may behave like a fixed charge. Therefore, a transistor in which a channel region is formed in an oxide semiconductor film with a high trap level density -13 may have unstable electrical characteristics. Hydrogen contained in the oxide semiconductor film reacts with oxygen bonded to metal atoms to form water, and the oxygen that has reacted with hydrogen desorbs from the metal atoms, creating oxygen deficiencies in the lattice (or the portion from which oxygen has desorbed).

[0077] It is formed. When hydrogen enters the oxygen deficiency, carriers, i.e., electrons, may be generated. In addition, when a part of hydrogen combines with oxygen that binds to metal atoms, carriers, i.e., electrons, may be generated. Therefore, a transistor using an oxide semiconductor containing hydrogen tends to have normally-on characteristics.

[0078] For this reason, it is preferable that the oxide semiconductor film 17a and the oxide semiconductor film 17b have as little hydrogen as possible together with the oxygen deficiency. Specifically, in the oxide semiconductor film 17a and the oxide semiconductor film 17b, the hydrogen concentration obtained by secondary ion mass spectrometry (SIMS) is 2×10 atoms / cm or less, preferably 5×10 20 atoms / cm 3 or less, more preferably 1×10 19 atoms / cm 3 or less, even more preferably 5×10 atoms / cm 19 or less, even more preferably 1×10 3 atoms / cm 18 or less, even more preferably 5×10 atoms / c 3 m 18 or less, even more preferably 1×10 3 atoms / cm or less, even more preferably 5×1 17 0 3 atoms / cm 16 or less, still more preferably 1×10 3 atoms / cm or less.

[0079] When silicon or carbon, which is one of the group 14 elements, is contained in the oxide semiconductor film 17a and the oxide semiconductor film 17b, the oxygen deficiency increases in the oxide semiconductor film 17a and the oxide semiconductor film 17b, and they become n-type. For this reason, the oxide semiconductor film 17a and the oxide semiconductor film 17b should not contain silicon or carbon. The concentration of silicon and carbon in the body film 17b (concentration obtained by secondary ion mass spectrometry) shall be 18 atoms / cm 3 or less, preferably 17 atoms / cm 3 or less.

[0080] In addition, in the oxide semiconductor film 17a and the oxide semiconductor film 17b, the concentration of alkali metal or alkaline earth metal obtained by secondary ion mass spectrometry is set to 18 atom s / cm 3 or less, preferably 16 atoms / cm 3 or less. Alkali metals and alkaline earth metals may generate carriers when combined with the oxide semiconductor, which may increase the off-current of the transistor. Therefore, it is preferable to reduce the concentration of alkali metal or alkaline earth metal in the oxide semiconductor film 17a and the oxide semiconductor film 17b. Preferably.

[0081] In addition, if nitrogen is contained in the oxide semiconductor film 17a and the oxide semiconductor film 17b, electrons, which are carriers, are generated, the carrier density increases, and it tends to be n-type. As a result, a transistor using an oxide semiconductor containing nitrogen tends to have normally-on characteristics. Therefore in the oxide semiconductor film, it is preferable that nitrogen is reduced as much as possible. For example the nitrogen concentration obtained by secondary ion mass spectrometry is preferably set to 18 atoms / cm 3 or less.

[0082] The impurity concentration contained in the oxide semiconductor film 17a and the oxide semiconductor film 17b is set to the above values By reducing, it becomes possible to impart electrical characteristics (also referred to as normally-off characteristics) in which the threshold voltages of the transistors 400a and 400b become positive.

[0083] In addition, the oxide semiconductor film 17a and the oxide semiconductor film 17b may have, for example, a non-single crystal structure. The non-single crystal structure includes, for example, CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor), polycrystalline structure, microcrystalline structure described later, or amorphous structure. In the non-single crystal structure, the amorphous structure has the highest density of defect levels, and CAAC-OS has the lowest density of defect levels.

[0084] Note that by forming the oxide semiconductor film 17a with a CAAC-OS film, even when the channel length is small, typically 0.5 μm or more and 4.5 μm or less, preferably more than 1 μm and 4 μm or less , more preferably more than 1 μm and 3.5 μm or less, and even more preferably more than 1 μm and 2 .5 μm or less, it is possible to fabricate a channel-etch type transistor, which is preferable.

[0085] Note that the oxide semiconductor film 17a and the oxide semiconductor film 17b may be a mixed film having two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure. The mixed film may have, for example, any two or more regions of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. In addition, the mixed film may have, for example, a stacked structure of any two or more regions of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. ​​​​​​​​

[0086] A transistor having an oxide semiconductor film is an accumulation-type transistor. Here, regarding the flow of carriers in the off state and on state of a transistor having an oxide semiconductor film, it will be described using the schematic diagram shown in FIG. 36. Also, FIG. 36(A) and FIG. 36(B) are cross-sectional views in the channel length direction, and FIG. 36(C) is a cross-sectional view in the channel width direction.

[0087] In FIG. 36, a transistor having an oxide semiconductor film includes a gate electrode GE_1, a gate insulating film GI_1 on the gate electrode GE_1, an oxide semiconductor film OS on the gate insulating film GI_1, electrodes S and D on the oxide semiconductor film OS, a gate insulating film GI_2 on the oxide semiconductor film OS and the electrodes S and D, and a gate electrode GE_2 on the gate insulating film GI_2. The oxide semiconductor film OS has a channel region i and a low-resistance region n in contact with the electrodes S and D. + The gate electrode GE_1 and the gate electrode GE_2 are connected as shown in FIG. 36(C).

[0088] When the transistor is in the off state, as shown in FIG. 36(A), when a negative voltage is applied to the gate electrodes GE_1 and GE_2, electrons are repelled from the channel region i of the oxide semiconductor film OS, and the channel region i is completely depleted. As a result, the off-current of the transistor becomes extremely small.

[0089] On the other hand, in the on state, as shown in FIG. 36(B), electrons are accumulated from the low-resistance region n in contact with the electrode S to the low-resistance region n in contact with the electrode D, and a current path is formed as indicated by the arrow. + + ​​​​​​​​​​​It is formed. As shown in FIG. 36(C), the gate electrodes GE_1 and GE_2 are set to the same potential, and by having the side surface of the oxide semiconductor film OS face the gate electrode GE_2, further more, in the channel width direction, the gate electrodes GE_1 and GE_2 surround the oxide semiconductor film OS via the gate insulating films GI_1 and GI_2, As shown in FIG. 36(B), in the oxide semiconductor film OS, carriers flow not only at the interfaces between the gate insulating films GI_1, GI_2 and the oxide semiconductor film OS but also in a wide range within the oxide semiconductor film OS. As a result, the amount of carrier movement in the transistor increases. Consequently, the on-current of the transistor increases and the field-effect mobility becomes high. Typically, the field-effect mobility is 10 cm / V·s or more, and further 20 cm / V·s or more. Here, the field-effect mobility is not an approximate value of the mobility as a physical property value of the oxide semiconductor film, 2 but is the field-effect mobility in the saturation region of the transistor. The channel length of the transistor (also referred to as the L length) is 0.5 μm or more and 6.5 μm or less, preferably greater than 1 μm 2 and less than 6 μm, more preferably greater than 1 μm and less than or equal to 4 μm, even more preferably greater than 1 μm and less than or equal to 3.5 μm, and even more preferably greater than 1 μm and less than or equal to 2.5 μm. By setting it like this, the increase in the field-effect mobility is remarkable. Also, since the channel length is as small as 0.5 μm or more and 6.5 μm or less, it is possible to make the channel width small. Therefore, as shown in FIG. 36(C), even if a region for forming the connection portion of the gate electrodes GE_1 and GE_2 is provided, it is possible to reduce the area of the transistor.

[0090] The transistor 400 shown in FIGS. 2(A1), 2(B), 2(C1), and 2(D) In a, by having the gate electrode 13a and the gate electrode 31, each has an electric field shielding function from the outside, so the fixed charges existing between the substrate 11 and the gate electrode 13a and on the gate electrode 31 do not affect the oxide semiconductor film 17a. As a result, the deterioration of the stress test (for example, applying a negative potential to the gate electrode -GBT (Gate Bias-Temp erature) stress test) is suppressed, and the variation in the turn-on voltage of the on-current at different drain voltages can be suppressed.

[0091] Note that the BT stress test is a type of acceleration test, and the characteristic changes (i.e., aging changes) of the transistor that occur due to long-term use can be evaluated in a short time. In particular, the amount of change in the threshold voltage of the transistor before and after the BT stress test is an important indicator for examining reliability. The smaller the amount of change in the threshold voltage before and after the BT stress test, the higher the reliability of the transistor. When the channel length of the transistor is miniaturized, the threshold voltage may shift in the negative direction. However, in the display device of the present embodiment, by making the channel length of the transistor 400b that functions as the selection transistor of the pixel longer than that of the transistor 400a that functions as the drive transistor,

[0092] the high-speed operation and low power consumption of the display device can be achieved. In addition, in the insulating film 28 provided on the oxide semiconductor film 17a and the oxide semiconductor film 17b As for the transistor 400b that functions as the selection transistor of the pixel, by making the channel length longer than that of the transistor 400a that functions as the drive transistor, the high-speed operation and low power consumption of the display device can be achieved. This can be achieved.

[0093] Also, in the insulating film 28 provided on the oxide semiconductor film 17a and the oxide semiconductor film 17b It is preferable that an oxide insulating film containing more oxygen than the stoichiometric composition is included. An oxide insulating film containing more oxygen than the stoichiometric composition desorbs a part of the oxygen by heating. An oxide insulating film containing more oxygen than the stoichiometric composition has an oxygen desorption amount, in terms of oxygen atoms, of 1.0×10 atoms / cm or more, preferably 3.0×10 18 atoms / cm or more in a TDS (Thermal Desorption Spectroscopy) 3 analysis performed in a range where the surface temperature is 100°C or higher and 700°C or lower, or 100°C or higher and 500°C or lower. 20 cm 3 This is the oxide insulating film.

[0094] In the insulating film 28, when an oxide insulating film containing more oxygen than the stoichiometric composition is included, a part of the oxygen contained in the insulating film 28 can be moved to the oxide semiconductor film 17a and the oxide semiconductor film 17b, and oxygen vacancies that may be contained in the oxide semiconductor film can be reduced.

[0095] A transistor using an oxide semiconductor film containing oxygen vacancies has a threshold voltage that easily fluctuates in the negative direction and tends to have a normally-on characteristic. This is because charges are generated due to the oxygen vacancies contained in the oxide semiconductor film, and the oxide semiconductor film becomes low in resistance. When a transistor has a normally-on characteristic, various problems such as malfunctions easily occurring during operation or high power consumption during non-operation occur. In addition, there is a problem that the amount of variation in the electrical characteristics of the transistor, typically the threshold voltage, increases over time or due to a stress test. ​

[0096] However, the transistors 400a and 400b shown in this embodiment are such that an oxide insulating film containing more oxygen than stoichiometric composition is included in the insulating films 28 provided on the oxide semiconductor films 17a and 17b, so that the oxygen contained in the insulating films 28 can be moved to the oxide semiconductor films 17a and 17b to reduce the oxygen deficiency in the oxide semiconductor films. In addition, since the insulating film 28 has not been exposed to the etching atmosphere, it has few defects. As a result, a transistor having normally-off characteristics is obtained. Also, in a time passage or a stress test, the amount of variation in the threshold voltage with respect to the operating time, which is typically the electrical characteristics of the transistor, can be reduced. Furthermore, even if the stress test is repeated, the variation in the threshold voltage can be reduced. In addition, the fact that the transistors 400a and 400b are channel etch type transistors is also effective in improving the electrical characteristics. Here, a channel etch type transistor is compared with a channel protection type transistor. For example, a channel protection type transistor having two gate electrodes sandwiching an oxide semiconductor film has a first gate insulating film formed on the first gate electrode, and an oxide semiconductor film formed on the first gate insulating film. A channel protection film is formed on the oxide semiconductor film, and a pair of electrodes in contact with the oxide semiconductor film are formed on the channel protection film.

[0097] Further, a second gate insulating film is formed on the channel protection film and the pair of electrodes, and a second gate electrode is formed on the second gate insulating film. The channel protection film is exposed to plasma in the etching process when forming the pair of electrodes. For example, a channel protection type transistor having two gate electrodes sandwiching an oxide semiconductor film has a first gate insulating film formed on the first gate electrode, and an oxide semiconductor film formed on the first gate insulating film. A channel protection film is formed on the oxide semiconductor film, and a pair of electrodes in contact with the oxide semiconductor film are formed on the channel protection film. A channel protection film is formed on the oxide semiconductor film, and a pair of electrodes in contact with the oxide semiconductor film are formed on the channel protection film. Further, a second gate insulating film is formed on the channel protection film and the pair of electrodes, and a second gate electrode is formed on the second gate insulating film. The channel protection film is exposed to plasma in the etching process when forming the pair of electrodes. Further, a second gate insulating film is formed on the channel protection film and the pair of electrodes, and a second gate electrode is formed on the second gate insulating film.

[0098] The channel protection film is exposed to plasma in the etching process when forming the pair of electrodes. is damaged. Therefore, defects are likely to be formed in the channel protective film. As a result, carriers flowing through the oxide semiconductor film are captured by the defects of the channel protective film, and the electrical characteristics of the transistor vary with the operating time, resulting in low reliability. However, the transistors 400a and 400b shown in this embodiment are of the channel etch type, and in the insulating film 28, the region overlapping with the oxide semiconductor film 17a or the oxide semiconductor film 17b is not exposed to the etching atmosphere. Therefore, the insulating film 28 has few defects and is a highly reliable transistor.

[0099] In the region where the pair of electrodes overlap in the oxide semiconductor film of the channel protection type transistor, the pair of electrodes shield the electric field of the second gate electrode, and the electric field of the second gate electrode does not uniformly affect the oxide semiconductor film. As a result, the amount of carriers flowing through the oxide semiconductor film induced by the electric field of the second gate electrode decreases. However, the transistor 400a shown in this embodiment is a channel etch type transistor, and the electric field of the gate electrode 31 uniformly affects the back channel of the oxide semiconductor film 17a. Furthermore, the side surface of the oxide semiconductor film 17a is also affected by the electric field of the gate electrode 31. As a result of these, carriers flow in a wide range of the oxide semiconductor film 17a, so that the field effect mobility of the transistor increases and the on-current increases.

[0100] , One end of each of the pair of electrodes is located inside the connection region between the oxide semiconductor film and each of the pair of electrodes. Due to these, considering the misalignment of the photomask, it is necessary to design a wider spacing between the connection regions of the oxide semiconductor film and each of the pair of electrodes. On the other hand, in a channel etch type transistor, since one end of each of the pair of electrodes is directly connected to the oxide semiconductor film, the channel etch type transistor can easily reduce the distance between the pair of electrodes compared to the channel protection type transistor. In particular, the transistor 400a that functions as a driving transistor of a pixel in the display device according to one aspect of the present invention is a transistor with a short channel length. Therefore, by making it a channel etch type, it becomes possible to manufacture the display device with a high yield. Furthermore, both the transistor 400a and the transistor 400b are of the channel etch type, and the difference in the configuration between the transistor 400b and the transistor 400a is the length of the channel length and the fact that the gate electrode 31 that the transistor 400a functions as a back gate electrode has. Therefore, it is possible to manufacture the transistor 400a and the transistor 400b in the same process. Thus, it becomes possible to simplify the manufacturing process of the display device. <Details of the components of the transistor> Hereinafter, the details of the configurations of the transistor 400a and the transistor 400b will be described. There are no major restrictions on the material of the substrate 11, etc., but at least it is necessary to have heat resistance to withstand subsequent heat treatment. For example, a glass substrate, a ceramic substrate, a quartz substrate, a sapphire

[0101] Moreover, both the transistor 400a and the transistor 400b are of the channel etch type, and the difference in the configuration between the transistor 400b and the transistor 400a is the length of the channel length and the fact that the gate electrode 31 that the transistor 400a functions as a back gate electrode has. Therefore, it is possible to manufacture the transistor 400a and the transistor 400b in the same process. Thus, it becomes possible to simplify the manufacturing process of the display device. <Details of the components of the transistor> Hereinafter, the details of the configurations of the transistor 400a and the transistor 400b will be described. There are no major restrictions on the material of the substrate 11, etc., but at least it is necessary to have heat resistance to withstand subsequent heat treatment. For example, a glass substrate, a ceramic substrate, a quartz substrate, a sapphire

[0102] <Details of the components of the transistor> Hereinafter, the details of the configurations of the transistor 400a and the transistor 400b will be described. .

[0103] There are no major restrictions on the material of the substrate 11, etc., but at least it is necessary to have heat resistance to withstand subsequent heat treatment. For example, a glass substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, etc.​ An ITO substrate or the like may be used as the substrate 11. Also, a single-crystal semiconductor substrate such as silicon or silicon carbide, a polycrystalline semiconductor substrate, a compound semiconductor substrate such as silicon germanium, an SOI substrate, etc. can be applied, and those with semiconductor elements provided on these substrates may be used as the substrate 11. When using a glass substrate as the substrate 11, large-area substrates such as the 6th generation (1500 mm × 1850 mm), 7th generation (1870 mm × 2200 mm), 8th generation (2200 mm × 2400 mm), 9th generation (2400 mm × 2800 mm), 10th generation (2950 mm × 3400 mm), etc. can be used to fabricate a large display device. can be fabricated.

[0104]

[0105] The gate electrodes 13a and 13b can be formed using a metal element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, tungsten, or an alloy containing the above-mentioned metal elements as components, or an alloy combining the above-mentioned metal elements. Also, a metal element selected from any one or more of manganese and zirconium may be used. ​​​​​​​​​​​​​​​, the gate electrodes 13a and 13b may have a single-layer structure or a laminated structure of two or more layers. For example, a single-layer structure of an aluminum film containing silicon, laminating an aluminum film on a titanium film two-layer structure, laminating a titanium film on a titanium nitride film two-layer structure, laminating a tungsten film on a titanium nitride film two-layer structure, laminating a tungsten film on a tantalum nitride film or a tungsten nitride film two-layer structure, laminating a copper film on a titanium film two-layer structure, a titanium film, and an aluminum film laminated on the titanium film, and further forming a titanium film thereon, there are three-layer structures and the like. Also for aluminum, a film of an element selected from titanium, tantalum, tungsten, molybdenum, chromium, neodymium , scandium, or a combined alloy film, or a nitride film may be used.

[0106] In addition, the gate electrodes 13a and 13b may be made of indium tin oxide (ITO), indium oxide containing tungsten oxide , indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide , indium tin oxide containing titanium oxide, indium zinc oxide , conductive materials having light transmittance such as indium tin oxide added with silicon oxide can be applied. Also, a laminated structure of the above-mentioned conductive material having light transmittance and the above-mentioned metal element can be formed.

[0107] The insulating film 15 may be made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride , aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn based metal oxide , silicon nitride, etc., and may be provided in a laminated or single-layer form.

[0108] In addition, as the insulating film 15, hafnium silicate (HfSiO x ​) with nitrogen added hafnium silicate (HfSi x O y N z ) and hafnium aluminate (HfAl with nitrogen added x O y N z ), high-k materials such as hafnium oxide and yttrium oxide can be used to reduce the gate leakage of the transistor.

[0109] The thickness of the insulating film 15 is preferably 5 nm or more and 400 nm or less, more preferably 10 nm or more and 300 nm or less, and even more preferably 50 nm or more and 250 nm or less.

[0110] The pair of electrodes 20a, 20b and the pair of electrodes 20c, 20d are made of aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten, a single metal composed of these, or an alloy having these as a main component is used in a single-layer structure or a laminated structure. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which an aluminum film is laminated on a titanium film, a two-layer structure in which an aluminum film is laminated on a tungsten film, a two-layer structure in which a copper film is laminated on a copper-magnesium-aluminum alloy film, a two-layer structure in which a copper film is laminated on a titanium film, a two-layer structure in which a copper film is laminated on a tungsten film, a three-layer structure in which a titanium film or a titanium nitride film and an aluminum film or a copper film are laminated on the titanium film or the titanium nitride film, and then a titanium film or a titanium nitride film is formed thereon, a three-layer structure in which a molybdenum film or a molybdenum nitride film and an aluminum film or a copper film are laminated on the molybdenum film or the molybdenum nitride film, and then a molybdenum film or a molybdenum nitride film is formed thereon structure, a three-layer structure in which an aluminum film or a copper film is laminated on a titanium film or a titanium nitride film, and then a titanium film or a titanium nitride film is formed thereon, a three-layer structure in which an aluminum film or a copper film is laminated on a molybdenum film or a molybdenum nitride film, and then a molybdenum film or a molybdenum nitride film is formed thereon structure, a three-layer structure in which an aluminum film or a copper film is laminated on a titanium film or a titanium nitride film, and then a titanium film or a titanium nitride film is formed thereon, a three-layer structure in which an aluminum film or a copper film is laminated on a molybdenum film or a molybdenum nitride film, and then a molybdenum film or a molybdenum nitride film is formed thereon structure, a three-layer structure in which an aluminum film or a copper film is laminated on a titanium film or a titanium nitride film, and then a titanium film or a titanium nitride film is formed thereon, a three-layer structure in which an aluminum film or a copper film is laminated on a molybdenum film or a molybdenum nitride film, and then a molybdenum film or a molybdenum nitride film is formed thereon structure, a three-layer structure in which a titanium film or a titanium nitride film and an aluminum film or a copper film are laminated on the titanium film or the titanium nitride film, and then a titanium film or a titanium nitride film is formed thereon, a three-layer structure in which a molybdenum film or a molybdenum nitride film and an aluminum film or a copper film are laminated on the molybdenum film or the molybdenum nitride film, and then a molybdenum film or a molybdenum nitride film is formed thereon structure, a three-layer structure in which a titanium film or a titanium nitride film and an aluminum film or a copper film are laminated on the titanium film or the titanium nitride film, and then a titanium film or a titanium nitride film is formed thereon, a three-layer structure in which a molybdenum film or a molybdenum nitride film and an aluminum film or a copper film are laminated on the molybdenum film or the molybdenum nitride film, and then a molybdenum film or a molybdenum nitride film is formed thereon structure, a three-layer structure in which a molybdenum film or a molybdenum nitride film and an aluminum film or a copper film are laminated on the molybdenum film or the molybdenum nitride film, and then a molybdenum film or a molybdenum nitride film is formed thereon structure, a three-layer structure in which a molybdenum film or a molybdenum nitride film and an aluminum film or a copper film are laminated on the molybdenum film or the molybdenum nitride film, and then a molybdenum film or a molybdenum nitride film is formed thereon There is a three-layer structure or the like to be formed. Note that a transparent conductive material containing indium oxide, tin oxide, or zinc oxide may be used.

[0111] The insulating film 28 has an oxide insulating film 23 in contact with the oxide semiconductor films 17a and 17b, an oxide insulating film 25 in contact with the oxide insulating film 23, and a nitride insulating film 27 in contact with the oxide insulating film 25. The insulating film 28 preferably has an oxide insulating film containing at least more oxygen than oxygen satisfying the stoichiometric composition. Here, as the oxide insulating film 23, an oxide insulating film that permeates oxygen is formed, as the oxide insulating film 25, an oxide insulating film containing more oxygen than oxygen satisfying the stoichiometric composition is formed, and as the nitride insulating film 27, a nitride insulating film that blocks hydrogen and oxygen is formed. Note that here, the insulating film 28 has a three-layer structure, but it can be made into one layer, two layers, or four or more layers as appropriate. In these cases, it preferably has an oxide insulating film containing at least more oxygen than oxygen satisfying the stoichiometric composition.

[0112] The oxide insulating film 23 is an oxide insulating film that permeates oxygen. Therefore, oxygen desorbed from the oxide insulating film 25 provided on the oxide insulating film 23 can be moved to the oxide semiconductor films 17a and 17b through the oxide insulating film 23. Further, the oxide insulating film 23 also functions as a damage relaxation film for the oxide semiconductor films 17a and 17b when forming the oxide insulating film 25 to be formed later.

[0113] As the oxide insulating film 23, silicon oxide, silicon oxynitride, etc. having a thickness of 5 nm or more and 150 nm or less, preferably 5 nm or more and 50 nm or less can be used. Note that in this specification, In the book, the silicon oxynitride film refers to a film with a higher oxygen content than nitrogen in its composition, and the silicon nitride oxide film refers to a film with a higher nitrogen content than oxygen in its composition. The silicon oxynitride film refers to a film with a higher oxygen content than nitrogen in its composition, and the silicon nitride oxide film refers to a film with a higher nitrogen content than oxygen in its composition. film.

[0114] In addition, the oxide insulating film 23 preferably has a small amount of defects. Typically, by ESR (E lectron Spin Resonance) measurement, the spin density of the signal appearing at g = 2.001 derived from the dangling bonds of silicon is preferably 3×10 17 spins / cm 3 or less. This is because when the defect density contained in the oxide insulating film 23 is high, oxygen binds to the defects, resulting in a decrease in the oxygen permeation amount in the oxide insulating film 23. and the oxygen permeation amount in the oxide insulating film 23 decreases because of this.

[0115] In addition, it is preferable that the amount of defects at the interface between the oxide insulating film 23 and the oxide semiconductor films 17a and 17b is small. Typically, by ESR measurement, the spin density of the signal appearing at g = 1.93 derived from the defects of the oxide semiconductor films 17a and 17b is preferably 1×10 spins / cm or less, and more preferably below the detection limit. 17 spins / cm 3 In the oxide insulating film 23, all the oxygen that enters the oxide insulating film 23 from the outside may move to the outside of the oxide insulating film 23. Or, a part of the oxygen that enters the oxide insulating film 23 from the outside may remain in the oxide insulating film 23. In addition, when oxygen enters the oxide insulating film 23 from the outside and the oxygen contained in the oxide insulating film 23 moves to the outside of the oxide insulating film 23, oxygen movement may occur in the oxide insulating film 23.

[0116] Note that in the oxide insulating film 23, all the oxygen that enters the oxide insulating film 23 from the outside may move to the outside of the oxide insulating film 23. Or, a part of the oxygen that enters the oxide insulating film 23 from the outside may remain in the oxide insulating film 23. In addition, when oxygen enters the oxide insulating film 23 from the outside and the oxygen contained in the oxide insulating film 23 moves to the outside of the oxide insulating film 23, oxygen movement may occur in the oxide insulating film 23. from the outside may move to the outside of the oxide insulating film 23. Or, a part of the oxygen that enters the oxide insulating film 23 from the outside may remain in the oxide insulating film 23. In addition, when oxygen enters the oxide insulating film 23 from the outside and the oxygen contained in the oxide insulating film 23 moves to the outside of the oxide insulating film 23, oxygen movement may occur in the oxide insulating film 23. from the outside may move to the outside of the oxide insulating film 23. Or, a part of the oxygen that enters the oxide insulating film 23 from the outside may remain in the oxide insulating film 23. In addition, when oxygen enters the oxide insulating film 23 from the outside and the oxygen contained in the oxide insulating film 23 moves to the outside of the oxide insulating film 23, oxygen movement may occur in the oxide insulating film 23. from the outside may move to the outside of the oxide insulating film 23. Or, a part of the oxygen that enters the oxide insulating film 23 from the outside may remain in the oxide insulating film 23. In addition, when oxygen enters the oxide insulating film 23 from the outside and the oxygen contained in the oxide insulating film 23 moves to the outside of the oxide insulating film 23, oxygen movement may occur in the oxide insulating film 23. from the outside may move to the outside of the oxide insulating film 23. Or, a part of the oxygen that enters the oxide insulating film 23 from the outside may remain in the oxide insulating film 23. In addition, when oxygen enters the oxide insulating film 23 from the outside and the oxygen contained in the oxide insulating film 23 moves to the outside of the oxide insulating film 23, oxygen movement may occur in the oxide insulating film 23.

[0117] An oxide insulating film 25 is formed so as to be in contact with the oxide insulating film 23. The oxide insulating film 2 5 is formed using an oxide insulating film containing more oxygen than oxygen satisfying the stoichiometric composition. The oxide insulating film containing more oxygen than oxygen satisfying the stoichiometric composition desorbs a part of oxygen by heating. The oxide insulating film containing more oxygen than oxygen satisfying the stoichiometric composition has an oxygen desorption amount in terms of oxygen atoms of 1.0×10 atom 18 atom s / cm 3 or more, preferably 3.0×10 20 atoms / cm 3 or more in a TDS analysis performed in the range of a surface temperature of 100°C or higher and 700°C or lower, or 100°C or higher and 500°C or lower. This is the oxide insulating film.

[0118] As the oxide insulating film 25, silicon oxide, silicon oxynitride, etc. with a thickness of 30 nm or more and 500 nm or less, preferably 50 nm or more and 400 nm or less can be used.

[0119] Further, the oxide insulating film 25 preferably has a small amount of defects. Typically, by ESR measurement, the spin density of the signal appearing at g = 2.001 derived from silicon dangling bonds is less than 1.5×10 18 spins / cm 3 and more preferably less than 1×10 18 spins / cm 3 Since the oxide insulating film 25 is separated from the oxide semiconductor films 17a and 17b, the defect density may be higher than that of the oxide insulating film 23 at most.

[0120] The nitride insulating film 27 has at least a blocking effect on hydrogen and oxygen. Further​​ , preferably, having a blocking effect of oxygen, hydrogen, water, alkali metal, alkaline earth metal, etc. By providing the nitride insulating film 27 on the insulating film 28, oxygen diffusion from the oxide semiconductor films 17a and 17 b to the outside and the intrusion of hydrogen, water, etc. from the outside into the oxide semiconductor films 17a and 17b can be prevented.

[0121] As the nitride insulating film 27, there are silicon nitride, silicon oxynitride, aluminum nitride, aluminum oxynitride, etc. having a thickness of 50 nm or more and 300 nm or less, preferably 100 n m or more and 200 nm or less.

[0122] Note that, instead of the nitride insulating film 27, an oxide insulating film having a blocking effect of oxygen, hydrogen, water, etc. may be provided. The oxide insulating film having a blocking effect of oxygen, hydrogen, water, etc. includes aluminum oxide, aluminum oxynitride, gallium oxide, gallium oxynitride , yttrium oxide, yttrium oxynitride, hafnium oxide, hafnium oxynitride, etc.

[0123] In the transistor 400a, the gate electrode 31 and the electrode 32 use a conductive film having translucency. The conductive film having translucency is indium tin oxide (hereinafter, also referred to as ITO). , indium zinc oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide , indium oxide containing titanium oxide, indium tin oxide containing titanium oxide , indium tin oxide containing silicon oxide, etc.

[0124] <Regarding the improvement of the current driving force by Dual Gate driving> In the display device of the present embodiment, pixels desiring high on-current and high field-effect mobility​​​​ As the transistor 400a functioning as a driving transistor, an acid in which a channel is formed The gate electrode 13a and the gate electrode 3 respectively overlap the upper layer and the lower layer of the oxide semiconductor film 17a 1, and each gate electrode is electrically connected to each other, that is, dual gate driving ( Dual Gate driving) is performed, and the channel length thereof is miniaturized to 0.5 μm or more and 4.5 μm or less. In the following, in a transistor with dual gate driving in which the gate electrodes facing each other across the oxide semiconductor film are connected and both electrodes have the same potential , it will be explained that the current driving force is improved by reducing the channel length L.

[0125] <<Regarding the saturation mobility in an ideal model>> First, a simulation was performed on an ideal model that does not consider effects such as interface levels and interface scattering. Fig. 30 shows the model of the transistor used in the calculation. Note that the device simulation software Atlas (manufactured by Silvaco) was used for the calculation.

[0126] In the transistor shown in Fig. 30, a gate insulating film GI_1 is formed on the gate electrode GE_1 , and an oxide semiconductor film OS is formed on the gate insulating film GI_1. A source electrode S and a drain electrode D are formed on the gate insulating film GI_1 and the oxide semiconductor film OS. A gate insulating film GI_2 is formed on the oxide semiconductor film OS, the source electrode S, and the drain electrode D. A gate electrode GE_2 is formed on the gate insulating film GI_2 . Further, the gate electrode GE_1 and the gate electrode GE_2 are connected at the openings (not shown) formed in the gate insulating film GI_1 and the gate insulating film GI_2.

[0127] Table 1 shows the conditions used in the calculation.

[0128]

Table 1

[0129] Since the gate electrodes GE_1 and GE_2 are connected, they are always at the same potential. In addition, since the model uses two-dimensional simulation, the effects in the channel width direction are not considered. Also, the Vg-Id characteristics when the drain voltage (Vd) is 10 V are substituted into Equation 1 to calculate the saturation mobility μ FE . Here, the field-effect mobility in the saturation region is described as the saturation mobility. Note that the maximum value of the saturation mobility obtained by calculation is an index of the current driving force in the saturation region (gate voltage (Vg) < drain voltage (Vd) + threshold voltage (Vth)), and is different from the approximate value of the mobility as a physical property value of the oxide semiconductor film.

[0130]

Equation

[0131] In Equation 1, W is the channel width of the transistor, and C Bottom is the capacitance value per unit area between the gate electrode GE_1 and the oxide semiconductor film OS.

[0132] The calculation results of the Dual Gate-driven transistor are shown in Fig. 31(A), and the calculation results of the Single Gate-driven transistor without the gate electrode GE_2 are shown in Fig. 31(B ).

[0133] ​​As shown in Fig. 31, a saturation mobility with a sharp peak was obtained for each of the dual-gate-driven transistor and the single-gate-driven transistor. Also, the shorter the L length, the higher the peak value of the saturation mobility.

[0134] Here, although the saturation mobility improves as the channel length L becomes shorter, whether this corresponds to an improvement in the current driving force of the transistor will be described below.

[0135] In the results obtained from the simulation of an ideal model, the on-current plotted against the L length when the gate voltage is Vg = Vth + 5V and when Vg = Vth + 10V is shown in Fig. 32. The upper part of Fig. 32 shows the on-current, and the lower part shows the on-current × channel length. In Fig. 32, the left column shows the calculation results when the drain voltage (Vd) is 1V, and the right column shows the calculation results when the drain voltage (Vd) is 10V.

[0136] The on-current shown in Fig. 32 is inversely proportional to the channel length (L). This is because the on-current is inversely proportional to the channel length (L).

[0137] Also, if the on-current is completely inversely proportional to the channel length, the value of on-current × channel length will be a constant value independent of the channel length. In Fig. 32, when the drain voltage (Vd) is 1V, the value of on-current × channel length is approximately a constant value with respect to the channel length (L). On the other hand, when the drain voltage (Vd) is 10V, as the channel length (L) becomes shorter, the value of on-current × channel length increases. This is because when the drain voltage (Vd) is 10V, In this case, it means that the effective channel length (to be described later) is shorter than the channel length (the distance between the source electrode S and the drain electrode D) defined in FIG. 30.

[0138] <<Theory of Bulk Current>> Hereinafter, the reason for the peak occurring at a low gate voltage in the saturation mobility of an ideal model transistor will be described.

[0139] In the transistor shown in FIG. 30, it is assumed that the electron density contained in the oxide semiconductor film OS is represented by a constant value n0(y) in the film thickness direction of the oxide semiconductor film OS. y represents an arbitrary position in the channel length direction within the oxide semiconductor film OS. The potential φ in the film thickness direction of the oxide semiconductor film OS is shown in Equation 2 and is constant. However, it is assumed that the gate voltage Vg_1 of the gate electrode GE_1 and the gate voltage Vg_2 of the gate electrode GE_2 are at the same potential, and the flat band voltages on both the gate electrode GE_1 side and the gate electrode GE_2 side are both the flat band voltage V FB

[0140]

Equation

[0141] At this time, in a transistor having an oxide semiconductor film that is an accumulation type, the drain current Id is approximately given only by the bulk current I bulk

[0142]

Equation

[0143] ​​​​​​​​​​​In Equation 3, t is the film thickness of the oxide semiconductor film, and μ is the electron mobility of the oxide semiconductor film. , k B is the Boltzmann constant, T is the absolute temperature, and L eff is the effective channel length. Here, the channel length is the distance between the source electrode and the drain electrode, and the effective channel length in the oxide semiconductor film represents the distance between the n-region extending from under the source electrode and the n-region extending from under the drain electrode. In particular, when the channel length is short or the drain voltage is high, the effective channel length becomes shorter than the channel length.

[0144] Note that n0(0) is the electron density at the source electrode side end of the region determined by the above-mentioned effective channel length and is represented by Equation 4. Also, n0(L ) is the electron density at the drain electrode side end of the region determined by the above-mentioned effective channel length and is represented by Equation 5. eff In Equations 4 and 5, N is the donor density in the channel region of the oxide semiconductor film , and q is the elementary charge. D is the donor density in the channel region of the oxide semiconductor film , and q is the elementary charge.

[0145]

Equation

[0146]

Equation

[0147] In the saturation region where Vd > Vg - Vth and Vg > Vth, since the drain voltage Vd is replaced by Vg - Vth, Equation 3 becomes Equation 6.

[0148]

Equation

[0149] For the drain current Id obtained by Equation 6, the saturation mobility μ FE sat is calculated to be the number Equation 7.

[0150]

Equation

[0151] In Equation 7, when Vg is set to Vth, the denominator becomes 0, and the saturation mobility μFE sat becomes diverges to infinity. This property is the cause of the peak at low gate voltage Vg in the saturation mobility as shown in FIG. 31. That is, the more the bulk current flowing inside the oxide semiconductor film OS is the main factor of the drain current, the clearer the peak appears, such as the saturation mobility when the channel length in FIG. 31 is 2 μm. Also, as another factor for increasing the saturation mobility, it is considered that the effective channel length L is shorter than the channel length L. For example, in the oxide semiconductor film OS, in the vicinity of the region in contact with the source electrode S and the drain electrode D, when the n region spreads, the effective channel length L

[0152] becomes shorter than the channel length L. This effect is also clear from the proportional relationship with respect to L / L eff of the saturation mobility μ shown in Equation 7. in the oxide semiconductor film OS, in the vicinity of the region in contact with the source electrode S and the drain electrode D, when the n region spreads, the effective channel length L eff becomes shorter than the channel length L. This effect is also clear from the proportional relationship with respect to L / L of the saturation mobility μ FE sat in Equation 7. eff is also clear from the proportional relationship with respect to L / L

[0153] <<Current density in the oxide semiconductor film>> The fact that the bulk current affects the saturation mobility is a phenomenon peculiar to transistors having an oxide semiconductor film as an accumulation-type device, and is different from transistors having a silicon film as a semiconductor film. having a silicon film as a semiconductor film. In an inverted device such as a [device name], the influence of the bulk current is small.

[0154] Next, graphs plotting the current density distributions obtained by device simulation are shown in FIGS. 33(B) and 33(C). FIG. 33(A) shows the Vg-Id characteristics obtained by calculation with a drain voltage of 10 V, and FIGS. 33(B) and 33(C) show the current density distribution in the cross-sectional direction of A1-A2 of the oxide semiconductor film. FIG. 33(B) shows the saturation region (Vg = 0.5 V), and FIG. 33(C) shows the current density distribution in the linear region (Vg = 15 V). Note that the channel length L / channel width W of the

[0155] transistor used in the calculation was 2 μm / 50 μ m, and the drain voltage Vd was 10 V.

[0156] From FIG. 33(B), in the saturation region (low gate voltage Vg), the current density is almost uniformly distributed in the oxide semiconductor film OS. On the other hand, as shown in FIG. 33(C), in the linear region (high gate voltage Vg), the current flowing near the surface of the oxide semiconductor film OS becomes dominant. As shown in FIG. 33(B), in the saturation region, since the 3 current density is almost uniformly distributed in the oxide semiconductor film A ter-type impurity was assumed.

[0157] FIG. 34(A) shows the Vg-Id characteristics calculated with a drain voltage of 10 V. 34B and 34C show currents in the cross-sectional direction of the semiconductor film taken along line A1-A2 in FIG. The density distribution is shown in Fig. 34(B) in the saturation region (Vg = 0.5 V), and in Fig. 34(C) in the linear region. The current density distribution at (Vg=15V) is shown in Fig. 1. The channel of the transistor used in the calculation is The channel length L / channel width W was 2 μm / 50 μm, and the drain voltage Vd was 10 V.

[0158] Unlike a transistor having an oxide semiconductor film, which is an accumulation type device, As shown in FIG. 34B, a transistor having a semiconductor film having a Even in the case of It is small compared to the device.

[0159] For the above reasons, in a transistor including an oxide semiconductor film, which is an accumulation type device, In the ideal model, it is found that the bulk current produces a sharp peak in the saturation mobility. In addition, the saturation mobility improves as the channel length L becomes shorter due to the bulk current. .

[0160] In addition, the shorter the channel length L, the smaller the peak value of the saturation mobility caused by the bulk current. The reason for this is that the oxide semiconductor film OS has a source electrode S and a drain electrode D In the vicinity of the region adjacent to the n region, the n region expands, and the effective channel length L eff Gacha It is considered that the channel length L is shorter than the source electrode S. The energy (Ec) at the lower end of the conduction band of the oxide semiconductor film OS decreases due to the influence of the source electrode S and the drain electrode D, and the phenomenon (CBL effect (Conduction band lowering effect)) in which the energy at the lower end of the conduction band approaches the Fermi energy causes the effective channel length L to be shorter than the channel length L. The saturation mobility increases in proportion to L / L as the effective channel length L decreases as shown in Equation 7. This effect is more prominent as the channel length L is smaller, so it is considered that the saturation mobility improves as the channel length L is smaller. becomes lower, and due to the phenomenon (CBL effect (Conduction band lowering effect)) in which the energy at the lower end of the conduction band approaches the Fermi energy, the effective channel length L is considered to be shorter than the channel length L. The saturation mobility increases in proportion to L / L as the effective channel length L becomes smaller as shown in Equation 7. This effect is more prominent as the channel length L is smaller, so it is considered that the saturation mobility improves as the channel length L is smaller. eff is considered to be shorter than the channel length L. The saturation mobility increases in proportion to L / L as the effective channel length L becomes smaller as shown in Equation 7. This effect is more prominent as the channel length L is smaller, so it is considered that the saturation mobility improves as the channel length L is smaller. eff becomes smaller, so it increases in proportion to L / L eff and becomes larger. This effect is more prominent as the channel length L is smaller, so it is considered that the saturation mobility improves as the channel length L is smaller. This effect is more prominent as the channel length L is smaller, so it is considered that the saturation mobility improves as the channel length L is smaller. This effect is more prominent as the channel length L is smaller, so it is considered that the saturation mobility improves as the channel length L is smaller.

[0161] <<Model assuming shallow electron trap levels>> Next, in order to approximate the saturation mobility of an actual transistor, in an ideal model transistor, acceptor-type levels that trap electrons and become negatively charged, that is, shallow electron trap levels, are assumed at the interface between the gate insulating film GI_1 and the oxide semiconductor film OS, and the calculation results are shown in FIG. 35. Next, in order to approximate the saturation mobility of an actual transistor, in an ideal model transistor, acceptor-type levels that trap electrons and become negatively charged, that is, shallow electron trap levels, are assumed at the interface between the gate insulating film GI_1 and the oxide semiconductor film OS, and the calculation results are shown in FIG. 35. Next, in order to approximate the saturation mobility of an actual transistor, in an ideal model transistor, acceptor-type levels that trap electrons and become negatively charged, that is, shallow electron trap levels, are assumed at the interface between the gate insulating film GI_1 and the oxide semiconductor film OS, and the calculation results are shown in FIG. 35. Next, in order to approximate the saturation mobility of an actual transistor, in an ideal model transistor, acceptor-type levels that trap electrons and become negatively charged, that is, shallow electron trap levels, are assumed at the interface between the gate insulating film GI_1 and the oxide semiconductor film OS, and the calculation results are shown in FIG. 35.

[0162] FIG. 35(A) shows the DOS (density of state) of the electron trap levels assumed at the interface between the gate insulating film GI_1 and the oxide semiconductor film OS. FIG. 35(A) shows the DOS (density of state) of the electron trap levels assumed at the interface between the gate insulating film GI_1 and the oxide semiconductor film OS.

[0163] Next, the saturation mobility of each of the Dual Gate-driven transistor and the Single Gate-driven transistor was calculated. The calculation results of the Dual Gate-driven transistor are shown in FIG. 35(B), and the calculation results of the Single Gate-driven transistor are shown in FIG. 35(C). Next, the saturation mobility of each of the Dual Gate-driven transistor and the Single Gate-driven transistor was calculated. The calculation results of the Dual Gate-driven transistor are shown in FIG. 35(B), and the calculation results of the Single Gate-driven transistor are shown in FIG. 35(C). Next, the saturation mobility of each of the Dual Gate-driven transistor and the Single Gate-driven transistor was calculated. The calculation results of the Dual Gate-driven transistor are shown in FIG. 35(B), and the calculation results of the Single Gate-driven transistor are shown in FIG. 35(C). Next, the saturation mobility of each of the Dual Gate-driven transistor and the Single Gate-driven transistor was calculated. The calculation results of the Dual Gate-driven transistor are shown in FIG. 35(B), and the calculation results of the Single Gate-driven transistor are shown in FIG. 35(C).

[0164] From FIGS. 35(B) and 35(C), in the saturation mobility of the transistors with Dual Gate drive and the transistors with Single Gate drive, no sharp peak as obtained in the ideal model appeared. Also, from FIG. 35(C), in the transistors with Single Gate drive, the saturation mobility peak value was not much dependent on the channel length L and was around 5 cm / V·sec. On the other hand, in the transistors with Dual Gate drive, the shorter the channel length L, the higher the saturation mobility peak value, and the value became 15 to 20 cm / V·sec. This result is the same tendency as the result of the example described later. 2 2

[0165] From this, it can be seen that in the transistors with Dual Gate drive, the saturation mobility increases as the channel length L is made shorter.

[0166] <Comparison between Channel Etch Type Transistors and Channel Protection Type Transistors in Dual Gate Drive> Below, using the results of calculations on the electrical characteristics of channel etch type transistors and channel protection type transistors, the field effect mobility and on-current of the channel etch type transistors and channel protection type transistors are compared. Here, the field effect mobility (μ FE ) and on-current (Ion) of the transistors with Dual Gate drive in which the gate electrodes facing each other across the oxide semiconductor film are connected and have the same potential are compared.

[0167] FIG. 29(A) shows the structure of the channel protection type transistor used in the calculation. ​​​​​​​​​​​​​Device simulation software Atlas (manufactured by Silvaco) was used for the calculations.

[0168] In the channel protection type transistor, a gate insulating film GI_1 is formed on the gate electrode GE_1, and an oxide semiconductor film OS is formed on the gate insulating film GI_1. Source and drain electrodes S and D are formed on the gate insulating film GI_1 and the oxide semiconductor film OS. Note that, a channel protection film CS is formed between the ends of the source electrode S and the drain electrode D and the oxide semiconductor film OS. A gate insulating film GI_2 is formed on the oxide semiconductor film OS, the source electrode S, the drain electrode D, and the channel protection film CS. A gate electrode GE_2 is formed on the gate insulating film GI_2. Also, the gate electrodes GE_1 and GE_2 are connected at openings (not shown) formed in the gate insulating film GI_1 and the gate insulating film GI_2.

[0169] In the channel etch type transistor, the channel protection film CS is not provided, and the ends of the source electrode S and the drain electrode D are in contact with the oxide semiconductor film OS.

[0170] The conditions used in the calculations are shown in Table 2.

[0171]

Table 2

[0172] Figure 29(A) shows a transistor with dual gate drive. As a comparative example, calculations similar to those for the transistor with dual gate drive were also performed for a transistor with single gate drive that does not have the gate electrode GE_2. ​​​​​​​​​The driving transistor corresponds to the transistor 400b that functions as the selection transistor in FIGS. 2(A2), 2(B), and 2(C2).

[0173] In a channel protection type transistor, let the length of the region where the oxide semiconductor film OS and the source electrode S or the drain electrode D overlap via the channel protection film CS be Sov. Also, in the source electrode S and the drain electrode D, the region that overlaps the oxide semiconductor film OS via the channel protection film CS is defined as the Sov region. The relationship between Sov and the field effect mobility is calculated and the result is shown in FIG. 29(B), and the relationship between Sov and the on-current is calculated and the result is shown in FIG. 29(C).

[0174] Also, in a channel etch type transistor, Sov is set to 0 μm, and the field effect mobility and the on-current are calculated. The calculation results are also shown in FIGS. 29(B) and 29(C ), respectively.

[0175] Note that FIG. 29(B) shows the result when the drain voltage Vd is 1 V. Also, FIG. 2 9(C) shows the result when the drain voltage Vd is 1 V and the gate voltage Vg is 10 V.

[0176] As shown in FIG. 29(B), in the channel etch type transistor (Sov is 0 μm), compared with the transistor with single gate drive, the field effect mobility of the transistor with dual gate drive is about twice as high. On the other hand, in the channel protection type transistor, the field effect mobility of the transistor with dual gate drive decreases as the length of Sov increases.

[0177] ​​​​​​​Also, as shown in Fig. 29(C), in a channel etch type transistor (Sov = 0μm ), the on-current of a dual gate drive transistor is about twice that of a single gate drive transistor. On the other hand, in a channel protection type transistor , the on-current of a dual gate drive transistor decreases as the length of Sov increases . In a channel protection type transistor, the Sov regions at the source electrode S and the drain electrode D shield the electric field of the gate electrode GE_2. Therefore, in the oxide semiconductor film OS, the region where the carrier density cannot be controlled by the voltage of the gate electrode GE_2 expands. As a result

[0178] , it is considered that as the length of Sov increases, the field effect mobility decreases and the on-current becomes smaller . From the above, compared with the channel protection type transistor, the channel etch type transistor has a higher effect of increasing the field effect mobility and a higher current amplification effect in dual gate drive . That is, it is effective to apply a channel etch type transistor to the drive transistor 400a of the light emitting element in the display device of the present embodiment . Furthermore, compared with the channel protection type transistor, the channel etch type transistor can easily reduce the distance between a pair of electrodes . Therefore, the transistor 400a can have a channel length of 0.5μm or more and 4.5μm or less, preferably more than 1μm and 4μm or less , more preferably more than 1μm and 3.5μm or less, and even more preferably more than 1μm and 2 .5μm or less .

[0179] Also, the channel etch type transistor can easily reduce the distance between a pair of electrodes compared with the channel protection type transistor . Therefore, the transistor 400a can have a channel length of 0.5μm or more and 4.5μm or less, preferably more than 1μm and 4μm or less , more preferably more than 1μm and 3.5μm or less, and even more preferably more than 1μm and 2 .5μm or less .

[0180] <Method for manufacturing a display device> Next, a method for manufacturing a display device including the transistors 400a and 400b shown in FIG. 2 will be described with reference to FIGS. 3 to 6. In FIGS. 3 to 6, a cross-sectional view in the channel length direction shown by A1-B1 and a cross-sectional view in the channel width direction shown by C1-D1 are used to describe the manufacturing method of the transistor 400a, and a cross-sectional view in the channel length direction shown by A2-B2 is used to describe the manufacturing method of the transistor 400b. Note that the cross-sectional view in the channel width direction of the transistor 400b is the same as that of the transistor 400a except that it does not have the gate electrode 31 in contact with the gate electrode 13a at the openings 42 and 43. As shown in FIG. 3(A), a conductive film 12 that will later become the gate electrodes 13a and 13b is formed on the substrate 11. Here, a glass substrate is used as the substrate 11. The conductive film 12 is formed by a sputtering method, a CVD method, an evaporation method, or the like.

[0181] Here, a tungsten film with a thickness of 100 nm is formed on the conductive film 12 by a sputtering method.

[0182] Next, a mask is formed by a photolithography process using a first photomask on the conductive film 12. Next, a part of the conductive film 12 is etched using the mask to form the gate electrodes 13a and 13b. After that, the mask is removed (see FIG. 3(B)).

[0183]

[0184]

[0185]

[0186]

[0187] ​​​​​​​​​​As a method for etching a part of the conductive film 12, there are a wet etching method, a dry etching method, etc., and one or both of these can be used. Here, a mask is formed by a photolithography process, and the conductive film 12 is dry-etched using the mask to form the gate electrodes 13a and 13b.

[0188] Note that the gate electrodes 13a and 13b may be formed by an electroplating method, a printing method, an inkjet method, etc. instead of the above-described forming method.

[0189]

[0190]

[0191]

[0192]

[0193]

[0194] ​​​​​​​​​​​​​​​The oxide semiconductor film 16 can be formed using a sputtering method, a coating method, a pulsed laser deposition method, a laser ablation method, or the like.

[0195] When forming the oxide semiconductor film 16 by a sputtering method, a power supply device for generating plasma can be appropriately selected from an RF power supply device, an AC power supply device, a DC power supply device, and the like.

[0196] The sputtering gas can be appropriately selected from a noble gas (typically argon) atmosphere, an oxidizing atmosphere, and a mixed gas of a noble gas and oxygen. In the case of a mixed gas of a noble gas and oxygen, it is preferable to increase the gas ratio of oxygen with respect to the noble gas.

[0197] In addition, the target can be appropriately selected according to the composition of the oxide semiconductor film 16 to be formed.

[0198] In order to obtain an oxide semiconductor film 16 that is highly pure and truly or substantially highly pure and truly, it is necessary not only to evacuate the chamber to a high vacuum but also to purify the sputtering gas to a high purity. The oxygen gas and argon gas used as the sputtering gas should have a dew point of -40°C or lower, preferably -80°C or lower, more preferably -100°C or lower, and even more preferably -120°C or lower. By using a highly purified gas, it is possible to prevent moisture and the like from being incorporated into the oxide semiconductor film 16 as much as possible.

[0199] Here, an In-Ga-Zn oxide film with a thickness of 35 nm is formed as the oxide semiconductor film 16 by a sputtering method using an In-Ga-Zn oxide target (In:Ga:Zn = 1:1:1).

[0200] Next, a photolithography process using a second photomask is performed on the oxide semiconductor film 16. After forming a mask by the photolithography process, a part of the oxide semiconductor film 16 is etched using the mask. Thereby, element-isolated oxide semiconductor films 17a and 17b are formed respectively. After that, the mask is removed (see Fig. 3(D)).

[0201] As a method for etching a part of the oxide semiconductor film 16, there are a wet etching method, a dry etching method, etc., and one or both of these can be used. Here, a mask is formed by a photolithography process, and the oxide semiconductor film 16 is wet-etched using the mask to form the oxide semiconductor films 17a and 17b.

[0202] Here, a mask is formed by a photolithography process, and the oxide semiconductor film 16 is wet-etched using the mask to form the oxide semiconductor films 17a and 17b. Here, a mask is formed by a photolithography process, and the oxide semiconductor film 16 is wet-etched using the mask to form the oxide semiconductor films 17a and 17b.

[0203] Note that after that, a heat treatment may be performed at a temperature of 150°C or higher and lower than the substrate distortion point, preferably 200°C or higher and 450°C or lower, more preferably 300°C or higher and 450°C or lower. As a result, it is possible to reduce the content of hydrogen, water, etc. contained in the oxide semiconductor films 17a and 17b, and it is possible to reduce the impurities contained in the oxide semiconductor films 17a and 17b. more preferably 300°C or higher and 450°C or lower. As a result, it is possible to reduce the content of hydrogen, water, etc. contained in the oxide semiconductor films 17a and 17b, and it is possible to reduce the impurities contained in the oxide semiconductor films 17a and 17b. more preferably 300°C or higher and 450°C or lower. As a result, it is possible to reduce the content of hydrogen, water, etc. contained in the oxide semiconductor films 17a and 17b, and it is possible to reduce the impurities contained in the oxide semiconductor films 17a and 17b.

[0204] Next, as shown in Fig. 4(A), a conductive film 18 that will later become a pair of electrodes 20a, 20b of the transistor 400a and a pair of electrodes 20c, 20d of the transistor 400b is formed. Next, as shown in Fig. 4(A), a conductive film 18 that will later become a pair of electrodes 20a, 20b of the transistor 400a and a pair of electrodes 20c, 20d of the transistor 400b is formed. Next, as shown in Fig. 4(A), a conductive film 18 that will later become a pair of electrodes 20a, 20b of the transistor 400a and a pair of electrodes 20c, 20d of the transistor 400b is formed.

[0205] The conductive film 18 is formed by a sputtering method, a CVD method, an evaporation method, or the like.

[0206] Here, a tungsten film with a thickness of 50 nm and a copper film with a thickness of 300 nm are laminated in order by a sputtering method to form the conductive film 18. Here, a tungsten film with a thickness of 50 nm and a copper film with a thickness of 300 nm are laminated in order by a sputtering method to form the conductive film 18.

[0207] Next, a mask is formed by a photolithography process using a third photomask on the conductive film 18. Next, the conductive film 18 is etched using the mask to form a pair of electrodes 20a , 20b and a pair of electrodes 20c, 20d. After that, the mask is removed (see Fig. 4( B)).

[0208] Here, the tungsten film and the copper film are dry-etched using the mask to form a pair of electrodes 20a, 20b and a pair of electrodes 20c, 20d. First, the copper film is etched using the wet etching method, and then the tungsten film is etched by the dry etching method using SF6. In this etching, a fluoride is formed on the surface of the copper film. The fluoride reduces the diffusion of copper elements from the copper film and can reduce the copper concentration in the oxide semiconductor films 17a, 17b.

[0209] Next, as shown in Fig. 5(A), an oxide insulating film 22 that will later become the oxide insulating film 23 and an oxide insulating film 24 that will later become the oxide insulating film 25 are formed on the oxide semiconductor film 17a and the pair of electrodes 20a, 20b , and on the oxide semiconductor film 17b and the pair of electrodes 20c, 20d.

[0210] After forming the oxide insulating film 22, it is preferable to continuously form the oxide insulating film 2 4 without exposing it to the atmosphere. After forming the oxide insulating film 22, without opening to the atmosphere, by adjusting one or more of the flow rate, pressure, high-frequency power, and substrate temperature of the source gas, the oxide insulating film 24 is continuously formed, so that the interface between the oxide insulating film 22 and the oxide insulating film 24 is derived from atmospheric components In addition, the impurity concentration in the oxide insulating film 24 can be reduced. The oxide semiconductor films 17a and 17b can be moved to the oxide semiconductor films 17a and 17b. The amount of oxygen vacancy can be reduced.

[0211] The oxide insulating film 22 is placed in a vacuum-evacuated processing chamber of a plasma CVD apparatus. The substrate is maintained at a temperature of 280° C. or higher and 400° C. or lower, and a source gas is introduced into the processing chamber. The pressure in the chamber is set to 20 Pa or more and 250 Pa or less, and more preferably 100 Pa or more and 250 Pa or less. Under the conditions below, a silicon oxide film is formed by supplying high frequency power to an electrode provided in the processing chamber. Alternatively, a silicon oxynitride film can be formed.

[0212] As the source gas for the oxide insulating film 22, a deposition gas containing silicon and an oxidizing gas are used. Representative examples of deposition gases containing silicon include silane, disilane, Examples of oxidizing gases include trisilane, fluorinated silane, etc. Examples of oxidizing gases include oxygen, ozone, and nitrous oxide. , nitrogen dioxide, etc.

[0213] By using the above conditions, an oxide insulating film that transmits oxygen is formed as the oxide insulating film 22. In addition, by providing the oxide insulating film 22, the oxide insulating film to be formed later can be formed. In the formation process of 25, damage to the oxide semiconductor films 17a and 17b can be reduced. .

[0214] Under the film formation conditions, by setting the substrate temperature to the above temperature, the bonding strength between silicon and oxygen As a result, the oxide insulating film 22 is oxygen-permeable, dense, and hard. Oxide insulating film, typically, etching rate for 0.5% by weight hydrofluoric acid at 25°C A silicon oxide film or silicon oxynitride film having a deposition rate of 10 nm / min or less, preferably 8 nm / min or less, can be formed.

[0215] In addition, in order to form the oxide insulating film 22 while heating, when the oxide semiconductor films 17a and 17b contain hydrogen, water, etc., the hydrogen, water, etc. contained in the oxide semiconductor films 17a and 17b can be desorbed in this step. The hydrogen contained in the oxide semiconductor films 17a and 17b combines with oxygen radicals generated in the plasma to form water. Since the substrate is heated in the film formation process of the oxide insulating film 22, the water generated by the combination of oxygen and hydrogen desorbs from the oxide semiconductor films 17a and 17b. That is, by forming the oxide insulating film 22 by the plasma CVD method, the contents of water and hydrogen contained in the oxide semiconductor films 17a and 17b can be reduced.

[0216] In addition, since heating is performed in the step of forming the oxide insulating film 22, the heating time in the state where the oxide semiconductor films 17a and 17b are exposed is short, and the amount of oxygen desorbed from the oxide semiconductor film by the heat treatment can be reduced. That is, the amount of oxygen vacancies contained in the oxide semiconductor films 17a and 17b can be reduced.

[0217] Furthermore, by setting the pressure in the processing chamber to 100 Pa or more and 250 Pa or less, the content of water contained in the oxide insulating film 23 is reduced, so that the variation in the electrical characteristics of the transistors 400a and 400b can be reduced and the variation in the threshold voltage can be suppressed.

[0218] In addition, by setting the pressure in the processing chamber to 100 Pa or more and 250 Pa or less, the oxide insulating film 22 ​​​​​​​​​​​​​​When forming a film, it is possible to reduce the damage to the oxide semiconductor films 17a and 17b, and it is possible to reduce the amount of oxygen deficiency contained in the oxide semiconductor films 17a and 17b. In particular, by increasing the film formation temperature of the oxide insulating film 22 or the oxide insulating film 24 formed later, typically to a temperature higher than 220 °C, a part of the oxygen contained in the oxide semiconductor films 17a and 17b is desorbed, and oxygen deficiency is likely to be formed. Also, in order to improve the reliability of the transistor, when using the film formation conditions for reducing the defect amount of the oxide insulating film 24 formed later, the oxygen desorption amount is likely to be reduced. As a result, it may be difficult to reduce the oxygen deficiency in the oxide semiconductor films 17a and 17b. However, by setting the pressure in the processing chamber to 100 Pa or more and 250 Pa or less and reducing the damage to the oxide semiconductor films 17a and 17b during the film formation of the oxide insulating film 22, it is possible to reduce the oxygen deficiency in the oxide semiconductor films 17a and 17b even with a small oxygen desorption amount from the oxide insulating film 24. In addition, by setting the amount of oxidizing gas with respect to the deposition gas containing silicon to 100 times or more, it is possible to reduce the hydrogen content contained in the oxide insulating film 22. As a result, since the amount of hydrogen mixed into the oxide semiconductor films 17a and 17b can be reduced, a negative shift in the threshold voltage of the transistor can be suppressed.

[0219] Here, as the oxide insulating film 22, silane with a flow rate of 30 sccm and dinitrogen monoxide with a flow rate of 4000 scc cm are used as the source gases, the pressure in the processing chamber is 200 Pa, the substrate temperature is 220 °C, and 150 W of high-frequency power is supplied to the parallel plate electrode using a 27.12 MHz high-frequency power supply.

[0220] ​​​​​​​A silicon oxynitride film with a thickness of 50 nm is formed by the following plasma CVD method. Under these conditions it is possible to form a silicon oxynitride film through which oxygen can permeate.

[0221] As the oxide insulating film 24, the substrate placed in the evacuated processing chamber of the plasma CVD apparatus is held at 180°C or higher and 280°C or lower, more preferably 200°C or higher and 240°C or lower, and a raw material gas is introduced into the processing chamber to set the pressure in the processing chamber to 100 Pa or higher and 250 Pa or lower , more preferably 100 Pa or higher and 200 Pa or lower. High-frequency power of 0 .17 W / cm 2 or higher and 0.5 W / cm 2 or lower, more preferably 0.25 W / cm 2 or higher 0.35 W / cm 2 or lower is supplied under the condition of forming a silicon oxide film or a silicon oxynitride film.

[0222] As the raw material gas for the oxide insulating film 24, it is preferable to use a depositable gas containing silicon and an oxidizing gas. Representative examples of the depositable gas containing silicon include silane, disilane, trisilane, silane fluoride, etc. Examples of the oxidizing gas include oxygen, ozone, nitrous oxide , nitrogen dioxide, etc.

[0223] As the film formation condition of the oxide insulating film 24, by supplying the high-frequency power of the above power density in the reaction chamber of the above pressure, the decomposition efficiency of the raw material gas in the plasma increases, the oxygen radicals increase , and the oxidation of the raw material gas proceeds. Therefore, the oxygen content in the oxide insulating film 25 becomes more than the stoichiometric composition. On the other hand, in the film formed at the above temperature, since the bonding force between silicon and oxygen is weak, a part of the oxygen in the film desorbs due to the heat treatment in the subsequent process. As a result ​ 、 containing more oxygen than oxygen that satisfies the stoichiometric composition, and a part of the oxygen is desorbed by heating An oxide insulating film can be formed. Further, an oxide insulating film 2 2 is provided on the oxide semiconductor film 17. Therefore, in the step of forming the oxide insulating film 24, the oxide insulating film 2 2 serves as a protective film for the oxide semiconductor film 17. As a result, damage to the oxide semiconductor film 17 can be reduced while forming the oxide insulating film 24 using high-frequency power with a high power density. possible.

[0224] Here, as the oxide insulating film 24, silane with a flow rate of 200 sccm and dinitrogen monoxide with a flow rate of 4000 s ccm are used as source gases, the pressure in the reaction chamber is 200 Pa, and the substrate temperature is 220 °C Using a high-frequency power supply of 27.12 MHz, 1500 W of high-frequency power is applied to the parallel plate electrode A silicon oxynitride film with a thickness of 400 nm is formed by plasma CVD. In addition, the plasma CVD apparatus has an electrode area of 6000 cm A parallel plate type plasma CVD 2 apparatus, and when the supplied power is converted to power per unit area (power density), it is 0.25 W / cm / cm 2 is.

[0225] Next, a heat treatment is performed. The temperature of the heat treatment is typically 150 °C or higher and 400 °C or lower , preferably 300 °C or higher and 400 °C or lower, and preferably 320 °C or higher and 370 °C or lower.

[0226] For the heat treatment, an electric furnace, an RTA apparatus, etc. can be used. By using an RTA apparatus In a short time, heat treatment can be performed at a temperature equal to or higher than the distortion point of the substrate. Therefore, the heating treatment time can be shortened.

[0227] The heat treatment may be carried out in an atmosphere of nitrogen, oxygen, ultra-dry air (air with a water content of 20 ppm or less, preferably 1 ppm or less, more preferably 10 ppb or less), or a noble gas (argon, helium, etc.). It should be noted that it is preferable that the above nitrogen, oxygen, ultra-dry air, or noble gas does not contain hydrogen, water, etc. By this heat treatment, a part of the oxygen contained in the oxide insulating film 24 can be moved to the oxide semiconductor films 17a and 17b, and the amount of oxygen vacancies contained in the oxide semiconductor films 17a and 17b can be further reduced.

[0228] When the oxide insulating films 22 and 24 contain water, hydrogen, etc., if the heat treatment is carried out after forming the nitride insulating film 26 having a function of blocking water, hydrogen, etc., the water, hydrogen, etc. contained in the oxide insulating films 22 and 24 will move to the oxide semiconductor films 17a and 17b, resulting in defects in the oxide semiconductor films 17a and 17b. However, by performing the heat treatment before forming the nitride insulating film 26, it is possible to desorb the water, hydrogen, etc. contained in the oxide insulating films 22 and 24, reduce the variation in the electrical characteristics of the transistors 400a and 400b, and suppress the variation in the threshold voltage.

[0229]

[0230] Here, a heat treatment at 350 °C for 1 hour is carried out in a nitrogen and oxidation atmosphere.

[0231] ​

[0232] In addition, when forming the pair of electrodes 20a and 20b and the pair of electrodes 20c and 20d, a conductive film The oxide semiconductor films 17a and 17b are damaged by the etching. The back channels of the oxide semiconductor films 17a and 17b (the gate electrodes However, oxygen deficiency occurs on the surface opposite to the surface facing the electrodes 13a and 13b. The insulating film 24 is made of an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition. This makes it possible to reduce oxygen vacancies that occur on the back channel side due to heat treatment. This can improve the reliability of the transistors 400a and 400b.

[0233] Next, a nitride insulating film that will later become the nitride insulating film 27 is formed by a sputtering method, a CVD method, or the like. The velum 26 is formed.

[0234] When the nitride insulating film 26 is formed by the plasma CVD method, the The substrate placed in the evacuated processing chamber is heated to 300° C. or higher and 400° C. or lower, more preferably A temperature of 320° C. or higher and 370° C. or lower is preferable because a dense nitride insulating film can be formed. stomach.

[0235] When a silicon nitride film is formed as the nitride insulating film 26 by the plasma CVD method, the silicon It is preferable to use a deposition gas containing carbon, nitrogen, and ammonia as the source gas. By using a small amount of ammonia as the source gas compared to nitrogen, ammonia is generated in the plasma. Ni dissociates and generates active species. The active species are contained in the deposition gas containing silicon. The bond between silicon and hydrogen and the triple bond between nitrogen are broken. As a result, silicon and nitrogen The bonding is promoted, the bonds between silicon and hydrogen are few, the defects are few, and a dense silicon nitride film can be formed. On the other hand, in the source gas, if the amount of ammonia relative to nitrogen is large, the decomposition of each of the depositable gas containing silicon and nitrogen does not proceed, and the bonds between silicon and hydrogen remain, the defects increase, and a rough silicon nitride film is formed. Therefore, in the source gas, it is preferable that the flow rate ratio of nitrogen to ammonia is 5 or more and 50 or less, preferably 10 or more and 50 or less.

[0236] Here, silane with a flow rate of 50 sccm, nitrogen with a flow rate of 5000 sccm, and ammonia with a flow rate of 100 sccm are used as source gases, the pressure in the processing chamber is 100 Pa, the substrate temperature is 350 °C, and 1000 W of high-frequency power is supplied to the parallel plate electrode using a 27.12 MHz high-frequency power supply. By the plasma CVD method, a silicon nitride film with a thickness of 50 nm is formed as the nitride insulating film 26. The plasma CVD apparatus is a parallel plate type plasma CVD apparatus with an electrode area 2 of 6000 cm When the supplied power is converted to power per unit -1 area (power density), it is 1.7×10 2 W / cm

[0237] Through the above steps, the oxide insulating film 22, the oxide insulating film 24, and the nitride insulating film 26 can be formed. formed.

[0238] Next, a heat treatment may be performed. The temperature of the heat treatment is typically 150 °C or more and 40 0 °C or less, preferably 300 °C or more and 400 °C or less, preferably 320 °C or more and 370 °C or less. is set.

[0239] Next, a photolithography process using a fourth photomask is performed on the nitride insulating film 26 to form a mask. Then, using this mask, a part of each of the insulating film 14, the oxide insulating film 22, the oxide insulating film 24, and the nitride insulating film 26 is etched to form an insulating film 15 and an insulating film 28 composed of an oxide insulating film 23, an oxide insulating film 25, and a nitride insulating film 27. Note that as shown at A1 - B1 in FIG. 5 (B), which is a cross-sectional view of the transistor 400a in the channel length direction, the insulating film 28 has an opening 41. Also, as shown at C1 - D1 in FIG. 5(B), which is a cross-sectional view of the transistor 400a in the channel width direction, the insulating films 15 and 28 have openings 42 and 43.

[0240] Next, as shown in FIG. 6(A), a conductive film 30 that will later become the gate electrode 31 and the electrode 32 is formed.

[0241] The conductive film 30 is formed by a sputtering method, a CVD method, an evaporation method, or the like.

[0242] Here, an ITO film with a thickness of 100 nm is formed as the conductive film 30 by a sputtering method.

[0243] Next, a mask is formed by a photolithography process using a fifth photomask on the conductive film 30. Next, a part of the conductive film is etched using this mask to form the gate electrode 31 and the electrode 32. After that, the mask is removed.

[0244] Note that as shown in FIG. 6(B), in the transistor 400a, the gate electrode 31 is formed so as to face the side surface of the oxide semiconductor film 17a on the side surfaces of the openings provided in the insulating films 15 and 28 in the channel width direction. ​​​​​​

[0245] Through the above process, the transistors 400a and 400b can be fabricated. It is possible.

[0246] In the transistor shown in this embodiment, an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition is formed by laminating it on the oxide semiconductor film that functions as the channel region. As a result, the oxygen in the oxide insulating film can be transferred to the oxide semiconductor film. As a result, it is possible to reduce the content of oxygen vacancies contained in the oxide semiconductor film, and a highly reliable transistor is obtained.

[0247] Further, in the transistor 400a that functions as the driving transistor of the light-emitting element, in the channel width direction, the gate electrode 31 is opposed to the side surface of the oxide semiconductor film 17a on the side surfaces of the openings 42 and 43 provided in the insulating film 15 and the insulating film 28. As a result, also on the side surface of the oxide semiconductor film 17a, carriers flow in a wide range of the oxide semiconductor film 17a under the influence of the electric field of the gate electrode 31. Therefore, the field-effect mobility of the transistor increases, and the on-current increases.

[0248] Further, by setting the channel length of the transistor 400a that functions as the driving transistor of the light-emitting element to 0.5 μm or more and 4.5 μm or less, preferably more than 1 μm and 4 μm or less, more preferably more than 1 μm and 3.5 μm or less, and even more preferably more than 1 μm and 2.5 μm or less, it is possible to further increase the field-effect mobility of the transistor. As a result, high-speed driving of the display device can be realized.

[0249] Also, by making the channel length of the transistor 400b that functions as the pixel selection transistor longer than that of the transistor 400a, it is possible to reduce the cutoff current. This enables the display device to achieve low power consumption. From the above, a display device including a transistor having an oxide semiconductor film can obtain a display device with excellent electrical characteristics.

[0250] Also, in a display device including a transistor having an oxide semiconductor film, a highly reliable display device can be obtained. In addition, the configurations and methods shown in the present embodiment can be used in appropriate combination with the configurations and methods shown in other embodiments.

[0251]

[0252] <Modification Example 1 of Display Device> A display device having a structure different from that in FIG. 2 will be described with reference to FIG. 7. The display device shown in FIG. 7 includes a transistor 410a that functions as a driving transistor and a transistor 400b that functions as a selection transistor, and has pixels including them. FIG. 7(A1) is a top view of the transistor 410a that functions as a driving transistor, FIG. 7(A2) is a top view of the transistor 400b that functions as a selection transistor, FIG. 7(B) is a cross-sectional view taken along the dashed line A3 - B3 in FIG. 7(A1) and the dashed line A2 - B2 in FIG. 7(A2), FIG. 7(C1) is a cross-sectional view taken between the dashed line C3 - D3 in FIG. 7(A1), and FIG. 7(C2) is a cross-sectional view taken between the dashed line C2 - D2 in FIG. 7(A2). Note that in FIGS. 7(A1) and 7(A2), for clarity, the substrate 11, the insulating film, etc. are omitted.

[0253] ​​​​​​​​​​​Functioning as a selection transistor in FIGS. 7(A2), 7(B), and 7(C2) Transistor 400b has the same configuration as that shown in FIGS. 2(A2), 2(B), and 2(C2).

[0254] Transistor 410a is such that, in the channel width direction, on the outer side of one side surface of the oxide semiconductor film 17a, the gate electrode 13a and the gate electrode 51 are connected, but on the outer side of the other side surface of the oxide semiconductor film 17a, the gate electrode 13a and the gate electrode 51 face each other via the insulating film 15 and the insulating film 28, which is different from the transistor 400a shown above.

[0255] The transistor 410a shown in FIGS. 7(A1), 7(B), and 7(C1) is a channel etching type transistor, and includes a gate electrode 13a provided on the substrate 11, an insulating film 15 formed on the substrate 11 and the gate electrode 13a, an oxide semiconductor film 17a overlapping the gate electrode 13a via the insulating film 15, and a pair of electrodes 20a, 20b in contact with the oxide semiconductor film 17a. Further, on the insulating film 15, the oxide semiconductor film 17a, and the pair of electrodes 20a, 20b, there is an insulating film 28 composed of an oxide insulating film 23, an oxide insulating film 25, and a nitride insulating film 27, and a gate electrode 51 formed on the insulating film 28. The gate electrode 51 is connected to the gate electrode 13a at an opening 42 provided in the insulating film 15 and the insulating film 28. Also, one of the pair of electrodes 20a, 20b, here the electrode 32 connected to the electrode 20b, is formed on the insulating film 28. Note that the electrode 32 functions as a pixel electrode.

[0256] The transistor 410a has a channel length of 0.5 μm or more and 4.5 μm or less, preferably 1 ​​​​​​​​​​​​​Larger than 0 μm and 4 μm or less, more preferably larger than 1 μm and 3.5 μm or less, even more preferably larger than 1 μm and 2.5 μm or less. The transistor 410a has an oxide semiconductor film 17a provided between the gate electrode 1 3a and the gate electrode 51. Further, as shown in FIG. 7(A1), the gate electrode 51 overlaps the end of the oxide semiconductor film 17a via the insulating film 28 when viewed from above.

[0257] In addition, the insulating film 15 and the insulating film 28 have a plurality of openings. Typically, as shown in FIG. 7(B), it has an opening 41 that exposes one of the pair of electrodes 20a and 20b. Further, as shown in FIG. 7(C1), on one outer side in the channel width direction side surface of the oxide semiconductor film 17a, an opening 42 is provided in the insulating film 15 and the insulating film 28, and at the opening 42, the gate electrode 51 and the gate electrode 13a are connected. Further, the gate electrode 51 faces the side surface in the channel width direction of the oxide semiconductor film 17a on the side surface of the opening 42. Also, on the other outer side in the channel width direction side surface of the oxide semiconductor film 17a, the gate electrode 51 is not connected to the gate electrode 13a. Also, the end of the gate electrode 51 is located outside the side surface of the oxide semiconductor film 17a.

[0258] Note that, as shown in FIG. 7(C1), in the channel width direction, the distance d between the end when the gate electrode 51 is projected onto the interface of the insulating film 15 and the insulating film 28 and the side surface of the oxide semiconductor film 17a is preferably 1 times or more and 7.5 times or less the sum of the film thickness t1 of the insulating film 15 and the film thickness t2 of the insulating film 28. When the distance d is 1 times or more the sum of the film thickness t1 of the insulating film 15 and the film thickness t2 of the insulating film 28, the electric field of the gate electrode 51 affects the oxide semiconductor film 17a Since it affects the side surface or the end portion including the side surface and its vicinity, the generation of parasitic channels on the side surface or the end portion of the oxide semiconductor film 17a can be suppressed. On the other hand, when the distance d is 7.5 times or less the film thickness obtained by adding the film thickness t1 of the insulating film 15 and the film thickness t2 of the insulating film 28, the area of the transistor can be reduced. The generation of parasitic channels on the side surface or the end portion can be suppressed. On the other hand, when the distance d is 7.5 times or less the film thickness obtained by adding the film thickness t1 of the insulating film 15 and the film thickness t2 of the insulating film 28, the area of the transistor can be reduced. When the distance d is 7.5 times or less the film thickness obtained by adding the film thickness t1 of the insulating film 15 and the film thickness t2 of the insulating film 28, the area of the transistor can be reduced. the area of the transistor can be reduced.

[0259] Next, the manufacturing process of the transistor 410a will be described.

[0260] Through the processes of FIGS. 3 to 5(A), a gate electrode 13a, an insulating film 14, an oxide semiconductor film 17a, a pair of electrodes 20a, 20b, an oxide insulating film 22, an oxide insulating film 24, and a nitride insulating film 26 are formed on the substrate 11. In this process, a photolithography process using the first to third photomasks is performed. In this process, a photolithography process using the first to third photomasks is performed. and a nitride insulating film 26 are formed on the substrate 11. In this process, a photolithography process using the first to third photomasks is performed.

[0261] Next, after forming a mask on the nitride insulating film 26 by a photolithography process using the fourth photomask, a part of the insulating film 14, the oxide insulating film 22, the oxide insulating film 24, and the nitride insulating film 26 is etched to form openings 41 and 42 shown in FIGS. 7(A1), 7(B), and 7(C1). insulating film 26 is etched to form openings 41 and 42 shown in FIGS. 7(A1), 7(B), and 7(C1). openings 41 and 42 shown in FIGS. 7(A1), 7(B), and 7(C1).

[0262] Next, a conductive film 30 is formed in the same manner as the process shown in FIG. 6(A). Next, after forming a mask on the conductive film 30 by a photolithography process using the fifth photomask, a part of the conductive film 30 is etched to form a gate electrode 51 and an electrode 32 shown in FIGS. 7(A1), 7(B), and 7(C1). 30 is etched to form a gate electrode 51 and an electrode 32 shown in FIGS. 7(A1), 7(B), and 7(C1). gate electrode 51 and an electrode 32 shown in FIGS. 7(A1), 7(B), and 7(C1).

[0263] Through the above processes, the transistor 410a can be manufactured.

[0264] <Modification Example 2 of the Display Device> A display device having a structure different from that of FIGS. 2 and 7 will be described with reference to FIG. 8. The table shown in FIG. 8 The display device shown has pixels including a transistor 420a that functions as a driving transistor and a transistor 400b that functions as a selection transistor. FIG. 8(A1) is a top view of the transistor 420a that functions as a driving tr ansistor, FIG. 8(A2) is a top view of the transistor 400b that functions as a selection transistor, and FIG. 8(B) is a cross-sectional view taken along the dashed line A4 - B4 in FIG. 8 (A1) and the dashed line A2 - B2 in FIG. 8(A2), FIG. 8(C1) is a cross-sectional view taken between the dashed lines C4 - D4 in FIG. 8(A1), and FIG. 8(C2) is a cross-sectional view taken between the dashed lines C2 - D2 in FIG. 8(A2). Note that in FIGS. 8(A1) and 8( A2), for clarity, the substrate 11, the insulating film, etc. are omitted.

[0265] The transistor 400b that functions as a selection transistor in FIGS. 8(A2), 8(B), and 8(C2) has the same configuration as that in FIGS. 2(A2), 2(B), and 2(C2). Also, the transistor 420a that functions as a driving transistor in FIGS. 8(A1), 8(B), and 8(C1) is different from the transistor 410a shown above in that the gate electrode 13a and the gate electrode 64 are connected via the conductive film 62.

[0266] The transistor 420a shown in FIGS. 8(A1), (B), and 8(C1) is a channel - etched type transistor, including a gate electrode 13a provided on the substrate 11, an insulating film 15 formed on the substrate 11 and the gate electrode 13a, an oxide semiconductor film 17a overlapping the gate electrode 13a via the insulating film 15, and a pair of electrodes 20a, 2 in contact with the oxide semiconductor film 17a ​​​​​​ It has 0b. Also, an insulating film 15, an oxide semiconductor film 17a, and a pair of electrodes 20a, 2 On 0b, there is an insulating film 28 composed of an oxide insulating film 23, an oxide insulating film 25, and a nitride insulating film 27, and a gate electrode 64 formed on the insulating film 28. The gate electrode 64 is connected to the gate electrode 13a via a conductive film 62. Also, on one of the pair of electrodes 20a, 20b, here, an electrode 32 connected to the electrode 20b is formed on the insulating film 28. Note that the electrode 32 functions as a pixel electrode.

[0267] The transistor 420a has a channel length of 0.5 μm or more and 4.5 μm or less, preferably more than 1 μm and 4 μm or less, more preferably more than 1 μm and 3.5 μm or less, and even more preferably more than 1 μm and 2.5 μm or less. Also, in the transistor 420a, an oxide semiconductor film 17a is provided between the gate electrode 13a and the gate electrode 64. Also, as shown in FIG. 8(A1), the gate electrode 64 overlaps the end of the oxide semiconductor film 17a via the insulating film 28 when viewed from above. Also, the insulating film 15 and the insulating film 28 have a plurality of openings. Typically, as shown in FIG. 8(B), there is an opening 41 that exposes one of the pair of electrodes 20a, 20b of the transistor 420a.

[0268] Also, in the opening 61 provided in the insulating film 15, as shown in FIG. 8(C1), the conductive film 62 is connected to the gate electrode 13a. Note that the conductive film 62 is formed simultaneously with the pair of electrodes 2 0a, 20b. Also, in the opening 63 provided in the insulating film 28, the gate electrode 64 is connected to the conductive film 62. That is, the gate electrode 13a and the gate electrode 64 are connected via the conductive film 62. At the same time. Also, in the opening 63 provided in the insulating film 28, the gate electrode 64 is connected to the conductive film 62. That is, the gate electrode 13a and The gate electrode 64 is electrically connected. Further, the conductive film 62 having the same potential as the gate electrode 13a and the gate electrode 64 faces the side surface of the oxide semiconductor film 17a.

[0269] As shown in FIG. 8(C1), the transistor 420a has the gate electrode 13a and the gate electrode 64 connected via the conductive film 62 only on the outer side of one of the side surfaces in the channel width direction of the oxide semiconductor film 17a, but the gate electrode 13a and the gate electrode 64 may be connected via the conductive film 62 on the outer sides of both of the side surfaces in the channel width direction of the oxide semiconductor film 17a.

[0270] Next, the manufacturing process of the transistor 420a will be described.

[0271] Through the process of FIG. 3, the gate electrode 13a, the insulating film 14, and the oxide semiconductor film 17a are formed on the substrate 11. In this process, a photolithography process using a first photomask and a second photomask is performed.

[0272] Next, after forming a mask on the insulating film 14 by a photolithography process using a third photomask, a part of the insulating film 14 is etched to form the openings 61 shown in FIGS. 8(A1) and 8(C1).

[0273] Next, in the same manner as the processes shown in FIGS. 4(A) and 4(B), after forming a mask on the conductive film 18 by a photolithography process using a fourth photomask, a part of the conductive film 18 is etched to form a pair of electrodes 20a, 20b, and the conductive film 62.

[0274] Next, in the same manner as the process shown in FIG. 5(A), the oxide insulating film 22, the oxide insulating film 24, and the nitride A nitride insulating film 26 is formed. Next, a photolithography process using a fifth photomask is performed to form a mask on the nitride insulating film 26, and then a part of the nitride insulating film 26 is etched to form openings 63 shown in FIGS. 8(A1) and 8(C1).

[0275] Next, a conductive film 30 is formed in the same manner as the process shown in FIG. 6(A). Next, a photolithography process using a sixth photomask is performed to form a mask on the conductive film 30, and then a part of the conductive film 30 is etched to form gate electrodes 64 and electrode 32 shown in FIGS. 8(A1), 8(B), and 8(C1).

[0276] Through the above processes, the transistor 420a can be fabricated.

[0277] <Modification Example 3 of the Display Device> A display device having a structure different from those in FIGS. 2, 7, and 8 will be described with reference to FIG. 11. FIG. 1 shows a display device including a pixel having a transistor 430a that functions as a driving transistor and a transistor 430b that functions as a selection transistor. FIG. 11(A1 ) is a top view of the transistor 430a that functions as a driving transistor, FIG. 11( ) is a top view of the transistor 430b that functions as a selection transistor, and FIG. 1 1(B) is a cross-sectional view taken along the dashed-dotted line A5 - B5 in FIG. 11(A1) and the dashed-dotted line A6 - B6 in FIG. 11(A2), FIG. 11(C1) is a cross-sectional view between the dashed-dotted lines C5 - D5 in FIG. 11(A1), and FIG. 11(C2) is a cross-sectional view between the dashed-dotted lines C6 - D6 in FIG. 11(A2). Note that in FIGS. 11(A1) and 11(A2), for clarity, the substrate, insulating film, etc. are omitted for simplicity.

[0278] ​The transistor 430a shown in FIGS. 11(A1), 11(B), and 11(C1) is a transistor in which an electrode 77 connected to one of a pair of electrodes 20a and 20b is formed on an insulating film 15. Also, it is different from the other driving transistors shown above in that it has an insulating film 74a separated for each transistor on an oxide semiconductor film 17a and a pair of electrodes 20a and 20b.

[0279] Also, the transistor 430b shown in FIGS. 11(A2), 11(B), and 11(C2) is different from the transistor 400b shown above in that it has an insulating film 74b separated for each transistor on an oxide semiconductor film 17b and a pair of electrodes 20c and 20d.

[0280] The transistor 430a shown in FIGS. 11(A1), 11(B), and 11(C1) is a channel etch type transistor, and includes a gate electrode 13a provided on a substrate 11, an insulating film 15 formed on the substrate 11 and the gate electrode 13a, an oxide semiconductor film 17a overlapping the gate electrode 13a via the insulating film 15, and a pair of electrodes 20a and 20b in contact with the oxide semiconductor film 17a. Also, on the insulating film 15, the oxide semiconductor film 17a, and the pair of electrodes 20a and 20b, there are an insulating film 74a that functions as a gate insulating film composed of an oxide insulating film 71a, an oxide insulating film 72a, and a nitride insulating film 73a, and a gate electrode 76 formed on the insulating film 74a and the nitride insulating film 15a. The gate electrode 76 is connected to the gate electrode 13a at an opening 75 provided in the nitride insulating film 15a. Also, an electrode 77 connected to one of the pair of electrodes 20a and 20b, here the electrode 20b, is formed on the insulating film 15. Note that the electrode 77 functions as a pixel electrode.

[0281] ​​​​​​​​​​​Also, the transistor 430b shown in FIGS. 11(A2), 11(B), and 11(C2) is , a channel-etch type transistor, and includes a gate electrode 13b provided on the substrate 11 and , an insulating film 15 formed on the substrate 11 and the gate electrode 13b, and an oxide semiconductor film 17b overlapping with the gate electrode 13b through the insulating film 15, and a pair of electrodes 20c, 20d in contact with the oxide semiconductor film 17b. Also, on the insulating film 15, the oxide semiconductor film 17b, and the pair of electrodes 20c, 20d, there is an insulating film 74b composed of an oxide insulating film 71b, an oxide insulating film 72b, and a nitride insulating film 73b.

[0282] The insulating film 15 included in the transistors 430a, 430b is formed of a nitride insulating film 15a and an oxide insulating film 15b. The oxide insulating film 15b is formed in a region overlapping with the oxide semiconductor film 17a, the pair of electrodes 20a, 20b, and the oxide insulating film 71a, and in a region overlapping with the oxide semiconductor film 17b, the pair of electrodes 20c, 20d, and the oxide insulating film 71b.

[0283] Also, the insulating films 74a, 74b are separated for each transistor and overlap with the oxide semiconductor films 17a, 17b, respectively. Specifically, in the channel length direction of the transistor 430a shown in FIG. 11(B), the ends of the insulating film 74a are located on the pair of electrodes 20a, 20b, and in the channel width direction of the transistor 430a shown in FIG. 11(C1), the ends of the insulating film 74a are located outside the oxide semiconductor film 17a. Also, in the channel length direction of the transistor 430b shown in FIG. 11(B), the ends of the insulating film 7 4b are located on the pair of electrodes 20c, 20d, and in the channel width direction of the transistor 430b shown in FIG. 11(C2), the ends of the insulating film 74b are located outside the oxide semiconductor film 17b. Here, the end portion of the insulating film 74b is positioned outside the oxide semiconductor film 17b.

[0284] Also, in the channel width direction shown in Fig. 11(C1), the gate electrode 76 faces the side surface of the oxide semiconductor film 17a on the side surface of the insulating film 74a that functions as a gate insulating film. Note that the end portion of the insulating film 74a may be provided on the insulating film 15 instead of on the pair of electrodes 20a and 20b in the channel length direction. In this case, the electrode 77 is formed on the insulating film 74a and is connected to one of the pair of electrodes 20a and 20b at the opening of the insulating film 74a.

[0285] The transistor 430a has a channel length of 0.5 μm or more and 4.5 μm or less, preferably more than 1 μm and 4 μm or less, more preferably more than 1 μm and 3.5 μm or less, and even more preferably more than 1 μm and 2.5 μm or less. Also, in the channel width direction, the oxide semiconductor film 17a is provided between the gate electrode 13a and the gate electrode 76 via the insulating film 15 and the insulating film 74a. Further, as shown in Fig. 1 1(A1), the gate electrode 76 overlaps the end portion of the oxide semiconductor film 17a via the insulating film 74a when viewed from above.

[0286] Also, the channel length of the transistor 430b is larger than that of the transistor 430a. By this, it becomes possible to reduce the value of the cut-off current of the transistor 430b that functions as the selection transistor of the pixel.

[0287] Note that in Fig. 11(C1), in the channel width direction, the gate electrodes 13a and 76 are connected only outside one of the side surfaces in the channel width direction of the oxide semiconductor film 17a.​​​​​​ Taking this case as an example, on the outer sides of both sides in the channel width direction of the oxide semiconductor film 17a, the gate electrode 13a and the gate electrode 76 may be connected.

[0288] Next, a method for manufacturing the transistors 430a and 430b will be described.

[0289] The transistors 430a and 430b are formed on the substrate 11 through the processes shown in FIGS. 3 to 5(A), with the gate electrodes 13a and 13b, the insulating film 14, the oxide semiconductor films 17a and 17b, a pair of electrodes 20a and 20b, a pair of electrodes 20c and 20d, the oxide insulating film 22, the oxide insulating film 24 , and the nitride insulating film 26. In this process, a photolithography process using the first to third photomasks is performed.

[0290] Next, in the process shown in FIG. 5(B), after forming a mask on the nitride insulating film 26 by a photolithography process using the fourth photomask, a part of the oxide insulating film 22, the oxide insulating film 24, and the nitride insulating film 26 is etched to form the separated insulating films 74a and 74b for each transistor. When the insulating film 14 is laminated with the nitride insulating film and the oxide insulating film, a part of the insulating film 14 is also etched together with the etching of the oxide insulating film 23. As a result, as shown in FIG. 11(B), an insulating film 15 having a step formed by the nitride insulating film 15a and the oxide insulating film 15b is formed. After that, through the process shown in FIG. 6, the gate electrode 76 and the electrode 77 are formed.

[0291] Through the above processes, the transistors 430a and 430b can be manufactured.

[0292] Through the above processes, the transistors 430a and 430b can be manufactured.

[0293] <Modification Example 4 of Display Device> A display device having a structure different from that of FIGS. 2, 7, 8, and 11 will be described with reference to FIG. 9. . FIG. 9(A) shows an equivalent circuit diagram of a pixel 602 included in the display device.

[0294] As shown in FIG. 9(A), the pixel 602 of this modification includes a light-emitting element 350, a transistor 400a that functions as a driving transistor for the light-emitting element 35 0, a transistor 450b that functions as a selection transistor, and a capacitive element 370. The transistor 400a and the transistor 450b are both so-called dual-gate transistors including gate electrodes disposed above and below an oxide semiconductor film.

[0295] The transistor 400a included in the pixel 602 can have the same configuration as that shown in FIGS. 2(A1), 2(B), 2(C 1), and 2(D).

[0296] FIG. 9(B) is a top view of the transistor 450b that functions as a selection transistor, FIG. 9(C) is a cross-sectional view taken along the dashed line C9-D9 in FIG. 9(B), and FIG. 9(D) is a cross-sectional view taken along the dashed line A1-B1 of the transistor 400a shown in FIG. 2(A1) and the dashed line A9-B9 in FIG. 9(B). Note that in FIG. 9(B), the substrate 11 and the insulating film are omitted for clarity.

[0297] The transistor 450b shown in FIG. 9 has a gate electrode 109 that overlaps with an oxide semiconductor film 17b and a gate electrode 13b on the insulating film 28, which is different from the other selection transistors shown above.

[0298] The transistor 450b shown in FIG. 9 is a channel-etch type transistor, and includes a gate electrode 13b provided on a substrate 1 1, an insulating film 15 formed on the substrate 11 and the gate electrode 13b, an oxide semiconductor film 17b overlapping the gate electrode 13b via the insulating film 15, and a pair of electrodes 20c and 20d in contact with the oxide semiconductor film 17b. Further, an insulating film 2 8 which functions as a gate insulating film composed of an oxide insulating film 23, an oxide insulating film 25, and a nitride insulating film 27, and a gate electrode 109 formed on the insulating film 28 and the insulating film 15 are provided. The gate electrode 109 is connected to the gate electrode 13b at openings 102 and 103 provided in the insulating film 15 and the insulating film 28. The gate electrode 109 included in the transistor 450b is formed in the same layer as the gate electrode 31 included in the transistor 400a.

[0299]

[0300] Also, the transistor 450b has a channel length that is at least larger than that of the transistor 400a. Further, in the channel width direction, an oxide semiconductor film 17b is provided between the gate electrode 13b and the gate electrode 109 via the insulating film 15 and the insulating film 28. Also, as shown in FIG. 9(B), the gate electrode 109 overlaps the end portion of the oxide semiconductor film 17b via the insulating film 28 when viewed from above.

[0301] At the end portions of the oxide semiconductor films processed into island shapes by etching or the like in the transistors 400a and 450b, defects are formed due to damage during processing, and contamination may occur due to impurity adhesion or the like. For this reason, in the transistors, the oxide semiconductor films When only one of the gate electrodes formed on the upper or lower side is formed, even if the oxide semiconductor film is intrinsic or substantially intrinsic, stress such as an electric field is applied, and the ends of the oxide semiconductor film are activated and tend to become n-type (low resistance region). For example, when the n-type ends are provided between a pair of electrodes 20c and 20d as shown by the broken lines 33 and 34 in FIG. 9(B), the n-type region becomes a carrier path, and a parasitic channel is formed. As a result, the increase in the drain current at the threshold voltage is stepwise, and the transistor has a negatively shifted threshold voltage. However, the transistor 450b shown in FIG. 9 has gate electrodes 13b and 109 that are at the same potential. In the channel width direction, the gate electrode 109 faces the side surface of the oxide semiconductor film 17b on the side surface of the insulating film 28, so that the electric field of the gate electrode 109 also affects from the side surface of the oxide semiconductor film 17b. As a result, the generation of parasitic channels at the side surface of the oxide semiconductor film 17b or at the end including the side surface and its vicinity is suppressed. As a result, the transistor 450b can be made into a transistor with excellent electrical characteristics in which the increase in the drain current at the threshold voltage is steep. The above description can also be applied to the gate electrode 13a, the gate electrode 31, and the oxide semiconductor film 17a included in the transistor 400a. Note that the configurations of the display device according to the above-described embodiment and the display device according to the modification are partially different, but the respective configurations can be freely combined.

[0302]

[0303]

[0304] ​​​​​​​​​​​​​The structures, methods, etc. described in this embodiment may be different from the structures, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0305] (Embodiment 2) In this embodiment mode, a display device different from that in Embodiment Mode 1 and a manufacturing method thereof will be described with reference to the drawings. In this embodiment, oxygen vacancies in an oxide semiconductor film are further reduced. The transistor will be described with reference to FIGS.

[0306] FIG. 12 shows a top view and a cross-sectional view of a transistor included in a pixel of a display device of this embodiment mode. show.

[0307] The display device of this embodiment includes a transistor 440a functioning as a driving transistor and 1, and a transistor 440b functioning as a selection transistor. 2(A1) is a top view of a transistor 440a functioning as a driving transistor; FIG. 12A2 is a top view of a transistor 440b functioning as a selection transistor. FIG. 12(B) is a cross-sectional view taken along the dashed line A7-B7 in FIG. 12(A1) and FIG. 12(C1) is a cross-sectional view taken along the dashed line A8-B8 of FIG. 12(A1). 12(C2) is a cross-sectional view taken along the dashed line C8-D7 in FIG. 12(A2). 12(A1) and 12(A2) are cross-sectional views of the substrate 8 for the sake of clarity. The plate 11 and the insulating film are omitted.

[0308] The transistor 440a shown in FIG. 12(A1), FIG. 12(B), and FIG. 12(C1) is a transistor The transistor is a channel etch type transistor, and includes a gate electrode 13a provided on a substrate 11 and a The insulating film 15 formed on the board 11 and the gate electrode 13a, and, via the insulating film 15, the oxide semiconductor film 17a overlapping with the gate electrode 13a, and a pair of electrodes 20a and 20b in contact with the oxide semiconductor film 17a. Further, on the insulating film 15, the oxide semiconductor film 17a, and the pair of electrodes 20a and 20b, there are an insulating film 88a composed of an oxide insulating film 83a, an oxide insulating film 85a, and a nitride insulating film 87 and a gate electrode 91 formed on the insulating film 88a. The gate electrode 91 is connected to the gate electrode 13a at the opening 96 provided in the insulating film 15 and the nitride insulating film 87. Further, an electrode 92 connected to one of the pair of electrodes 20a and 20b, here the electrode 20 b, is formed on the nitride insulating film 87. The electrode 92 is connected to the electrode 20b at the opening 95 provided in the nitride insulating film 8 7. Note that the electrode 92 functions as a pixel electrode .

[0309] Also, the transistor 440b shown in FIGS. 12(A2), 12(B), and 12(C2) is a channel etch type transistor, and includes a gate electrode 13b provided on the substrate 11 , an insulating film 15 formed on the substrate 11 and the gate electrode 13b, and, via the insulating film 15, an oxide semiconductor film 17b overlapping with the gate electrode 13b, and a pair of electrodes 20c and 20d in contact with the oxide semiconductor film 17b. Further, on the insulating film 15, the oxide semiconductor film 17b, and the pair of electrodes 20c and 20d, there is an insulating film 88b composed of an oxide insulating film 83b, an oxide insulating film 85b, and a nitride insulating film 87.

[0310] In the transistor 440a, the insulating film 15 and the insulating film 88a each function as a gate insulating film . Also, in the transistor 440b, the insulating film 15 functions as a gate insulating film It functions. The insulating film 15 is formed of a nitride insulating film 15a and an oxide insulating film 15b. The oxide insulating film 15b is formed in a region overlapping any one of the oxide semiconductor films 17a and 17b, a pair of electrodes 20a and 20b, a pair of electrodes 20c and 20d, or the oxide insulating film 83a. .

[0311] In the transistor 440b, a second gate electrode may be provided in a region on the insulating film 88b and overlapping the gate electrode 13b and the oxide semiconductor film 17b. In that case, the second gate electrode is preferably connected to the gate electrode 13b at an opening provided in the insulating film 15 and the nitride insulating film 87.

[0312] In this embodiment, a silicon nitride film is used to form the nitride insulating film 15a. Also, for the oxide insulating film 15b, the oxides listed in the insulating film 15 shown in Embodiment 1 can be appropriately used. Further, for the nitride insulating film 15a and the oxide insulating film 15b, the manufacturing methods listed in the insulating film 14 can be appropriately used. Also, for the oxide insulating films 83a and 83b, the same materials and manufacturing methods as the oxide insulating film 23 shown in Embodiment 1 can be appropriately used for formation. Also, for the oxide insulating films 85a and 85b, the same materials and manufacturing methods as the oxide insulating film 25 shown in Embodiment 1 can be appropriately used for formation. The nitride insulating film 87 can be formed by appropriately using the same materials and manufacturing methods as the nitride insulating film 27 shown in Embodiment 1. Also, the gate electrode 91 and the electrode 92 can be formed by appropriately using the same materials and manufacturing methods as the gate electrode 31 and the electrode 32 shown in Embodiment 1.

[0313] In addition, the oxide insulating films 83a, 83b and the oxide insulating films 85a, 85b are separated for each transistor and overlap with the oxide semiconductor films 17a, 17b respectively. Specifically, in the cross-sectional view in the channel length direction of the transistor 440a shown in FIG. 12(B), the ends of the oxide insulating film 83a and the oxide insulating film 85a are located on a pair of electrodes 20a, 20b. In the cross-sectional view in the channel width direction of the transistor 440a shown in FIG. 12(C1), the ends of the oxide insulating film 83a and the oxide insulating film 85a are located outside the oxide semiconductor film 17a. Similarly, in the cross-sectional view in the channel length direction of the transistor 440b shown in FIG. 12(B), the ends of the oxide insulating film 83b and the oxide insulating film 85b are located on a pair of electrodes 20c, 20d. In the cross-sectional view in the channel width direction of the transistor 440b shown in FIG. 12(C2), the ends of the oxide insulating film 83b and the oxide insulating film 85b are located outside the oxide semiconductor film 17b. Moreover, the nitride insulating film 87 is formed so as to cover the upper surfaces and side surfaces of the oxide insulating films 83a, 83b and the oxide insulating films 85a, 85b and is in contact with the nitride insulating film 15a. Note that in the transistor 440a, the ends of the oxide insulating film 83a and the oxide insulating film 85a may be provided not on the pair of electrodes 20a, 20b but on the nitride insulating film 15a in the channel length direction. Also, in the transistor 440b, the ends of the oxide insulating film 83b and the oxide insulating film 85b may be provided not on the pair of electrodes 20c, 20d but on the nitride insulating film 15a in the channel length direction.

[0314]

[0315]

[0316] Also, in the cross-sectional view in the channel width direction of the transistor 440a shown in FIG. 12(C1) , the gate electrode 91 faces the side surface of the oxide semiconductor film 17a via the side surfaces of the oxide insulating film 83a and the oxide insulating film 85a.

[0317] The transistor 440a shown in this embodiment has a channel length of 0.5 μm or more and 4.5 μm or less, preferably more than 1 μm and 4 μm or less, more preferably more than 1 μm and 3.5 μm or less, and even more preferably more than 1 μm and 2.5 μm or less. Also, the transistor 440a has an oxide semiconductor film 17a provided between the gate electrode 13a and the gate electrode 91 in the channel width direction via the insulating film 15 and the insulating film 88a. Also, as shown in FIG. 12(A1), the gate electrode 91 overlaps with the end portion of the oxide semiconductor film 17a via the insulating film 88a when viewed from above.

[0318] Also, the channel length of the transistor 440b is larger than that of the transistor 440a. As a result, it becomes possible to reduce the value of the cutoff current of the transistor 440b that functions as the selection transistor of the pixel.

[0319] As shown in FIG. 12(C1), the transistor 440a has an opening 96 of the insulating film 15 and the nitride insulating film 87 provided outside one of the side surfaces in the channel width direction of the oxide semiconductor film 17a. At the opening 96, the gate electrode 91 is connected to the gate electrode 13a. Also, the gate electrode 91 faces the side surface in the channel width direction of the oxide semiconductor film 17a on the side surfaces of the oxide insulating films 83a and 85a. Also, on the outside of the other side surface in the channel width direction of the oxide semiconductor film 17a, the gate electrode 91 is connected to the gate electrode 13a ​​​​​​​​​​​ No. Also, the end portion of the gate electrode 91 is located outside the side surface of the oxide semiconductor film 17a.

[0320] Note that, in the transistor 440a, as shown in FIG. 12(C1), the gate electrodes 13a and 91 are connected only on the outside of one of the side surfaces in the channel width direction of the oxide semiconductor film 17 a, but the gate electrodes 13a and 91 may be connected on the outside of both of the side surfaces in the channel width direction of the oxide semiconductor film 17a.

[0321] In the transistor 440a or the transistor 440b shown in this embodiment, the oxide semiconductor film 17a and the oxide insulating film 85a, or the oxide semiconductor film 17b and the oxide insulating film 8 5b are surrounded by the nitride insulating film 15a and the nitride insulating film 87. The nitride insulating film 15a and the nitride insulating film 87 have a low oxygen diffusion coefficient and a barrier property against oxygen, so that a part of the oxygen contained in the oxide insulating films 85a and 85b can be efficiently moved to the oxide semiconductor films 1 7a and 17b, and the amount of oxygen deficiency in the oxide semiconductor films 17a and 17b can be reduced. Also, the nitride insulating film 15a and the nitride insulating film 87 have a low diffusion coefficient for water, hydrogen, etc., and a barrier property against water, hydrogen, etc., so that diffusion of water, hydrogen, etc. from the outside to the oxide semiconductor films 17a and 17b can be prevented. As a result, the transistors 440a and 440b become highly reliable transistors.

[0322] Next, the manufacturing process of the display device of this embodiment including the transistors 440a and 440b will be described with reference to FIGS. 13 to 15.

[0323] In addition, in FIG. 13 to FIG. 15, the cross-sectional view in the channel length direction indicated by A7-B7 and the cross-sectional view in the channel length direction indicated by C7 A method for manufacturing the transistor 440a will be described with reference to a cross-sectional view in the channel width direction shown in FIG. A method for manufacturing the transistor 440b will be described using the cross-sectional view in the channel length direction shown in A8-B8. Explain.

[0324] In addition, in a cross-sectional view of the transistor 440b in the channel width direction, the gate The transistor 440a is the same as the transistor 440a except that it does not have a gate electrode 91 in contact with the electrode 13a. do.

[0325] The transistors 440a and 440b are formed by the steps shown in FIGS. Through similar steps, gate electrodes 13a and 13b, a nitride insulating film 15a, and an oxide film 16 are formed on the substrate 11. the oxide semiconductor film 17a, 17b; the pair of electrodes 20a, 20b; In this process, the first photomask to the third photomask are formed. A photolithography process is carried out using a photomask.

[0326] Next, as shown in FIG. 13A, the oxide insulating film 22 and the oxide insulating film 24 are formed. Next, heat treatment is performed to remove part of oxygen contained in the oxide insulating film 24 from the oxide semiconductor film 1. The oxide semiconductor film 17a and the oxide semiconductor film 17b are transferred by the heat treatment. The amount of oxygen vacancies contained in the films 17a and 17b can be reduced.

[0327] Next, a fourth photomask is used in a photolithography process to form an oxide insulating film 24 After forming a mask on the oxide insulating film 22, a part of the oxide insulating film 24 is etched. The oxide insulating films 83a and 83b and the oxide insulating film 85a are separated for each transistor. Form 85b. Note that together with the etching of the oxide insulating film 24, a part of the oxide insulating film 14b is also etched to form the oxide insulating film 15b. As a result, as shown in FIG. 13(B), the nitride insulating film 15a is exposed. That is, the insulating film 15 having a step is formed .

[0328] Next, form the nitride insulating film 86 shown in FIG. 14(A). In this step, in the cross-sectional view of the transistor 440a in the channel width direction shown in C7-D 7, the nitride insulating film 15a and the nitride insulating film 86 are in contact. That is, the oxide semiconductor film 17a and the oxide insulating film 85a are surrounded by the nitride insulating film 15a and the nitride insulating film 86.

[0329] Although not shown, by forming the nitride insulating film 86, also in the cross-sectional view of the transistor 440b in the channel width direction, the oxide semiconductor film 17b and the oxide insulating film 85b are surrounded by the nitride insulating film 15a and the nitride insulating film 86.

[0330] Next, after forming a mask on the nitride insulating film 86 by a photolithography process using a fifth photomask, a part of the nitride insulating film 86 is etched to form the opening 95. Also, a part of the nitride insulating film 15a and the nitride insulating film 86 is etched to form the opening 96 (see FIG. 14(B)).

[0331] After that, as shown in FIG. 15(A), later form the conductive film 90 that will become the gate electrode 91 and the electrode 92 of the transistor 440a. The conductive film 90 can be formed in the same manner as the conductive film 30 shown in Embodiment 1.

[0332] ​​​​​​Next, a mask is formed on the conductive film 90 by a photolithography process using a sixth photomask. Next, a part of the conductive film 90 is etched using the mask to form a gate electrode. Then, the mask 91 and the electrode 92 are formed. After that, the mask is removed (see FIG. 15(B)).

[0333] As shown in FIG. 15B, in a cross-sectional view in the channel width direction of the transistor 440a, The oxide semiconductor film 17a is formed on the side surfaces of the oxide insulating film 83a and the oxide insulating film 85a. A gate electrode 91 is formed so as to face the side surface of the semiconductor substrate 90 .

[0334] After that, heat treatment may be performed. The nitride insulating film 15 is formed of an oxide insulating film containing more oxygen than the oxygen that fills the gap. a and the nitride insulating film 87 have high barrier properties against oxygen. In this case, the diffusion of oxygen contained in the oxide insulating films 85a and 85b to the outside can be reduced. In addition, the diffusion of oxygen contained in the oxide semiconductor films 17a and 17b to the outside can be reduced. As a result, oxygen vacancies in the oxide semiconductor films 17a and 17b can be reduced. Furthermore, the nitride insulating film 15a and the nitride insulating film 87 have a barrier property against hydrogen, water, etc. and reducing the diffusion of hydrogen, water, and the like from the outside into the oxide semiconductor films 17a and 17b. As a result, hydrogen, water, and the like in the oxide semiconductor films 17a and 17b can be reduced. As a result, the transistors 440a and 440b can be manufactured with high reliability. It is possible.

[0335] Through the above steps, a display device including the transistor 440a and the transistor 440b is manufactured. It can be made.

[0336] As described above, the configurations, methods, etc. shown in this embodiment can be used in appropriate combination with the configurations, methods, etc. shown in other embodiments.

[0337] (Embodiment 3) In the selection transistor and the drive transistor shown in Embodiment 1 and Embodiment 2, if necessary, an underlayer insulating film can be provided between the substrate 11 and the gate electrodes 13a and 13b. Examples of the underlayer insulating film include silicon oxide, silicon oxynitride, silicon nitride, silicon oxynitride, gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide, aluminum oxynitride, etc. Note that by using silicon nitride, gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide, etc. as the underlayer insulating film, diffusion of impurities, typically oxides of alkali metals, water, hydrogen, etc., from the substrate 11 into the oxide semiconductor films 17a and 17b can be suppressed.

[0338] The underlayer insulating film can be formed by a sputtering method, a CVD method, or the like.

[0339] Note that the configurations and methods shown in this embodiment can be used in appropriate combination with the configurations and methods shown in other embodiments.

[0340] (Embodiment 4) In this embodiment, a display device in which the transistor 400a and the transistor 400b shown in FIG. 2 are used and the oxide semiconductor films 17a and 17b and the pair of electrodes 20a and 20b, and the oxide semiconductor film 17b and the pair of electrodes 20c and 20d have different forms will be described with reference to FIG. 19. Note that this embodiment can be appropriately applied to other transistors.

[0341] ​​​​​​ As a pair of electrodes provided in the transistor, conductive materials such as tungsten, titanium, aluminum, copper, molybdenum, chromium, or tantalum, either single element or alloy, which easily combine with oxygen, can be used. As a result, oxygen contained in the oxide semiconductor films 17a and 17b combines with the conductive materials contained in the electrodes 20a to 20d, and oxygen-deficient regions are formed in the oxide semiconductor films 17a and 17b. Also, in some cases, a part of the constituent elements of the conductive material for forming the electrodes 20a to 20d on the oxide semiconductor films 17a and 17b may be mixed in. As a result of these, as shown in FIG. 19, in the oxide semiconductor films 17a and 17b, low-resistance regions 21a to 21d are formed in the vicinity of the regions in contact with the electrodes 20a to 20d. Specifically, the low-resistance regions 21a and 21b are in contact with the pair of electrodes 20a and 20b respectively, and are formed between the insulating film 15 and the pair of electrodes 20a and 20b. Also, the low-resistance regions 21c and 21d are in contact with the pair of electrodes 20c and 20d respectively, and are formed between the insulating film 15 and the

[0342] pair of electrodes 20c and 20d. Since the low-resistance regions 21a to 21d have high conductivity, it is possible to reduce the contact resistance between the oxide semiconductor films 17a and 17b and the electrodes 20a to 20d, and it

[0343] is possible to increase the on-current of the transistor. Note that the ends of the low-resistance regions 21a and 21b may substantially coincide with the ends of the pair of electrodes 20a and 20b. Or, as shown in FIG. 19, the ends of the low-resistance regions 21a and 21b may be located inside the ends of the pair of electrodes 20a and 20b. Similarly, the As shown, the ends of the low-resistance regions 21c and 21d may be located inside the ends of the pair of electrodes 20c and 20d. In the oxide semiconductor films 17a and 17b, when the low-resistance regions 21a to 21d are formed, the channel length is the distance between the low-resistance regions at the interface between the oxide semiconductor film and the insulating film 28. It becomes.

[0344] Further, the electrodes 20a to 20d may have a laminated structure of a conductive material that easily binds to the oxygen and a conductive material that hardly binds to oxygen, such as titanium nitride, tantalum nitride, and ruthenium. By having such a laminated structure, it is possible to prevent the oxidation of the electrodes 20a to 20d at the interface between the electrodes 20a to 20d and the oxide insulating film 23, and it is possible to suppress the increase in resistance of the electrodes 20a to 20d. resistance.

[0345] Note that the configurations and methods shown in this embodiment can be used in appropriate combination with the configurations and methods shown in other embodiments.

[0346] (Embodiment 5) In this embodiment, a display device having a transistor capable of further reducing the amount of defects in the oxide semiconductor film will be described with reference to the drawings as compared with Embodiments 1 to 4. The transistor described in this embodiment is different in that it has a multilayer film including a plurality of oxide semiconductor films as compared with Embodiments 1 to 4.

[0347] FIGS. 20(A1) to 20(C2) show a top view and a cross-sectional view of a transistor 105a and a transistor 105b included in a display device. The transistor 105a is a transistor that functions as a drive transistor for a light-emitting element included in a pixel. Further, the transistor ​​​​​​​​​​105b is a transistor that functions as a pixel selection transistor.

[0348] FIG. 20(A1) is a top view of the transistor 105a, and FIG. 20(A2) is a top view of the transistor 105b. FIG. 20(B) is a cross-sectional view between the dashed-dotted line A10 - B10 in FIG. 20(A1) and a cross-sectional view between the dashed-dotted line A11 - B11 in FIG. 20(A2), and FIG. 20(C 1) is a cross-sectional view between the dashed-dotted line C10 - D10 in FIG. 20(A1), and FIG. 20(C2) is a cross-sectional view between the dashed-dotted line C11 - D11 in FIG. 20(A2). Note that in FIGS. 20(A1) and 20(A2), for clarity, the substrate 11, the insulating film, etc. are omitted.

[0349] The transistor 105a and the transistor 105b included in the display device shown in FIG. 20 differ in that they each have a multilayer film 98a and a multilayer film 98b between the insulating film 15 and the insulating film 28, compared with the transistor 400a and the transistor 400 b included in the display device shown in FIG. 2. Other configurations are the same as those in FIG. 2, and the previous description can be referred to.

[0350] In the transistor 105a shown in this embodiment, the multilayer film 98a has an oxide semiconductor film 17a and an oxide semiconductor film 97a. Also, in the transistor 105b, the multilayer film 98b has an oxide semiconductor film 17b and an oxide semiconductor film 97b. That is, the multilayer films 9 8a and 98b each have a two-layer structure.

[0351] In the transistor 105a, a part of the oxide semiconductor film 17a functions as a channel region, and in the transistor 105b, a part of the oxide semiconductor film 17b functions as a channel region. ​In addition, an oxide insulating film 23 is formed so as to be in contact with the multilayer film 98a and the multilayer film 98b, and an oxide insulating film 25 is formed so as to be in contact with the oxide insulating film 23. That is, an oxide semiconductor film 97a is provided between the oxide semiconductor film 17a and the oxide insulating film 23, and an oxide semiconductor film 97b is provided between the oxide semiconductor film 17b and the oxide insulating film 23. That is, an oxide semiconductor film 97a is provided between the oxide semiconductor film 17a and the oxide insulating film 23, and an oxide semiconductor film 97b is provided between the oxide semiconductor film 17b and the oxide insulating film 23. That is, an oxide semiconductor film 97a is provided between the oxide semiconductor film 17a and the oxide insulating film 23, and an oxide semiconductor film 97b is provided between the oxide semiconductor film 17b and the oxide insulating film 23. That is, an oxide semiconductor film 97a is provided between the oxide semiconductor film 17a and the oxide insulating film 23, and an oxide semiconductor film 97b is provided between the oxide semiconductor film 17b and the oxide insulating film 23. That is, an oxide semiconductor film 97a is provided between the oxide semiconductor film 17a and the oxide insulating film 23, and an oxide semiconductor film 97b is provided between the oxide semiconductor film 17b and the oxide insulating film 23.

[0352] The oxide semiconductor films 97a and 97b are oxide semiconductor films composed of one or more of the elements constituting the oxide semiconductor films 17a and 17b. Therefore, interface scattering hardly occurs at the interface between the oxide semiconductor film 17a and the oxide semiconductor film 97a and at the interface between the oxide semiconductor film 17b and the oxide semiconductor film 97b. Accordingly, the movement of carriers is not inhibited at the interface, so that the field-effect mobility of the transistor is increased. The oxide semiconductor films 97a and 97b are oxide semiconductor films composed of one or more of the elements constituting the oxide semiconductor films 17a and 17b. Therefore, interface scattering hardly occurs at the interface between the oxide semiconductor film 17a and the oxide semiconductor film 97a and at the interface between the oxide semiconductor film 17b and the oxide semiconductor film 97b. Accordingly, the movement of carriers is not inhibited at the interface, so that the field-effect mobility of the transistor is increased. The oxide semiconductor films 97a and 97b are oxide semiconductor films composed of one or more of the elements constituting the oxide semiconductor films 17a and 17b. Therefore, interface scattering hardly occurs at the interface between the oxide semiconductor film 17a and the oxide semiconductor film 97a and at the interface between the oxide semiconductor film 17b and the oxide semiconductor film 97b. Accordingly, the movement of carriers is not inhibited at the interface, so that the field-effect mobility of the transistor is increased. The oxide semiconductor films 97a and 97b are oxide semiconductor films composed of one or more of the elements constituting the oxide semiconductor films 17a and 17b. Therefore, interface scattering hardly occurs at the interface between the oxide semiconductor film 17a and the oxide semiconductor film 97a and at the interface between the oxide semiconductor film 17b and the oxide semiconductor film 97b. Accordingly, the movement of carriers is not inhibited at the interface, so that the field-effect mobility of the transistor is increased. The oxide semiconductor films 97a and 97b are oxide semiconductor films composed of one or more of the elements constituting the oxide semiconductor films 17a and 17b. Therefore, interface scattering hardly occurs at the interface between the oxide semiconductor film 17a and the oxide semiconductor film 97a and at the interface between the oxide semiconductor film 17b and the oxide semiconductor film 97b. Accordingly, the movement of carriers is not inhibited at the interface, so that the field-effect mobility of the transistor is increased.

[0353] The oxide semiconductor film (hereinafter, the oxide semiconductor film 97) applied to the oxide semiconductor films 97a and 97b is formed of a metal oxide containing at least In or Zn, and typically, In-Ga oxide, In-Zn oxide, In-M-Zn oxide (M is Al, Ga, Y, Zr, La, Ce, or Nd), and the energy of the lower end of the conduction band of the oxide semiconductor film applied to the oxide semiconductor films 17a and 17b (hereinafter, the oxide semiconductor film 17) is closer to the vacuum level than that of the oxide semiconductor film 17. Typically, the difference between the energy of the lower end of the conduction band of the oxide semiconductor film 97 and the energy of the lower end of the conduction band of the oxide semiconductor film 17 is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or 0.15 eV or more, and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less. That is, the electron affinity of the oxide semiconductor film 97 and the oxide semiconductor film 17 The oxide semiconductor film (hereinafter, the oxide semiconductor film 97) applied to the oxide semiconductor films 97a and 97b is formed of a metal oxide containing at least In or Zn, and typically, In-Ga oxide, In-Zn oxide, In-M-Zn oxide (M is Al, Ga, Y, Zr, La, Ce, or Nd), and the energy of the lower end of the conduction band of the oxide semiconductor film applied to the oxide semiconductor films 17a and 17b (hereinafter, the oxide semiconductor film 17) is closer to the vacuum level than that of the oxide semiconductor film 17. Typically, the difference between the energy of the lower end of the conduction band of the oxide semiconductor film 97 and the energy of the lower end of the conduction band of the oxide semiconductor film 17 is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or 0.15 eV or more, and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less. That is, the electron affinity of the oxide semiconductor film 97 and the oxide semiconductor film 17 The oxide semiconductor film (hereinafter, the oxide semiconductor film 97) applied to the oxide semiconductor films 97a and 97b is formed of a metal oxide containing at least In or Zn, and typically, In-Ga oxide, In-Zn oxide, In-M-Zn oxide (M is Al, Ga, Y, Zr, La, Ce, or Nd), and the energy of the lower end of the conduction band of the oxide semiconductor film applied to the oxide semiconductor films 17a and 17b (hereinafter, the oxide semiconductor film 17) is closer to the vacuum level than that of the oxide semiconductor film 17. Typically, the difference between the energy of the lower end of the conduction band of the oxide semiconductor film 97 and the energy of the lower end of the conduction band of the oxide semiconductor film 17 is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or 0.15 eV or more, and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less. That is, the electron affinity of the oxide semiconductor film 97 and the oxide semiconductor film 17 The oxide semiconductor film (hereinafter, the oxide semiconductor film 97) applied to the oxide semiconductor films 97a and 97b is formed of a metal oxide containing at least In or Zn, and typically, In-Ga oxide, In-Zn oxide, In-M-Zn oxide (M is Al, Ga, Y, Zr, La, Ce, or Nd), and the energy of the lower end of the conduction band of the oxide semiconductor film applied to the oxide semiconductor films 17a and 17b (hereinafter, the oxide semiconductor film 17) is closer to the vacuum level than that of the oxide semiconductor film 17. Typically, the difference between the energy of the lower end of the conduction band of the oxide semiconductor film 97 and the energy of the lower end of the conduction band of the oxide semiconductor film 17 is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or 0.15 eV or more, and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less. That is, the electron affinity of the oxide semiconductor film 97 and the oxide semiconductor film 17 The oxide semiconductor film (hereinafter, the oxide semiconductor film 97) applied to the oxide semiconductor films 97a and 97b is formed of a metal oxide containing at least In or Zn, and typically, In-Ga oxide, In-Zn oxide, In-M-Zn oxide (M is Al, Ga, Y, Zr, La, Ce, or Nd), and the energy of the lower end of the conduction band of the oxide semiconductor film applied to the oxide semiconductor films 17a and 17b (hereinafter, the oxide semiconductor film 17) is closer to the vacuum level than that of the oxide semiconductor film 17. Typically, the difference between the energy of the lower end of the conduction band of the oxide semiconductor film 97 and the energy of the lower end of the conduction band of the oxide semiconductor film 17 is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or 0.15 eV or more, and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less. That is, the electron affinity of the oxide semiconductor film 97 and the oxide semiconductor film 17 The oxide semiconductor film (hereinafter, the oxide semiconductor film 97) applied to the oxide semiconductor films 97a and 97b is formed of a metal oxide containing at least In or Zn, and typically, In-Ga oxide, In-Zn oxide, In-M-Zn oxide (M is Al, Ga, Y, Zr, La, Ce, or Nd), and the energy of the lower end of the conduction band of the oxide semiconductor film applied to the oxide semiconductor films 17a and 17b (hereinafter, the oxide semiconductor film 17) is closer to the vacuum level than that of the oxide semiconductor film 17. Typically, the difference between the energy of the lower end of the conduction band of the oxide semiconductor film 97 and the energy of the lower end of the conduction band of the oxide semiconductor film 17 is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or 0.15 eV or more, and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less. That is, the electron affinity of the oxide semiconductor film 97 and the oxide semiconductor film 17 The oxide semiconductor film (hereinafter, the oxide semiconductor film 97) applied to the oxide semiconductor films 97a and 97b is formed of a metal oxide containing at least In or Zn, and typically, In-Ga oxide, In-Zn oxide, In-M-Zn oxide (M is Al, Ga, Y, Zr, La, Ce, or Nd), and the energy of the lower end of the conduction band of the oxide semiconductor film applied to the oxide semiconductor films 17a and 17b (hereinafter, the oxide semiconductor film 17) is closer to the vacuum level than that of the oxide semiconductor film 17. Typically, the difference between the energy of the lower end of the conduction band of the oxide semiconductor film 97 and the energy of the lower end of the conduction band of the oxide semiconductor film 17 is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or 0.15 eV or more, and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less. That is, the electron affinity of the oxide semiconductor film 97 and the oxide semiconductor film 17 The oxide semiconductor film (hereinafter, the oxide semiconductor film 97) applied to the oxide semiconductor films 97a and 97b is formed of a metal oxide containing at least In or Zn, and typically, In-Ga oxide, In-Zn oxide, In-M-Zn oxide (M is Al, Ga, Y, Zr, La, Ce, or Nd), and the energy of the lower end of the conduction band of the oxide semiconductor film applied to the oxide semiconductor films 17a and 17b (hereinafter, the oxide semiconductor film 17) is closer to the vacuum level than that of the oxide semiconductor film 17. Typically, the difference between the energy of the lower end of the conduction band of the oxide semiconductor film 97 and the energy of the lower end of the conduction band of the oxide semiconductor film 17 is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or 0.15 eV or more, and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less. That is, the electron affinity of the oxide semiconductor film 97 and the oxide semiconductor film 17 The oxide semiconductor film (hereinafter, the oxide semiconductor film 97) applied to the oxide semiconductor films 97a and 97b is formed of a metal oxide containing at least In or Zn, and typically, In-Ga oxide, In-Zn oxide, In-M-Zn oxide (M is Al, Ga, Y, Zr, La, Ce, or Nd), and the energy of the lower end of the conduction band of the oxide semiconductor film applied to the oxide semiconductor films 17a and 17b (hereinafter, the oxide semiconductor film 17) is closer to the vacuum level than that of the oxide semiconductor film 17. Typically, the difference between the energy of the lower end of the conduction band of the oxide semiconductor film 97 and the energy of the lower end of the conduction band of the oxide semiconductor film 17 is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or 0.15 eV or more, and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less. That is, the electron affinity of the oxide semiconductor film 97 and the oxide semiconductor film 17 The difference from the electron affinity is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or 0.15 eV or more, and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less.

[0354] The oxide semiconductor film 97 preferably contains In because it increases the carrier mobility (electron mobility). Therefore, it is preferable.

[0355] When the oxide semiconductor film 97 has Al, Ga, Y, Zr, La, Ce, or Nd in an atomic ratio higher than that of In, it may have the following effects. (1) Increase the energy gap of the oxide semiconductor film 97. (2) Decrease the electron affinity of the oxide semiconductor film 97. (3) Reduce the diffusion of impurities from the outside. (4) Compared with the oxide semiconductor film 17, the insulation property becomes higher. Moreover, since Ga, Y, Zr, La, Ce, or Nd is a metal element with a strong bonding force with oxygen, when having Ga, Y, Zr, La, Ce, or Nd in an atomic ratio higher than that of In, oxygen deficiency is less likely to occur.

[0356] When the oxide semiconductor film 97 is an In-M-Zn oxide, the atomic ratio of In and M excluding Zn and O is such that In is less than 50 atomic% and M is 50 atomic% or more, more preferably, In is less than 25 atomic% and M is 75 atomic% or more.

[0357] When the oxide semiconductor film 97 is an In-M-Zn oxide (M is Ga, Y, Zr, La, Ce, or Nd), compared with the oxide semiconductor film 17, the oxidation resistance is improved.

[0358] When the oxide semiconductor films 17 and 97 are In-M-Zn oxides (M is Ga, Y, Zr, La, Ce, or Nd), compared with the oxide semiconductor film 17, the oxidation resistance is improved. ​​The atomic ratio of M (Ga, Y, Zr, La, Ce, or Nd) contained in the oxide semiconductor film 97 is large, and typically, it is 1.5 times or more, preferably 2 times or more, more preferably 3 times or more higher than the above atoms contained in the oxide semiconductor film 17 in terms of atomic ratio.

[0359] Also, when the oxide semiconductor film 17 and the oxide semiconductor film 97 are In-M-Zn oxide (M is Al, Ga, Y, Zr, La, Ce, or Nd), for the oxide semiconductor film 97, In:M :Zn = x1:y1:z1 [atomic ratio], and for the oxide semiconductor film 17, In:M:Zn = x2: y2:z2 [atomic ratio], then y1 / x1 is larger than y2 / x2, preferably, y1 / x1 is 1.5 times or more than y2 / x2. More preferably, y1 / x1 is more than 2 times larger than y2 / x2, and more preferably, y1 / x1 is more than 3 times larger than y2 / x2. At this time, in the oxide semiconductor film, when y2 is equal to or more than x2, it is preferable because stable electrical characteristics can be imparted to the transistor using the oxide semiconductor film. However, when y2 becomes 3 times or more of x2, the field-effect mobility of the transistor using the oxide semiconductor film decreases, so it is preferable that y2 is less than 3 times of x2. However, when y2 becomes 3 times or more of x2, the field-effect mobility of the transistor using the oxide semiconductor film decreases, so it is preferable that y2 is less than 3 times of x2. However, when y2 becomes 3 times or more of x2, the field-effect mobility of the transistor using the oxide semiconductor film decreases, so it is preferable that y2 is less than 3 times of x2. However, when y2 becomes 3 times or more of x2, the field-effect mobility of the transistor using the oxide semiconductor film decreases, so it is preferable that y2 is less than 3 times of x2.

[0360] When the oxide semiconductor film 17 is In-M-Zn oxide (M is Ga, Y, Zr, La, Ce, or Nd), in the target used to form the oxide semiconductor film 17, when the atomic ratio of the metal elements is In:M:Zn = x1:y1:z1 then 、 x1 / y1 is 1 / 3 or more and 6 or less, and further, it is preferably 1 or more and 6 or less, and z1 / y1 is 1 / 3 or more and 6 or less, and further it is preferably 1 or more and 6 or less. By setting z1 / y1 to 1 or more and 6 or less, The CAAC-OS film is likely to be formed as the oxide semiconductor film 17. Representative examples of the atomic ratio of the metal elements of the target include In:M:Zn = 1:1:1, In:M:Zn = 1:1 :1.2, In:M:Zn = 3:1:2, etc.

[0361] When the oxide semiconductor film 97 is an In-M-Zn oxide (M is Ga, Y, Zr, La, Ce, or Nd), in the target used to form the oxide semiconductor film 97, if the atomic ratio of the metal elements is In:M:Zn = x2:y2:z2, then 、 x2 / y2 < x1 / y is less than 1, and z2 / y2 is preferably 1 / 3 or more and 6 or less, more preferably 1 or more and 6 or less. By setting z2 / y2 to 1 or more and 6 or less, the CAAC -OS film is likely to be formed as the oxide semiconductor film 97. Representative examples of the atomic ratio of the metal elements of the target include In:M:Zn = 1:3:2, In:M:Zn = 1:3:4, In:M:Zn = 1:3: 6, In:M:Zn = 1:3:8, etc.

[0362] Note that the atomic ratios of the oxide semiconductor film 17 and the oxide semiconductor film 97 each include a variation of plus or minus 40% of the above atomic ratios as an error.

[0363] The oxide semiconductor films 97a and 97b also function as damage mitigation films for the oxide semiconductor films 17a and 17b when forming the oxide insulating film 25 formed later. Therefore, the oxide insulating film 23 may not be provided, and the oxide insulating film 25 may be formed on the oxide semiconductor films 97a and 97b.

[0364] The thickness of the oxide semiconductor films 97a and 97b is 3 nm or more and 100 nm or less, preferably 3 n m or more and 50 nm or less. ​​​​​

[0365] In addition, the oxide semiconductor films 97a and 97b may have a non-crystalline structure, similar to the oxide semiconductor films 17a and 17b. For example, a non-crystalline structure may be used. The non-crystalline structure includes, for example, CAAC-OS (C xis Aligned Crystalline Oxide Semiconduc tor), a polycrystalline structure, a microcrystalline structure described later, or an amorphous structure.

[0366] The oxide semiconductor films 97a and 97b may have an amorphous structure, for example. The oxide semiconductor film with an amorphous structure has, for example, a disordered atomic arrangement and no crystal component. Or, the oxide film with an amorphous structure is, for example, a completely amorphous structure and has no crystal part.

[0367] Note that the oxide semiconductor film 17 and the oxide semiconductor film 97 may form a mixed film having two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. The mixed film may have, for example, any two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. Further, the mixed film may have, for example, a laminated structure of any two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region.

[0368]

[0368] Here, an oxide semiconductor film 97a and an oxide semiconductor film 97b are provided between the oxide semiconductor film 17a and the oxide insulating film 23, and between the oxide semiconductor film 17b and the oxide insulating film 23, respectively. Therefore, the oxide semiconductor films 97a and 97b and the oxide insulating Even if trap levels are formed due to impurities and defects between the edge film 23, there is a gap between the region where the trap levels are formed and the oxide semiconductor films 17a and 17b. As a result, electrons flowing through the oxide semiconductor films 17a and 17b are less likely to be trapped by the trap levels, and it is possible to increase the on-current of the transistor and enhance the field-effect mobility. Also, when electrons are trapped by the trap levels, these electrons become negative fixed charges. As a result, the threshold voltage of the transistor fluctuates. However, since there is a gap between the oxide semiconductor films 17a, 17b and the region where the trap levels are formed, it is possible to reduce the trapping of electrons at the trap levels, and reduce the fluctuation of the threshold voltage in the transistors 105a and 105b.

[0369] In addition, the oxide semiconductor films 97a, 97b can shield impurities from the outside, so it is possible to reduce the amount of impurities moving from the outside to the oxide semiconductor films 17a, 17b. Also, the oxide semiconductor films 97a, 97b are less likely to form oxygen deficiencies. Therefore, it is possible to reduce the impurity concentration and the amount of oxygen deficiency in the oxide semiconductor films 17a, 17b.

[0370] Note that the oxide semiconductor film 17 and the oxide semiconductor film 97 are not simply stacked, but are fabricated such that a continuous junction (here, a structure in which the energy at the lower end of the conduction band changes continuously between the films) is formed. That is, at the interface of each film, a stacked structure is formed in which there are no impurities that form defect levels such as trap centers and recombination centers. If, If impurities are mixed between the stacked oxide semiconductor film 17 and the oxide semiconductor film 97, the continuity of the energy band is lost, carriers are trapped or recombined at the interface, and disappear.

[0371] In order to form a continuous junction, it is necessary to continuously stack each film without exposing it to the atmosphere using a multi-chamber film-forming apparatus (sputtering apparatus) equipped with a load lock chamber. Each chamber in the sputtering apparatus should be evacuated to a high vacuum (to about 5×10 Pa to 1×10 Pa) using an adsorption type vacuum exhaust pump such as a cryopump to remove water and other impurities that would become impurities for the oxide semiconductor film as much as possible. Alternatively, it is preferable to combine a turbo molecular pump and a cold trap to prevent gas, especially gas containing carbon or hydrogen, from flowing back into the chamber from the exhaust system. -7 Pa to 1×10 -4 Pa). Alternatively, it is preferable to combine a turbo molecular pump and a cold trap to prevent gas, especially gas containing carbon or hydrogen, from flowing back into the chamber from the exhaust system. It is preferable to prevent gas, especially gas containing carbon or hydrogen, from flowing back into the chamber from the exhaust system. Note that instead of the multilayer films 98a and 98b, multilayer films 94a and 94b may be provided as in the transistors 106a and 106b shown in FIG. 21.

[0372] The transistor 106a functions as a driving transistor for a pixel, and the transistor 106b functions as a selection transistor for a pixel. The transistor 106a is a transistor that functions as a driving transistor for a pixel, and the transistor 106b is a transistor that functions as a selection transistor for a pixel. The transistor 106a is a transistor that functions as a driving transistor for a pixel, and the transistor 106b is a transistor that functions as a selection transistor for a pixel. The transistor 106b is a transistor that functions as a selection transistor for a pixel.

[0373] The multilayer film 94a has an oxide semiconductor film 99a, an oxide semiconductor film 17a, and an oxide semiconductor film 97a stacked in this order. The multilayer film 94b has an oxide semiconductor film 99b, an oxide semiconductor film The multilayer film 94b has a three-layer structure. Note that the multilayer film 94a and the multilayer film 94b are formed by the same process. In the transistor 106a, the oxide semiconductor film 17a functions as a channel region, and in the transistor 106b, the oxide semiconductor film 17b functions as a channel region. In the transistor 106a, the oxide semiconductor film 17a functions as a channel region, and in the transistor 106b, the oxide semiconductor film 17b functions as a channel region. In the transistor 106a, the oxide semiconductor film 17a functions as a channel region, and in the transistor 106b, the oxide semiconductor film 17b functions as a channel region.

[0374] In the transistors 106a and 106b, the insulating film 15 is in contact with the oxide semiconductor films 99a and 99b, respectively. That is, an oxide semiconductor film 99a or an oxide semiconductor film 99b is provided between the insulating film 15 and the oxide semiconductor film 17a or the oxide semiconductor film 17b. In the transistors 106a and 106b, the insulating film 15 is in contact with the oxide semiconductor films 99a and 99b, respectively. That is, an oxide semiconductor film 99a or an oxide semiconductor film 99b is provided between the insulating film 15 and the oxide semiconductor film 17a or the oxide semiconductor film 17b. In the transistors 106a and 106b, the insulating film 15 is in contact with the oxide semiconductor films 99a and 99b, respectively. That is, an oxide semiconductor film 99a or an oxide semiconductor film 99b is provided between the insulating film 15 and the oxide semiconductor film 17a or the oxide semiconductor film 17b. In the transistors 106a and 106b, the insulating film 15 is in contact with the oxide semiconductor films 99a and 99b, respectively. That is, an oxide semiconductor film 99a or an oxide semiconductor film 99b is provided between the insulating film 15 and the oxide semiconductor film 17a or the oxide semiconductor film 17b.

[0375] The oxide semiconductor films 97a and 97b are in contact with the oxide insulating film 23, respectively. That is, an oxide semiconductor film 97a or an oxide semiconductor film 97b is provided between the oxide semiconductor film 17a or the oxide semiconductor film 17b and the oxide insulating film 23. The oxide semiconductor films 97a and 97b are in contact with the oxide insulating film 23, respectively. That is, an oxide semiconductor film 97a or an oxide semiconductor film 97b is provided between the oxide semiconductor film 17a or the oxide semiconductor film 17b and the oxide insulating film 23. The oxide semiconductor films 97a and 97b are in contact with the oxide insulating film 23, respectively. That is, an oxide semiconductor film 97a or an oxide semiconductor film 97b is provided between the oxide semiconductor film 17a or the oxide semiconductor film 17b and the oxide insulating film 23.

[0376] For the oxide semiconductor films 99a and 99b (hereinafter, the oxide semiconductor film 99), which are applied to the oxide semiconductor films 99a and 99b, the same materials and formation methods as those of the oxide semiconductor film 97 can be appropriately used. For the oxide semiconductor films 99a and 99b (hereinafter, the oxide semiconductor film 99), which are applied to the oxide semiconductor films 99a and 99b, the same materials and formation methods as those of the oxide semiconductor film 97 can be appropriately used.

[0377] The oxide semiconductor films 99a and 99b are preferably thinner than the oxide semiconductor film 17a and the oxide semiconductor film 17b, respectively. By setting the thicknesses of the oxide semiconductor films 99a and 99b to be 1 nm or more and 5 nm or less, preferably 1 nm or more and 3 nm or less, it is possible to reduce the variation amount of the threshold voltage of the transistor. The oxide semiconductor films 99a and 99b are preferably thinner than the oxide semiconductor film 17a and the oxide semiconductor film 17b, respectively. By setting the thicknesses of the oxide semiconductor films 99a and 99b to be 1 nm or more and 5 nm or less, preferably 1 nm or more and 3 nm or less, it is possible to reduce the variation amount of the threshold voltage of the transistor. The oxide semiconductor films 99a and 99b are preferably thinner than the oxide semiconductor film 17a and the oxide semiconductor film 17b, respectively. By setting the thicknesses of the oxide semiconductor films 99a and 99b to be 1 nm or more and 5 nm or less, preferably 1 nm or more and 3 nm or less, it is possible to reduce the variation amount of the threshold voltage of the transistor. The oxide semiconductor films 99a and 99b are preferably thinner than the oxide semiconductor film 17a and the oxide semiconductor film 17b, respectively. By setting the thicknesses of the oxide semiconductor films 99a and 99b to be 1 nm or more and 5 nm or less, preferably 1 nm or more and 3 nm or less, it is possible to reduce the variation amount of the threshold voltage of the transistor.

[0378] Note that, like the transistors 105a and 105b, the transistor 106 The oxide semiconductor films 97a and 97b included in the transistors 106a and 106b are formed later. A film for reducing damage to the oxide semiconductor films 17a and 17b when the oxide insulating film 25 is formed. For this reason, the oxide insulating film 23 is not provided, and the oxide semiconductor films 97a and 97b are An oxide insulating film 25 may be formed thereon.

[0379] The transistor described in this embodiment has an oxide semiconductor film in which a channel is formed. The oxide semiconductor film 17a and the oxide semiconductor film 17b are formed between the oxide insulating film 23 and the oxide semiconductor film 17a. The oxide semiconductor film 97a and the oxide semiconductor film 97b are provided. The oxide insulating film 23 is provided with a layer 97a and an oxide semiconductor layer 97b. Even if a trap state is formed by the oxide semiconductor film, the region where the trap state is formed and the oxide semiconductor film There is a gap between the oxide semiconductor film 17a and the oxide semiconductor film 17b. Electrons flowing through the oxide semiconductor film 17a and the oxide semiconductor film 17b are not easily captured by the trap level. It is possible to increase the on-current of the transistor and to enhance the field effect mobility. In addition, when an electron is captured in a trap level, the electron becomes a negative fixed charge. As a result, the threshold voltage of the transistor changes. The oxide semiconductor film 17b is separated from the region where the trap level is formed by the semiconductor film 17a and the oxide semiconductor film 17b. Since there is a gap between the trap levels, it is possible to reduce the number of electrons captured in the trap levels. This can reduce fluctuations in the low voltage.

[0380] The oxide semiconductor films 97a and 97b have a function of blocking the intrusion of impurities. It has a function and can reduce the amount of impurities that enter the oxide semiconductor film 17a and the oxide semiconductor film 17b from the outside. Also, the oxide semiconductor film 97a and the oxide semiconductor film 97 b are less likely to form oxygen deficiencies. For the above reasons, the transistor shown in this embodiment can reduce the impurity concentration and the amount of oxygen deficiency in the oxide semiconductor film 17a and the oxide semiconductor film 17b.

[0381] Also, an oxide semiconductor film 99a and an oxide semiconductor film 99b are respectively provided between the insulating film 15 and the oxide semiconductor film 17a and the oxide semiconductor film 17b, and an oxide semiconductor film 9 7a and an oxide semiconductor film 99b are provided between the oxide semiconductor film 1 7a and the oxide semiconductor film 17b and the oxide insulating film 23. Therefore, the concentration of silicon or carbon in the vicinity of the interface between the oxide semiconductor films 99a, 9 9b and the oxide semiconductor films 17a, 17b, the concentration of silicon or carbon in the oxide semiconductor films 17a, 17b, or the concentration of silicon or carbon in the vicinity of the interface between the oxide semiconductor films 97a 97b and the oxide semiconductor films 17a, 17b can be reduced.

[0382] The transistor according to this embodiment having such a structure has extremely few defects in the multilayer film including the oxide semiconductor film in which the channel is formed, so the electrical characteristics of the transistor can be improved. Typically, the on-current can be increased and the field-effect mobility can be improved.

[0383] Also, in the BT stress test and the optical BT stress test, which are examples of stress tests, the amount of variation in the threshold voltage is small and the reliability is high.

[0383] <Band structure of the transistor> ​​Next, the multilayer film 98a provided in a of the transistor 105 shown in FIGS. 20(A1), 20(B), and 20(C1), and the multilayer film 94a provided in the transistor 106a shown in FIG. 21 will be described with reference to FIG. 22. Note that the multilayer film 98b provided in the transistor 105b has the same configuration as the multilayer film 98a. Also, the multilayer film 94b provided in the transistor 106b has the same configuration as the multilayer film 94a. Therefore, in the following description, the multilayer film 98a can be read as the multilayer film 98b, and the multilayer film 94a can be read as the multilayer film 94b. Here, as an example, indium-gallium-zinc oxide having an energy gap of 3.15 eV is used as the oxide semiconductor film 17a, and indium-gallium-zinc oxide having an energy gap of 3.5 eV is used as the oxide semiconductor film 97a. The energy gap was measured using a spectroscopic ellipsometer (UT-300, manufactured by HORIBA JOBIN YVON). The energy difference between the vacuum level and the upper end of the valence band (also referred to as the ionization potential) of the oxide semiconductor film 17a and the oxide semiconductor film 97a was 8 eV and 8.2 eV, respectively. The energy difference between the vacuum level and the upper end of the valence band was measured using an ultraviolet photoelectron spectroscopy (UPS) apparatus (VersaProbe, manufactured by PHI). Therefore, the energy difference between the vacuum level and the lower end of the conduction band (also referred to as the electron affinity) of the oxide semiconductor film 17a and the oxide semiconductor film 97a was 4.85 eV and 4.7 eV, respectively.

[0384]

[0385]

[0386] ​​​​​​​​​​​​​​That's it.

[0387] FIG. 22(A) schematically shows a part of the band structure of the multilayer film 98a. Here, the insulating film 15 and the oxide insulating film 23 are made of a silicon oxide film, and the case where the multilayer film 98a and the silicon oxide film are provided in contact with each other will be described. Note that EcI1 shown in FIG. 22(A) is the energy at the lower end of the conduction band of the silicon oxide film, EcS1 is the energy at the lower end of the conduction band of the oxide semiconductor film 17a, EcS2 is the energy at the lower end of the conduction band of the oxide semiconductor film 97a, and EcI2 is the energy at the lower end of the conduction band of the silicon oxide film. Also, EcI1 corresponds to the insulating film 15 shown in FIG. 20 (B), and EcI2 corresponds to the oxide insulating film 23 shown in FIG. 20(B). Corresponding.

[0388] As shown in FIG. 22(A), in the oxide semiconductor film 17a and the oxide semiconductor film 97a , the energy at the lower end of the conduction band changes smoothly without a barrier. In other words, it can also be said that it changes continuously. This is because the multilayer film 98a contains elements common to the oxide semiconductor film 17a, and oxygen moves mutually between the oxide semiconductor film 17a and the oxide semiconductor film 97a so that a mixed layer is formed. That can be said.

[0389] From FIG. 22(A), the oxide semiconductor film 17a of the multilayer film 98a becomes a well, and in the transistor using the multilayer film 98a, it can be seen that the channel region is formed in the oxide semiconductor film 17a. Note that since the energy at the lower end of the conduction band of the multilayer film 98a changes continuously , it can also be said that the oxide semiconductor film 17a and the oxide semiconductor film 97a are continuously joined. That is to say. It can be said.

[0390] Note that, as shown in Fig. 22(A), although trap levels may be formed in the vicinity of the interface between the oxide semiconductor film 97a and the oxide insulating film 23, the oxide semiconductor film 97a can be provided to separate the oxide semiconductor film 17a from the region where the trap levels are formed. However, when the energy difference between EcS1 and EcS2 is small, electrons in the oxide semiconductor film 17a can reach the trap levels across the energy difference. When electrons are trapped at the trap levels, negative fixed charges are generated on the surface of the insulating film, and the threshold voltage of the transistor shifts in the positive direction. Therefore, it is preferable to set the energy difference between EcS1 and EcS2 to 0.1 eV or more, preferably 0.15 eV or more, because fluctuations in the threshold voltage of the transistor are reduced and stable electrical characteristics are obtained. In the vicinity of the interface, trap levels may be formed due to impurities and defects. However, by providing the oxide semiconductor film 97a, the oxide semiconductor film 17a can be separated from the region where the trap levels are formed. However, when the energy difference between EcS1 and EcS2 is small, electrons in the oxide semiconductor film 17a can reach the trap levels across the energy difference. When electrons are trapped at the trap levels, negative fixed charges are generated on the surface of the insulating film, and the threshold voltage of the transistor shifts in the positive direction. Therefore, it is preferable to set the energy difference between EcS1 and EcS2 to 0.1 eV or more, preferably 0.15 eV or more, because fluctuations in the threshold voltage of the transistor are reduced and stable electrical characteristics are obtained. Note that, as shown in Fig. 22(A), although trap levels may be formed in the vicinity of the interface between the oxide semiconductor film 97a and the oxide insulating film 23, the oxide semiconductor film 97a can be provided to separate the oxide semiconductor film 17a from the region where the trap levels are formed. However, when the energy difference between EcS1 and EcS2 is small, electrons in the oxide semiconductor film 17a can reach the trap levels across the energy difference. When electrons are trapped at the trap levels, negative fixed charges are generated on the surface of the insulating film, and the threshold voltage of the transistor shifts in the positive direction. Therefore, it is preferable to set the energy difference between EcS1 and EcS2 to 0.1 eV or more, preferably 0.15 eV or more, because fluctuations in the threshold voltage of the transistor are reduced and stable electrical characteristics are obtained. Note that, as shown in Fig. 22(A), although trap levels may be formed in the vicinity of the interface between the oxide semiconductor film 97a and the oxide insulating film 23, the oxide semiconductor film 97a can be provided to separate the oxide semiconductor film 17a from the region where the trap levels are formed.

[0391] Fig. 22(B) schematically shows a part of the band structure of the multilayer film 98a, which is a modified example of the band structure shown in Fig. 22(A). Here, the insulating film 15 and the oxide insulating film 23 are made of silicon oxide film, and the case where the multilayer film 98a is provided in contact with the silicon oxide film will be described. Note that EcI1 shown in Fig. 22(B) indicates the energy of the lower end of the conduction band of the silicon oxide film, EcS1 indicates the energy of the lower end of the conduction band of the oxide semiconductor film 17a, and EcI2 indicates the energy of the lower end of the conduction band of the silicon oxide film. Also, EcI1 corresponds to the insulating film 15 shown in Fig. 20(B), and EcI2 corresponds to the oxide insulating film 23 shown in Fig. 20(B). In the transistor shown in Fig. 20(B), when a pair of electrodes 20a and 20b are formed, the multilayer Note that EcI1 shown in Fig. 22(B) indicates the energy of the lower end of the conduction band of the silicon oxide film, EcS1 indicates the energy of the lower end of the conduction band of the oxide semiconductor film 17a, and EcI2 indicates the energy of the lower end of the conduction band of the silicon oxide film. Also, EcI1 corresponds to the insulating film 15 shown in Fig. 20(B), and EcI2 corresponds to the oxide insulating film 23 shown in Fig. 20(B). In the transistor shown in Fig. 20(B), when a pair of electrodes 20a and 20b are formed, the multilayer Note that EcI1 shown in Fig. 22(B) indicates the energy of the lower end of the conduction band of the silicon oxide film, EcS1 indicates the energy of the lower end of the conduction band of the oxide semiconductor film 17a, and EcI2 indicates the energy of the lower end of the conduction band of the silicon oxide film.

[0392] In the transistor shown in Fig. 20(B), when a pair of electrodes 20a and 20b are formed, the multilayer Above the film 98a, that is, the oxide semiconductor film 97a may be etched. On the other hand, The upper surface of the oxide semiconductor film 17a may form a mixed layer with the oxide semiconductor film 97a during the film formation of the oxide semiconductor film 97a.

[0393] For example, the oxide semiconductor film 17a is an oxide semiconductor film formed using an In-Ga-Zn oxide with In:Ga:Zn = 1:1:1 [atomic ratio] or an In-Ga-Zn oxide with In:Ga:Zn = 3:1:2 [atomic ratio] as a sputtering target, and the oxide semiconductor film 97a is an In-Ga-Zn oxide with In:Ga:Zn = 1:3:2 [atomic ratio], an In-Ga-Zn oxide with In:Ga:Zn = 1:3:4 [atomic ratio], or an In-Ga-Zn oxide with In:Ga:Zn = 1:3:6 [atomic ratio] formed using a sputtering target. In this case, since the Ga content of the oxide semiconductor film 97a is higher than that of the oxide semiconductor film 17a, a GaO layer or a mixed layer containing more Ga than the oxide semiconductor film 17a may be formed on the upper surface of the oxide semiconductor film 17a. x

[0394] Therefore, even when the oxide semiconductor film 97a is etched, the energy of the lower end of the conduction band on the EcS1 cI2 side becomes higher, and it may become like the band structure shown in Fig. 22(B).

[0395] When it becomes like the band structure shown in Fig. 22(B), the multilayer film 98a may appear to be only the oxide semiconductor film 17a during the cross-sectional observation of the channel region. However, substantially, on the oxide semiconductor film 17a, there is more Ga than the oxide semiconductor film 17a. ​​​​​​​​​​​​Since a mixed layer containing a large amount is formed, the mixed layer can be regarded as the 1.5th layer. In addition, the mixed layer can be confirmed by analyzing the composition above the oxide semiconductor film 17a when measuring the elements contained in the multilayer film 98a by, for example, EDX analysis or the like. For example, it can be confirmed by analyzing the composition above the oxide semiconductor film 17a when measuring the elements contained in the multilayer film 98a by, for example, EDX analysis or the like. For example, it can be confirmed that the composition above the oxide semiconductor film 17a has a configuration in which the content of Ga is higher than the composition in the oxide semiconductor film 17a.

[0396] FIG. 22(C) schematically shows a part of the band structure of the multilayer film 94a shown in FIG. 21. Here, the insulating film 15 and the oxide insulating film 23 are silicon oxide films, and the case where the multilayer film 94a is provided in contact with the silicon oxide film will be described. In FIG. 22(C), EcI1 represents the energy at the lower end of the conduction band of the silicon oxide film, EcS1 represents the energy at the lower end of the conduction band of the oxide semiconductor film 17a, EcS2 represents the energy at the lower end of the conduction band of the oxide semiconductor film 97a, EcS3 represents the energy at the lower end of the conduction band of the oxide semiconductor film 99a, and EcI 2 represents the energy at the lower end of the conduction band of the silicon oxide film. Also, EcI1 corresponds to the insulating film 15 shown in FIG. 21, and EcI2 corresponds to the oxide insulating film 23 shown in FIG. 21.

[0397] As shown in FIG. 22(C), in the oxide semiconductor film 99a, the oxide semiconductor film 17a, and the oxide semiconductor film 97a, the energy at the lower end of the conduction band changes smoothly without a barrier. In other words, it can also be said that it changes continuously. This is because the multilayer film 94a contains elements common to the oxide semiconductor film 17a, and oxygen moves mutually between the oxide semiconductor film 17a and the oxide semiconductor film 97 to form a mixed layer.

[0398] As shown in FIG. 22(C), the oxide semiconductor film 17a of the multilayer film 94a serves as a well, and in the transistor using the multilayer film 94a, it can be seen that the channel region is formed in the oxide semiconductor film 17a. Since the energy at the lower end of the conduction band of the multilayer film 94a changes continuously, it can also be said that the oxide semiconductor film 99a, the oxide semiconductor film 17a, and the oxide semiconductor film 97a are continuously joined. As shown in FIG. 22(C), the oxide semiconductor film 17a of the multilayer film 94a serves as a well, and in the transistor using the multilayer film 94a, it can be seen that the channel region is formed in the oxide semiconductor film 17a. Since the energy at the lower end of the conduction band of the multilayer film 94a changes continuously, it can also be said that the oxide semiconductor film 99a, the oxide semiconductor film 17a, and the oxide semiconductor film 97a are continuously joined. As shown in FIG. 22(C), the oxide semiconductor film 17a of the multilayer film 94a serves as a well, and in the transistor using the multilayer film 94a, it can be seen that the channel region is formed in the oxide semiconductor film 17a. Since the energy at the lower end of the conduction band of the multilayer film 94a changes continuously, it can also be said that the oxide semiconductor film 99a, the oxide semiconductor film 17a, and the oxide semiconductor film 97a are continuously joined. As shown in FIG. 22(C), the oxide semiconductor film 17a of the multilayer film 94a serves as a well, and in the transistor using the multilayer film 94a, it can be seen that the channel region is formed in the oxide semiconductor film 17a. Since the energy at the lower end of the conduction band of the multilayer film 94a changes continuously, it can also be said that the oxide semiconductor film 99a, the oxide semiconductor film 17a, and the oxide semiconductor film 97a are continuously joined.

[0399] Although trap levels due to impurities and defects may be formed near the interfaces between the multilayer film 94a and the oxide insulating film 23 and between the multilayer film 94a and the insulating film 15, as shown in FIG. 22(C), by providing the oxide semiconductor films 97a and 99a, the oxide semiconductor film 17a can be separated from the region where the trap levels are formed. However, when the energy difference between EcS1 and EcS2 and the energy difference between EcS1 and EcS3 are small, electrons in the oxide semiconductor film 17a may reach the trap levels by exceeding the energy difference. When electrons are trapped in the trap levels, negative fixed charges are generated on the surface of the insulating film, and the threshold voltage of the transistor shifts in the positive direction. Therefore, when the energy difference between EcS1 and EcS2 and the energy difference between EcS1 and EcS3 are 0.1 eV or more, preferably 0.15 eV or more, the variation in the threshold voltage of the transistor is reduced, and stable electrical characteristics are obtained, which is preferable. Although trap levels due to impurities and defects may be formed near the interfaces between the multilayer film 94a and the oxide insulating film 23 and between the multilayer film 94a and the insulating film 15, as shown in FIG. 22(C), by providing the oxide semiconductor films 97a and 99a, the oxide semiconductor film 17a can be separated from the region where the trap levels are formed. Although trap levels due to impurities and defects may be formed near the interfaces between the multilayer film 94a and the oxide insulating film 23 and between the multilayer film 94a and the insulating film 15, as shown in FIG. 22(C), by providing the oxide semiconductor films 97a and 99a, the oxide semiconductor film 17a can be separated from the region where the trap levels are formed. Although trap levels due to impurities and defects may be formed near the interfaces between the multilayer film 94a and the oxide insulating film 23 and between the multilayer film 94a and the insulating film 15, as shown in FIG. 22(C), by providing the oxide semiconductor films 97a and 99a, the oxide semiconductor film 17a can be separated from the region where the trap levels are formed. However, when the energy difference between EcS1 and EcS2 and the energy difference between EcS1 and EcS3 are small, electrons in the oxide semiconductor film 17a may reach the trap levels by exceeding the energy difference. When electrons are trapped in the trap levels, negative fixed charges are generated on the surface of the insulating film, and the threshold voltage of the transistor shifts in the positive direction. Therefore, when the energy difference between EcS1 and EcS2 and the energy difference between EcS1 and EcS3 are 0.1 eV or more, preferably 0.15 eV or more, the variation in the threshold voltage of the transistor is reduced, and stable electrical characteristics are obtained, which is preferable. Although trap levels due to impurities and defects may be formed near the interfaces between the multilayer film 94a and the oxide insulating film 23 and between the multilayer film 94a and the insulating film 15, as shown in FIG. 22(C), by providing the oxide semiconductor films 97a and 99a, the oxide semiconductor film 17a can be separated from the region where the trap levels are formed. However, when the energy difference between EcS1 and EcS2 and the energy difference between EcS1 and EcS3 are small, electrons in the oxide semiconductor film 17a may reach the trap levels by exceeding the energy difference. When electrons are trapped in the trap levels, negative fixed charges are generated on the surface of the insulating film, and the threshold voltage of the transistor shifts in the positive direction. Therefore, when the energy difference between EcS1 and EcS2 and the energy difference between EcS1 and EcS3 are 0.1 eV or more, preferably 0.15 eV or more, the variation in the threshold voltage of the transistor is reduced, and stable electrical characteristics are obtained, which is preferable. Although trap levels due to impurities and defects may be formed near the interfaces between the multilayer film 94a and the oxide insulating film 23 and between the multilayer film 94a and the insulating film 15, as shown in FIG. 22(C), by providing the oxide semiconductor films 97a and 99a, the oxide semiconductor film 17a can be separated from the region where the trap levels are formed. However, when the energy difference between EcS1 and EcS2 and the energy difference between EcS1 and EcS3 are small, electrons in the oxide semiconductor film 17a may reach the trap levels by exceeding the energy difference. When electrons are trapped in the trap levels, negative fixed charges are generated on the surface of the insulating film, and the threshold voltage of the transistor shifts in the positive direction. Therefore, when the energy difference between EcS1 and EcS2 and the energy difference between EcS1 and EcS3 are 0.1 eV or more, preferably 0.15 eV or more, the variation in the threshold voltage of the transistor is reduced, and stable electrical characteristics are obtained, which is preferable. Although trap levels due to impurities and defects may be formed near the interfaces between the multilayer film 94a and the oxide insulating film 23 and between the multilayer film 94a and the insulating film 15, as shown in FIG. 22(C), by providing the oxide semiconductor films 97a and 99a, the oxide semiconductor film 17a can be separated from the region where the trap levels are formed. However, when the energy difference between EcS1 and EcS2 and the energy difference between EcS1 and EcS3 are small, electrons in the oxide semiconductor film 17a may reach the trap levels by exceeding the energy difference. When electrons are trapped in the trap levels, negative fixed charges are generated on the surface of the insulating film, and the threshold voltage of the transistor shifts in the positive direction. Therefore, when the energy difference between EcS1 and EcS2 and the energy difference between EcS1 and EcS3 are 0.1 eV or more, preferably 0.15 eV or more, the variation in the threshold voltage of the transistor is reduced, and stable electrical characteristics are obtained, which is preferable. Although trap levels due to impurities and defects may be formed near the interfaces between the multilayer film 94a and the oxide insulating film 23 and between the multilayer film 94a and the insulating film 15, as shown in FIG. 22(C), by providing the oxide semiconductor films 97a and 99a, the oxide semiconductor film 17a can be separated from the region where the trap levels are formed. However, when the energy difference between EcS1 and EcS2 and the energy difference between EcS1 and EcS3 are small, electrons in the oxide semiconductor film 17a may reach the trap levels by exceeding the energy difference. When electrons are trapped in the trap levels, negative fixed charges are generated on the surface of the insulating film, and the threshold voltage of the transistor shifts in the positive direction. Therefore, when the energy difference between EcS1 and EcS2 and the energy difference between EcS1 and EcS3 are 0.1 eV or more, preferably 0.15 eV or more, the variation in the threshold voltage of the transistor is reduced, and stable electrical characteristics are obtained, which is preferable. Although trap levels due to impurities and defects may be formed near the interfaces between the multilayer film 94a and the oxide insulating film 23 and between the multilayer film 94a and the insulating film 15, as shown in FIG. 22(C), by providing the oxide semiconductor films 97a and 99a, the oxide semiconductor film 17a can be separated from the region where the trap levels are formed. However, when the energy difference between EcS1 and EcS2 and the energy difference between EcS1 and EcS3 are small, electrons in the oxide semiconductor film 17a may reach the trap levels by exceeding the energy difference. When electrons are trapped in the trap levels, negative fixed charges are generated on the surface of the insulating film, and the threshold voltage of the transistor shifts in the positive direction. Therefore, when the energy difference between EcS1 and EcS2 and the energy difference between EcS1 and EcS3 are 0.1 eV or more, preferably 0.15 eV or more, the variation in the threshold voltage of the transistor is reduced, and stable electrical characteristics are obtained, which is preferable. Although trap levels due to impurities and defects may be formed near the interfaces between the multilayer film 94a and the oxide insulating film 23 and between the multilayer film 94a and the insulating film 15, as shown in FIG. 22(C), by providing the oxide semiconductor films 97a and 99a, the oxide semiconductor film 17a can be separated from the region where the trap levels are formed. However, when the energy difference between EcS1 and EcS2 and the energy difference between EcS1 and EcS3 are small, electrons in the oxide semiconductor film 17a may reach the trap levels by exceeding the energy difference. When electrons are trapped in the trap levels, negative fixed charges are generated on the surface of the insulating film, and the threshold voltage of the transistor shifts in the positive direction. Therefore, when the energy difference between EcS1 and EcS2 and the energy difference between EcS1 and EcS3 are 0.1 eV or more, preferably 0.15 eV or more, the variation in the threshold voltage of the transistor is reduced, and stable electrical characteristics are obtained, which is preferable. Although trap levels due to impurities and defects may be formed near the interfaces between the multilayer film 94a and the oxide insulating film 23 and between the multilayer film 94a and the insulating film 15, as shown in FIG. 22(C), by providing the oxide semiconductor films 97a and 99a, the oxide semiconductor film 17a can be separated from the region where the trap levels are formed. However, when the energy difference between EcS1 and EcS2 and the energy difference between EcS1 and EcS3 are small, electrons in the oxide semiconductor film 17a may reach the trap levels by exceeding the energy difference. When electrons are trapped in the trap levels, negative fixed charges are generated on the surface of the insulating film, and the threshold voltage of the transistor shifts in the positive direction. Therefore, when the energy difference between EcS1 and EcS2 and the energy difference between EcS1 and EcS3 are 0.1 eV or more, preferably 0.15 eV or more, the variation in the threshold voltage of the transistor is reduced, and stable electrical characteristics are obtained, which is preferable.

[0400] The configurations and methods shown in this embodiment can be used in appropriate combination with the configurations and methods shown in other embodiments. The configurations and methods shown in this embodiment can be used in appropriate combination with the configurations and methods shown in other embodiments.

[0401] (Embodiment 6) In this embodiment, the transistor included in the semiconductor device described in the above embodiment will be described in terms of one aspect applicable to an oxide semiconductor film.

[0402] The oxide semiconductor film is preferably composed of a CAAC-OS film. The CAAC-O S film includes crystals having c-axis orientation, but clear crystal grain boundaries (also referred to as grain boundaries) of the crystals cannot be confirmed. Crystals having c-axis orientation are difficult to etch, and in a channel etch type transistor, the over-etching amount of the oxide semiconductor film when forming a pair of electrodes is small. As a result, by forming the oxide semiconductor film with a CAAC-OS film, a channel etch type transistor can be manufactured. In particular, for a channel etch type transistor used as a driving transistor, the interval between a pair of electrodes, that is, the channel length, can be made as small as 0.5 μm or more and 4.5 μm or less. Moreover, the oxide semiconductor film may be composed of one or more of an oxide semiconductor having a single crystal structure (hereinafter referred to as a single crystal oxide semiconductor), an oxide semiconductor having a polycrystalline structure (hereinafter referred to as a polycrystalline oxide semiconductor), an oxide semiconductor having a microcrystalline structure (hereinafter referred to as a microcrystalline oxide semiconductor), and an oxide semiconductor having an amorphous structure (hereinafter referred to as an amorphous oxide semiconductor). Hereinafter, CAAC -OS, single crystal oxide semiconductor, polycrystalline oxide semiconductor, microcrystalline oxide semiconductor, and amorphous oxide semiconductor will be described.

[0403] (hereinafter referred to as an amorphous oxide semiconductor). Hereinafter, CAAC -OS, single crystal oxide semiconductor, polycrystalline oxide semiconductor, microcrystalline oxide semiconductor, and amorphous oxide semiconductor will be described.

[0404]

[0404] <caac-os> The CAAC-OS film is one of the oxide semiconductor films having a plurality of crystal parts. Also, the crystal parts included in the CA AC-OS film have c-axis orientation. In a plan-view TEM image, the area of the crystal 2 parts included in the CAA 2 C-OS film is 2500 nm or more, more preferably 5 μm 2 or more, and even more preferably 1000 μm or more. Also, in a cross-sectional TEM image, by having 50% or more, preferably 80% or more, and even more preferably 95% or more of the crystal parts, a thin film having physical properties close to those of a single crystal is obtained.

[0405] When the CAAC-OS film is observed by a transmission electron microscope (TEM: Transmission Elec tron Microscope), boundaries between distinct crystal parts, that is, grain boundaries (also referred to as grain boundaries) cannot be confirmed. Therefore, it can be said that in the C AAC-OS film, a decrease in electron mobility due to grain boundaries hardly occurs.

[0406] When the CAAC-OS film is observed by TEM from a direction substantially parallel to the sample surface (cross-sectional TEM observation), it can be confirmed that metal atoms are arranged in layers in the crystal parts. Each layer of the metal atoms has a shape that reflects the unevenness of the surface (also referred to as the formed surface) or the upper surface of the CAAC-OS film, and is arranged parallel to the formed surface or the upper surface of the CAAC-OS film. Here, in this specification, "parallel" means a state in which two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, the case of -5° or more and 5° or less is also included. Also, "perpendicular" means a state in which two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, the case of 85° or more and 95° or less is also included. In this specification, "parallel" means a state in which two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, the case of -5° or more and 5° or less is also included. Also, "perpendicular" means a state in which two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, the case of 85° or more and 95° or less is also included.

[0407] On the one hand, when the CAAC-OS film is observed by TEM from a direction approximately perpendicular to the sample surface (planar TEM observation), it can be confirmed that in the crystal part, metal atoms are arranged in a triangular or hexagonal shape. However, no regularity is observed in the arrangement of metal atoms between different crystal parts.

[0408] When electron beam diffraction is performed on the CAAC-OS film, spots (bright spots) showing orientation are observed.

[0409] From cross-sectional TEM observation and planar TEM observation, it can be seen that the crystal part of the CAAC-OS film has orientation.

[0410] When structural analysis is performed on the CAAC-OS film using an X-ray diffraction (XRD: X-Ray Diffraction) device, in the analysis by the out-of-plane method of the CAAC-OS film, a peak may appear at around a diffraction angle (2θ) of 31°. This peak is attributed to the (00x) plane (x is an integer) of the crystal of InGaZn oxide. Therefore, it can be confirmed that the crystal of the CAAC- OS film has c-axis orientation, and the c-axis is oriented in a direction approximately perpendicular to the formed surface or the upper surface.

[0411] On the other hand, in the analysis by the in-plane method in which X-rays are incident on the CAAC-OS film from a direction approximately perpendicular to the c-axis, a peak may appear at around 2θ of 56°. This peak is attributed to the (110) plane of the crystal of InGaZn oxide. If it is a single crystal oxide semiconductor film of InGaZn oxide, when analysis (φ scan) is performed while rotating the sample with the normal vector of the sample surface as the axis (φ axis) with 2θ fixed at around 56°, the crystal equivalent to the (110) plane is analyzed.​​​​​ Six peaks attributable to crystal planes are observed. In contrast, in the case of the CAAC-OS film, even when θ is fixed near 56° and φ scanning is performed, no distinct peak appears. Even when θ is fixed near 56° and φ scanning is performed, no distinct peak appears.

[0412] From the above, in the CAAC-OS film, the orientations of the a-axis and b-axis are irregular between different crystal parts, but it has c-axis orientation, and it can be seen that the c-axis is oriented in a direction parallel to the normal vector of the formed surface or the upper surface. Therefore, each layer of the metal atoms arranged in a layered manner confirmed by the above-mentioned cross-sectional TEM observation is a plane parallel to the a-b plane of the crystal. The crystal parts are formed when the CAAC-OS film is formed or when crystallization treatment such as heat treatment is performed. As described above, the c-axis of the crystal part is oriented in a direction parallel to the normal vector of the formed surface or the upper surface of the CAAC-OS film. Therefore, for example, when the shape of the CAAC-OS film is changed by etching or the like, the c-axis of the crystal part may not be parallel to the normal vector of the formed surface or the upper surface of the CAAC-OS film. The crystal parts are formed when the CAAC-OS film is formed or when crystallization treatment such as heat treatment is performed. As described above, the c-axis of the crystal part is oriented in a direction parallel to the normal vector of the formed surface or the upper surface of the CAAC-OS film. Therefore, for example, when the shape of the CAAC-OS film is changed by etching or the like, the c-axis of the crystal part may not be parallel to the normal vector of the formed surface or the upper surface of the CAAC-OS film. The crystal parts are formed when the CAAC-OS film is formed or when crystallization treatment such as heat treatment is performed. As described above, the c-axis of the crystal part is oriented in a direction parallel to the normal vector of the formed surface or the upper surface of the CAAC-OS film. Therefore, for example, when the shape of the CAAC-OS film is changed by etching or the like, the c-axis of the crystal part may not be parallel to the normal vector of the formed surface or the upper surface of the CAAC-OS film.

[0413] The crystal parts are formed when the CAAC-OS film is formed or when crystallization treatment such as heat treatment is performed. As described above, the c-axis of the crystal part is oriented in a direction parallel to the normal vector of the formed surface or the upper surface of the CAAC-OS film. Therefore, for example, when the shape of the CAAC-OS film is changed by etching or the like, the c-axis of the crystal part may not be parallel to the normal vector of the formed surface or the upper surface of the CAAC-OS film. The crystal parts are formed when the CAAC-OS film is formed or when crystallization treatment such as heat treatment is performed. As described above, the c-axis of the crystal part is oriented in a direction parallel to the normal vector of the formed surface or the upper surface of the CAAC-OS film. Therefore, for example, when the shape of the CAAC-OS film is changed by etching or the like, the c-axis of the crystal part may not be parallel to the normal vector of the formed surface or the upper surface of the CAAC-OS film. The crystal parts are formed when the CAAC-OS film is formed or when crystallization treatment such as heat treatment is performed. As described above, the c-axis of the crystal part is oriented in a direction parallel to the normal vector of the formed surface or the upper surface of the CAAC-OS film. Therefore, for example, when the shape of the CAAC-OS film is changed by etching or the like, the c-axis of the crystal part may not be parallel to the normal vector of the formed surface or the upper surface of the CAAC-OS film. The crystal parts are formed when the CAAC-OS film is formed or when crystallization treatment such as heat treatment is performed. As described above, the c-axis of the crystal part is oriented in a direction parallel to the normal vector of the formed surface or the upper surface of the CAAC-OS film. Therefore, for example, when the shape of the CAAC-OS film is changed by etching or the like, the c-axis of the crystal part may not be parallel to the normal vector of the formed surface or the upper surface of the CAAC-OS film. The crystal parts are formed when the CAAC-OS film is formed or when crystallization treatment such as heat treatment is performed. As described above, the c-axis of the crystal part is oriented in a direction parallel to the normal vector of the formed surface or the upper surface of the CAAC-OS film. Therefore, for example, when the shape of the CAAC-OS film is changed by etching or the like, the c-axis of the crystal part may not be parallel to the normal vector of the formed surface or the upper surface of the CAAC-OS film.

[0414]

[0415] In addition, the crystallinity in the CAAC-OS film does not have to be uniform. For example, when the crystal parts of the CAAC-OS film are formed by crystal growth from near the upper surface of the CAAC-OS film, the crystallinity in the region near the upper surface may be higher than that in the region near the formed surface. Also, when impurities are added to the CAAC-OS film, the crystallinity in the region where the impurities are added changes, and regions with different crystallinities may be formed locally.

[0415] In the analysis of the CAAC-OS film by the out-of-plane method, 2θ is 31°In addition to the nearby peaks, peaks may also appear in the vicinity of 2θ = 36°. When the peak near 2θ = 36° appears, it indicates that a crystal part without c-axis orientation is included in a part of the CAAC-OS film. The CAAC-OS film preferably shows a peak at around 2θ = 31° and does not show a peak at around 2θ = 36°.

[0416] The CAAC-OS film is an oxide semiconductor film with a low impurity concentration. Impurities are elements other than the main components of the oxide semiconductor film, such as hydrogen, carbon, silicon, and transition metal elements. In particular, elements with a stronger binding force with oxygen than the metal elements constituting the oxide semiconductor film, such as silicon, will disrupt the atomic arrangement of the oxide semiconductor film by taking oxygen from the oxide semiconductor film, resulting in a decrease in crystallinity. In addition, heavy metals such as iron and nickel, argon, carbon dioxide, etc., have a large atomic radius (or molecular radius), so when they are contained inside the oxide semiconductor film, they will disrupt the atomic arrangement of the oxide semiconductor film and become a factor in reducing crystallinity. Note that impurities contained in the oxide semiconductor film may become carrier traps or carrier generation sources.

[0417] Also, the CAAC-OS film is an oxide semiconductor film with a low defect level density. For example, oxygen vacancies in the oxide semiconductor film may become carrier traps or may become carrier generation sources by capturing hydrogen.

[0418] A low impurity concentration and a low defect level density (few oxygen vacancies) are called high-purity intrinsic or substantially high-purity intrinsic. An oxide semiconductor film with high-purity intrinsic or substantially high-purity intrinsic has few carrier generation sources, so the carrier density can be lowered. Therefore, A transistor using the oxide semiconductor film has less chance of having an electrical characteristic (also called normally-on) where the threshold voltage becomes negative. In addition, an oxide semiconductor film with high purity intrinsic or substantially high purity intrinsic has few carrier traps. Therefore, a transistor using the oxide semiconductor film has small fluctuations in electrical characteristics and becomes a highly reliable transistor. Note that the charge trapped in the carrier trap of the oxide semiconductor film takes a long time to be released and may behave like a fixed charge. Therefore, a transistor using an oxide semiconductor film with a high impurity concentration and a high defect level density may have unstable electrical characteristics.

[0419] In addition, a transistor using a CAAC-OS film has small fluctuations in electrical characteristics due to irradiation with visible light or ultraviolet light.

[0420] <Single crystal oxide semiconductor> A single crystal oxide semiconductor film is an oxide semiconductor film with a low impurity concentration and a low defect level density (with few oxygen deficiencies). Therefore, the carrier density can be lowered. Therefore, a transistor using a single crystal oxide semiconductor film has less chance of having normally-on electrical characteristics. In addition, since a single crystal oxide semiconductor film has a low impurity concentration and a low defect level density, the number of carrier traps may be reduced. Therefore, a transistor using a single crystal oxide semiconductor film has small fluctuations in electrical characteristics and becomes a highly reliable transistor.

[0421] Note that the density of the oxide semiconductor film increases when there are few defects. In addition, the density of the oxide semiconductor film increases when the crystallinity is high. Also, the oxide semiconductor film has a low concentration of impurities such as hydrogen.​​​​​The density increases. The single-crystalline oxide semiconductor film has a higher density than the CAAC-OS film. Also , the CAAC-OS film has a higher density than the microcrystalline oxide semiconductor film. Also, the polycrystalline oxide semiconductor film has a higher density than the microcrystalline oxide semiconductor film. Also, the microcrystalline oxide semiconductor film has a higher density than the amorphous oxide semiconductor film.

[0422] <Polycrystalline Oxide Semiconductor> In the observation image by TEM, crystal grains can be confirmed in the polycrystalline oxide semiconductor film. The crystal grains contained in the polycrystalline oxide semiconductor film are, for example, in the TEM observation image, 2 nm or more and 3 00 nm or less, 3 nm or more and 100 nm or less, or 5 nm or more and 50 nm or less in particle size. Also, in the observation image by TEM, grain boundaries may be confirmed in the polycrystalline oxide semiconductor film.

[0423] The polycrystalline oxide semiconductor film has a plurality of crystal grains, and the crystal orientations may be different between the plurality of crystal grains. Also, for the polycrystalline oxide semiconductor film, when structural analysis is performed using an XRD apparatus, for example, in the out-of-plane method analysis of a polycrystalline oxide semiconductor film having InGaZn oxide crystals, peaks near 2θ of 31°, peaks near 2θ of 36°, or other peaks may appear.

[0424] Since the polycrystalline oxide semiconductor film has high crystallinity, it may have high electron mobility. Therefore, a transistor using the polycrystalline oxide semiconductor film has high field-effect mobility. However, impurities may segregate at the grain boundaries of the polycrystalline oxide semiconductor film. Also, the grain boundaries of the polycrystalline oxide semiconductor film become defect levels. The polycrystalline oxide semiconductor film has grain boundaries Since it may serve as a carrier trap or a carrier generation source, when using a polycrystalline oxide semiconductor film The transistors used have larger fluctuations in electrical characteristics compared to transistors using a CAAC-OS film and may become transistors with low reliability.

[0425] <Microcrystalline Oxide Semiconductor> In the observation image by TEM, the crystal part may not be clearly confirmed in the microcrystalline oxide semiconductor film. The crystal parts contained in the microcrystalline oxide semiconductor film are often 1 nm or more and 100 nm or less, or 1 nm or more and 10 nm or less in size. In particular, nanocrystals (nc: nanocrystals) that are microcrystals of 1 nm or more and 10 nm or less, or 1 nm or more and 3 nm or less, An oxide semiconductor film having is called an nc-OS (nanocrystalline oxide semiconductor) film. Also, the nc-OS film For example, in the observation image by TEM, the grain boundaries may not be clearly confirmed.

[0426] The nc-OS film has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less). Also, the nc-OS film does not show regularity in the crystal orientation between different crystal parts. Therefore, no orientation is seen in the whole film. Therefore, depending on the analysis method, the nc-OS film may not be distinguishable from an amorphous oxide semiconductor film. For example, when performing structural analysis on an nc-OS film using an XRD apparatus that uses X-rays with a diameter larger than that of the crystal part, in the analysis by the out-of-plane method, peaks indicating crystal planes are not detected. Also, when performing electron beam diffraction (also called limited field of view electron beam diffraction) on the nc-OS film using an electron beam with a diameter larger than that of the crystal part (for example, 50 nm or more), a halo A diffraction pattern such as a low pattern is observed. On the other hand, for the nc-OS film, when electron beam diffraction (also referred to as nano-beam electron beam diffraction) is performed using an electron beam having a diameter close to or smaller than that of the crystal part (for example, 1 nm or more and 30 nm or less), spots are observed. Also, when nano-beam electron beam diffraction of the nc-OS film is performed, a region with high luminance may be observed in a circular (ring-shaped) pattern. Also, when nano-beam electron beam diffraction of the nc-OS film is performed, a plurality of spots may be observed within the ring-shaped region. When performing electron beam diffraction (also referred to as nano-beam electron beam diffraction) using an electron beam having a diameter close to or smaller than that of the crystal part (for example, 1 nm or more and 30 nm or less). spots are observed. Also, when nano-beam electron beam diffraction of the nc-OS film is performed, a region with high luminance may be observed in a circular (ring-shaped) pattern. When performing nano-beam electron beam diffraction of the nc-OS film, a region with high luminance may be observed in a circular (ring-shaped) pattern. Also, when nano-beam electron beam diffraction of the nc-OS film is performed, a plurality of spots may be observed within the ring-shaped region. A plurality of spots may be observed within the ring-shaped region.

[0427] The nc-OS film is an oxide semiconductor film with higher regularity than the amorphous oxide semiconductor film. Therefore, the nc-OS film has a lower density of defect levels than the amorphous oxide semiconductor film. However, the nc-OS film does not show regularity in the crystal orientation between different crystal parts. Therefore, the nc-OS film has a higher density of defect levels than the CAAC-OS film. Therefore, the nc-OS film has a lower density of defect levels than the amorphous oxide semiconductor film. However, the nc-OS film does not show regularity in the crystal orientation between different crystal parts. Therefore, the nc-OS film has a higher density of defect levels than the CAAC-OS film. The nc-OS film has a higher density of defect levels than the CAAC-OS film.

[0428] Note that the configurations and methods shown in this embodiment can be used in appropriate combination with the configurations and methods shown in other embodiments. Note that the configurations and methods shown in this embodiment can be used in appropriate combination with the configurations and methods shown in other embodiments.

[0429] (Embodiment 7) In the method for manufacturing the display device according to Embodiments 1 to 6, after forming the electrodes 20a to 20d on the oxide semiconductor films 17a and 17b, the oxide semiconductor films 17a and 17b can be exposed to plasma generated in an oxidizing atmosphere to supply oxygen to the oxide semiconductor films 17a and 17b. As the oxidizing atmosphere, there are atmospheres such as oxygen, ozone, nitrous oxide, and nitrogen dioxide. Further, in the plasma treatment, no bias is applied to the substrate 11 side. After forming the electrodes 20a to 20d on the oxide semiconductor films 17a and 17b, the oxide semiconductor films 17a and 17b can be exposed to plasma generated in an oxidizing atmosphere to supply oxygen to the oxide semiconductor films 17a and 17b. The oxide semiconductor films 17a and 17b can be exposed to plasma generated in an oxidizing atmosphere to supply oxygen to the oxide semiconductor films 17a and 17b. As the oxidizing atmosphere, there are atmospheres such as oxygen, ozone, nitrous oxide, and nitrogen dioxide. As the oxidizing atmosphere, there are atmospheres such as oxygen, ozone, nitrous oxide, and nitrogen dioxide. Further, in the plasma treatment, no bias is applied to the substrate 11 side. It is preferable to expose the oxide semiconductor films 17a and 17b to the plasma generated in this state. As a result , it is possible to supply oxygen without damaging the oxide semiconductor films 17a and 17b , and it is possible to reduce the amount of oxygen deficiency contained in the oxide semiconductor films 17a and 17b. Also , impurities remaining on the surfaces of the oxide semiconductor films 17a and 17b due to the etching process, for example , halogens such as fluorine and chlorine can be removed. Further, it is preferable to perform the plasma treatment while heating at 3 00°C or higher. Oxygen in the plasma combines with hydrogen contained in the oxide semiconductor films 17 a and 17b to form water. Since the substrate is heated, the water desorbs from the oxide semiconductor films 17 a and 17b. As a result, the hydrogen and water content contained in the oxide semiconductor films 17a and 17b can be reduced.

[0430] Note that the configurations and methods shown in this embodiment can be used in appropriate combination with the configurations and methods shown in other embodiments.

[0431] (Embodiment 8) In this embodiment, the configuration of a pixel included in a display device according to an aspect of the present invention will be described with reference to the drawings. Note that the same reference numerals are given to the same parts or parts having the same functions as those shown in the previous embodiments, and detailed descriptions thereof are omitted.

[0432] FIG. 23 shows an example of a circuit configuration that can be used for a pixel of a display device.

[0433] The pixel 603 shown in FIG. 23 includes a transistor 300b that functions as a selection transistor for controlling data writing of a data signal, and a transistor that functions as a driving transistor having a 300a transistor, a 300c transistor, a 370 capacitive element, and a 350 light-emitting element 。

[0434] One of the source electrode and the drain electrode of the transistor 300a functions as an anode line and is electrically connected to a wiring ANO1 that functions as an anode line, and the other of the source electrode and the drain electrode of the transistor 300a is electrically connected to one electrode of the light-emitting element 350. Further, the gate electrode of the transistor 300a is electrically connected to one of the source electrode and the drain electrode of the transistor 300b and one electrode of the capacitive element 370.

[0435] The transistor 300a has a function of controlling the current flowing through the light-emitting element 350 by being turned on or off. In the present embodiment, the transistor 300a has a channel length of 0.5 μm or more and 4.5 μm or less, and a first gate electrode and a second gate electrode that are respectively disposed on the upper layer and the lower layer of the oxide semiconductor film and are electrically connected to each other. That is, the transistor 300a is a transistor in which the on-current and the field-effect mobility are improved and the variation of the threshold voltage in the negative direction is suppressed.

[0436] The other of the source electrode and the drain electrode of the transistor 300b is electrically connected to a signal line SL to which a data signal is applied . Further, the gate electrode of the transistor 300b is electrically connected to a scanning line GL to which a gate signal is applied.

[0437] The transistor 300b has a function of controlling the writing of a data signal by being turned on or off. That is, the transistor 300b has a function as a selection transistor ​​​​​​

[0438] In this embodiment, the channel length of transistor 300b is greater than that of transistor 300a . Transistor 300b is a transistor in which the negative-direction shift (shift) of the threshold voltage is suppressed, and the value of the cutoff current is small.

[0439] One of the source electrode and the drain electrode of transistor 300c is electrically connected to wiring ML to which a reference potential of data is applied, and the other of the source electrode and the drain electrode of transistor 300c is electrically connected to one electrode of light-emitting element 350 and the other electrode of capacitor element 370. Furthermore, the gate electrode of transistor 300c is electrically connected to scanning line GL to which a gate signal is applied.

[0440] Transistor 300c has a function of adjusting the current flowing through light-emitting element 350. For example, by monitoring the current flowing through wiring ML when there are variations in the threshold voltage or the field-effect mobility of transistor 300a, or when transistor 300a deteriorates, the current flowing through light-emitting element 350 can be corrected. As the potential applied to wiring ML, for example, a voltage equal to or lower than the threshold voltage of light-emitting element 350 can be used.

[0441] In this embodiment, the channel length of transistor 300c is preferably made larger than that of transistor 300a, for example. Note that transistor 300c may have a single-gate structure or a dual-gate structure similar to transistor 300a. However, if transistor 300c has a single-gate structure, the first gate ​​​​​​​​​​​Since the region for connecting the first gate electrode and the second gate electrode can be deleted, the area of the transistor can be reduced. As a result, the aperture ratio of the pixel can be increased, which is preferable. One of the pair of electrodes of the capacitor element 370 is electrically connected to one of the source electrode and the drain electrode of the transistor 300b, and the gate electrode of the transistor 300a. The other of the pair of electrodes of the capacitor element 370 is electrically connected to the other of the source electrode and the drain electrode of the transistor 300c, and one of the electrodes of the light-emitting element 350.

[0442] In the configuration of the pixel 603 shown in FIG. 23, the capacitor element 370 functions as a holding capacitor for holding the written data. One of the pair of electrodes of the light-emitting element 350 is electrically connected to the other of the source electrode and the drain electrode of the transistor 300a, the other of the capacitor element 370, and the other of the source electrode and the drain electrode of the transistor 300c. The other of the pair of electrodes of the light-emitting element 350 is electrically connected to the wiring CAT that functions as a cathode.

[0443]

[0444] As the light-emitting element 350, for example, an organic electroluminescence element (organic EL element) or an inorganic EL element can be used.

[0445] In addition, a wiring ANO2 extending in a direction parallel to the wiring ML is provided. The wiring ANO2 is connected to the wiring ANO1 that functions as an anode line, and it is possible to reduce the wiring resistance of the wiring ANO1. As a result, in a display device using a large-area substrate, the voltage drop of the wiring

[0446] ​​​​​​​​​​​​It is possible to reduce the following and reduce the luminance unevenness of the display device.

[0447] Either the wiring ANO1, ANO2 or the wiring CAT is supplied with the high power supply potential VDD, and the other is supplied with the low power supply potential VSS. In the configuration shown in FIG. 23, the wiring ANO1, ANO2 is supplied with the high power supply potential VDD, and the wiring CAT is supplied with the low power supply potential VSS, respectively. is adopted.

[0448] In the display device having the pixel 603 of FIG. 23, the pixel 603 of each row is sequentially selected by the scanning line driving circuit, and the transistor 300b is turned on to write the data of the data signal.

[0449] The pixel 603 into which the data has been written becomes a holding state when the transistor 300b is turned off. Furthermore, since the transistor 300b is connected to the capacitive element 370, the written data can be held for a long time. Also, by the transistor 300a the amount of current flowing between the source electrode and the drain electrode is controlled, and the light emitting element 350 emits light with a luminance corresponding to the amount of current flowing.

[0450] Next, the configuration that can be used for the pixel 603 shown in FIG. 23 will be described below with reference to FIGS. 16 to 18. will be used for the following description.

[0451] FIG. 16 shows a part of the top view of the pixel circuit that can be used for the pixel 603. Also, FIG. 17 shows a cross section between the dashed-dotted line X1-X2 shown in FIG. 16, and FIG. 18 shows a cross section between the dashed-dotted lines X3-X4 and X5-X6 shown in FIG. 16, respectively. are represented.

[0452] In FIG. 16, the wiring GL that functions as a scanning line is in a direction substantially orthogonal to the signal line (left in the figure It is provided so as to extend in the right direction). The wiring SL that functions as a signal line is substantially orthogonal to the scanning line It is provided so as to extend in the direction (vertical direction in the figure) that it makes. The wiring ML to which the reference potential of data is given It is provided so as to extend in a direction parallel to the wiring SL. The wiring ANO2 that functions as an anode line It is provided so as to extend in a direction parallel to the wiring SL and the wiring ML.

[0453] The transistors 300a, 300b, and 300c are provided in the pixel 603. Note that , The transistors 300a, 300b, and 300c each have a conductive film that functions as a gate electrode , A gate insulating film, and an oxide semiconductor film in which a channel region is formed on the gate insulating film It is composed of a film and a conductive film that functions as a pair of electrodes. For example, in the transistor 300a, it is composed of a gate electrode 13a, a gate insulating film (not shown), an oxide semiconductor Film 17a and electrodes 20a and 20b.

[0454] Also, in the transistor 300b, it is composed of a gate electrode 13b, a gate insulating film (not shown) , An oxide semiconductor film 17b, and electrodes 20c and 20d.

[0455] Note that the configuration of the transistor 300c is not particularly mentioned, but it can have the same configuration as that shown in the transistor 30 0b.

[0456] Also, the electrode 13c is electrically connected to the electrode 20a at the opening 352a . Also, the electrode 20b is electrically connected to the pixel electrode 322 at the openings 354 and 356b . Also, the electrode 13d is electrically connected to the electrode at the openings 352b and 352c 20e.

[0457] Further, a gate electrode 13a is formed below the electrode 20b. The electrode 20b, the dielectric film formed on the gate electrode 13a, and the gate electrode 13a form a capacitor element. The capacitor element corresponds to the capacitor element 370 shown in

[0458] FIG. 23. Next, the cross-sections between the dashed-dotted lines X1-X2, X3-X4, and X5-X6 shown in

[0459] FIG. 16 will be described with reference to FIGS. 17 and 18. The pixels shown in FIGS. 17 and 18 include a substrate 11, gate electrodes 13a, 13b and electrodes 13c, 13d on the substrate 11, insulating films 306a, 306b formed on the substrate 11, the gate electrodes 13a, 13b, and the electrodes 13c, 13d, oxide semiconductor films 17a, 17b on the insulating films 306b, a pair of electrodes 20a, 20b and a pair of electrodes 20c, 20d provided on the oxide semiconductor films 17a, 17b respectively, an electrode 20e formed in the same process as the electrodes 20a to 20d, an oxide insulating film 314 formed on the oxide semiconductor films 17a, 17b, and the electrodes 20a to 20e, a nitride insulating film 316 formed on the oxide insulating film 314, a gate electrode 320 provided on the nitride insulating film 316 and formed at a position overlapping with the oxide semiconductor film 17a, an insulating film 318 provided on the nitride insulating film 316 and having an opening

[0460] 356a formed at a position overlapping with the oxide semiconductor film 17a, a pixel electrode 322 formed on the insulating film 318 in the same process as the gate electrode 320, and an insulating film 324 formed so as to cover the transistor and the end portion of the pixel electrode 322.Also, the insulating films 306a and 306b function as gate insulating films (the first gate insulating film in transistor 300a) of transistors 300a and 300b. The oxide insulating film 314 and the nitride insulating film 316 function as the second gate insulating film of transistor 300a.

[0461] Also, in the region sandwiched between the electrode 20b and the gate electrode 13a, the insulating films 306a and 306b function as dielectrics. That is, the electrode 20b, the insulating films 306a and 306b, and the gate electrode 13a form a capacitive element.

[0462] An EL layer 326 is formed on the pixel electrode 322 and the insulating film 324, and an electrode 328 is formed on the EL layer 326. Also, a light-emitting element 350 is formed by the pixel electrode 322, the EL layer 326, and the electrode 328. The EL layer 326 only needs to have a light-emitting layer containing at least a light-emitting substance, and functional layers such as a hole injection layer, a hole transport layer, an electron transport layer, an electron injection layer, and a charge generation layer may be formed in addition to the light-emitting layer. Electrons and holes are injected from a pair of electrodes (here, the pixel electrode 322 and the electrode 328) into the EL layer 326, and a current flows. Then, when the electrons and holes recombine, a light-emitting substance forms an excited state and can emit light when the excited state returns to the ground state.

[0463] Also, the insulating film 318 only needs to have a function of planarizing the unevenness formed under the pixel electrode 322, and can be formed using, for example, an organic insulating film or the like.

[0464] Also, the insulating film 324 functions to separate the EL layer 326 between adjacent pixels, that is, a partition wall. ​​​​​​​​​​​It has a function as... As the insulating film 324, it only needs to have insulation properties. For example, an organic insulating film or an inorganic insulating film can be used. As the organic insulating film, for example, polyimide resin, polyamide resin, acrylic resin, siloxane resin, epoxy resin, or phenolic resin, etc. can be used. As the inorganic insulating film, silicon oxide, silicon oxynitride, etc. can be used. In particular, by using a photosensitive organic resin material, it is preferable because it facilitates the production of the insulating film 324.

[0465] Also, on the insulating films 306a and 306b on the electrode 13c, an opening 352a is formed. The electrode 13c is connected to the electrode 20a through the opening 352a. Also, on the insulating films 306a and 306b on the electrode 13d, openings 352b and 352c are formed. The electrode 13d is connected to the electrode 20e through the openings 352b and 352c. By providing a plurality of openings such as the openings 352b and 352c formed on the electrode 13d, the contact resistance between the electrode 20e and the electrode 13d can be reduced. In FIG. 18, the case where two openings of the openings 352b and 352c are formed is illustrated, but it is not limited to this, and one opening or a plurality of three or more openings may be formed. to this, and one opening or a plurality of three or more openings may be formed. to this, and one opening or a plurality of three or more openings may be formed.

[0466] Also, on the insulating film 318 on the transistor 300a, an opening 356a is formed. By forming the opening 356a, the distance between the gate electrode 320 and the oxide semiconductor film 17a can be shortened. Therefore, the electric field from the gate electrode 320 can be suitably applied to the oxide semiconductor film 17a.

[0467] In addition, an opening 354 is formed in the oxide insulating film 314 and the nitride insulating film 316 on the electrode 20b. An opening 356b is formed in the insulating film 318 above the opening 354. The electrode 20b is electrically connected to the pixel electrode 322 through the openings 354 and 356b. Continued.

[0468] Note that as materials that can be used for the pixels shown in FIGS. 17 and 18, the descriptions shown in Embodiment 1 or Embodiment 2 can be incorporated.

[0469] Note that the configurations and methods shown in this embodiment, etc., can be used in appropriate combination with the configurations and methods shown in other embodiments. Continued.

[0470] (Embodiment 9) In this embodiment, an example of an active matrix type display device, which is one aspect of the present invention, will be described with reference to FIG. 24. Continued.

[0471] FIG. 24(A) is a top view of a display device according to one aspect of the present invention. FIG. 24(B) corresponds to a cross-sectional view taken along the chain double-dashed lines M1 - M2 and N1 - N2. Continued.

[0472] The active matrix type display device shown in FIGS. 24(A) and (B) has a light emitting portion 802, a driving circuit portion 803 (such as a gate line driving circuit), a driving circuit portion 804 (such as a signal line driving circuit), and a sealing material 805 on a support substrate 801. The light emitting portion 802 and the driving circuit portions 803 and 804 are sealed in a space 810 formed by the support substrate 801, a sealing substrate 806, and the sealing material 805. Continued. The driving circuit portion 803 and the driving circuit portion 804 are the transistors described in the above embodiment. Continued. Sealed.

[0473] The driving circuit portion 803 and the driving circuit portion 804 are the transistors described in the above embodiment. It may be formed using the configuration. Note that each drive circuit or the like may be divided and arranged on the opposing side sandwiching the pixel.

[0474] The light-emitting unit 802 shown in FIG. 24(B) is formed by a plurality of pixels including a first transistor (not shown) that functions as a selection transistor for controlling the writing of data of a data signal, and a second transistor 811 that functions as a drive transistor having a function of adjusting the current flowing through the light-emitting element. and a first electrode 831 electrically connected to the wiring (source electrode or drain electrode) of the second transistor 811.

[0475] The light-emitting element 840 has a top emission (upper surface emission) structure and is composed of a first electrode 831, an EL layer 833, and a second electrode 835. Further, an insulating film 839 that functions as a partition wall covering the end portion of the first electrode 831 is formed.

[0476] The transistor 811 has a dual gate structure and has a gate electrode 832 formed simultaneously with the first elect...

Claims

【Claim 1】 a first conductive film; a first insulating film having a region in contact with the upper surface of the first conductive film; a second insulating film having a region in contact with the upper surface of the first insulating film; an oxide semiconductor film having a region in contact with the upper surface of the second insulating film; a second conductive film having a region in contact with the upper surface of the oxide semiconductor film; a third insulating film having a region in contact with the upper surface of the oxide semiconductor film and a region in contact with the upper surface of the second conductive film; a fourth insulating film having a region in contact with the upper surface of the third insulating film; a fifth insulating film having a region in contact with the upper surface of the fourth insulating film; a third conductive film having a region in contact with the upper surface of the fifth insulating film, a region in contact with the upper surface of the first insulating film, and a region in contact with the upper surface of the first conductive film; a fourth conductive film having a region in contact with the first insulating film and a region in contact with the second conductive film; and the oxide semiconductor film has a channel formation region, the first conductive film has a region overlapping with the channel formation region, the third conductive film has a region overlapping with the channel formation region, the second conductive film has a region functioning as one of a source electrode or a drain electrode, the fourth conductive film has the same material as the third conductive film, a semiconductor device.

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