Static power converter and control method

Abstract

To efficiently reduce a low-order harmonic distortion component included in an output.SOLUTION: A power conversion device of a static power converter controls a power conversion device using a corrected current command value. A first command value generating unit corrects an output current command value using a correction value of the output current command value. The first command value generating unit generates an output current command value adjusted based on a reference value of an output voltage of the power conversion device such that the output voltage of the power conversion device becomes the reference value. A voltage deviation calculation unit calculates a deviation between the output voltage of the power conversion device and the reference value. A harmonic component detection unit detects the magnitude of a harmonic component included in the deviation in association with the order of a harmonic. A second command value generating unit generates a correction value of the output current command value such that the detected magnitude of the harmonic component becomes zero. A current command value correction unit corrects the output current command value using the correction value of the output current command value.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] This invention relates to a static power converter and a control method.

Background Art

[0002] In a static power converter that supplies power to a system, an LC filter circuit may be provided between the static power converter and the system to supply sinusoidal alternating current to a load. For example, this LC filter circuit may be formed to smooth the distortion components in the PWM frequency band corresponding to the PWM control period. By the way, when the triangular wave comparison method is applied to the PWM control of a static power converter, distortion (low-order harmonic distortion) of frequency components having a frequency lower than the PWM frequency band may occur in its output voltage. Since the amount of generation of this low-order harmonic distortion varies depending on the circuit constants and the state of the load, in compensation with a fixed compensation amount, the low-order harmonic distortion component may not be efficiently reduced. It has been desired to efficiently reduce the low-order harmonic distortion component included in the output of the static power converter.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] The problem to be solved by the present invention is to provide a static power converter and a control method capable of efficiently reducing the low-order harmonic distortion component included in the output.

Means for Solving the Problems

[0005] A static power converter according to an aspect of the embodiment includes a power conversion device and a control unit. The power conversion device can supply the AC power generated by power conversion to the load side. The control unit controls the power conversion device using a corrected current command value. The control unit includes a first command value generation unit, a voltage deviation calculation unit, a harmonic component detection unit, and a second command value generation unit. The first command value generation unit corrects the output current command value using a correction value of the output current command value. The first command value generation unit generates an output current command value adjusted such that the output voltage of the power conversion device becomes the reference value based on the reference value of the output voltage of the power conversion device. The voltage deviation calculation unit obtains a deviation between the output voltage of the power conversion device and its reference value. The harmonic component detection unit detects the magnitude of the harmonic component included in the deviation in association with the order of the harmonic. The second command value generation unit generates a correction value of the output current command value such that the magnitude of the detected harmonic component becomes zero. The current command value correction unit corrects the output current command value using the correction value of the output current command value.

Brief Description of the Drawings

[0006]

Figure 1

Figure 2

Figure 3

Figure 4

Mode for Carrying Out the Invention

[0007] Hereinafter, the static power converter and control method of the embodiment will be described. In the following description, being electrically connected may sometimes be simply referred to as "connected". The minute fixed value in the embodiment may include 0. Note that "based on XX" as used in this specification means "based at least on XX", and includes cases where it is based on another element in addition to XX. Further, "based on XX" is not limited to the case of directly using XX, and also includes cases based on something obtained by performing operations or processing on XX. "XX" is an arbitrary element (for example, arbitrary information).

[0008] FIG. 1 is a configuration diagram of the static power converter 1 of the embodiment.

[0009] The static power converter 1 includes a power conversion device 100 and a control unit 200.

[0010] The power conversion device 100 is an example of a power converter that generates AC power. For example, the power conversion device 100 is configured to be able to mutually convert DC power and AC power. The DC side of the power conversion device 100 is connected to the DC link DCL and receives DC power supply via the DC link DCL. On the AC side of the power conversion device 100, for example, it is connected to an AC power system 70 that exchanges three-phase AC power of the RST phase, and a load is connected via the AC power system 70. The connection terminal TB corresponding to the AC output of the power conversion device 100 is connected to the AC power system 70 via the main breaker 80. The AC power system 70 is a power system that relays AC power. The AC power system 70 is an example of a system.

[0011] On the AC power system 70, the primary sides of distribution breakers such as CB91, 92, 93,... (sometimes collectively referred to as breaker 9) are connected. On the secondary sides of each of the distribution breakers such as CB91, 92, 93,..., AC loads (not shown) are respectively connected. The type and capacity of the AC load are determined within a general range. Normally, each distribution breaker is in a conducting state, and AC power from the power conversion device 100 is supplied to each AC load via each distribution breaker.

[0012] For example, the power conversion device 100 includes a power conversion device main body 101, a smoothing capacitor 102, a current transformer (CT) 103, an AC reactor 104, a capacitor 105, a current transformer (CT) 106, and an instrument transformer 107.

[0013] The power conversion device main body 101 is configured as a power converter with a regeneration function. For example, the power conversion device main body 101 includes a plurality of semiconductor switching elements for each of the U-phase, V-phase, and W-phase, and is formed in a full-bridge type. Each phase's semiconductor switching element of the power conversion device main body 101 shown in the figure is, for example, a power MOSFET. There is no limitation on the type of semiconductor switching element, and it may be an IGBT (Insulated Gate Bipolar Transistor).

[0014] For example, the DC side of the power conversion device main body 101 is connected to a DC link DCL, and DC power is supplied via the DC link DCL. A smoothing capacitor 102 for smoothing the DC voltage of the DC link DCL is provided in the DC link DCL.

[0015] The power conversion device main body 101 generates AC power and supplies the AC power to a load via a connection terminal TB provided on the AC side thereof and an AC power system 70.

[0016] The power conversion device main body 101 supplies, for example, the generated three-phase AC power to the AC side thereof. The AC side of the power conversion device main body 101 is connected to an AC power system 111, and is connected to the primary side of the AC reactor 104 via the AC power system 111. The AC power system 111 is composed of three phases of U-phase, V-phase, and W-phase.

[0017] The secondary side of the AC reactor 104 is connected to the connection terminal TB via an AC power system 112. The AC power system 112 is composed of three phases of R-phase, S-phase, and T-phase. The connection terminal TB has terminals for each of the R-phase, S-phase, and T-phase.

[0018] The current transformer (CT) 103 is provided in the AC power system 111, detects the alternating current flowing in each of the U-phase, V-phase, and W-phase, and outputs I_U, I_V, and I_W of the detection results. The current transformer (CT) 106 is provided in the AC power system 112, detects the current flowing in each of the R-phase, S-phase, and T-phase, and outputs I_R, I_S, and I_T of the detection results.

[0019] The capacitors 105 are respectively provided between the phases of the R-phase, S-phase, and T-phase of the AC power system 112 and are connected in a Δ shape. A combination of the AC reactor 104 and the capacitors 105 forms an LC filter. The frequency characteristics of this LC filter are formed to reduce the components in the frequency band that depends on the control period of the PWM control, as will be described later.

[0020] The instrument transformer 107 is connected to the AC power system 112 and detects V_RS, V_ST, and V_TR of the line voltage of the AC power system 112.

[0021] The power conversion device 100 is controlled by a control unit 200 described later.

[0022] Referring to FIG. 2, the control unit 200 of the embodiment will be described. FIG. 2 is a schematic configuration diagram of the control unit 200 of the embodiment.

[0023] The control unit 200 has a plurality of control modes including a first control mode used for normal control and a second control mode used for control after an overcurrent is detected. The control unit 200 selects a suitable control mode based on the detected state and controls the power conversion device 100. "Normal" in the embodiment refers to a situation where no load short-circuit failure or the like has occurred. For example, in "normal", the current value flowing through the power conversion device 100 is within a predetermined range. On the other hand, a situation where a current of a magnitude exceeding this predetermined range is flowing is included in the "abnormal time" of this embodiment.

[0024] When the control unit 200 selects the first control mode, it performs AC voltage control based on the voltage feedback value and the first AC voltage command, and current control using the result of the AC voltage control and the current feedback value to generate a first AC voltage reference. For example, the "line-to-line voltage feedback values V_RS, V_ST, V_TR in the stationary coordinate system having R-axis, S-axis, and T-axis" described later is an example of the above voltage feedback value. The "voltage references ED_REF and EQ_REF in the rotating coordinate system" described later is an example of the above first AC voltage command. When the control unit 200 selects the second control mode, it generates a second AC voltage reference based on the second AC voltage command without using the above voltage feedback value and current feedback value. The "voltage references ED_REF_CL and EQ_REF_CL in the rotating coordinate system" described later is an example of the above second AC voltage command.

[0025] The control unit 200 includes, for example, a main control unit 210, a short-circuit current detection unit 220, an AC voltage reference generation unit 230, a switching unit 240, and a PWM control unit 250.

[0026] Note that the control unit 200 may be, for example, a functional unit realized by a processor included therein and the processor (computer) executing a program, and a part or all of it may be hardware. The details of each part included in the above control unit 200 will be described in order.

[0027] The main control unit 210 is mainly used in the first control mode and enables feedback control using the voltage feedback value and the current feedback value.

[0028] For example, the main control unit 210 includes arithmetic blocks 211 to 216 and an arithmetic block 210CMP.

[0029] The arithmetic block 211 acquires a reference phase THETA30 and line-to-line voltage feedback values V_RS, V_ST, and V_TR in a stationary coordinate system having R, S, and T axes. The coordinate axes (R axis, S axis, T axis) of the stationary coordinate system are provided with a phase difference of 120 degrees each. When a reference phase THETA is defined based on the coordinate axes of the stationary coordinate system, there is a 30-degree phase difference between the reference phase THETA and the reference phase THETA30. The arithmetic block 211 uses the reference phase THETA30 to convert the voltage feedback values V_RS, V_ST, and V_TR in the stationary coordinate system into voltage feedback values VD and VQ in a rotating coordinate system having orthogonal d and q axes, and outputs them. This conversion is a so-called dq conversion from a three-axis stationary coordinate system to a two-axis rotating coordinate system.

[0030] The arithmetic block 212 performs arithmetic processing for voltage control. For example, the arithmetic block 212 acquires a voltage reference ED_REF and EQ_REF in the rotating coordinate system, a d-axis voltage feedback value VD, and a q-axis voltage feedback value VQ in the rotating coordinate system. The arithmetic block 212 generates and outputs a d-axis current reference ID_REF such that the difference between the voltage reference ED_REF and the voltage feedback value VD becomes 0, and a q-axis current reference IQ_REF such that the difference between the voltage reference EQ_REF and the voltage feedback value VQ becomes 0.

[0031] The arithmetic block 213 acquires a reference phase THETA, a d-axis current reference ID_REF, and a q-axis current reference IQ_REF. The arithmetic block 213 uses the reference phase THETA to convert the d-axis current reference ID_REF and the q-axis current reference IQ_REF into current references IU_REF, IV_REF, and IW_REF in the stationary coordinate system, and outputs them. This conversion is the inverse conversion of the aforementioned dq conversion. Note that the descriptions of the arithmetic blocks 211 to 213 above show the main signals. In this embodiment, the arithmetic block 210CMP is used to reduce waveform distortion. Details of the arithmetic block 210CMP will be described later.

[0032] The arithmetic block 214 performs arithmetic processing for current control. For example, the arithmetic block 214 acquires the current references IU_REF, IV_REF, IW_REF in the stationary coordinate system and the current feedback values I_U, I_V, I_W in the stationary coordinate system. The arithmetic block 212 generates and outputs a U-phase voltage command VU_REF such that the difference between the current reference IU_REF and the current feedback value I_U becomes 0, a V-phase voltage command VV_REF such that the difference between the current reference IV_REF and the current feedback value I_V becomes 0, and a W-phase voltage command VW_REF such that the difference between the current reference IW_REF and the current feedback value I_W becomes 0.

[0033] The arithmetic block 215 acquires the line-to-line voltage feedback values V_RS, V_ST, V_TR, the U-phase voltage command VU_REF, the V-phase voltage command VV_REF, and the W-phase voltage command VW_REF. First, the arithmetic block 215 converts the line-to-line voltage feedback values V_RS, V_ST, V_TR into phase voltage feedback values V_R, V_S, V_T. The arithmetic block 215 adds the phase voltage feedback values V_R, V_S, V_T, the U-phase voltage command VU_REF, the V-phase voltage command VV_REF, and the W-phase voltage command VW_REF for each phase to generate phase voltage commands V_R1, V_S1, V_T1.

[0034] The arithmetic block 216 acquires the phase voltage commands V_R1, V_S1, V_T1 and a constant KPWM. The arithmetic block 216 multiplies the phase voltage commands V_R1, V_S1, V_T1 by the constant KPWM respectively to generate first AC voltage references V_R11, V_S11, V_T11. Through the processing of each of the above arithmetic blocks, the main control unit 210 generates the first AC voltage references V_R11, V_S11, V_T11.

[0035] The AC voltage reference generation unit 230 generates a voltage command to be applied during a predetermined period after overcurrent detection. For example, the AC voltage reference generation unit 230 acquires a reference phase THETA and voltage references ED_REF_CL and EQ_REF_CL in the rotating coordinate system. The voltage references ED_REF_CL and EQ_REF_CL may be constants with a predetermined magnitude.

[0036] The AC voltage reference generation unit 230 uses the reference phase THETA to convert the voltage references ED_REF_CL and EQ_REF_CL into the second AC voltage references V_R12, V_S12, and V_T12 and outputs them. This conversion is the same as the inverse conversion of the aforementioned dq conversion.

[0037] The short-circuit current detection unit 220 acquires the current feedback values I_R, I_S, and I_T in the stationary coordinate system and identifies the magnitude of the current based on these values (instantaneous values). For example, the short-circuit current detection unit 220 may identify that an overcurrent has occurred when any of the current feedback values I_R, I_S, and I_T exceeds a predetermined threshold ITH. When the short-circuit current detection unit 220 identifies that the situation is one where no overcurrent occurs (normal situation), it outputs 0 as the identification result, and when it identifies that the situation is one where a current has occurred (abnormal situation), it outputs 1 as the identification result.

[0038] The switching unit 240 switches between the first AC voltage references V_R11, V_S11, and V_T11 generated by the main control unit 210 and the second AC voltage references V_R12, V_S12, and V_T12 generated by the AC voltage reference generation unit 230 based on the identification result of the short-circuit current detection unit 220. When the identification result of the short-circuit current detection unit 220 is 0, the switching unit 240 selects the first AC voltage references V_R11, V_S11, and V_T11, and when the identification result of the short-circuit current detection unit 220 is 1, it selects the first AC voltage references V_R12, V_S12, and V_T12 and outputs the selection results as the AC voltage references V_R10, V_S10, and V_T10, respectively.

[0039] The PWM control unit 250 acquires the AC voltage references V_R10, V_S10, and V_T10 from the switching unit 240 and generates a pulse train obtained by modulating this by PWM control. For example, a triangular wave comparison method using a triangular wave carrier signal may be used for this PWM control. The generated pulse train is supplied to the power conversion device main body 101 as gate pulses for controlling the semiconductor switching elements (QU, QV, QW, QX, QY, QZ) that make up the power conversion device main body 101.

[0040] The stationary power converter 1 configured as described above has an LC filter circuit for supplying sinusoidal alternating current to a load. This LC filter is formed, for example, to reduce components in a frequency band that depends on the control period of PWM control. For this reason, the cut-off frequency of the LC filter may be selected relatively high as long as it can reduce the components in the frequency band that depends on the control period of PWM control.

[0041] By the way, when the triangular wave comparison method is used in the PWM control unit 250, due to constraints such as dead time to avoid interference during the conduction period of the semiconductor switching elements (QU, QV, QW, QX, QY, QZ) and the minimum pulse width of the gate pulse for driving the semiconductor switching elements (QU, QV, QW, QX, QY, QZ), distortion of low-order harmonics occurs in the output voltage of the power conversion device main body 101. The occurrence situation of these low-order harmonic distortions varies depending on the circuit constants and the state of the load.

[0042] For example, such low-order harmonics may be outside the signal reduction range in the frequency characteristics of the above LC filter circuit, that is, may be included in the pass frequency band. When such distortion of low-order harmonics is included, it may not be possible to reduce it only by providing the LC filter circuit. Also, even if harmonics are generated and compensated in a feed-forward manner, if the compensation amount is a fixed value, it may not be possible to reduce the distortion of low-order harmonics whose occurrence situation cannot be specified.

[0043] Therefore, in this embodiment, such distortion of low-order harmonics is compensated by feedback control using the arithmetic block 210CMP. This will be described below.

[0044] Referring to FIG. 3, the arithmetic block 210CMP that generates the corrected current command value of the embodiment will be described. FIG. 3 is a block diagram of the arithmetic block 210CMP of the embodiment.

[0045] The arithmetic block 210CMP includes arithmetic blocks 2115, 2117, 2125, 2127, 2130, 2131, 2135, 2137, 2170, 2171, 2181 to 2184.

[0046] The arithmetic block 2181 generates and outputs a signal with the frequency of the reference phase THETA30 multiplied by 5. The arithmetic block 2183 generates and outputs a signal with the frequency of the reference phase THETA30 multiplied by 7.

[0047] The arithmetic block 2182 generates and outputs a signal (reference phase THETA5) with the frequency of the reference phase THETA multiplied by 5. The arithmetic block 2184 generates and outputs a signal (reference phase THETA7) with the frequency of the reference phase THETA multiplied by 7.

[0048] The arithmetic block 2170 acquires the reference phase THETA30 and the voltage references ED_REF and EQ_REF in the stationary coordinate system. The arithmetic block 2171 uses the reference phase THETA30 to convert the voltage references ED_REF and EQ_REF in the stationary coordinate system into the voltage references VU_REF, VV_REF, VW_REF in the stationary coordinate system by inverse dq transformation and outputs them.

[0049] The arithmetic block 2171 acquires the voltage references VU_REF, VV_REF, VW_REF in the stationary coordinate system and the line-to-line voltage feedback values V_RS, V_ST, V_TR in the stationary coordinate system. The arithmetic block 2171 includes three subtractors and outputs the differences obtained by subtracting the line-to-line voltage feedback values V_RS, V_ST, V_TR in the stationary coordinate system from the voltage references VU_REF, VV_REF, VW_REF in the stationary coordinate system respectively.

[0050] The arithmetic block 2115 acquires the reference phase THETA30 and the above-mentioned differences output by the arithmetic block 2171. The arithmetic block 2115 uses a signal with the frequency of the reference phase THETA30 multiplied by 5 to perform dq transformation on the voltage feedback values V_RS, V_ST, V_TR in the stationary coordinate system into the voltage feedback values VD5, VQ5 in the rotating coordinate system having orthogonal d-axis and q-axis and outputs them.

[0051] Outputs of the arithmetic block 2115 are provided with arithmetic blocks 2115D and 2115Q. The arithmetic blocks 2115D and 2115Q are filters having attenuation characteristics for attenuating a predetermined frequency band. The arithmetic blocks 2115D and 2115Q generate voltage feedback values Vd5 and Vq5 obtained by attenuating a predetermined frequency band of the voltage feedback values VD5 and VQ5 in the rotating coordinate system. This predetermined frequency band may be determined to transmit a band of a component detected as the fifth harmonic and block frequency components higher than that. Although the arithmetic blocks 2115D and 2115Q are shown outside the arithmetic block 2115 in the figure, they may be arranged inside the arithmetic block 2115.

[0052] The arithmetic block 2117 acquires the reference phase THETA30 and the above-mentioned difference output by the arithmetic block 2171. The arithmetic block 2117 performs dq conversion on the voltage feedback values V_RS, V_ST, and V_TR in the stationary coordinate system into voltage feedback values VD7 and VQ7 in a rotating coordinate system having orthogonal d-axis and q-axis, and outputs them using a signal obtained by multiplying the frequency of the reference phase THETA30 by 7.

[0053] Outputs of the arithmetic block 2117 are provided with arithmetic blocks 2117D and 2117Q. The arithmetic blocks 2117D and 2117Q are filters having attenuation characteristics for attenuating a predetermined frequency band. The arithmetic blocks 2117D and 2117Q generate voltage feedback values Vd7 and Vq7 obtained by attenuating a predetermined frequency band of the voltage feedback values VD7 and VQ7 in the rotating coordinate system. This predetermined frequency band may be determined to transmit a band of a component detected as the seventh harmonic and block frequency components higher than that. This predetermined frequency band may be determined based on seven times the frequency of the reference phase THETA30. Although the arithmetic blocks 2117D and 2117Q are shown outside the arithmetic block 2117 in the figure, they may be arranged inside the arithmetic block 2117.

[0054] The arithmetic block 2125 performs arithmetic processing for voltage control on the frequency component that is 5 times the frequency of the reference phase THETA30, in the same manner as the aforementioned arithmetic block 212. For example, the arithmetic block 2125 acquires the voltage feedback values Vd5 and Vq5. The arithmetic block 212 generates and outputs a d-axis current reference ID_REF5 such that the voltage feedback value Vd5 becomes 0, and a q-axis current reference IQ_REF5 such that the voltage feedback value Vd5 becomes 0.

[0055] The arithmetic block 2127 performs arithmetic processing for voltage control on the frequency component that is 7 times the frequency of the reference phase THETA30, in the same manner as the aforementioned arithmetic block 212. For example, the arithmetic block 2127 acquires the voltage feedback values Vd7 and Vq7. The arithmetic block 2127 generates and outputs a d-axis current reference ID_REF7 such that the voltage feedback value Vd7 becomes 0, and a q-axis current reference IQ_REF7 such that the voltage feedback value Vd7 becomes 0.

[0056] The arithmetic block 2130 acquires the reference phase THETA, the d-axis current reference ID_REF, and the q-axis current reference IQ_REF. The arithmetic block 2130 uses the reference phase THETA to perform a dq transformation on the d-axis current reference ID_REF and the q-axis current reference IQ_REF to obtain the current references IU*, IV*, IW* in the stationary coordinate system and outputs them.

[0057] The arithmetic block 2135 acquires the reference phase THETA5, the d-axis current reference ID_REF5, and the q-axis current reference IQ_REF5. The arithmetic block 2135 uses the reference phase THETA5 to perform a dq transformation on the d-axis current reference ID_REF5 and the q-axis current reference IQ_REF5 to obtain the current references IU5*, IV5*, IW5* in the stationary coordinate system by dq transformation and outputs them.

[0058] The arithmetic block 2137 acquires the reference phase THETA7, the d-axis current reference ID_REF7, and the q-axis current reference IQ_REF7. The arithmetic block 2137 uses the reference phase THETA7 to perform a dq transformation on the d-axis current reference ID_REF7 and the q-axis current reference IQ_REF7 to obtain the current references IU7*, IV7*, IW7* in the stationary coordinate system by dq transformation and outputs them.

[0059] The arithmetic block 2131 obtains the current references IU*, IV*, IW* in the stationary coordinate system, the current references IU5*, IV5*, IW5* in the stationary coordinate system, and the current references IU7*, IV7*, IW7* in the stationary coordinate system, respectively. The arithmetic block 2131 includes six adders. The arithmetic block 2131 adds the current reference IU*, the current reference IU5*, and the current reference IU7* respectively to obtain the current reference IU_REF in the stationary coordinate system. The arithmetic block 2131 adds the current reference IV*, the current reference IV5*, and the current reference IV7* respectively to obtain the current reference IV_REF in the stationary coordinate system. The arithmetic block 2131 adds the current reference IW*, the current reference IW5*, and the current reference IW7* respectively to obtain the current reference IW_REF in the stationary coordinate system.

[0060] As a result, the current references IU_REF, IV_REF, IW_REF in the stationary coordinate system include correction amounts for canceling the fifth- and seventh-order distortion components based on the detected voltage values. By performing subsequent current control using these current references IU_REF, IV_REF, IW_REF, the distortion components can be canceled.

[0061] Sort out the above. Inverse dq-transform the dq-axis command value of the fundamental voltage to calculate the sine wave command value. The arithmetic blocks 2170 and 2171 calculate the differences between the voltage references VU_REF, VV_REF, VW_REF in the stationary coordinate system converted from the voltage references ED_REF and EQ_REF in the stationary coordinate system which are voltage feedbacks, and the line-to-line voltage feedback values V_RS, V_ST, V_TR in the stationary coordinate system which are the generated sine wave command values. As described above, this difference becomes the harmonic component of each phase.

[0062] Using the rotation angle (THETA30) corresponding to the order of the harmonic to be reduced, the above difference is dq-transformed to convert the component of the harmonic to be reduced into a DC quantity on the dq-axis. By using such an arithmetic method, the control responsiveness can be enhanced compared to the arithmetic method using a filter for harmonic extraction.

[0063] In order to set the DC component of the above harmonic to 0, a deviation (voltage deviation) between the command value (#0) set to 0 and the voltage feedback value based on the above difference is obtained. PI control is performed to perform a PI operation on this voltage deviation.

[0064] As described above, since the significant information is in the DC component on the dq axis, components other than the DC component may be removed using a filter having a desired frequency characteristic. The repetitive operation of this filter may not have a slow operation cycle compared to the control cycle of the PWM control. In other words, the repetitive operation of this filter may be set to a speed such that it can be performed a plurality of times within the control cycle of the PWM control.

[0065] The result of the PI control becomes a current command value that defines a compensation amount for canceling and reducing harmonics. A new current command value is generated by adding the current command value resulting from the PI control to the command value (output current command value) of the normal current control.

[0066] By performing current control using the newly generated current command value and operating the power conversion device main body 101, current-voltage control capable of suppressing low-order harmonics becomes possible. Note that there is no limitation on the method of the processing after the current control, and a general method can be applied.

[0067] With reference to FIG. 4, the relationship between the detected voltage waveform and the distortion component of the harmonics included in the voltage waveform will be described. FIG. 4 is a diagram for explaining the relationship between the voltage waveform of the embodiment and the distortion components of the harmonics of each order. The horizontal axis of the graph shown in FIG. 4 represents time, and the vertical axis represents the amplitude of the voltage. The period shown on the horizontal axis is one cycle of the fundamental wave. In this graph, in addition to the waveform of the fundamental wave, waveforms of odd orders of the 5th, 7th, 9th, and 11th harmonics are drawn respectively. There is a voltage waveform in which these harmonics with appropriately determined amplitudes are superimposed on the fundamental wave, and this is separated and extracted into components of each order.

[0068] In the case of this embodiment, there is a Δ connection, by which the distortion component of the third harmonic is suppressed. If there is no Δ connection, it is advisable to compensate for the distortion component of the third harmonic as well.

[0069] Note that a filter circuit is provided for the AC output of the power conversion device 100, and the AC power generated by power conversion can be supplied to the load side. In the power conversion device 100, a circuit breaker 9 for disconnecting a load short-circuit accident occurring on the load side by control is arranged. By the circuit breaker 9 responding to an overcurrent and cutting off the circuit, the location where the load short-circuit accident has occurred can be disconnected from the AC power system 70.

[0070] According to the above embodiment, the static power converter 1 includes a power conversion device 100 and a control unit 200. The power conversion device 100 is configured to supply the AC power generated by power conversion to the load side. The control unit 200 controls the power conversion device using the corrected current command value. In the control unit 200, the arithmetic block 212 generates an output current command value adjusted so that the output voltage of the power conversion device 100 becomes the reference value based on the reference value of the output voltage of the power conversion device 100 (first command value generation unit). The arithmetic block 2171 obtains the deviation between the output voltage of the power conversion device 100 and its reference value (voltage deviation calculation unit). The arithmetic blocks 2115 and 2117 detect the magnitude of the harmonic component included in the deviation in association with the order of the harmonic (harmonic component detection unit). The arithmetic blocks 2125 and 2127 generate a correction value of the output current command value such that the magnitude of the detected harmonic component becomes zero (second command value generation unit). The arithmetic block 2131 corrects the output current command value using the correction value of the output current command value (current command value correction unit). According to such a static power converter 1, the low-order harmonic distortion component included in its output can be efficiently reduced.

[0071] More specifically, the arithmetic block 212 that functions as the first command value generation unit generates an output current command value using the components in the two-dimensional stationary coordinate system. The arithmetic block 2171 that functions as the voltage deviation calculation unit obtains the deviation between the output voltage of the power conversion device 100 and its reference value using the components in the three-dimensional stationary coordinate system. The arithmetic blocks 2115 and 2117 that function as the harmonic component detection unit may detect the magnitude of the harmonic components included in the deviation in association with the harmonic order using the components in the three-dimensional stationary coordinate system. The arithmetic block 2131 that functions as the second command value generation unit corrects the output current command value using the components in the two-dimensional stationary coordinate system.

[0072] It is a conversion process for obtaining a feedback value of the output voltage of the power conversion device 100, and a reference phase THETA30 (first reference phase) is applied to the conversion process of generating components in the three-dimensional stationary coordinate system from the components in the first two-dimensional stationary coordinate system. It is a conversion process for obtaining a command value of the output voltage of the power conversion device 100, and a reference phase THETA (second reference phase) is applied to the conversion process of generating components in the second two-dimensional stationary coordinate system from the components in the three-dimensional stationary coordinate system. Thereby, different reference phases can be applied to the coordinate conversion related to the acquisition of the feedback value of the output voltage of the power conversion device 100 and the coordinate conversion related to the acquisition of the command value.

[0073] A predetermined phase difference (30 degrees) determined in association with the Δ connection of the three-phase alternating current is provided between the reference phase THETA30 (phase signal of the first reference phase) and the reference phase THETA (phase signal of the second reference phase). Thereby, the influence of the phase difference depending on the position where the voltage is detected in the circuit and the circuit configuration can be reduced.

[0074] According to at least one embodiment described above, the static power converter includes a power conversion device and a control unit. The power conversion device can supply the AC power generated by power conversion to the load side. The control unit controls the power conversion device using the corrected current command value. The control unit includes a first command value generation unit, a voltage deviation calculation unit, a harmonic component detection unit, and a second command value generation unit. The first command value generation unit corrects the output current command value using the correction value of the output current command value. The first command value generation unit generates an output current command value adjusted so that the output voltage of the power conversion device becomes the reference value based on the reference value of the output voltage of the power conversion device. The voltage deviation calculation unit obtains the deviation between the output voltage of the power conversion device and its reference value. The harmonic component detection unit detects the magnitude of the harmonic component included in the deviation in association with the order of the harmonic. The second command value generation unit generates a correction value of the output current command value such that the magnitude of the detected harmonic component becomes zero. The current command value correction unit corrects the output current command value using the correction value of the output current command value. Thereby, the static power converter can efficiently reduce the low-order harmonic distortion component included in the output.

[0075] As described above, some embodiments of the present invention have been described. However, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the gist of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are also included in the scope of the invention described in the claims and its equivalents. Further, the above-described embodiments can be implemented in combination with each other.

Explanation of Signs

[0076] 1 Static power converter, 100 Power conversion device, 200 Control unit, 210 Main control unit 210, 250 PWM control unit, 212 Arithmetic block (first command value generation unit), 2171 Arithmetic block (voltage deviation calculation unit), 2115, 2117 Arithmetic blocks (harmonic component detection units), 2125, 2127 Arithmetic blocks (second command value generation units), 2131 Arithmetic block (current command value correction unit)

Claims

1. A power conversion device capable of supplying AC power generated by power conversion to a load side, A control unit that controls the power conversion device using a corrected current command value, Comprising, The control unit, A first command value generation unit that generates an output current command value adjusted so that the output voltage of the power conversion device becomes the reference value based on the reference value of the output voltage of the power conversion device, A voltage deviation calculation unit that obtains the deviation between the output voltage of the power conversion device and its reference value, A harmonic component detection unit that detects the magnitude of the harmonic component included in the deviation in association with the order of the harmonic, A second command value generation unit that generates a correction value of the output current command value such that the magnitude of the detected harmonic component becomes zero, A current command value correction unit that corrects the output current command value using the correction value of the output current command value, A static power converter comprising.

2. The first command value generation unit generates an output current command value using components in a two-dimensional stationary coordinate system, The voltage deviation calculation unit obtains the deviation between the output voltage of the power conversion device and its reference value using components in a three-dimensional stationary coordinate system, The harmonic component detection unit detects the magnitude of the harmonic component included in the deviation in association with the order of the harmonic using components in the three-dimensional stationary coordinate system, The second command value generation unit corrects the output current command value using components in the two-dimensional stationary coordinate system, The static power converter according to claim 1.

3. A first reference phase is applied to the conversion process of generating the components of the three-dimensional stationary coordinate system from the components of the first two-dimensional stationary coordinate system, A second reference phase is applied to the conversion process of generating the components of the second two-dimensional stationary coordinate system from the components of the three-dimensional stationary coordinate system, The static power converter according to claim 2.

4. A predetermined phase difference determined in association with the Δ connection of a three-phase AC is provided between the phase signal of the first reference phase and the phase signal of the second reference phase, The static power converter according to claim 3.

5. A control method for a static power converter that controls a power conversion device capable of supplying AC power generated by power conversion to a load side using a corrected current command value, Based on the reference value of the output voltage of the power conversion device, an output current command value adjusted so that the output voltage of the power conversion device becomes the reference value is generated, The deviation between the output voltage of the power conversion device and its reference value is obtained, The magnitude of the harmonic component included in the deviation is detected in association with the order of the harmonic, Generate a correction value for the output current command value such that the magnitude of the detected harmonic component becomes zero. Correct the output current command value using the correction value for the output current command value. A control method for a static power converter including the above steps.

Images