Hybrid Bonding with a Micro Light-Emitting Diode (LED) Device
Hybrid bonding in uLED devices addresses the challenges of assembly and electrical testing in micro light-emitting diode arrays, enabling reliable connectivity and efficient manufacturing for applications like AR/VR systems and high-density displays.
Patent Information
- Application Number
- JP2024538360
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2022-12-07
- Filing Date
- 2022-12-13
- Publication Date
- 2025-07-30
- Estimated Expiration
- 2042-12-13
AI Technical Summary
Current design architectures of micro light-emitting diode (uLED) arrays face challenges in handling and electrical testing due to their micro size, necessitating reliable and efficient assembly methods.
A micro light-emitting diode (uLED) device is fabricated using hybrid bonding, combining metal-metal and dielectric-dielectric bonds between a source wafer and a target wafer, with precise alignment and bonding processes to ensure electrical continuity and functionality.
The hybrid bonding method enables reliable and efficient assembly of uLED devices, ensuring proper electrical connectivity and facilitating their use in applications such as augmented reality/virtual reality systems and high-density pixel displays.
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Abstract
Description
Technical Field
[0001] Embodiments of the present disclosure generally relate to micro light emitting diode (uLED) devices, and methods of manufacturing and using the same. The uLED device has hybrid bonding in which a combination of a metal-metal bond and a dielectric-dielectric bond exists between a source wafer and a target wafer.
Background Art
[0002] Among the most efficient light sources currently available are semiconductor light emitting devices or optical power emitting devices (e.g., devices that emit ultraviolet (UV) or infrared (IR) optical power, etc.), including light emitting diodes, resonant cavity light emitting diodes, vertical cavity laser diodes, and edge emitting lasers. Due to their compact size and lower power requirements, for example, semiconductor light emitting devices or optical power emitting devices (hereafter referred to as LEDs for simplicity) are attractive candidates for light sources such as camera flashes, for handheld battery-powered devices such as cameras and mobile phones. They can also be used for other applications such as automotive lighting, video torches, and general lighting such as home, store, office, and studio lighting, theater / stage lighting, and architectural lighting.
[0003] High-intensity / brightness light-emitting devices operable in the visible spectrum include III-V semiconductors, particularly binary, ternary, and quaternary alloys of gallium, aluminum, indium, and nitrogen, also known as group-III nitride materials. Typically, group-III nitride light-emitting devices are fabricated by epitaxially growing a stack of semiconductor layers of different compositions and dopant concentrations on a growth substrate, such as sapphire, silicon carbide, group-III nitride, or other suitable substrates, by means of metalorganic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or other epitaxial techniques. Sapphire is often used as the growth substrate due to its wide commercial availability and relatively ease of use. The stack grown on the growth substrate typically includes one or more n-type layers, e.g., doped with Si, formed on the substrate, a light-emitting region or active region formed on the one or more n-type layers, and one or more p-type layers, e.g., doped with Mg, formed on the active region.
[0004] Various new display applications, including wearable devices, head-mounted displays, and large-area displays, require miniaturized chips composed of arrays of high-density micro light-emitting diodes (μLEDs or uLEDs) with lateral dimensions down to less than 100 μm × 100 μm. Micro light-emitting diodes (uLEDs) typically have dimensions of about 50 μm or less in diameter or width and are used in the manufacture of color displays by aligning micro light-emitting diodes having red, blue, and green wavelengths in proximity.
[0005] The current design architectures of arrays of micro light-emitting diodes and their pixels present challenges in handling and electrical testing due to their micro size.
[0006] It is desirable to assemble micro light-emitting diode devices reliably and efficiently. SUMMARY OF THE INVENTION
[0007] Micro light emitting diode (uLED) devices, and methods of manufacturing and using the same are provided herein.
[0008] One aspect provides a micro light emitting diode (uLED) device, the uLED device comprising: a uLED die including a plurality of pixels, each pixel having a mesa of a semiconductor layer having sidewalls and including an active region; a plurality of die n-contacts in electrical communication with the n-type layer of the mesa; a plurality of die p-contacts in communication with the p-type layer of the mesa; a die dielectric material insulating the die n-contacts and the die p-contacts; a source wafer having the same; a target wafer having a target substrate with a plurality of wafer n-contacts, a plurality of wafer p-contacts, and a wafer dielectric material disposed thereon, wherein the wafer n-contacts are directly bonded to the plurality of die n-contacts, the wafer p-contacts are directly bonded to the die p-contacts, the wafer dielectric material is directly bonded to the die dielectric material, and the wafer dielectric material insulates the wafer n-contacts and the wafer p-contacts.
[0009] Another aspect is a method of manufacturing a micro light emitting diode (uLED) device, the method comprising: providing a target wafer having a target substrate with a plurality of wafer n - contacts, a plurality of wafer p - contacts, and a wafer dielectric material disposed thereon; bonding a source wafer to the target wafer, the source wafer comprising a uLED die including a plurality of pixels, each pixel having a mesa of a semiconductor layer having sidewalls and including an active region, a plurality of die n - contacts in electrical communication with the n - type layer of the mesa, a plurality of die p - contacts in communication with the p - type layer of the mesa, and a die dielectric material insulating the die n - contacts and the die p - contacts; and subjecting the bonding to directly bond the plurality of wafer n - contacts to the plurality of die n - contacts, directly bond the plurality of wafer p - contacts to the die p - contacts, and directly bond the wafer dielectric material to the die dielectric material. The target wafer is prepared by depositing an etch - stop layer on the target substrate, depositing a first dielectric material on the target substrate, providing a dielectric material mask on the target substrate, etching the first dielectric material, removing the dielectric material mask, providing a first metal contact layer on the target substrate, planarizing a preliminary surface of the target substrate, depositing a second dielectric material layer on the target substrate, providing a contact mask on the target substrate, etching the second dielectric material, removing the contact mask, providing a second metal contact layer on the target substrate, and planarizing a second surface of the target substrate to form a plurality of wafer n - contacts and a plurality of wafer p - contacts insulated by the wafer dielectric material.
[0010] Another aspect is a source wafer having uLED dies, where each uLED die includes a stack of semiconductor layers including an active region, a plurality of die n-contacts in electrical communication with the n-type layer of the mesa, a plurality of die p-contacts in communication with the p-type layer of the mesa, and a die dielectric material insulating the die n-contacts from the die p-contacts. Each of the die n-contacts and die p-contacts has a contact opening with a diameter “d” and a center “c” and a pitch “p” between adjacent centers of each of the die n-contacts and die p-contacts, where “d” is in the range of 0.5 micrometers or more and 30 micrometers or less, and “p” is in the range of 1 micrometer or more and 60 micrometers or less.
Brief Description of the Drawings
[0011] To enable a more detailed understanding of the above-described features of the present disclosure, a more specific description of the present disclosure, briefly summarized above, is provided with reference to embodiments, some of which are shown in the accompanying drawings. It should be noted, however, that the accompanying drawings show only typical embodiments of this disclosure and should not be considered as limiting its scope, as the present disclosure may admit of other equally effective embodiments. The embodiments described herein are shown by way of example and not limitation in the figures of the accompanying drawings, in which like elements are referred to by like reference numerals. The figures here are not to scale.
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[0012] Before describing some exemplary embodiments of the present disclosure, it should be understood that the present disclosure is not limited to the details of the configurations or process steps described in the following description. The present disclosure is capable of other embodiments and can be practiced or carried out in various ways.
[0013] References to an LED refer to a light-emitting diode that emits light when current flows through it. In one or more embodiments, the LED herein has one or more characteristic dimensions (e.g., dimensions such as height, width, depth, thickness) that are in the range of 75 micrometers or more to 300 micrometers or less. In one or more embodiments, one or more of the dimensions of height, width, depth, and thickness have values in the range of 100 to 300 micrometers. References to micrometers herein allow for a variation of ±1 to 5%. In a preferred embodiment, one or more of the dimensions of height, width, depth, and thickness have a value of 200 micrometers ±1 to 5%. In some examples, the LED is referred to as a micro-LED (uLED or μLED) and refers to an LED having one or more characteristic dimensions (e.g., dimensions such as height, depth, thickness) on the order of micrometers or tens of micrometers. In one or more embodiments, one or more of the dimensions of height, width, depth, and thickness have values in the range of 1 micrometer to less than 75 micrometers, such as 1 to 50 micrometers, or 1 to 25 micrometers. Overall, in one or more embodiments, the LED herein can have characteristic dimensions in the range of 1 micrometer to 300 micrometers, as well as all values and sub-ranges therebetween.
[0014] Methods of depositing materials, layers, and thin films include, but are not limited to, sputter deposition, atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), plasma atomic layer deposition (PEALD), plasma chemical vapor deposition (PECVD), and combinations thereof.
[0015] A method of forming or growing a semiconductor layer including an n-type and / or N-type layer, an active region, and a p-type and / or P-type layer is formed according to methods known in the art. In one or more embodiments, the semiconductor layer is formed by epitaxial (EPI) growth. A semiconductor layer according to one or more embodiments has an epitaxial layer, a group III nitride layer, or an epitaxial group III nitride layer. In one or more embodiments, the semiconductor layer has a group III nitride material, and in certain embodiments, an epitaxial group III nitride material. In some embodiments, the group III nitride material has one or more of gallium (Ga), aluminum (Al), and indium (In). Thus, in some embodiments, the semiconductor layer has one or more of gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), indium aluminum nitride (InAlN), aluminum indium gallium nitride (AlInGaN), and the like. The group III nitride material can be doped with one or more of silicon (Si), oxygen (O), boron (B), phosphorus (P), germanium (Ge), manganese (Mn), or magnesium (Mg) depending on whether a p-type group III nitride material or an n-type group III nitride material is required. In one or more embodiments, the semiconductor layer has a total thickness in the range of about 2 μm to about 10 μm, as well as all values and subranges therebetween.
[0016] Particularly with respect to micro light-emitting diodes (μLEDs), reducing the size of the LED poses processing challenges. Ensuring proper electrical continuity of the structure is one such challenge. Preparing a target wafer and a source wafer for bonding contributes to proper electrical continuity of the structure.
[0017] Suitable applications of the uLED device herein include, but are not limited to, augmented reality / virtual reality (AR / VR) systems. One or more AR / VR systems include an augmented reality (AR) or virtual reality (VR) headset, glasses, or projector.
[0018] FIG. 1 is a schematic diagram showing a partial enlarged cross-sectional view of a micro light-emitting diode (uLED) device according to one or more embodiments.
[0019] The uLED device 500 has a target wafer 512 and a source wafer 528. The illustrated portion of the target wafer 512 includes a target substrate 514, a plurality of target metal contacts 520, such as p-metal contacts, and a target dielectric material 524 that insulates the target metal contacts 520 from the n-metal contacts 522. Optionally, an etch stop layer (not shown) may be disposed on the target substrate 514 under the target metal contacts 520 and 522 and the target dielectric material 524. In one or more embodiments, the etch stop layer is a dielectric material different from the dielectric material 524 that insulates the target metal contacts 520 from the n-metal contacts 522. In one or more embodiments, the target wafer is a complementary metal oxide semiconductor (CMOS).
[0020] The source wafer 528 is an active microstructured die in this embodiment and includes, for example, a semiconductor layer 540 pixelated into pixels 540a, 540b, and 540c. The pixels 540a, 540b, and 540c each include respective active regions 542a, 542b, and 542c and n-type and p-type layers (not labeled). The source wafer 528 includes a plurality of die metal contacts 530, which are, for example, p-metal contacts, a metal contact 532, which is, for example, an n-metal contact and in particular a common cathode, and a die dielectric material 534 that provides insulation therebetween. In one or more embodiments, a source substrate 538 is positioned adjacent to the semiconductor layer 540. The dielectric material insulates the n-type and p-type layers and ensures suitable communication and electrical functionality with respective n-contact materials and / or cathodes and p-contact materials and / or anodes, as understood in the art.
[0021] In the enlarged view of FIG. 1, the surface is shown as being "exposed" in that it is accessible for the bonding process prior to bonding to form the uLED device. During assembly, bonding is performed at the exposed surface between them.
[0022] The target metal p-metal contacts 520 of the target wafer 512 each have respective exposed surfaces 519 and 521. The target metal n-metal contacts 522 of the target wafer 512 have an exposed surface 523.
[0023] The die p-metal contacts 530 of the source wafer 528 each have respective exposed surfaces 529 and 531. The die n-metal contact 532 of the source wafer 528 has an exposed surface 533.
[0024] For the assembly of the uLED device, a process is performed to achieve hybrid bonding. Reference to hybrid bonding means that there is a combination of metal-to-metal bonding and dielectric-to-dielectric bonding.
[0025] The surface 525a of the target dielectric material is joined to the surface 535a of the die dielectric material, the surface 525b of the target dielectric material is joined to the surface 535b of the die dielectric material, the surface 525c of the target dielectric material is joined to the surface 535c of the die dielectric material, the surface 525d of the target dielectric material is joined to the surface 535d of the die dielectric material, and the surface 525e of the target dielectric material is joined to the surface 535e of the die dielectric material. Each of the surfaces of the die dielectric material has a width, and similarly, each of the surfaces of the target dielectric material has a width. As an example shown in FIG. 1, the surface 535e of the die dielectric material has a width 535W, which is directly joined to the surface 525e of the target dielectric material having a width 525W.
[0026] The surface 519 of the target p-metal contact is joined to the surface 529 of the die p-metal contact, the surface 521 of the target p-metal contact is joined to the surface 531 of the die p-metal contact, and the surface 523 of the target n-metal contact is joined to the surface 533 of the die n-metal contact, which is, for example, a common cathode. That is, each of the die metal contact surfaces, which are p-metal contact surfaces and n-metal contact surfaces, has a width or a diameter, and similarly, each of the target metal contact surfaces has a width or a diameter. As an example shown in FIG. 1, the surface 533 of the die n-metal contact has a width 533W (or a diameter), which is directly joined to the surface 523 of the target n-metal contact having a width 523W (or a diameter).
[0027] In one or more embodiments, the width of each of the wafer n-contacts is from 95% to 100% of the width of each of the die n-contacts at each position to which they are directly joined, as well as all values and subranges therebetween, including 95.5%, 96%, 96.5%, 97%, 97.5%, 98%, 98.5%, 99%, 99.1%, 99.2%, 99.2%, 99.3%, 99.4%, 99.5%, 99.6%, 99.7%, 99.8%, 99.9%.
[0028] In one or more embodiments, the width of each wafer p-contact is from 95% to 100% of the width of each die p-contact at each position where they are directly bonded, including 95.5%, 96%, 96.5%, 97%, 97.5%, 98%, 98.5%, 99%, 99.1%, 99.2%, 99.2%, 99.3%, 99.4%, 99.5%, 99.6%, 99.7%, 99.8%, 99.9%.
[0029] In one or more embodiments, the width of each wafer dielectric material is from 95% to 100% of the width of each die dielectric material at each position where they are directly bonded, including 95.5%, 96%, 96.5%, 97%, 97.5%, 98%, 98.5%, 99%, 99.1%, 99.2%, 99.2%, 99.3%, 99.4%, 99.5%, 99.6%, 99.7%, 99.8%, 99.9%.
[0030] In one or more embodiments, the width of each wafer n-contact is from 95% to 100% of the width of each die n-contact at each position where they are directly bonded, the width of each wafer p-contact is from 95% to 100% of the width of each die p-contact at each position where they are directly bonded, and the width of each wafer dielectric material is from 95% to 100% of the width of each die dielectric material at each position where they are directly bonded, including 95.5%, 96%, 96.5%, 97%, 97.5%, 98%, 98.5%, 99%, 99.1%, 99.2%, 99.2%, 99.3%, 99.4%, 99.5%, 99.6%, 99.7%, 99.8%, 99.9%.
[0031] The uLED device 500 is formed by receiving the bonding of the source wafer 528 to the target wafer 512.
[0032] In one or more embodiments, the target metal contact has one or more of copper (Cu), aluminum (Al), nickel (Ni), titanium (Ti), titanium tungsten (TiW), silver (Ag), gold (Au), platinum (Pt), and palladium (Pd).
[0033] In one or more embodiments, the target wafer has an etch stop layer on the target substrate under the target metal contact and the first target dielectric material. In one or more embodiments, the etch stop layer has a second dielectric material different from the first target dielectric material. In one or more embodiments, the first target dielectric material has one or more of silicon oxide (SiO), silicon dioxide (SiO2), silicon nitride (SiN), silicon carbide (SiC), aluminum oxide (Al2O3), and aluminum nitride (AlN). An exemplary etch stop layer has SiN, in which case the first target dielectric material has one or more of silicon oxide (SiO), silicon dioxide (SiO2), silicon nitride (SiN), silicon carbide (SiC), and aluminum oxide (Al2O3).
[0034] In one or more embodiments, the die dielectric material has one or more of silicon oxide (SiO), silicon dioxide (SiO2), silicon nitride (SiN), silicon carbide (SiC), aluminum oxide (Al2O3), and aluminum nitride (AlN).
[0035] In one or more embodiments, the target substrate has a material selected from the group consisting of ceramic, silicon, aluminum, sapphire, silicon carbide, and group III nitrides.
[0036] In one or more embodiments, the uLED die further has a die substrate in contact with a semiconductor layer including an active region. In some embodiments, the die substrate has a material selected from the group consisting of sapphire, silicon carbide, and group III nitrides.
[0037] In one or more embodiments, the die substrate has a material selected from the group consisting of ceramic, silicon, aluminum, sapphire, silicon carbide, and group III nitrides.
[0038] In one or more embodiments, on the plurality of die n - contacts, wafer n - contacts are directly bonded at respective n - contact bonding areas, wafer p - contacts are directly bonded to die p - contacts at respective p - contact bonding areas, and the diameters of the n - contact bonding areas and the p - contact bonding areas have diameters in the range of from 0.5 micrometers to 30 micrometers or less (including all values and sub - ranges therebetween).
[0039] In one or more embodiments, on the plurality of die n - contacts, wafer n - contacts are directly bonded at respective n - contact bonding areas, wafer p - contacts are directly bonded to die p - contacts at respective p - contact bonding areas, and the pitch between all centers of the n - contact bonding areas and the p - contact bonding areas is within the range of from 1 micrometer or more to 60 micrometers or less (including all values and sub - ranges therebetween). FIG. 7 is a schematic plan view of an exemplary series of metal contacts 750 of a portion of die 700, showing diameter (“d”), center (“c”), and pitch (“p”). It is understood that in one or more embodiments, the common cathode can be sized differently from the plurality of n - contacts and is not included when discussing the pitch between contacts.
[0040] FIG. 2 shows a process flow diagram for the manufacture 200 of a micro - light - emitting diode (uLED) device according to one or more embodiments. At process 210, a target wafer is prepared. The features of the target wafer are prepared as follows.
[0041] An etch - stop layer is deposited on the target substrate of the target wafer. A primary dielectric material is deposited on the target substrate. For example, a dielectric material mask of a photoresist material is prepared on the target substrate, and then the primary dielectric material is etched to the etch - stop layer in a pattern to create an area for receiving the primary metal - contact material, and the dielectric material mask is removed, thereby resulting in the preparation or formation of the primary dielectric material layer.
[0042] Thereafter, a primary metal contact material is provided on the target substrate. In one or more embodiments, providing the primary metal contact layer includes depositing a seed layer and then performing electroplating on the seed layer. A preliminary surface of the target substrate including the primary metal contact material is planarized to provide the primary metal contact layer. This planarization technique is intended to provide flatness of 5 Å or less. In one or more embodiments, this planarization process includes chemical mechanical polishing (CMP). Once planarization is complete, particle cleaning and / or removal can be performed to the desired specifications, removing residual metal and other debris. Thereafter, a second dielectric material is provided and / or deposited on the target substrate.
[0043] Thereafter, a contact mask is provided on the target substrate. The contact mask is the result of photolithography of the photoresist through a transmissive mask and subsequent partial removal. The contact aperture template of the contact mask is used to prevent the dielectric material from reaching the substrate during deposition of the dielectric material. In one or more embodiments, the contact mask has a mask body in which a plurality of metal contact aperture templates are formed. Each of the metal contact aperture templates has a diameter (“d”). A pitch (“p”) exists between the centers of each of the metal contact aperture templates.
[0044] The second dielectric material is etched in a pattern to provide an area for receiving the second metal contact metal. The contact mask is then removed, thereby providing and / or forming a secondary dielectric material layer. Some portions of the second dielectric material layer are combined with the first dielectric material layer to extend from the etch stop layer to the exposed surface. Thereafter, a second metal contact material is provided on the target substrate. In one or more embodiments, providing the second metal contact layer includes depositing a seed layer and then performing electroplating on the seed layer. 3]
[0045] Next, the second surface of the target substrate including the second metal contact material is planarized to form a plurality of target metal contacts including a start contact area and an end contact area insulated by the first dielectric material layer and the second dielectric material layer. Planarizing the second surface of the target substrate is intended to provide flatness of 5 Å or less. In one or more embodiments, this planarization process includes chemical mechanical polishing (CMP). When the planarization is complete, particle cleaning and / or removal can be performed to the desired specifications, removing residual metal and other debris. In one or more embodiments, preparing the second metal contact layer involves depositing a seed layer and performing metal plating on the seed layer.
[0046] In process 220, a source wafer having uLED dies is positioned on the target wafer.
[0047] In process 230, the uLED dies are bonded to the target wafer. In one or more embodiments, in response to bonding the uLED dies to the target wafer, the die n contacts and the die p contacts are connected in series to the wafer n contacts and the wafer p contacts.
[0048] Thereafter, in process 240, a quality control test is performed. In one or more embodiments, the bond between the target metal contact and the die metal contact is evaluated. In one or more embodiments, the bond between the first target dielectric material and the die dielectric material is evaluated.
[0049] In process 250, further post-processing of the options is performed. In one or more embodiments, the further processing includes forming a passivation layer around a part or all of one or more uLEDs or the uLED device as a whole. In one or more embodiments, the processed structure holds the substrate, is diced, and further processed. In one or more embodiments, the processed structure is turned over, attached to a support such as a tape support, and the substrate is removed. The removal of the substrate follows methods known in the art, including substrate laser lift-off. When the substrate is removed, diced LEDs or uLEDs are created.
[0050] The further processing can include depositing a down-converter material, such as a layer of phosphor material.
[0051] In some embodiments, the LED device here is further processed to include optical elements such as lenses, metalenses, and / or prismatic collimators. The optical elements can also include, alternatively or additionally, apertures, filters, Fresnel lenses, convex lenses, concave lenses, or any other suitable optical elements that affect the projected light from the light-emitting array. Further, one or more of these optical elements can have one or more coatings including a UV-blocking or anti-reflection coating. In some embodiments, the optical elements are used to correct or minimize two-dimensional or three-dimensional optical errors including coil-shaped distortion, barrel-shaped distortion, axial chromatic aberration, spherical aberration, chromatic aberration, field curvature, astigmatism, or any other type of optical error. In some embodiments, the optical elements are used to magnify and / or correct an image. Advantageously, in some embodiments, magnifying the displayed image enables the light-emitting array to be physically smaller, lighter, and require only less power than a larger display. Further, the magnification can increase the field of view of the content being displayed and enable the display presentation to be equal to the user's normal field of view.
[0052] FIG. 5 shows a process flow diagram 600 for the manufacture of an exemplary source wafer according to one or more embodiments, such as the source wafer 528 of FIG. 1. Method 600 includes depositing, at 612, a plurality of semiconductor layers including an n-type layer, an active region, and a p-type layer on a substrate. At 614, the method further includes depositing a dielectric material as a hard mask layer. At 616, the method further includes etching the hard mask layer and a portion of the semiconductor layers to form a plurality of spaced-apart mesas and trenches that define pixels, each of the plurality of spaced-apart mesas having a semiconductor layer. At 618, the method includes depositing a conformal second dielectric material on sidewalls of the p-type layer and the active region, selectively etching and depositing metal to provide n-contact and p-contact materials within a space between each of the plurality of spaced-apart mesas. The second dielectric material insulates the p-type layer and the active region from the n-contact material. At 620, the method includes depositing a third dielectric material, selectively etching and depositing electrode metal for bond pads.
[0053] At process 622, further processing is performed. The further processing can include removing the substrate and flipping the die. Other processing can include depositing a downconverter material, such as a layer of phosphor material. In some embodiments, the LED array here is further processed to include optical elements such as lenses, metalenses, and / or pre-collimators.
[0054] uLED device Figure 3 shows a top view of an exemplary uLED display device having a uLED monolithic array 800 with a plurality of pixels arranged in a 6×19 grid. Pixels 855a and 855b are examples. In this embodiment, a common cathode 840 is connected to the pixels. Anodes (not shown) that are present on the lower side are included in each pixel. In one or more embodiments, the array has an arrangement of 2×2 mesas, 4×4 mesas, 20×20 mesas, 50×50 mesas, 100×100 mesas, or n1×n2 mesas, where n1 and n2 are each numbers in the range from 2 to 1000, and n1 and n2 may or may not be equal.
[0055] In one or more embodiments, an array of microLEDs (μLEDs or uLEDs) is used. The microLEDs can support high-density pixels having a lateral dimension of less than 100 μm×100 μm. In some embodiments, microLEDs having a dimension of about 50 μm or less in diameter or width can be used. Such microLEDs can be used in the manufacture of color displays by aligning microLEDs having red, blue, and green wavelengths in proximity.
[0056] In some embodiments, the light emitting array includes a few microLEDs positioned on a centimeter-scale area or a larger substrate. In some embodiments, the light emitting array includes a microLED pixel array having hundreds, thousands, or millions of light emitting LEDs positioned together on a substrate of centimeter-scale area or a smaller substrate. In some embodiments, the microLEDs can include light emitting diodes sized between 30 microns and 500 microns. The light emitting array can be monochromatic, RGB, or other desired color chromaticity. In some embodiments, the pixels can be square, rectangular, hexagonal, or can have a curved outer perimeter. The pixels can be of the same size, different sizes, or grouped to be of equal size to present a larger effective pixel size.
[0057] In some embodiments, the light emitting pixels and a circuit supporting the light emitting array are packaged and optionally include a submount or printed circuit board connected to control and power the light generation by the semiconductor LEDs. In certain embodiments, the printed circuit board supporting the light emitting array includes electrical vias, heat sinks, ground planes, electrical traces, and flip chip or other mounting systems. The submount or printed circuit board can be formed of any suitable material such as, for example, ceramic, silicon, aluminum. If the submount material is conductive, an insulating layer is formed on the substrate material and a metal electrode pattern is formed on the insulating layer. The submount can serve as a mechanical support and provide an electrical interface between the electrodes on the light emitting array and the power source, and can also provide a heat sink function.
[0058] In some embodiments, the LED light emitting array is processed to include optical elements such as, for example, lenses, metalenses, and / or collimators. The optical elements can also or alternatively include apertures, filters, Fresnel lenses, convex lenses, concave lenses, or any other suitable optical elements that affect the projected light from the light emitting array. Further, one or more of these optical elements can have one or more coatings including a UV blocking or anti-reflective coating. In some embodiments, the optical elements are used to correct or minimize two-dimensional or three-dimensional optical errors including, for example, coil-shaped distortion, barrel-shaped distortion, axial chromatic aberration, spherical aberration, chromatic aberration, field curvature, astigmatism, or any other type of optical error. In some embodiments, the optical elements can be used to magnify and / or correct an image. Advantageously, in some embodiments, magnifying the display image allows the light emitting array to be physically smaller, lighter, and require only less power than a larger display. Further, magnification can increase the field of view of the content being displayed and enable the display presentation to be equal to the user's normal field of view.
[0059] Use FIG. 4 schematically shows an exemplary display system 900 that utilizes LEDs, including the uLEDs disclosed herein. The display system 900 has an LED light emitting array 902 and a display 908 that are in electrical communication with an LED driver 904. The display system 900 also has a system controller 906, such as, for example, a microprocessor. The controller 906 is coupled to the LED driver 904. The controller 906 can also be coupled to the display 908 and optional sensor(s) 910 and can be powered by a power supply 912. In one or more embodiments, user data input is provided to the system controller 906.
[0060] In one or more embodiments, the system is a camera flash system that utilizes uLEDs. In such embodiments, the LED light emitting array 902 is an illumination array and a lens system, the display 908 has a camera, and the LEDs of 902 and the camera of 908 can be controlled by the controller 906 to align their fields of view.
[0061] Optionally, the sensor 910 having a control input can include, for example, a position sensor (e.g., a gyroscope and / or an accelerometer), and / or other sensors that can be used to determine the position, velocity, and orientation of the system. Signals from the sensor 910 are supplied to the controller 906 and can be used to determine an appropriate course of action for the controller 906 (e.g., which LEDs are currently illuminating the target and which LEDs will illuminate the target after a predetermined time).
[0062] During operation, the illumination from some or all of the pixels of the LED array of 902 can be adjusted to be deactivated, operated at full intensity, or operated at an intermediate intensity. As described above, by activating one or more subsets of pixels, electronic beam focusing or steering of the light emitted by the LED array of 902 can be performed to enable dynamic adjustment of the beam shape without moving the optical system within the illumination device or changing the focus of the lens.
[0063] LED array systems as described herein can support a variety of other beam steering or other applications that benefit from fine-grained intensity, spatial, and temporal control of the light distribution. Those applications can include, but are not limited to, precise spatial patterning of the emitted light from pixel blocks or individual pixels. Depending on the application, the emitted light may be spectrally different, adapt over time, and / or be environmentally responsive. The light-emitting pixel array can provide a pre-programmed light distribution in various intensity, spatial, or temporal patterns. The accompanying optical system can vary at the pixel, pixel block, or device level. One example of a light-emitting pixel array can include a device having a common controlled central block of high-brightness pixels with an accompanying common optical system, while the edge pixels may have individual optical systems. In addition to flashlights, common applications supported by the light-emitting pixel array include video lighting, automotive headlights, architectural and area lighting, and street lighting.
[0064] Other applications of the LED devices herein can include augmented reality / virtual reality (AR / VR) systems that can utilize the uLEDs disclosed herein. One or more AR / VR systems can include an augmented reality (AR) or virtual reality (VR) headset, glasses, or projector. Such AR / VR systems can include an LED light-emitting array, an LED driver (or light-emitting array controller), a system controller, an AR or VR display, and a sensor system 810. Control inputs can be provided to the sensor system while power and user data inputs are provided to the system controller. As will be understood, in some embodiments, the modules included in the AR / VR system can be compactly arranged within a single structure or, alternatively, one or more elements can be separately implemented and connected via wireless or wired communication. For example, the LED driver and / or system controller can be separately implemented such that the light-emitting array, the AR or VR display, and the sensor system can be implemented on a headset or glasses.
[0065] In one embodiment, a light emitting array can be used to project light in a graphical pattern or object pattern that can support an AR / VR system. In some embodiments, separate light emitting arrays can be used to provide a display image, and AR features are provided by different discrete micro-LED arrays. In some embodiments, a selected group of pixels can be used to provide tracking light used in eye tracking while being used to display content to a user. The content display pixels are designed to emit visible light having at least a portion of the visible band (about 400 nm to 750 nm). In contrast, the tracking pixels can emit light within the visible band or the IR band (about 750 nm to 2,200 nm), or some combination thereof. As an alternative, the tracking pixels may operate in the 800 - 1000 nanometer range. In some embodiments, the tracking pixels can emit tracking light during a period when the content pixels are turned off and no content is being displayed to the user.
[0066] The AR / VR system can incorporate an extensive optical system within the LED light emitting array and / or the AR / VR display, for example, to couple the light emitted by the LED light emitting array to the AR / VR display as described above. In AR / VR applications, those optical systems can have nanofins and can be designed to polarize the light they transmit.
[0067] In one embodiment, a light emitting array controller can be used to provide power and real-time control for a light emitting array. For example, the light emitting array controller can implement control at the pixel level or group pixel level of amplitude and duty cycle. In some embodiments, the light emitting array controller further includes a frame buffer for holding a generated or processed image that can be supplied to the light emitting array. Other supported modules can include digital control interfaces such as, for example, an inter-integrated circuit (I2C) serial bus, a serial peripheral interface (SPI), USB-C, HDMI®, DisplayPort, or other suitable image or control modules configured to transmit required image data, control data, or instructions.
[0068] During operation, pixels within an image can be used to determine the response of the corresponding light emitting array, and the intensity and spatial modulation of the LED pixels are based on the (one or more) images. To reduce data rate issues, in some embodiments, groups of pixels (e.g., 5×5 blocks) can be controlled as a single block. In some embodiments, high-speed and high data rate operation is supported, and pixel values from consecutive images can be loaded as consecutive frames of an image sequence at a rate between 30 Hz and 100 Hz, typically 60 Hz. Pulse width modulation can be used to control each pixel to emit light in a pattern and intensity that is at least partially image-dependent.
[0069] In some embodiments, the sensor system can include external sensors, such as cameras, depth sensors, or voice sensors, that monitor the environment, and internal sensors, such as accelerometers or two - or three - axis gyroscopes, that monitor the AR / VR headset position. Other sensors can include, but are not limited to, barometric sensors, stress sensors, temperature sensors, or any other suitable sensors required for local or remote environmental monitoring. In some embodiments, the control inputs can include detected touches or taps, gesture inputs, or controls based on the headset or display position. As another example, based on one or more measurement signals from one or more gyroscopes or position sensors that measure translational or rotational motion, the estimated position of the AR / VR system relative to an initial position can be determined.
[0070] In some embodiments, the system controller uses data from the sensor system to integrate the measurement signals received from the accelerometer over time to estimate a velocity vector, and then integrates the velocity vector over time to determine the estimated position of the reference point of the AR / VR system. In other embodiments, the reference point used to describe the position of the AR / VR system can be based on a depth sensor, a camera positioning view, or an optical flow field.
[0071] Based on changes in the position, orientation, or movement of the AR / VR system, the system controller can send an image or command to the light - emitting array controller. Changes or modifications to the image or command can also be made, if necessary, by user data input or automated data input. User data input can include, but is not limited to, voice commands, tactile feedback, eye or pupil position identification, or that provided by a connected keyboard, mouse, or game controller.
[0072] FIG. 6 shows a block diagram of an example of the visualization system 10. The visualization system 10 can include a wearable housing 12 such as a headset or goggles. The housing 12 can mechanically support and house the elements detailed below. In some examples, one or more of the elements detailed below can be included in one or more additional housings that are separate from the wearable housing 12 and can be coupled to the wearable housing 12 via a wireless and / or wired connection. For example, a separate housing can reduce the weight of the wearable goggles, such as by including a battery, a radio, and other elements. The housing 12 can include one or more batteries 14 that can supply power to any or all of the elements detailed below. The housing 12 can include a circuit that can be electrically coupled to an external power source, such as a wall outlet, to recharge the battery 14. The housing 12 can include one or more radios 16 for wireless communication with a server or network via a suitable protocol, such as WiFi.
[0073] The visualization system 10 can include one or more sensors 18, such as optical sensors, audio sensors, tactile sensors, thermal sensors, gyro sensors, time-of-flight sensors, triangulation-based sensors, and others. In some examples, one or more of the sensors can sense the location, position, and / or orientation of the user. In some examples, one or more of the sensors 18 can generate a sensor signal in response to the sensed location, position, and / or orientation. The sensor signal can include sensor data corresponding to the sensed location, position, and / or orientation. For example, the sensor data can include a surrounding depth map. In some examples, such as for an augmented reality system, one or more of the sensors 18 can capture a real-time video image of the surroundings proximate to the user.
[0074] The visualization system 10 can include one or more video generation processors 20. The one or more video generation processors 20 can receive scene data representing a three-dimensional scene from a server and / or a storage medium, such as a set of position coordinates for objects in a scene or a depth map of the scene. The one or more video generation processors 20 can receive one or more sensor signals from the one or more sensors 18. In response to the scene data representing the surroundings and at least one sensor signal representing the location and / or orientation of the user with respect to the surroundings, the one or more video generation processors 20 can generate at least one video signal corresponding to a view of the scene. In some examples, the one or more video generation processors 20 can generate two video signals, one for each eye of the user, representing views of the scene from the viewpoints of the user's left and right eyes. In some examples, the one or more video generation processors 20 can generate three or more video signals and combine them to provide one video signal for both eyes, two video signals for both eyes, or other combinations.
[0075] The visualization system 10 can include one or more light sources 22 that can provide light to a display of the visualization system 10. Suitable light sources 22 can include light-emitting diodes, monolithic light-emitting diodes, multiple light-emitting diodes, an array of light-emitting diodes, an array of light-emitting diodes disposed on a common substrate, a segmented light-emitting diode having light-emitting diode elements disposed on a single substrate and individually addressable and controllable (and / or controllable in groups and / or subsets), an array of micro light-emitting diodes (micro LEDs), and others.
[0076] The light-emitting diode can be a white light-emitting diode. For example, the white light-emitting diode can emit excitation light such as blue light or purple light. The white light-emitting diode can include one or more phosphors that can absorb part or all of the excitation light and, in response, emit phosphor light such as yellow light having a wavelength longer than that of the excitation light.
[0077] One or more light sources 22 can include light generation elements having different colors or wavelengths. For example, the light source can include a red light-emitting diode capable of emitting red light, a green light-emitting diode capable of emitting green light, and a blue light-emitting diode capable of emitting blue light. Red, green, and blue light are combined in a specific ratio to generate a suitable color that is visually perceivable within the visible portion of the electromagnetic spectrum.
[0078] The visualization system 10 can include one or more modulators 24. The modulator 24 can be implemented in at least one of two configurations.
[0079] In a first configuration, the modulator 24 can include a circuit that can directly modulate the light source 22. For example, the light source 22 can include an array of light-emitting diodes, and the modulator 24 can directly modulate the power, voltage, and / or current applied to each light-emitting diode in the array to form modulated light. The modulation can be performed in an analog and / or digital manner. In some examples, the light source 22 can include an array of red light-emitting diodes, an array of green light-emitting diodes, and an array of blue light-emitting diodes, and the modulator 24 can directly modulate the red light-emitting diodes, green light-emitting diodes, and blue light-emitting diodes to form modulated light for generating a specified image.
[0080] In the second configuration, the modulator 24 can include a modulation panel such as a liquid crystal panel. The light source 22 can generate uniform illumination or substantially uniform illumination to illuminate the modulation panel. The modulation panel can include pixels. Each pixel can form modulated light by selectively attenuating each respective portion of the modulation panel area in response to an electrical modulation signal. In some examples, the modulator 24 can include a plurality of modulation panels that can modulate light of different colors. For example, the modulator 24 can include a red modulation panel that can attenuate red light from a red light source such as a red light-emitting diode, a green modulation panel that can attenuate green light from a green light source such as a green light-emitting diode, and a blue modulation panel that can attenuate blue light from a blue light source such as a blue light-emitting diode.
[0081] In some examples of the second configuration, the modulator 24 can receive uniform white light or substantially uniform white light from a white light source such as a white light-emitting diode. The modulation panel can include a wavelength selection filter on each pixel of the modulation panel. The panel pixels can be arranged in groups (such as groups of 3 or 4, etc.), and each group can form a pixel of a color image. For example, each group can include panel pixels having a red color filter, panel pixels having a green color filter, and panel pixels having a blue color filter. Other suitable configurations can also be used.
[0082] The visualization system 10 can include one or more modulation processors 26 that can receive a video signal from, for example, one or more video generation processors 20, etc., and in response, can generate an electrical modulation signal. In a configuration where the modulator 24 directly modulates the light source 22, the electrical modulation signal can drive the light source 22. In a configuration where the modulator 24 includes a modulation panel, the electrical modulation signal can drive the modulation panel.
[0083] The visualization system 10 can include one or more beam combiners 28 (also known as beam splitters 28) that can combine light beams of different colors to form a single multi - color beam. In a configuration where the light source 22 can include a plurality of light - emitting diodes of different colors, the visualization system 10 can include one or more wavelength - sensitive (e.g., dichroic) beam splitters 28 that can combine light of different colors to form a single multi - color beam.
[0084] The visualization system 10 can direct the modulated light towards the viewer's eyes in at least one of two configurations. In a first configuration, the visualization system 10 can function as a projector and can include a suitable projection optical system 30 capable of projecting the modulated light onto one or more screens 32. The screen 32 can be placed at a suitable distance from the user's eyes. The visualization system 10 can optionally include one or more lenses 34 capable of placing a virtual image of the screen 32 at a suitable distance from the eyes, such as a near - focal distance, for example, 500 mm, 750 mm, or another suitable distance. In some examples, the visualization system 10 can include a single screen 32 and can direct the modulated light towards both of the user's eyes. In some examples, the visualization system 10 can include two screens 32 and can direct the modulated light from each screen 32 towards each of the user's eyes. In some examples, the visualization system 10 can include three or more screens 32. In a second configuration, the visualization system 10 can direct the modulated light directly towards one or both of the viewer's eyes. For example, the projection optical system 30 can form an image on the retina of the user's eye or can form an image on each of the retinas of the user's two eyes.
[0085] Embodiments Various embodiments are listed below. It is understood that the embodiments listed below can be combined with all aspects and other embodiments in accordance with the scope of the present invention.
[0086] Embodiment (a). A micro light-emitting diode (uLED) device, comprising a uLED die including a plurality of pixels, each pixel having a mesa of a semiconductor layer having sidewalls and including an active region, a plurality of die n-contacts in electrical communication with the n-type layer of the mesa, a plurality of die p-contacts in communication with the p-type layer of the mesa, and a die dielectric material insulating the die n-contact and the die p-contact, a source wafer; and a target wafer having a plurality of wafer n-contacts, a plurality of wafer p-contacts, and a target substrate on which a wafer dielectric material is disposed, wherein the wafer n-contact is directly bonded to the plurality of die n-contacts, the wafer p-contact is directly bonded to the die p-contacts, the wafer dielectric material is directly bonded to the die dielectric material, and the wafer dielectric material insulates the wafer n-contact and the wafer p-contact.
[0087] Embodiment (b). The uLED device of embodiment (a), wherein the die n-contact, the wafer n-contact, the die p-contact, and the wafer p-contact comprise a metal.
[0088] Embodiment (c). The uLED device of embodiment (a) or (b), wherein the die n-contact, the wafer n-contact, the die p-contact, and the wafer p-contact comprise the same metal.
[0089] Embodiment (d). The uLED device of any one of embodiments (a) to (c), wherein the die n-contact, the wafer n-contact, the die p-contact, and the wafer p-contact comprise one or more of copper (Cu), aluminum (Al), nickel (Ni), titanium (Ti), titanium tungsten (TiW), silver (Ag), gold (Au), platinum (Pt), and palladium (Pd).
[0090] Embodiment (e). The uLED device according to any one of Embodiments (a) to (d), wherein the die dielectric material and the wafer dielectric material have the same dielectric material.
[0091] Embodiment (f). The uLED device according to any one of Embodiments (a) to (e), wherein the die dielectric material and the wafer dielectric material have one or more of silicon oxide (SiO), silicon dioxide (SiO2), silicon nitride (SiN), silicon carbide (SiC), aluminum oxide (Al2O3), and aluminum nitride (AlN).
[0092] Embodiment (g). The uLED device according to any one of Embodiments (a) to (f), wherein the uLED die further has a die substrate in contact with the semiconductor layer including the active region.
[0093] Embodiment (h). The uLED device according to Embodiment (g), wherein the die substrate has a material selected from the group consisting of sapphire, silicon carbide, and group III nitrides.
[0094] Embodiment (i). The uLED device according to any one of Embodiments (a) to (h), wherein the target substrate has a substrate material selected from the group consisting of ceramic, silicon, aluminum, sapphire, silicon carbide, and group III nitrides.
[0095] Embodiment (j). The uLED device according to any one of Embodiments (a) to (i), further having an etching stop layer on the target substrate under the wafer n-contact, the wafer p-contact, and the wafer dielectric material.
[0096] Embodiment (k). The uLED device according to Embodiment (j), wherein the etching stop layer has a dielectric material different from the wafer dielectric material.
[0097] Embodiment (l). The wafer n - contact is directly bonded to the plurality of die n - contacts at respective n - contact bonding areas, the wafer p - contact is directly bonded to the plurality of die p - contacts at respective p - contact bonding areas, and the diameters of the n - contact bonding area and the p - contact bonding area have diameters in the range of 0.5 micrometers to 30 micrometers or less, a uLED device according to any one of Embodiments (a) to (k).
[0098] Embodiment (m). The wafer n - contact is directly bonded to the plurality of die n - contacts at respective n - contact bonding areas, the wafer p - contact is directly bonded to the plurality of die p - contacts at respective p - contact bonding areas, and the pitch between all centers of the n - contact bonding area and the p - contact bonding area is in the range of 1 micrometer or more to 60 micrometers or less, a uLED device according to any one of Embodiments (a) to (l).
[0099] Embodiment (n). The die n - contact and the die p - contact are connected in series to the wafer n - contact and the wafer p - contact, a uLED device according to any one of Embodiments (a) to (m).
[0100] Embodiment (nn). The width of each of the wafer n - contacts is 95% to 100% of the width of each of the die n - contacts at each position where the wafer n - contact is directly bonded, and / or the width of each of the wafer p - contacts is 95% to 100% of the width of each of the die p - contacts at each position where the wafer p - contact is directly bonded, and / or the width of the wafer dielectric material is 95% to 100% of the width of the die dielectric material at each position where the wafer p - contact is directly bonded, a uLED device according to any one of Embodiments (a) to (n).
[0101] Embodiment (o). A method for manufacturing a micro light-emitting diode (uLED) device, comprising: providing a target wafer having a target substrate with a plurality of wafer n-contacts, a plurality of wafer p-contacts, and a wafer dielectric material disposed thereon; depositing an etching stop layer on the target substrate; depositing a first dielectric material on the target substrate; preparing a dielectric material mask on the target substrate; etching the first dielectric material; removing the dielectric material mask; preparing a first metal contact layer on the target substrate; planarizing a preliminary surface of the target substrate; depositing a second dielectric material layer on the target substrate; positioning a contact mask on the target substrate; etching the second dielectric material; removing the contact mask; preparing a second metal contact layer on the target substrate; planarizing a second surface of the target substrate to form the plurality of wafer n-contacts and the plurality of wafer p-contacts insulated by the wafer dielectric material; bonding a source wafer to the target wafer, the source wafer including a uLED die having a plurality of pixels, each pixel having a mesa of a semiconductor layer with sidewalls and including an active region, a plurality of die n-contacts electrically communicating with the n-type layer of the mesa, a plurality of die p-contacts communicating with the p-type layer of the mesa, and a die dielectric material insulating the die n-contacts and the die p-contacts; and upon receiving the bonding, directly bonding the plurality of wafer n-contacts to the plurality of die n-contacts, directly bonding the plurality of wafer p-contacts to the die p-contacts, and directly bonding the wafer dielectric material to the die dielectric material.
[0102] Embodiment (p). The method of embodiment (o), wherein the wafer n-contacts are directly bonded to the plurality of die n-contacts at respective n-contact bonding areas, the wafer p-contacts are directly bonded to the plurality of die p-contacts at respective p-contact bonding areas, and the diameters of the n-contact bonding areas and the p-contact bonding areas are in the range of 0.5 micrometers to 30 micrometers or less.
[0103] Embodiment (q). The wafer n - contacts are directly joined to the plurality of die n - contacts at respective n - contact joining areas, the wafer p - contacts are directly joined to the plurality of die p - contacts at respective p - contact joining areas, and the pitch between all the centers of the n - contact joining areas and the p - contact joining areas is within a range of 1 micrometer or more and 60 micrometers or less. The method of embodiment (o) or (p).
[0104] Embodiment (r). Preparing the first metal contact layer and preparing the second metal contact layer each independently include depositing a seed layer and performing electroplating on the seed layer. The method of any one of embodiments (o) to (q).
[0105] Embodiment (s). The planarization of the preliminary surface of the target substrate and the planarization of the second surface of the target substrate each independently have flatness of 5 Å or less. The method of any one of embodiments (o) to (r).
[0106] Embodiment (t). The planarization of the preliminary surface of the target substrate and the planarization of the second surface of the target substrate each independently have a chemical mechanical polishing (CMP) process. The method of any one of embodiments (o) to (s).
[0107] Embodiment (u). The method of any one of embodiments (o) to (t) further having a cleaning process after one or both of the planarization of the preliminary surface of the target substrate and the planarization of the second surface of the target substrate.
[0108] Embodiment (v). Receiving the bonding of the uLED die to the target wafer, and the die n - contacts and the die p - contacts are connected in series to the wafer n - contacts and the wafer p - contacts. The method of any one of embodiments (o) to (u).
[0109] Embodiment (w). A method according to any one of embodiments (a) to (v), wherein each uLED has at least one characteristic dimension of 1 micrometer or more and 300 micrometers or less, and the characteristic dimension is selected from the group consisting of height, width, depth, thickness, and combinations thereof.
[0110] Embodiment (x). A method according to any one of embodiments (a) to (w), wherein for each uLED, the p-contact and the n-contact are formed on the same side of the pixel or the stack of semiconductor layers.
[0111] Embodiment (y). A source wafer having uLED dies, each of the uLED dies having a plurality of pixels each having a mesa of a semiconductor layer having sidewalls and including an active region, a plurality of die n-contacts in electrical communication with the n-type layer of the mesa, a plurality of die p-contacts in communication with the p-type layer of the mesa, and a die dielectric material insulating the die n-contacts and the die p-contacts, each of the die n-contacts and the die p-contacts having a contact opening having a diameter "d" and a center "c", and a pitch "p" between adjacent centers of each of the die n-contacts and the die p-contacts, wherein the "d" is in the range of 0.5 micrometer or more and 30 micrometers or less, and the "p" is in the range of 1 micrometer or more and 60 micrometers or less.
[0112] Throughout this specification, references to "one embodiment", "a particular embodiment", "one or more embodiments", or "an embodiment" mean that a particular mechanism, structure, material, or characteristic described in connection with that embodiment is included in at least one embodiment of the present disclosure. Thus, phrases such as "in one or more embodiments", "in a particular embodiment", "in one embodiment", or "in an embodiment" appearing in various places in this specification are not necessarily referring to the same embodiment of the present disclosure. Also, in one or more embodiments, the particular mechanisms, structures, materials, or characteristics are combined in any suitable manner.
[0113] Those skilled in the art, having the benefit of the teachings presented in the foregoing description and the related drawings, will think of numerous modifications and other embodiments of the present invention. Accordingly, it is to be understood that the present invention should not be limited to the specific embodiments disclosed, and that modifications and embodiments are intended to be included within the scope of the appended claims. It is also to be understood that other embodiments of the present invention may be practiced without the specific elements / steps specifically disclosed herein.
Claims
1. A micro light emitting diode (uLED) device, comprising a uLED die including a plurality of pixels, each pixel having a mesa of a semiconductor layer having sidewalls and including an active region; a plurality of die n-contacts electrically communicating with the n-type layer of the mesa; a plurality of die p-contacts communicating with the p-type layer of the mesa; and a die dielectric material insulating the die n-contacts and the die p-contacts; a source wafer having the same; a target wafer having a plurality of wafer n-contacts, a plurality of wafer p-contacts, and a target substrate on which a wafer dielectric material is disposed thereon, the wafer n-contacts being directly bonded to the plurality of die n-contacts, the wafer p-contacts being directly bonded to the die p-contacts, the wafer dielectric material being directly bonded to the die dielectric material, and the wafer dielectric material insulating the wafer n-contacts and the wafer p-contacts; having wherein the target wafer further has an etching stop layer on the target substrate under the wafer n-contacts, the wafer p-contacts, and the wafer dielectric material. The uLED device.
2. The uLED device according to claim 1, wherein the width of each of the wafer n-contacts is 100% of the width of each of the die n-contacts at each position where the wafer n-contacts are directly bonded, and / or the width of each of the wafer p-contacts is 100% of the width of each of the die p-contacts at each position where the wafer p-contacts are directly bonded, and / or the width of the wafer dielectric material is 100% of the width of the die dielectric material at each position where the wafer dielectric material is directly bonded.
3. The uLED device according to claim 1, wherein the die n-contacts, the wafer n-contacts, the die p-contacts, and the wafer p-contacts comprise a metal.
4. The uLED device according to claim 1, wherein the die n-contacts, the wafer n-contacts, the die p-contacts, and the wafer p-contacts comprise the same metal.
5. The die n-contact, the wafer n-contact, the die p-contact, and the wafer p-contact of claim 1 have one or more of copper (Cu), aluminum (Al), nickel (Ni), titanium (Ti), titanium tungsten (TiW), silver (Ag), gold (Au), platinum (Pt), and palladium (Pd). The uLED device according to claim 1.
6. The die dielectric material and the wafer dielectric material of claim 1 have the same dielectric material. The uLED device according to claim 1.
7. The die dielectric material and the wafer dielectric material include one or more of silicon oxide (SiO), silicon dioxide (SiO 2 ), silicon nitride (SiN), silicon carbide (SiC), aluminum oxide (Al 2 O 3 ), and aluminum nitride (AlN). The uLED device according to claim 1.
8. The uLED die of claim 1 further has a die substrate in contact with the semiconductor layer including the active region. The uLED device according to claim 1.
9. The die substrate of claim 8 has a material selected from the group consisting of sapphire, silicon carbide, and group III nitrides. The uLED device according to claim 8.
10. The target substrate of claim 1 has a substrate material selected from the group consisting of ceramic, silicon, aluminum, sapphire, silicon carbide, and group III nitrides. The uLED device according to claim 1.
11. The wafer n-contact is directly bonded to the plurality of die n-contacts at respective n-contact bonding areas, the wafer p-contact is directly bonded to the plurality of die p-contacts at respective p-contact bonding areas, and the diameters of the n-contact bonding areas and the p-contact bonding areas have diameters in the range of 0.5 micrometers to 30 micrometers or less. The uLED device according to claim 1.
12. The wafer n-contact is directly bonded to the plurality of die n-contacts at respective n-contact bonding areas, the wafer p-contact is directly bonded to the plurality of die p-contacts at respective p-contact bonding areas, and the pitch between all the centers of the n-contact bonding areas and the p-contact bonding areas is in the range of 1 micrometer or more to 60 micrometers or less. The uLED device according to claim 1.
13. The die n-contact and the die p-contact of claim 1 are connected in series to the wafer n-contact and the wafer p-contact. The uLED device according to claim 1.
14. A method of manufacturing a micro light emitting diode (uLED) device, comprising: A target wafer having a target substrate on which a plurality of wafer n-contacts, a plurality of wafer p-contacts, and a wafer dielectric material are disposed, depositing an etching stop layer on the target substrate, depositing a first dielectric material on the target substrate, preparing a dielectric material mask on the target substrate, etching the first dielectric material, and removing the dielectric material mask, preparing a first metal contact layer on the target substrate, planarizing a preliminary surface of the target substrate, depositing a second dielectric material layer on the target substrate, preparing a contact mask on the target substrate, etching the second dielectric material layer, and removing the contact mask, preparing a second metal contact layer on the target substrate, planarizing a second surface of the target substrate to form the plurality of wafer n-contacts and the plurality of wafer p-contacts insulated by the wafer dielectric material, preparing by, bonding a source wafer to the target wafer, the source wafer including a uLED die including a plurality of pixels each having a mesa of a semiconductor layer having sidewalls and including an active region, a plurality of die n-contacts in electrical communication with an n-type layer of the mesa, a plurality of die p-contacts in communication with a p-type layer of the mesa, and a die dielectric material insulating the die n-contacts and the die p-contacts, having, receiving the bonding such that the plurality of wafer n-contacts are directly bonded to the plurality of die n-contacts, the plurality of wafer p-contacts are directly bonded to the die p-contacts, and the wafer dielectric material is directly bonded to the die dielectric material, method.
15. The method according to claim 14, wherein the wafer n-contacts are directly bonded to the plurality of die n-contacts in respective n-contact bonding areas, the wafer p-contacts are directly bonded to the plurality of die p-contacts in respective p-contact bonding areas, and the diameters of the n-contact bonding areas and the p-contact bonding areas have diameters within a range of 0.5 micrometer to 30 micrometers or less.
16. The wafer n-contact is directly bonded to the plurality of die n-contacts at respective n-contact bonding areas, the wafer p-contact is directly bonded to the plurality of die p-contacts at respective p-contact bonding areas, and a pitch between all centers of the n-contact bonding areas and the p-contact bonding areas is in a range of 1 micrometer or more and 60 micrometers or less. The method according to claim 14.
17. Preparing the first metal contact layer and preparing the second metal contact layer each independently include depositing a seed layer and performing electroplating on the seed layer. The method according to claim 14.
18. The planarization of the preliminary surface of the target substrate and the planarization of the second surface of the target substrate each independently have a flatness of 5 Å or less. The method according to claim 14.
19. The planarization of the preliminary surface of the target substrate and the planarization of the second surface of the target substrate each independently have a chemical mechanical polishing (CMP) process. The method according to claim 14.
20. The method according to claim 14, further comprising a cleaning process after one or both of the planarization of the preliminary surface of the target substrate and the planarization of the second surface of the target substrate.
21. Receiving the bonding of the uLED die to the target wafer, such that the die n-contact and the die p-contact are connected in series to the wafer n-contact and the wafer p-contact. The method according to claim 14.
Citation Information
Patent Citations
Micro LED module and manufacturing method thereof
JP2018107421A
Display device, display module, electronic apparatus, and manufacturing method for display device
JP2021092764A
Pixel architectures for low power micro light-emitting diode displays
US20190355784A1
Chip transfer method, display device, chip and target substrate
US20210134755A1
Bonding of light emitting diode arrays
US20210151649A1