Linear regulator circuit
The linear regulator circuit stabilizes output voltage by using a feedback-controlled P-channel transistor with a protection circuit to clamp the gate voltage, addressing overshoot issues and maintaining voltage stability.
Patent Information
- Application Number
- JP2021122230
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-07-27
- Publication Date
- 2025-07-30
- Estimated Expiration
- 2041-07-27
AI Technical Summary
Linear regulator circuits experience overshoot when input voltage suddenly rises above the target output voltage level due to delayed feedback response, causing the output voltage to rise accordingly.
Incorporating a P-channel output transistor with a feedback circuit that controls the gate voltage and a protection circuit that clamps the gate voltage below a predetermined level, preventing overshoot by supplying current from the output line to the gate when the voltage difference exceeds a threshold.
Suppresses overshoot by maintaining a stable gate-source voltage, reducing the output voltage increase and shortening the feedback response time, thereby stabilizing the output voltage.
Smart Images

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Abstract
Description
Technical Field
[0001] The present disclosure relates to a linear regulator.
Background Art
[0002] In various electronic circuits and electronic devices, a linear regulator circuit is used to generate a voltage that maintains a constant voltage level regardless of the power supply voltage (input voltage).
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] Depending on the application, the input voltage V IN of the linear regulator circuit may vary greatly. When the input voltage V IN is lower than the target voltage level V OUT of the output voltage V OUT(REF) of the linear regulator circuit, the gate voltage V PG of the output transistor of the linear regulator circuit drops significantly due to feedback. At this time, when the output transistor is fully on, V OUT = V IN is obtained.
[0005] From this state, if the input voltage V IN suddenly rises to a voltage level higher than the target level V OUT(REF) while the output transistor remains fully on, the output voltage V OUT rises following the input voltage V IN and overshoot occurs.
[0006] The present disclosure has been made in view of such circumstances, and an exemplary object of one of its aspects is to provide a linear regulator circuit capable of suppressing overshoot.
Means for Solving the Problem
[0007] A linear regulator circuit according to an aspect of the present disclosure includes an input line, an output line, a P-channel output transistor connected between the input line and the output line, and a feedback circuit that feedback-controls the gate voltage of the output transistor so that the output voltage of the output line approaches a target level, and a protection circuit that clamps the gate voltage of the output transistor so that it does not fall below a voltage level that is a predetermined voltage lower than the output voltage.
[0008] Another aspect of the present disclosure is also a linear regulator circuit. This linear regulator circuit includes an input line, an output line, a P-channel output transistor connected between the input line and the output line, a feedback circuit that feedback-controls the gate voltage of the output transistor so that the output voltage of the output line approaches a target level, and a protection circuit that is connected between the output line and the gate of the output transistor, conducts when the potential difference between the output voltage and the gate voltage exceeds a predetermined voltage, and supplies current from the output line to the gate of the output transistor.
[0009] In addition, combinations of the above components arbitrarily, and components and expressions mutually replaced between methods, apparatuses, systems, etc. are also effective as aspects of the present invention. Furthermore, the description of this item (Means for Solving the Problem) does not explain all the essential features of the present invention, and therefore, sub-combinations of these described features can also be the present invention.
Advantages of the Invention
[0010] According to an aspect of the present disclosure, overshoot can be suppressed.
Brief Description of the Drawings
[0011]
Figure 1
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DETAILED DESCRIPTION OF THE INVENTION
[0012] (Overview of Embodiment) The overview of some exemplary embodiments of the present disclosure will be described. This overview is for the purpose of providing a basic understanding of the embodiments as a prelude to the detailed description to follow, and simplifies and describes some concepts of one or more embodiments. It does not limit the scope of the invention or the disclosure. This overview is not an all-inclusive overview of all possible embodiments, nor is it intended to identify the important elements of all embodiments or to demarcate the scope of some or all aspects. For convenience, "one embodiment" may be used to refer to one embodiment (example or modified example) or a plurality of embodiments (examples or modified examples) disclosed in this specification.
[0013] A linear regulator circuit according to an embodiment includes an input line, an output line, a P-channel output transistor connected between the input line and the output line, a feedback circuit that feedback-controls the gate voltage of the output transistor so that the output voltage of the output line approaches a target level, and a protection circuit that clamps the gate voltage of the output transistor so that it does not fall below a voltage level that is a predetermined voltage lower than the output voltage.
[0014] Input voltage V IN is lower than the target voltage level V OUT of the output voltage V OUT(REF) , the feedback circuit attempts to lower the gate voltage V PG of the output transistor of the linear regulator circuit, but the gate voltage V PG is clamped by the protection circuit so as not to fall below a voltage level (clamp level) that is a predetermined voltage Δ lower than the output voltage V OUT . V PG =V OUT -ΔV V OUT ≒V IN is assumed to hold, then the gate-source voltage V GS of the output transistor is clamped to ΔV. From this state, assume that the input voltage V IN suddenly rises to a voltage level higher than the target level V OUT(REF) . Immediately before, since the gate-source voltage V GS of the output transistor is clamped to ΔV, even if the input voltage V IN rises, the overshoot of the output voltage V OUT can be suppressed.
[0015] In one embodiment, the protection circuit may be connected between the output line and the gate of the output transistor, conduct when the potential difference between the output voltage and the gate voltage exceeds a predetermined voltage, and supply current from the output line to the gate of the output transistor. According to this configuration, the gate voltage of the output transistor can be increased by the current flowing from the output line through the protection circuit. Even if current is supplied to the gate of the output transistor from a path other than the output line, the output voltage does not change. However, in this configuration, the current flowing from the output line to the gate acts in the direction of decreasing the output voltage, so overshoot can be further suppressed.
[0016] A linear regulator circuit according to one embodiment includes an input line, an output line, a P-channel output transistor connected between the input line and the output line, a feedback circuit that feedback-controls the gate voltage of the output transistor so that the output voltage of the output line approaches a target level, and a protection circuit connected between the output line and the gate of the output transistor, which conducts when the potential difference between the output voltage and the gate voltage exceeds a predetermined voltage and supplies current from the output line to the gate of the output transistor.
[0017] In one embodiment, the protection circuit may include a gate element that conducts when the voltage across both ends exceeds a threshold voltage.
[0018] In one embodiment, the gate element may include a P-channel transistor with its gate and drain connected.
[0019] In one embodiment, the protection circuit may include a current source that becomes active when the voltage across both ends exceeds a threshold voltage.
[0020] In one embodiment, the protection circuit may include a rectifying element through which current can flow from the output line towards the gate of the output transistor and that blocks the reverse current.
[0021] In one embodiment, the rectifying element may include a field effect transistor with its gate-source terminals connected.
[0022] In one embodiment, the rectifying element may include a diode.
[0023] In one embodiment, the protection circuit may include a switch that turns off when the linear regulator circuit is disabled.
[0024] In one embodiment, the protection circuit may include a switch that turns off when the gate voltage of the output transistor is higher than a predetermined threshold value.
[0025] In one embodiment, the linear regulator circuit may be integrally formed on a single semiconductor substrate. "Integrally formed" includes cases where all components of the circuit are formed on the semiconductor substrate and cases where the main components of the circuit are integrally formed. For adjusting circuit constants, some resistors, capacitors, etc. may be provided outside the semiconductor substrate. By integrating the circuit on a single chip, the circuit area can be reduced and the characteristics of the circuit elements can be kept uniform.
[0026] (Embodiment) Hereinafter, preferred embodiments will be described with reference to the drawings. The same or equivalent components, members, and processes shown in each drawing are denoted by the same reference numerals, and repeated explanations are omitted as appropriate. Also, the embodiments are illustrative and not restrictive of the invention, and not all features and combinations thereof described in the embodiments are necessarily essential to the invention.
[0027] In this specification, the state where "member A is connected to member B" includes cases where member A and member B are physically directly connected, and cases where member A and member B are indirectly connected via other members that do not affect the electrical connection state or inhibit the function. Similarly, "a state in which component C is provided between component A and component B" includes not only cases in which components A and C, or components B and C, are directly connected, but also cases in which they are indirectly connected via other components that do not affect the electrical connection state or impede function.
[0028] Furthermore, "signal A (voltage, current) corresponds to signal B (voltage, current)" means that signal A has a correlation with signal B, and specifically means (i) when signal A is signal B, (ii) when signal A is proportional to signal B, (iii) when signal A is obtained by level-shifting signal B, (iv) when signal A is obtained by amplifying signal B, (v) when signal A is obtained by inverting signal B, (vi) or any combination thereof. Those skilled in the art will understand that the scope of "corresponding to" is determined depending on the type and application of signals A and B.
[0029] The vertical and horizontal axes of the waveform diagrams and time charts referred to in this specification have been appropriately enlarged or reduced to facilitate understanding, and the waveforms shown have been simplified, exaggerated, or emphasized to facilitate understanding.
[0030] 1 is a circuit diagram of a linear regulator circuit 100 according to an embodiment. The linear regulator circuit 100 receives an input voltage V IN Receive the predetermined target level V OUT(REF) The output voltage V is regulated to OUT and supplies it to a load (not shown) connected to an output terminal OUT (output line 104). The linear regulator circuit 100 is also called an LDO (Low Drop Output).
[0031] The linear regulator circuit 100 is monolithically integrated on a single semiconductor substrate. The linear regulator circuit 100 may be an IC (Integrated Circuit) that is a standalone linear regulator circuit, or may be an internal power supply built into an IC that has another function.
[0032] The linear regulator circuit 100 includes an output transistor 110, a feedback circuit 120, and a protection circuit 130. The output transistor 110 is a P-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor), whose source is connected to the input line 102 and whose drain is connected to the output line 104. Also, an output capacitor C1 is connected to the output line 104.
[0033] The feedback circuit 120 performs feedback control on the gate voltage V PG of the output transistor 110 so that the voltage of the output line 104 approaches the target level. For example, the feedback circuit 120 includes resistors R11, R12 and an error amplifier 112. The resistors R11, R12 divide the output voltage V OUT to generate a feedback voltage V FB . The error amplifier 122 amplifies the error between the feedback voltage V FB and the reference voltage V REF to generate the gate voltage V PG of the output transistor 110. By the feedback circuit 120, the output voltage V OUT is stabilized to the target level V REF corresponding to the reference voltage V OUT(REF) . V OUT(REF) =V REF ×(R11 + R12) / R12
[0034] The protection circuit 130 clamps the gate voltage V PG of the output transistor 110 so that it does not fall below a voltage level (referred to as the clamp level) that is a predetermined voltage ΔV lower than the output voltage V OUT generated on the output line 104. V CL =V OUT - ΔV
[0035] Preferably, the protection circuit 130 is connected between the output line 104 and the gate of the output transistor 110, and the output voltage V OUT and the gate voltage V PGWhen the potential difference exceeds a predetermined voltage ΔV, it conducts and is configured to supply a current Ix from the output line 104 to the gate of the output transistor 110.
[0036] The above is the configuration of the linear regulator circuit 100. Next, its operation will be described. The advantages of the linear regulator circuit 100 will become clear by comparison with comparative technologies. Therefore, first, the overshoot that occurs in the linear regulator circuit according to the comparative technology will be described.
[0037] FIG. 2 is an operation waveform diagram of a linear regulator circuit 100R according to a comparative technology. The linear regulator circuit 100R according to the comparative technology is obtained by omitting the protection circuit 130 from the linear regulator circuit 100 of FIG. 1.
[0038] Before time t0, the input voltage V IN has a voltage level V0 that is higher than the target level V OUT of the output voltage V OUT(REF) At this time, the gate voltage V PG of the output transistor 110 is the voltage level V PG0
[0039] Between times t1 and t2, the input voltage V IN has a voltage level V1 that is lower than the target level V OUT of the output voltage V OUT(REF) At this time, due to the feedback by the feedback circuit 120, the gate voltage V PG of the output transistor 110 has dropped to a voltage level (0V in this example) V OUT lower than the output voltage V PG1 and the output transistor 110 is in a full-on state. The output voltage V OUT takes a voltage level close to the input voltage V IN (=V1).
[0040] At time t2, the input voltage V IN becomes the target level V OUT of the output voltage V OUT(REF) Assume that it rises steeply toward the higher original voltage level V1. Due to the response delay of the feedback circuit 120, there is a delay in the change of the gate voltage V PG from V PG1 to V PG0 . During this delay, since the output transistor 110 is fully on, the relationship of V OUT ≈V IN holds. While maintaining the relationship of V OUT ≈V IN , when the input voltage V IN rises, the output voltage V OUT rises accordingly. Then, due to the feedback by the feedback circuit 120, as the gate voltage V PG approaches V PG0 , the output voltage V OUT approaches the target level V OUT(REF) .
[0041] In this way, in the comparative technique, when the input voltage V IN rises steeply, the output voltage V OUT overshoots.
[0042] Subsequently, the operation of the linear regulator circuit 100 will be described. FIG. 3 is an operation waveform diagram of the linear regulator circuit 100 in FIG. 1.
[0043] The state before time t0 is the same as that in FIG. 2 (comparative technique). The input voltage V IN has a voltage level V0 higher than the target level V OUT of the output voltage V OUT(REF) . At this time, the gate voltage V PG of the output transistor 110 is higher than the clamp level V OUT based on the output voltage V CL , so it is not affected by the protection circuit 130 and is at the same voltage level V PG0 as in FIG. 2.
[0044] Between times t1 and t2, the input voltage V IN is the target level V OUT of the output voltage V OUT(REF)It has a lower voltage level V1. At this time, the feedback circuit 120 attempts to lower the gate voltage V PG to the voltage level V PG0 shown in FIG. 2. However, when the potential difference V OUT between the output voltage V PG and the gate voltage V OUT -V PG exceeds a predetermined voltage ΔV, the protection circuit 130 conducts and supplies a current Ix from the output line 104 to the gate of the output transistor 110. By supplying this current Ix, the gate voltage V PG of the output transistor 110 rises, and the potential difference from the output voltage V OUT is maintained at a constant ΔV. At this time, the gate voltage V PG is clamped at the clamp level V CL =V OUT -ΔV. The voltage V GS between the gate and source of the output transistor 110 at times t1 to t2 is smaller than that of the comparative technique (FIG. 2).
[0045] At time t2, the input voltage V IN rapidly rises toward the original voltage level V1, which is higher than the target level V OUT of the output voltage V OUT(REF) . Since the voltage V GS between the gate and source of the output transistor 110 at this time is smaller than that of the comparative technique, even when the input voltage V IN rises, the amount of increase in the output voltage V OUT is suppressed compared to the comparative technique. Thus, overshoot can be suppressed.
[0046] Also, in this embodiment, after time t2, the time until the gate voltage V PG reaches the voltage level V PG0 is shorter than that of the comparative technique. Thus, overshoot can be suppressed.
[0047] Moreover, the protection circuit 130 is configured to supply the current Ix from the output line 104 to the gate of the output transistor 110. Since this current Ix is supplied from the output capacitor C1, the output voltage V OUTis reduced, or acts also in the direction of suppressing the overshoot of the output voltage V OUT Thus, compared with the case where the current Ix for increasing the gate voltage V PG is supplied from a location other than the output line 104 (for example, the input line 102), the effect of suppressing overshoot becomes stronger.
[0048] The above is the operation of the linear regulator circuit 100.
[0049] The present disclosure is understood as the block diagram and circuit diagram of FIG. 1, or extends to various devices and methods derived from the above description, and is not limited to a specific configuration. Hereinafter, in order to help understand and clarify the essence and operation of the present disclosure and the present invention rather than narrowing the scope of the present disclosure, more specific configuration examples and embodiments will be described.
[0050] (Example 1) FIG. 4 is a circuit diagram of a linear regulator circuit 100A according to Example 1. The protection circuit 130A includes a gate element 132. The gate element 132 is in a cut-off state when the voltage across its both ends is smaller than the threshold voltage V TH and conducts when the voltage across its both ends exceeds the threshold voltage V TH . The threshold voltage V TH is determined according to ΔV. When the gate element 132 conducts, a current Ix flows from the output line 104 toward the gate of the output transistor 110, and the gate voltage V PG is clamped.
[0051] (Example 2) FIG. 5 is a circuit diagram of a linear regulator circuit 100B according to Example 2. The protection circuit 130B includes a rectifying element 134 in addition to the gate element 132. When the gate element 132 is configured using a MOSFET or the like, since a body diode (parasitic diode) BD exists, it is always in a conducting state in the reverse direction. Therefore, the gate voltage V PG of the output transistor 110 is the output voltage V OUTIn a higher state, it is not preferable that current flows from the gate of the output transistor 110 to the output line 104.
[0052] Also, during the stop of the linear regulator circuit 100B, due to the body diode BD of the gate element 132, a non-zero output voltage V is applied to the output line 104. OUT There is a possibility of being generated.
[0053] To eliminate the influence of the body diode BD of the gate element 132, a rectifying element 134 is provided. The rectifying element 134 allows a current Ix flowing from the output line 104 towards the gate of the output transistor 110 to flow, and blocks the reverse current.
[0054] FIG. 6 is a circuit diagram showing a specific configuration example (100C) of the linear regulator circuit 100B in FIG. 5. The protection circuit 130C includes a P-channel transistor MP1 corresponding to the gate element 132 and an N-channel transistor MN1 corresponding to the rectifying element 134.
[0055] The source of the P-channel transistor MP1 is connected to the output line 104. The gate and drain of the P-channel transistor MP1 are connected. When the voltage across both ends of the P-channel transistor MP1 (drain-source voltage) becomes larger than the gate threshold Vt of the P-channel transistor MP1, the P-channel transistor MP1 turns on and the current Ix flows.
[0056] The P-channel transistor MP1 can always conduct in the reverse direction due to its body diode.
[0057] The source of the N-channel transistor MN1 is connected to the drain of the P-channel transistor MP1, and the drain of the N-channel transistor MN1 is connected to the gate of the output transistor 110. The gate and source of the N-channel transistor MN1 are connected, so the channel of the N-channel transistor MN1 is always blocked and does not contribute to the operation of the protection circuit 130C. The body diode of the N-channel transistor MN1 blocks the current flowing from the gate of the output transistor 110 to the output line 104.
[0058] The protection circuit 130C conducts when the potential difference between the output voltage V OUT and the gate voltage V PG exceeds ΔV defined by Vf + Vt, and a current Ix flows. Vf is the forward voltage of the body diode of the transistor MN1, and Vt is the threshold voltage of the P-channel transistor MP1.
[0059] (Embodiment 3) FIG. 7 is a circuit diagram of the linear regulator circuit 100D according to Embodiment 3. The protection circuit 130D includes a switch 136 instead of the rectifying element 134 in FIG. 5. An enable signal EN of the linear regulator circuit 100D is input to the switch 136, and it turns on during the operation of the linear regulator circuit 100D. Since the switch 136 turns off during the stop of the linear regulator circuit 100D, it is possible to prevent a non-zero output voltage V OUT from being generated on the output line 104.
[0060] (Embodiment 4) FIG. 8 is a circuit diagram of the linear regulator circuit 100E according to Embodiment 4. The protection circuit 130E includes a switch 138. A reverse current flows through the protection circuit 130D when V PG [[ID=2,6]]>V OUT , that is, when V PG >V OUT(REF) . The comparator COMP1 compares the gate voltage V PG with the threshold voltage VTH Compared with V PG >V TH When it is, turn off switch 138, and V PG <V TH When it is, turn on switch 138. The threshold value V TH is the target level V of the output voltage V OUT and can be defined according to OUT(REF) .
[0061] (Modification example) The above-described embodiments are examples, and those skilled in the art will understand that various modifications are possible for the combination of each of these components and each processing process. Hereinafter, such modification examples will be described.
[0062] (Modification example 1) Regarding the protection circuit 130, the positions of the gate element 132 and the rectifying element 134 may be interchanged. Also, in FIG. 6, the gate element 132 may be composed of an N-channel transistor and the rectifying element 134 may be composed of a P-channel transistor.
[0063] (Modification example 2) The gate element 132 is not limited to a MOS transistor. FIG. 9 is a circuit diagram showing a modification example of the protection circuit 130. For example, the gate element 132 may be a current source that becomes active and generates a current Ix when the voltage between both ends exceeds a threshold value. Alternatively, the gate element 132 may be a Zener diode ZD1. It may also be a diode composed of a bipolar transistor.
[0064] It is to be understood by those skilled in the art that the embodiments are examples and that various modifications exist for the combination of each of their components and each processing process, and that such modification examples are also included in the scope of the present disclosure or the present invention.
Explanation of reference numerals
[0065] 100 Linear regulator circuit 102 Input line 104 Output line IN Input terminal OUT Output terminal C1 Output capacitor 110 Output transistor 120 Feedback circuit R11 First resistor R12 Second resistor 122 Error amplifier 130 Protection circuit 132 Gate element 134 Rectifying element 136, 138 Switch
Claims
1. An input line, an output line, a P-channel output transistor connected between the input line and the output line, a feedback circuit that feedback-controls the gate voltage of the output transistor so that the output voltage of the output line approaches a target level, a protection circuit that clamps so that the gate voltage of the output transistor does not fall below a voltage level that is a predetermined voltage lower than the output voltage, comprising: The protection circuit is connected between the output line and the gate of the output transistor, conducts when the potential difference between the output voltage and the gate voltage exceeds the predetermined voltage, and supplies current from the output line to the gate of the output transistor, a linear regulator circuit.
2. An input line, an output line, a P-channel output transistor connected between the input line and the output line, a feedback circuit that feedback-controls the gate voltage of the output transistor so that the output voltage of the output line approaches a target level, a protection circuit connected between the output line and the gate of the output transistor, conducts when the potential difference between the output voltage and the gate voltage exceeds a predetermined voltage, and supplies current from the output line to the gate of the output transistor, comprising a linear regulator circuit.
3. The protection circuit includes a gate element that conducts when the voltage across both ends exceeds a threshold voltage, the linear regulator circuit according to claim 1 or 2.
4. An input line, an output line, a P-channel output transistor connected between the input line and the output line, a feedback circuit that feedback-controls the gate voltage of the output transistor so that the output voltage of the output line approaches a target level, a protection circuit that clamps so that the gate voltage of the output transistor does not fall below a voltage level that is a predetermined voltage lower than the output voltage, comprising: The protection circuit includes a gate element that conducts when the voltage across both ends exceeds a threshold voltage, a linear regulator circuit.
5. The gate element includes a P-channel transistor with the gate-drain connected, the linear regulator circuit according to claim 3 or 4.
6. The linear regulator circuit according to claim 1 or 2, wherein the protection circuit includes a current source that becomes active when the voltage across both ends exceeds a threshold voltage.
7. An input line, an output line, a P-channel output transistor connected between the input line and the output line, a feedback circuit that feedback-controls the gate voltage of the output transistor so that the output voltage of the output line approaches a target level, a protection circuit that clamps the gate voltage of the output transistor so as not to fall below a voltage level that is a predetermined voltage lower than the output voltage, comprising: The linear regulator circuit, wherein the protection circuit includes a current source that becomes active when the voltage across both ends exceeds a threshold voltage.
8. The linear regulator circuit according to any one of claims 1 to 7, wherein the protection circuit includes a rectifying element that allows a current to flow from the output line toward the gate of the output transistor and blocks the reverse current.
9. An input line, an output line, a P-channel output transistor connected between the input line and the output line, a feedback circuit that feedback-controls the gate voltage of the output transistor so that the output voltage of the output line approaches a target level, a protection circuit that clamps the gate voltage of the output transistor so as not to fall below a voltage level that is a predetermined voltage lower than the output voltage, comprising: The linear regulator circuit, wherein the protection circuit includes a rectifying element that allows a current to flow from the output line toward the gate of the output transistor and blocks the reverse current.
10. The linear regulator circuit according to claim 8 or 9, wherein the rectifying element includes a field-effect transistor having its gate-source connected.
11. The linear regulator circuit according to claim 8 or 9, wherein the rectifying element includes a diode.
12. The linear regulator circuit according to any one of claims 1 to 7, wherein the protection circuit includes a switch that turns off when the linear regulator circuit is disabled.
13. A linear regulator circuit, an input line, an output line, a P-channel output transistor connected between the input line and the output line, A feedback circuit that feedback-controls the gate voltage of the output transistor so that the output voltage of the output line approaches a target level; A protection circuit that clamps so that the gate voltage of the output transistor does not fall below a voltage level that is a predetermined voltage lower than the output voltage; Comprising; The protection circuit is a linear regulator circuit including a switch that turns off when the linear regulator circuit is disabled.
14. The linear regulator circuit according to any one of claims 1 to 7, wherein the protection circuit includes a switch that turns off when the gate voltage of the output transistor is higher than a predetermined threshold value.
15. An input line, An output line, A P-channel output transistor connected between the input line and the output line, A feedback circuit that feedback-controls the gate voltage of the output transistor so that the output voltage of the output line approaches a target level; A protection circuit that clamps so that the gate voltage of the output transistor does not fall below a voltage level that is a predetermined voltage lower than the output voltage; Comprising; The protection circuit is a linear regulator circuit including a switch that turns off when the gate voltage of the output transistor is higher than a predetermined threshold value.
16. The linear regulator circuit according to any one of claims 1 to 15, which is integrally integrated on one semiconductor substrate.
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