Method of manufacturing semiconductor device and processing apparatus for semiconductor substrate

Abstract

To prevent cracking and chipping occurring in a semiconductor substrate in dividing the semiconductor substrate.SOLUTION: A method for manufacturing a semiconductor device includes the steps of: specifying, on a surface of a semiconductor substrate, a plurality of element areas and an outer peripheral area around a central area where the plurality of element areas exist; forming a central modified layer extending from the surface of the semiconductor substrate in a thickness direction of the semiconductor substrate and also extending along an interface of the plurality of element areas; forming an outer peripheral modified layer extending from the surface of the semiconductor substrate in the thickness direction of the semiconductor substrate and also extending to an edge portion of the semiconductor substrate so as to divide the outer peripheral area into a plurality of micro areas each having a smaller area than each element area; forming, within the central area, an internal modified layer extending along the surface of the semiconductor substrate inside the semiconductor substrate; dividing the semiconductor substrate along the internal modified layer; and dividing the semiconductor substrate along the central modified layer and the outer peripheral modified layer.SELECTED DRAWING: Figure 7

Description

Technical Field

[0001] The technology disclosed in this specification relates to a method for manufacturing a semiconductor device and a processing apparatus for a semiconductor substrate.

[0002] Patent Document 1 discloses a method for processing a semiconductor substrate. In Patent Document 1, an internal modification layer is formed inside the semiconductor substrate by irradiating a laser that converges inside the semiconductor substrate. The internal modification layer is formed so as to spread along the surface of the semiconductor substrate. By forming such an internal modification layer, the semiconductor substrate can be processed. For example, a thinner semiconductor substrate can be obtained by dividing the semiconductor substrate along the internal modification layer.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] A semiconductor substrate with the above-described internal modification layer formed thereon can be divided along the internal modification layer by applying a force to the semiconductor substrate in a direction that separates its front and back surfaces. However, when dividing the semiconductor substrate, a large local stress is applied to the edge of the semiconductor substrate. Therefore, in the technology of Patent Document 1, cracks or chips may occur in the semiconductor substrate starting from the edge of the semiconductor substrate, and in some cases, the semiconductor substrate cannot be accurately divided along the internal modification layer. This specification provides a technology capable of suppressing cracks and chips that occur in a semiconductor substrate when dividing the semiconductor substrate.

Means for Solving the Problems

[0005] The manufacturing method of the semiconductor device (100) disclosed in this specification includes a step of specifying, on the surface (12a) of a semiconductor substrate (12), a plurality of element regions (60) and an outer peripheral region (64) around a central region (62) where the plurality of element regions are located; a step of forming a central modified layer (72) that extends from the surface of the semiconductor substrate in the thickness direction of the semiconductor substrate and extends along the interfaces of the plurality of element regions by irradiating the semiconductor substrate with a laser (L) using a laser irradiation device (26); a step of forming an outer peripheral modified layer (74) that extends from the surface of the semiconductor substrate in the thickness direction of the semiconductor substrate and extends to the edge of the semiconductor substrate so as to divide the outer peripheral region into a plurality of minute regions (73) having an area smaller than that of the element regions by irradiating the semiconductor substrate with a laser using the laser irradiation device; a step of forming an internal modified layer (76, 176) that extends along the surface of the semiconductor substrate inside the semiconductor substrate in the central region by irradiating the semiconductor substrate with a laser using the laser irradiation device; a step of dividing the semiconductor substrate along the internal modified layer; and a step of dividing the semiconductor substrate along the central modified layer.

[0006] As a result of intensive studies by the inventors, it has been found that the stress applied to the edge of the semiconductor substrate when dividing the semiconductor substrate along the internal modification layer is substantially proportional to the surface area of the region including the edge. That is, when dividing the semiconductor substrate along the internal modification layer, the larger the surface area of the semiconductor substrate, the higher the stress applied to the edge of the semiconductor substrate. In the above manufacturing method, in addition to the central modification layer extending along the interface of each element region, an outer peripheral modification layer that divides the outer peripheral region into a plurality of minute regions is formed. The outer peripheral modification layer is formed so as to extend to the edge of the semiconductor substrate. That is, a plurality of minute regions having a smaller area than the element region are formed at the edge of the semiconductor substrate. Therefore, in the step of dividing the semiconductor substrate along the internal modification layer, the stress applied to the edge of the semiconductor substrate becomes a magnitude corresponding to the surface area of each of the plurality of subdivided minute regions. That is, when dividing the semiconductor substrate along the internal modification layer, the stress applied to the edge of the semiconductor substrate is dispersed. Therefore, in this manufacturing method, cracks and chips generated in the semiconductor substrate can be suppressed. And, a semiconductor device can be manufactured by dividing the semiconductor substrate along the central modification layer.

[0007] Note that the steps of forming the central modification layer, forming the outer peripheral modification layer, and forming the internal modification layer in the central region may be executed in any order.

[0008] The processing apparatus disclosed in this specification includes a laser irradiation device, a detection device, and a control device. The control device performs a process of specifying, by the detection device, a plurality of element regions and an outer peripheral region around a central region where the plurality of element regions exist on the surface of a semiconductor substrate, a process of forming a central modified layer that extends from the surface of the semiconductor substrate in the thickness direction of the semiconductor substrate and extends along the interfaces of the plurality of element regions by irradiating the semiconductor substrate with a laser by the laser irradiation device, a process of forming an outer peripheral modified layer that extends from the surface of the semiconductor substrate in the thickness direction of the semiconductor substrate and extends to the edge of the semiconductor substrate so as to partition the outer peripheral region into a plurality of minute regions having an area smaller than that of the element regions by irradiating the semiconductor substrate with a laser by the laser irradiation device, and a process of forming an internal modified layer that extends along the surface of the semiconductor substrate inside the semiconductor substrate in the central region by irradiating the semiconductor substrate with a laser by the laser irradiation device.

[0009] In addition to the central modified layer that extends along the interfaces of each element region, this processing apparatus forms an outer peripheral modified layer that partitions the outer peripheral region into a plurality of minute regions. The outer peripheral modified layer is formed so as to extend to the edge of the semiconductor substrate. That is, a plurality of minute regions having an area smaller than that of the element regions are formed at the edge of the semiconductor substrate. Therefore, for example, when the semiconductor substrate is divided along the internal modified layer, the stress applied to the edge of the semiconductor substrate becomes a magnitude corresponding to the surface area of each of the plurality of subdivided minute regions. That is, the stress applied to the edge of the semiconductor substrate is dispersed. Therefore, in this processing apparatus, cracks and chipping generated in the semiconductor substrate can be suppressed in the process subsequent to the processing of the semiconductor substrate.

Brief Description of the Drawings

[0010]

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Mode for Carrying Out the Invention

[0011] The technical elements disclosed in this specification are listed below. Each of the following technical elements is independently useful.

[0012] In the method for manufacturing a semiconductor device according to an example disclosed in this specification, in the step of forming the outer peripheral modification layer, the outer peripheral modification layer may be formed so as to partition the entire outer peripheral region into the minute regions.

[0013] According to this configuration, in the step of splitting the semiconductor substrate along the internal modification layer, the stress applied to the outer peripheral region can be more dispersed.

[0014] In the method for manufacturing a semiconductor device according to an example disclosed in this specification, in the step of forming the internal modification layer, the internal modification layer may be formed in the central region and the outer peripheral region.

[0015] According to this configuration, the entire semiconductor substrate can be divided along the internal modification layer.

[0016] In a method for manufacturing a semiconductor device according to an example disclosed in this specification, the central modification layer, the outer peripheral modification layer, and the internal modification layer may be formed such that the central modification layer and the internal modification layer are connected, and the outer peripheral modification layer and the internal modification layer are not connected.

[0017] According to this configuration, in the step of dividing the semiconductor substrate along the internal modification layer, in the outer peripheral region, cracks and fractures are suppressed from occurring in the semiconductor layer on the side where the outer peripheral modification layer is not formed.

[0018] In a method for manufacturing a semiconductor device according to an example disclosed in this specification, in the step of forming the internal modification layer, it is not necessary to form the internal modification layer in the outer peripheral region.

[0019] According to this configuration, in the step of dividing the semiconductor substrate along the internal modification layer, only the central region can be divided while leaving the outer peripheral region intact.

[0020] A processing apparatus for a semiconductor substrate according to an example disclosed in this specification may further execute a step of dividing the semiconductor substrate along the internal modification layer and a step of dividing the semiconductor substrate along the central modification layer.

[0021] According to this configuration, the semiconductor substrate can be separated into individual pieces while suppressing cracks and chips from occurring in the semiconductor substrate.

[0022] (Example 1) Figures 1 and 2 show a semiconductor substrate 12 to be processed. The semiconductor substrate 12 has a central region 62 and an outer peripheral region 64. The central region 62 has a plurality of element regions 60. In the central region 62, the respective element regions 60 are arranged in a matrix. Although not shown, an element structure is formed within each element region 60. The element structure formed within each element region 60 may be a MOSFET, an IGBT, a diode, or the like. The outer peripheral region 64 is located around the central region 62. The outer peripheral region 64 is a region excluding the central region 62 of the semiconductor substrate 12, and is a region from around the central region 62 to the outer peripheral edge of the semiconductor substrate 12. Also, an orientation flat 12f is provided at a part of the outer peripheral edge of the semiconductor substrate 12.

[0023] As shown in FIG. 2, the semiconductor substrate 12 has a base substrate 14 and an element semiconductor layer 16. The base substrate 14 and the element semiconductor layer 16 are made of GaN (gallium nitride). The thickness of the base substrate 14 is not particularly limited, but is, for example, about 350 μm. The element structure within each element region 60 is formed in the element semiconductor layer 16. The element semiconductor layer 16 is a semiconductor layer formed by epitaxial growth on the base substrate 14. The thickness of the element semiconductor layer 16 is not particularly limited, but is, for example, about 100 μm. An element structure is formed within the element semiconductor layer 16.

[0024] FIG. 3 shows the configuration of a processing apparatus 20 for processing the semiconductor substrate 12. The processing apparatus 20 forms a modified layer (described later) inside the semiconductor substrate 12 and divides the semiconductor substrate 12 along the formed modified layer. The processing apparatus 20 has a transfer device 22, a stage 24, a laser light source 26, a camera 28, a dividing device 29, and a control device 30.

[0025] The transfer device 22 transfers the semiconductor substrate 12 to the processing device 20. The transfer device 22 places the semiconductor substrate 12 carried into the processing device 20 on the stage 24. The stage 24 is a platform on which the semiconductor substrate 12 is placed when processing the semiconductor substrate 12. The laser light source 26 is disposed above the stage 24 and irradiates the semiconductor substrate 12 placed on the stage 24 with laser light. The camera 28 is disposed above the stage 24 and captures an image of the semiconductor substrate 12 placed on the stage 24.

[0026] The dicing device 29 dices the semiconductor substrate along a predetermined region. Details of the operation performed by the dicing device 29 will be described later.

[0027] The control device 30 is electrically connected to the transfer device 22, the stage 24, the laser light source 26, the camera 28, and the dicing device 29. The control device 30 controls the operations of the transfer device 22, the stage 24, the laser light source 26, the camera 28, and the dicing device 29.

[0028] Next, a method for manufacturing a semiconductor device according to Embodiment 1 will be described. First, a semiconductor substrate 12 shown in FIGS. 1 and 2 is prepared. That is, a semiconductor substrate 12 having a plurality of element structures formed in the central region 62 is prepared.

[0029] (Substrate transfer step) In the substrate transfer step, the control device 30 transfers the semiconductor substrate 12 onto the stage 24 by the transfer device 22. As shown in FIG. 4, a wafer chuck 32 that uses, for example, vacuum suction is provided on the upper surface of the stage 24. The transfer device 22 fixes the semiconductor substrate 12 to the stage 24 by placing the surface 12a (the surface on the element semiconductor layer 16 side) of the semiconductor substrate 12 on the wafer chuck 32.

[0030] (Region identification step) Next, the control device 30 performs an area identification process. In the area identification process, the control device 30 uses the camera 28 to capture an image of the semiconductor substrate 12 on the stage 24, and based on the feature points of the semiconductor substrate 12 (for example, the outer shape including the orientation flat 12f), calculates the fixed position of the semiconductor substrate 12 relative to the stage 24 (that is, the position and angle on the stage 24). For example, the control device 30 sets an xy coordinate system based on the detected feature points and calculates the fixed position of the semiconductor substrate 12. Then, the control device 30 identifies the positions of the central region 62 and the outer peripheral region 64 based on the calculated fixed position. Also, inside the central region 62, the positions of the respective element regions 60 are identified.

[0031] (Central modification layer formation process) Next, the control device 30 performs a central modification layer formation process. As shown in FIG. 5, in the central modification layer formation process, the control device 30 irradiates the laser L from the back surface 12b side of the semiconductor substrate 12 using the laser light source 26. Here, the control device 30 scans the laser L so that the focal point S moves along the interface of each element region 60, and also scans the laser L so that the focal point S moves along the thickness direction of the semiconductor substrate 12 from the front surface 12a of the semiconductor substrate 12. At the position of the focal point S, the semiconductor substrate 12 is heated and decomposed. As a result, a central modification layer 72 with reduced crystallinity is formed in the range where the focal point S is scanned. That is, in the central region 62, the central modification layer 72 that partitions each element region 60 on the front surface 12a of the semiconductor substrate 12 and extends in the thickness direction of the semiconductor substrate 12 along the interface of each element region 60 is formed. The length (depth) of the central modification layer 72 in the thickness direction is not particularly limited, but in this embodiment, a central modification layer 72 with a depth of about 70 μm is formed. Note that the central modification layer 72 is composed of, for example, a gallium precipitation layer or the like. The strength of the central modification layer 72 is lower than the strength of the original material of the semiconductor substrate 12 (that is, GaN).

[0032] (Outer peripheral modification layer formation process) Next, the control device 30 performs an outer peripheral modification layer forming process. As shown in FIG. 6, in the outer peripheral modification layer forming process, similar to the central modification layer forming process, the control device 30 irradiates the laser beam L from the back surface 12b side of the semiconductor substrate 12 by the laser light source 26. Here, the control device 30 scans the focal point S so as to divide the outer peripheral region 64 into a plurality of minute regions 73 on the surface 12a of the semiconductor substrate 12, and scans the laser beam L so that the focal point S moves along the thickness direction of the semiconductor substrate 12 from the surface 12a of the semiconductor substrate 12. Here, as shown in FIG. 7, the control device 30 scans the laser beam L in the x direction and the y direction to form a plurality of minute regions 73 partitioned in a grid pattern on the surface 12a of the semiconductor substrate 12. The scanning interval in each direction is not particularly limited, but in this embodiment, the scanning interval is about 100 μm. The control device 30 scans the laser beam L so that the area of each minute region 73 is smaller than the area of each element region 60. As a result, an outer peripheral modification layer 74 with reduced crystallinity is formed in the range where the focal point S is scanned. That is, the outer peripheral region 64 is divided into a plurality of minute regions 73 on the surface 12a of the semiconductor substrate 12, and an outer peripheral modification layer 74 extending in the thickness direction of the semiconductor substrate 12 from the surface 12a is formed. As shown in FIG. 7, the outer peripheral modification layer 74 extends to the edge of the outer peripheral region 64 (that is, the outer peripheral end of the semiconductor substrate), and is formed so as to divide the entire outer peripheral region 64 into minute regions 73 on the surface 12a of the semiconductor substrate 12. The length (depth) of the outer peripheral modification layer 74 in the thickness direction is not particularly limited, but in this embodiment, an outer peripheral modification layer 74 with a depth of about 60 μm is formed. That is, the depth of the outer peripheral modification layer 74 is shallower than the depth of the central modification layer 72. The strength of the outer peripheral modification layer 74 is lower than the strength of the original material (that is, GaN) of the semiconductor substrate 12.

[0033] (Internal modification layer forming process) Next, the control device 30 performs an internal modification layer formation process. As shown in FIG. 8, in the internal modification layer formation process, similarly to the central modification layer formation process and the like, the control device 30 irradiates the laser L from the back surface 12b side of the semiconductor substrate 12 with the laser light source 26. Here, the control device 30 scans the laser L so that the focal point S is formed inside the semiconductor substrate 12. Then, the control device 30 moves the focal point S in the direction along the surface 12a of the semiconductor substrate 12, thereby forming an internal modification layer 76 that spreads along the surface 12a inside the semiconductor substrate 12. More specifically, the control device 30 forms the internal modification layer 76 inside the element semiconductor layer 16. Here, the control device 30 forms the internal modification layer 76 that spreads over both the central region 62 and the outer peripheral region 64. The position of the internal modification layer 76 in the thickness direction of the semiconductor substrate 12 is not particularly limited, but in this embodiment, the internal modification layer 76 is formed at a depth position of about 70 μm from the surface 12a of the semiconductor substrate 12. Therefore, the formed internal modification layer 76 is connected to the central modification layer 72 while not being connected to the outer peripheral modification layer 74. The strength of the internal modification layer 76 is lower than the strength of the original material (i.e., GaN) of the semiconductor substrate 12.

[0034] (Substrate dicing process) When the central modified layer 72, the outer peripheral modified layer 74, and the inner modified layer 76 are formed, the control device 30 performs a substrate splitting process. In the substrate splitting process, the semiconductor substrate 12 is split along the inner modified layer 76. Specifically, as shown in FIG. 9, the control device 30 places a support plate 36 equipped with a wafer chuck 34 on the back surface 12b of the semiconductor substrate 12 by means of a splitting device 29. Thereby, the front surface 12a and the back surface 12b of the semiconductor substrate 12 are fixed by the wafer chucks 32 and 34. Then, a force is applied to the support plate 36 in a direction away from the stage 24 (the direction indicated by the arrow 80). As described above, the strength of the inner modified layer 76 is lower than the strength of GaN. Therefore, when a force is applied to the support plate 36 in a direction away from the stage 24, tensile stress is applied to the semiconductor substrate 12 in its thickness direction, and as shown in FIG. 10, the semiconductor substrate 12 is split into a semiconductor layer 112a and a semiconductor layer 112b along the inner modified layer 76. At this time, starting from the outer peripheral end of the semiconductor substrate 12, the splitting of the semiconductor substrate 12 proceeds such that the semiconductor layer 112b peels off from the semiconductor layer 112a along the inner modified layer 76. For this reason, when the semiconductor substrate 12 is split along the inner modified layer 76, a locally large stress is applied to the outer peripheral end of the semiconductor substrate 12 (that is, the edge of the outer peripheral region 64). However, in this embodiment, an outer peripheral modified layer 74 that divides its surface into a plurality of minute regions 73 is formed at the edge of the outer peripheral region 64. For this reason, the stress applied to the edge of the outer peripheral region 64 is dispersed to a magnitude corresponding to the surface area of each of the plurality of minute regions 73, and the occurrence of cracks and chips at the outer peripheral end of the semiconductor substrate 12 is suppressed. The semiconductor layer 112a includes a plurality of element regions 60 in which element structures are formed.

[0035] Next, after performing a process such as surface polishing on the semiconductor layer 112a, the control device 30 divides the semiconductor layer 112a along the central modification layer 72. Here, as shown in FIG. 11, the control device 30 applies a force to the semiconductor layer 112a in a direction along the surface of the semiconductor layer 112a (the direction indicated by the arrow 82) with respect to the wafer chuck 32 by the dividing device 29. As a result, tensile stress is applied to the semiconductor layer 112a in its planar direction. As described above, the strength of the central modification layer 72 is lower than the strength of GaN. Therefore, by applying a force in the direction indicated by the arrow 82, the semiconductor layer 112a is divided along the central modification layer 72. As a result, the element regions 60 are divided from each other, and a plurality of semiconductor devices 100 can be obtained. Note that since the outer peripheral modification layer 74 is formed in the semiconductor layer 112a, the semiconductor layer 112a can be divided along the outer peripheral modification layer 74.

[0036] Note that the semiconductor layer 112b includes the base substrate 14 and a layer in which a part of the element semiconductor layer 16 remains. Therefore, the base substrate 14 can be reused by removing the remaining element semiconductor layer 16 by surface polishing or the like.

[0037] As described above, in this embodiment, in addition to the central modification layer 72 extending along the interface of each element region 60, an outer peripheral modification layer 74 that divides the outer peripheral region 64 into a plurality of minute regions 73 is formed. The outer peripheral modification layer 74 is formed over the entire outer peripheral region 64 (that is, so as to extend to the edge of the semiconductor substrate 12). That is, a plurality of minute regions 73 having an area smaller than that of the element region 60 are formed at the edge of the semiconductor substrate 12. For this reason, in the step of dividing the semiconductor substrate along the internal modification layer 76, the stress applied to the edge of the semiconductor substrate 12 becomes a magnitude corresponding to the surface area of each of the plurality of subdivided minute regions 73. That is, when the semiconductor substrate 12 is divided along the internal modification layer 76, the stress applied to the edge of the semiconductor substrate 12 is dispersed. Therefore, in the manufacturing method of this embodiment, when the semiconductor substrate 12 is divided along the internal modification layer 76, cracks and chips generated in the semiconductor substrate 12 can be suppressed.

[0038] Also, in this embodiment, the depth of the outer peripheral modified layer 74 is shallower than the depth of the central modified layer 72, and the outer peripheral modified layer 74 is formed so as not to be connected to the inner modified layer 76. That is, the depth of the outer peripheral modified layer 74 is set to a depth that does not exceed the dividing surface (the surface along the inner modified layer 76) of the semiconductor substrate 12. That is, the outer peripheral modified layer 74 does not remain in the semiconductor layer 112b after the semiconductor substrate 12 is divided. Therefore, when the semiconductor substrate 12 is divided along the inner modified layer 76, cracks and fractures caused by the outer peripheral modified layer 74 are suppressed from occurring on the semiconductor layer 112b side.

[0039] (Example 2) In the manufacturing method of Example 2, the inner modified layer forming step is different from that of the manufacturing method of Example 1. In Example 2, as shown in FIG. 12, the control device 30 forms the inner modified layer 176 in the central region 62 and does not form the inner modified layer 176 in the outer peripheral region 64.

[0040] Thereafter, similar to Example 1, a substrate dividing step is performed. The control device 30 places the support plate 36 equipped with the wafer chuck 34 on the back surface 12b of the semiconductor substrate 12 by the dividing device 29. Then, a force is applied to the support plate 36 in a direction away from the stage 24 (the direction indicated by the arrow 180). In Example 2, the inner modified layer 176 is not formed in the outer peripheral region 64. Therefore, in the outer peripheral region 64, it is difficult to divide the semiconductor substrate 12 in the direction along its surface. Therefore, in Example 2, the semiconductor substrate 12 is divided along the inner modified layer 176 in the central region 62, and at the boundary between the central region 62 and the outer peripheral region 64, the semiconductor substrate 12 is divided along the central modified layer 72 starting from the end of the inner modified layer 176. That is, in Example 2, as shown in FIG. 13, when the semiconductor substrate 12 is divided along the inner modified layer 176, only the portion 112c where the element structure is formed is separated from the semiconductor substrate 12 and remains on the stage 24.

[0041] Thereafter, similar to Example 1, by applying a force to the wafer chuck 32 in the planar direction, a plurality of semiconductor devices can be obtained.

[0042] In the manufacturing method of Example 2, in the step of dividing the semiconductor substrate 12 along the internal modification layer 176, the region where the outer peripheral modification layer 74 is formed remains on the side of the base substrate 14. Since the outer peripheral modification layer 74 is densely formed in this region, this region can be easily removed by grinding or polishing.

[0043] As described above, the embodiments have been described in detail, but these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and changes of the specific examples illustrated above.

[0044] In the above-described embodiment, in the substrate transfer step, the semiconductor substrate 12 may be placed on the stage 24 such that the wafer chuck 32 is positioned only on the surface of the central region 62. In such a configuration, as shown in FIG. 14, also in Example 1, as in Example 2, only the region where the element structure is formed can be separated from the semiconductor substrate 12. Further, in Example 2, only the region where the element structure is formed can be more easily separated from the semiconductor substrate 12.

[0045] Also, in the above-described embodiment, the outer peripheral modification layer 74 does not have to be formed over the entire outer peripheral region 64. When dividing the semiconductor substrate 12 along the internal modification layer 76, the largest stress is applied to the edge of the semiconductor substrate 12. Therefore, the outer peripheral modification layer 74 may be formed in a range including at least the outer peripheral edge of the outer peripheral region 64.

[0046] Also, in the above-described embodiment, the central modification layer 72 and the internal modification layers 76, 176 do not have to be connected, and the outer peripheral modification layer 74 and the internal modification layer 76 may be connected. That is, the depths of the central modification layer 72 and the outer peripheral modification layer 74 can be appropriately set according to the type of semiconductor device to be manufactured and the like.

[0047] Also, in the above-described embodiment, the dividing device 29 does not have to be controlled by the control device 30. That is, the processing device 20 does not have to have the dividing device 29, and a separate device having the function of the dividing device 29 may be prepared.

[0048] Also, in the above-described embodiment, on the surface 12a of the semiconductor substrate 12, the minute region 73 had a rectangular shape, but the shape of the minute region 73 is not particularly limited, and for example, it may be other polygonal shapes such as a triangular shape or a hexagonal shape.

[0049] (Reference Example) In the above-described embodiment, the central modified layer 72 was formed by irradiating the laser L, but instead of the central modified layer 72, a groove may be formed by a dicing blade.

[0050] The technical elements described in this specification or the drawings exhibit technical utility alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. Also, the technology exemplified in this specification or the drawings achieves a plurality of objects simultaneously, and achieving one of those objects itself has technical utility.

Explanation of Reference Numerals

[0051] 12: Semiconductor substrate 20: Processing apparatus 22: Transfer apparatus 24: Stage 26: Laser light source 28: Camera 29: Dividing apparatus 30: Control apparatus 60: Element region 62: Central region 64: Outer peripheral region 72: Central modified layer 73: Minute region 74: Outer peripheral modified layer 76: Inner modified layer

Claims

1. A manufacturing method for manufacturing a semiconductor device (100), comprising: a step of identifying, on a surface (12a) of a semiconductor substrate (12), a plurality of element regions (60) and an outer peripheral region (64) around a central region (62) where the plurality of element regions are located; a step of forming a central modified layer (72) that extends from the surface of the semiconductor substrate in the thickness direction of the semiconductor substrate and extends along the interfaces of the plurality of element regions by irradiating the semiconductor substrate with a laser (L) using a laser irradiation device (26); a step of forming an outer peripheral modified layer (74) that extends from the surface of the semiconductor substrate in the thickness direction of the semiconductor substrate and extends to the edge of the semiconductor substrate so as to partition the outer peripheral region into a plurality of minute regions (73) having an area smaller than that of the element regions by irradiating the semiconductor substrate with a laser using the laser irradiation device; a step of forming an internal modified layer (76, 176) that extends along the surface of the semiconductor substrate inside the semiconductor substrate within the central region by irradiating the semiconductor substrate with a laser using the laser irradiation device; a step of dividing the semiconductor substrate along the internal modified layer; a step of dividing the semiconductor substrate along the central modified layer, The manufacturing method comprising the above steps.

2. The manufacturing method according to claim 1, wherein in the step of forming the outer peripheral modified layer, the outer peripheral modified layer is formed so as to partition the entire outer peripheral region into the minute regions.

3. The manufacturing method according to claim 1 or 2, wherein in the step of forming the internal modified layer, the internal modified layer (76) is formed in the central region and the outer peripheral region.

4. The manufacturing method according to claim 3, wherein the central modified layer and the internal modified layer are connected, and the outer peripheral modified layer and the internal modified layer are not connected, and the central modified layer, the outer peripheral modified layer, and the internal modified layer are formed.

5. The manufacturing method according to claim 1 or 2, wherein in the step of forming the internal modified layer, the internal modified layer (176) is not formed in the outer peripheral region.

6. A processing apparatus (20) for processing a semiconductor substrate, comprising: a laser irradiation device (26); a detection device (28); a control device (30), wherein the control device performs a step of identifying, on the surface of the semiconductor substrate by the detection device, a plurality of element regions and an outer peripheral region around a central region where the plurality of element regions are located, ​ A step of forming a central modified layer that extends from the surface of the semiconductor substrate in the thickness direction of the semiconductor substrate and extends along the interfaces of the plurality of element regions; A step of forming an outer peripheral modified layer that extends from the surface of the semiconductor substrate in the thickness direction of the semiconductor substrate and extends to the edge of the semiconductor substrate so as to divide the outer peripheral region into a plurality of minute regions having an area smaller than that of the element regions; A step of forming an internal modified layer that extends along the surface of the semiconductor substrate inside the semiconductor substrate within the central region by irradiating the semiconductor substrate with a laser using the laser irradiation device; Executing; A processing apparatus.

7. The control device, A step of dividing the semiconductor substrate along the internal modified layer; A step of dividing the semiconductor substrate along the central modified layer, The processing apparatus according to claim 6, further executing.

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