Adjustment device and adjustment method

The adjustment device addresses the issue of heat generation in amplification elements by controlling current flow timing, enabling efficient gate bias voltage adjustment and preventing overheating.

JP7716969B2Active Publication Date: 2025-08-01MITSUBISHI ELECTRIC CORP
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Patent Information

Application Number
JP2021206335
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-12-28
Filing Date
2021-12-20
Publication Date
2025-08-01
Estimated Expiration
2041-12-20

AI Technical Summary

Technical Problem

Existing methods for adjusting the gate bias voltage of amplification elements, such as MOSFETs, result in continuous drain current flow, leading to heat generation and potential failure due to temperature sensitivity and non-normal operation at high temperatures.

Method used

An adjustment device that controls the timing of current flow through the amplification element using a current path, current control electrode, and signal output means to periodically switch between on and off, allowing current detection and adjustment to prevent continuous drain current flow and heat generation.

Benefits of technology

The device effectively adjusts the gate bias voltage while minimizing heat generation in amplification elements, ensuring reliable operation by controlling current flow timing and preventing overheating.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

To adjust an amplifier element while preventing heat generation of the amplifier element.SOLUTION: A transmitter-receiver 1 comprises: an amplifier element AMP; a gate voltage output unit 12 that applies a gate voltage to the amplifier element AMP; a timing control unit 15 that controls the timing to cause a drain current to flow in the amplifier element AMP; a current detection unit 20 that detects the drain current flowing in the amplifier element AMP; and a voltage adjustment unit 11 that, based on the detected drain current, adjusts a gate voltage for causing the drain current to flow in the amplifier element AMP. When the timing is reached to cause the drain current to flow in the amplifier element AMP, the gate voltage output unit 12 applies a gate voltage to cause the drain current to flow in the amplifier element AMP, and when the timing is not reached to cause the drain current to flow in the amplifier element AMP, applies a gate voltage not to cause the drain current to flow in the amplifier element AMP.SELECTED DRAWING: Figure 1
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Description

Technical Field

[0001] The present disclosure relates to an adjustment device and an adjustment method.

Background Art

[0002] The gain characteristics and saturation characteristics of an amplification element depend on the current flowing through the amplification element. Therefore, there are cases where it is necessary to set the current value of the current flowing through the amplification element to a desired current value. For example, when the amplification element includes a MOSFET (metal-oxide-semiconductor field-effect transistor), in order to set the current value of the drain current, which is the current flowing through the amplification element, to a desired current value, it is necessary to adjust the gate voltage applied to the gate of the amplification element. Hereinafter, the gate voltage when the "desired current value" is obtained is referred to as the "gate bias voltage".

[0003] Since there are variations in the characteristics of the amplification element due to the manufacturing process, the adjustment required to obtain the desired current value varies for each amplification element. Therefore, for example, at the time of shipping a communication module using a plurality of amplification elements, when the amplification element includes a MOSFET, it is necessary to adjust the gate voltage for each amplification element to obtain the gate bias voltage.

[0004] Patent Document 1 discloses a technique for obtaining a gate bias voltage by detecting a drain current and adjusting a gate voltage according to the detected drain current. According to Patent Document 1, a gate voltage for flowing a drain current is applied to one of a plurality of amplification elements, and a gate pinch-off voltage, which is a gate voltage for not flowing a drain current, is applied to the other amplification elements, whereby the gate bias voltage can be obtained for each amplification element. That is, according to Patent Document 1, the amplification element can be adjusted to obtain the desired current value.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] According to the technique described in Patent Document 1, a drain current always flows through the amplification element while the gate voltage is being adjusted. Therefore, the technique described in Patent Document 1 has a problem that the amplification element generates heat due to the drain current. For example, when the temperature characteristics of the amplification element are easily affected by temperature, or when the amplification element does not operate normally at high temperatures, problems such as the failure of the amplification element and the inability to correctly obtain the gate bias voltage may occur even if the technique described in Patent Document 1 is used.

[0007] In view of the above circumstances, an object of the present disclosure is to provide an adjustment device or the like that can adjust an amplification element while suppressing heat generation of the amplification element.

Means for Solving the Problems

[0008] To achieve the above object, an adjustment device according to the present disclosure includes an amplification element including a current path and a current control electrode, signal output means for outputting a current control signal to the current control electrode, timing control means for controlling the timing of flowing a current through the current path based on a signal that periodically switches between on and off, current detection means for detecting the current flowing through the current path, adjustment means for adjusting a current control signal for flowing a current through the current path based on the detected current, and the signal output means outputs a current control signal for flowing a current through the current path when it is the timing of flowing a current through the current path, and outputs a current control signal for not flowing a current through the current path when it is not the timing of flowing a current through the current path.

Effects of the Invention

[0009] According to the present disclosure, an amplification element can be adjusted while suppressing heat generation of the amplification element.

Brief Description of Drawings

[0010]

Figure 1

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Figure 10

Figure 11

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Figure 13

Embodiment for Carrying Out the Invention

[0011] Hereinafter, an embodiment in which the adjustment device according to the present disclosure is applied to a transmission / reception device will be described with reference to the drawings. In each drawing, the same or equivalent parts are denoted by the same reference numerals.

[0012] (Embodiment 1) The transmission / reception device 1 according to Embodiment 1 will be described with reference to FIG. 1. The transmission / reception device 1 includes a control unit 10, a current detection unit 20, a rectangular wave signal generation unit 30, a power supply 40, and n high-frequency integrated circuits MMIC1 - MMICn (n is a positive integer). The control unit 10 includes a voltage adjustment unit 11, a gate voltage output unit 12, and a timing control unit 15. Each of the high-frequency integrated circuits MMIC1 - MMICn includes an amplification element AMP1 - AMPn. Although details will be described later, according to the transmission / reception device 1, in order to make the drain currents ID1 - IDn flowing through the amplification elements AMP1 - AMPn into desired currents, the gate voltages VG1 - VGn applied to the amplification elements AMP1 - AMPn can be adjusted to obtain the gate bias voltage. The transmission / reception device 1 is an example of the adjustment device according to the present disclosure.

[0013] Hereinafter, each configuration will be described in detail. For convenience, hereinafter, the high-frequency integrated circuits MMIC1 - MMICn, the amplification elements AMP1 - AMPn, etc. may be collectively referred to as "high-frequency integrated circuit MMIC", "amplification element AMP", etc.

[0014] The current detection unit 20 detects the current IDD flowing from the power supply 40. The current detection unit 20 is connected to the power supply 40, each high-frequency integrated circuit MMIC, and the voltage adjustment unit 11 of the control unit 10. As shown in FIG. 1, since the drains of the amplification elements AMP included in each high-frequency integrated circuit MMIC are connected to the current detection unit 20 in parallel, the current detection unit 20 detects IDD, which is the total amount of the drain currents ID. Note that the current IDD flows from the power supply 40 through the current detection unit 20.

[0015] However, as described later, in the adjustment of the gate voltage, drain current does not flow through two or more amplification elements AMP simultaneously. Instead, drain current flows only through the selected one amplification element AMP. Therefore, the current IDD detected by the current detection unit 20 is the drain current ID flowing through the selected amplification element AMP.

[0016] The current detection unit 20 outputs a detection current signal SD, which is a digital signal indicating the current value of the detected current, to the voltage adjustment unit 11. Although details will be described later, the voltage adjustment unit 11 adjusts the gate voltage based on the detection current signal SD. The current detection unit 20 includes, for example, a Hall element and an analog-to-digital converter. The current detection unit 20 converts, for example, the current IDD detected by the Hall element into the detection current signal SD by the analog-to-digital converter and outputs it to the voltage adjustment unit 11. The current detection unit 20 is an example of the current detection means according to the present disclosure.

[0017] The high-frequency integrated circuit MMIC is an integrated circuit for processing high-frequency signals and is connected to, for example, a multi-element antenna (not shown). The amplification element AMP included in the high-frequency integrated circuit MMIC can amplify the signal transmitted by the multi-element antenna and the signal received from the multi-element antenna. In FIG. 1, one high-frequency integrated circuit MMIC is shown as including one amplification element AMP, but one high-frequency integrated circuit MMIC may include a plurality of amplification elements AMP.

[0018] The amplifying element AMP includes, for example, a field effect transistor (FET) such as a MOSFET or a JFET (Junction Field Effect Transistor). When the amplifying element AMP includes a field effect transistor, the amplifying element AMP includes a gate, a source, and a drain. By applying an element-specific voltage to the gate of the amplifying element AMP, the drain current stops flowing. This state where the drain current stops flowing is called "gate pinch-off" or simply "pinch-off". Also, the voltage that puts the amplifying element AMP in the pinch-off state is called the "gate pinch-off voltage". On the other hand, when the voltage applied to the gate of the amplifying element AMP is adjusted from the gate pinch-off voltage, a drain current is generated. Since there is a correspondence between the drain current value and the gate voltage value, it becomes possible to generate a desired drain current by adjusting the gate voltage of the amplifying element AMP. By setting the gate voltage value of the amplifying element AMP so that a desired drain current is generated, it becomes possible to amplify a received signal input from a multi-element antenna or a transmission signal for output to a multi-element antenna at a desired magnification. However, since there are variations in the characteristics of the amplifying element AMP, the gate voltage at which a desired drain current can be obtained is different for each amplifying element AMP. Therefore, in order to obtain a desired drain current, it is necessary to adjust the gate voltage for each amplifying element AMP. The amplifying element AMP is an example of the amplifying element according to the present disclosure. The gate of the amplifying element AMP is an example of the current control electrode according to the present disclosure. The current path formed between the source and the drain of the amplifying element AMP is an example of the current path according to the present disclosure. The gate voltage applied to the gate of the amplifying element AMP is an example of the current control signal according to the present disclosure.

[0019] Note that the gate voltage and the pinch-off voltage for obtaining a desired drain current can be any of a positive value, a negative value, and 0 depending on the element characteristics. Also, the adjustment direction from the pinch-off voltage to the gate voltage when setting the gate voltage value can be either the positive voltage direction or the negative voltage direction depending on the element characteristics.

[0020] The rectangular wave signal generation unit 30 generates a rectangular wave signal SP that periodically repeats on and off, and outputs it to the timing control unit 15 of the control unit 10. The rectangular wave signal generation unit 30 is connected not only to the timing control unit 15 but also to a transmission / reception module (not shown) provided in the transmission / reception device 1. By outputting the rectangular wave signal SP generated by the rectangular wave signal generation unit 30 to the transmission / reception module, the transmission operation and the reception operation of the transmission / reception device 1 can be switched according to the on / off of the rectangular wave signal SP.

[0021] The control unit 10 controls the gate voltage applied to each amplification element AMP. Hereinafter, each functional unit of the control unit 10 will be described. Also, an example of the hardware configuration of the control unit 10 will be described later.

[0022] Based on the rectangular wave signal SP, the timing control unit 15 controls the timing at which the drain current ID flows through the amplification element AMP, and outputs a control timing signal STC to the voltage adjustment unit 11. Specifically, for example, when the rectangular wave signal SP is on, the timing control unit 15 outputs a control timing signal STC indicating an on state to the voltage adjustment unit 11 as a signal indicating that it is the timing for the drain current ID to flow through the amplification element AMP. When the rectangular wave signal SP is off, the timing control unit 15 outputs a control timing signal STC indicating an off state to the voltage adjustment unit 11 as a signal indicating that it is not the timing for the drain current ID to flow through the amplification element AMP. The timing control unit 15 is an example of the timing control means according to the present disclosure.

[0023] Although details will be described later, by setting the timing at which the drain current ID flows through the amplification element AMP based on the rectangular wave signal SP as described above, it is possible to prevent the drain current from continuously flowing through the amplification element AMP. Therefore, it is possible to prevent the amplification element AMP from generating heat due to the continuous flow of the drain current through the amplification element AMP.

[0024] The voltage adjustment unit 11 determines the voltage applied to the gates of the respective amplification elements AMP, and outputs a gate voltage signal SG or a pinch-off voltage signal SGP, which is a digital signal indicating the voltage value of the applied voltage, to the gate voltage output unit 12. The gate voltage signal SG indicates the gate voltage for causing a drain current to flow through the amplification element AMP, and the pinch-off voltage signal SGP indicates the gate pinch-off voltage, which is the gate voltage for preventing a drain current from flowing through the amplification element AMP. As will be described later, the gate voltage output unit 12 applies a gate voltage corresponding to the voltage value indicated by the gate voltage signal SG or the pinch-off voltage signal SGP to each amplification element AMP.

[0025] Specifically, first, the voltage adjustment unit 11 selects one amplification element AMP for which the gate bias voltage is to be obtained. For the amplification elements AMP that are not selected, the voltage adjustment unit 11 outputs the pinch-off voltage signal SGP to the gate voltage output unit 12. For the selected amplification element AMP, when the control timing signal STC is in the on state, the voltage adjustment unit 11 outputs the gate voltage signal SG to the gate voltage output unit 12, and when the control timing signal STC is in the off state, the voltage adjustment unit 11 outputs the pinch-off voltage signal SGP to the gate voltage output unit 12. When outputting the gate voltage signal SG to the gate voltage output unit 12, the voltage adjustment unit 11 adjusts the voltage value of the gate voltage applied to the selected amplification element AMP based on the current value indicated by the detection current signal SD. When the current value indicated by the detection current signal SD is the desired current value, the voltage adjustment unit 11 stores the gate voltage at that time as the gate bias voltage for which the gate voltage is to be obtained.

[0026] As described above, according to the voltage adjustment unit 11, only when the control timing signal STC is in the on state, that is, when the control timing signal STC indicates that it is the timing for flowing the drain current ID, the gate voltage for causing a drain current to flow through the amplification element AMP can be applied to the selected amplification element AMP. Therefore, according to the voltage adjustment unit 11, it is possible to prevent a drain current from continuously flowing through the amplification element AMP during voltage adjustment and the amplification element AMP from generating heat. The voltage adjustment unit 11 is an example of the adjustment means and the selection means according to the present disclosure.

[0027] The gate voltage output unit 12 applies the gate voltage of the voltage value indicated by the gate voltage signal SG or the pinch-off voltage signal SGP output from the voltage adjustment unit 11 to each amplification element AMP. The gate voltage output unit 12 includes a digital-to-analog converter DAC corresponding to each amplification element AMP. Each digital-to-analog converter DAC converts the voltage value indicated by the gate voltage signal SG or the pinch-off voltage signal SGP, which is a digital signal output from the voltage adjustment unit 11, into an analog voltage, and applies the converted voltage to the gate of the corresponding amplification element AMP. The gate voltage output unit 12 is an example of the signal output means according to the present disclosure.

[0028] An example of the hardware configuration of the control unit 10 will be described with reference to FIG. 2. The control unit 10 shown in FIG. 2 is realized by, for example, a microcontroller, an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array), or a combination thereof.

[0029] The control unit 10 includes a processing circuit HW1 and a memory HW2 that are connected to each other via a bus B.

[0030] The processing circuit HW1 is, for example, a CPU (Central Processing Unit). When the processing circuit HW1 is a CPU, each function of the control unit 10 is realized by the CPU executing an operation program stored in the memory HW2. Alternatively, the processing circuit HW1 may be dedicated hardware. Alternatively, the processing circuit HW1 may be a combination of a CPU and dedicated hardware.

[0031] Memory HW2 is a storage device including, for example, RAM (Random Access Memory), ROM (Read Only Memory), flash memory, etc. Memory HW2 stores the operation program to be executed by processing circuit HW1. Also, Memory HW2 functions as a work memory when processing circuit HW1 executes the operation program. Further, Memory HW2 stores information indicating the gate bias voltage obtained by the above voltage adjustment unit 11.

[0032] Next, with reference to FIG. 3, an example of the operation of voltage adjustment by transmission / reception device 1 will be described. The operation shown in FIG. 3 is executed, for example, in a test process at the shipping stage of transmission / reception device 1.

[0033] The voltage adjustment unit 11 of control unit 10 outputs the pinch-off voltage signal SGP to gate voltage output unit 12 for all amplifier elements AMP, thereby applying a gate pinch-off voltage to all amplifier elements AMP (step S101). When applying the gate pinch-off voltage to amplifier element AMP as described above, it will be simply described as "applying a gate pinch-off voltage to amplifier element AMP" hereinafter.

[0034] The voltage adjustment unit 11 selects one unselected amplifier element AMP (step S102). As will be described later, this selection operation is repeated. The voltage adjustment unit 11 selects amplifier elements AMP1 - AMPn in order, for example.

[0035] The voltage adjustment unit 11 determines whether the control timing signal STC input from the timing control unit 15 is in an on state (step S103).

[0036] When the control timing signal STC input from the timing control unit 15 is not in the on state (step S103: No), the voltage adjustment unit 11 applies a gate pinch-off voltage to the selected amplification element AMP (step S104). Then, the voltage adjustment unit 11 repeats the operation from step S103. By these operations, until STC becomes in the on state, the gate pinch-off voltage is continuously applied to the selected amplification element AMP, so that no drain current ID flows through the selected amplification element AMP.

[0037] When the control timing signal STC input from the timing control unit 15 is in the on state (step S103: Yes), the voltage adjustment unit 11 applies the gate voltage adjusted in step S108 described later most recently to the selected amplification element AMP (step S105). When the adjustment of the gate voltage by step S108 has not been performed even once, the voltage adjustment unit 11 applies a pinch-off voltage to the selected amplification element AMP.

[0038] The current detection unit 20 detects the drain current ID and outputs a detection current signal SD indicating the current value of the detected drain current ID to the voltage adjustment unit 11 (step S106).

[0039] The voltage adjustment unit 11 determines whether a desired drain current has been obtained based on the current value of the drain current ID indicated by the detection current signal SD output in step S106 (step S107).

[0040] When the desired drain current has not been obtained (step S107: No), the voltage adjustment unit 11 adjusts the gate voltage of the selected amplification element AMP based on the current value of the drain current ID indicated by the detection current signal SD (step S108). Then, the voltage adjustment unit 11 repeats the operation from step S103.

[0041] When the desired drain current has been obtained (step S107: Yes), the voltage adjustment unit 11 stores the gate voltage applied to the selected amplification element AMP as the gate bias voltage of the selected amplification element AMP (step S109).

[0042] The voltage adjustment unit 11 determines whether there is an unselected amplification element AMP (step S110). When there is an unselected amplification element AMP (step S110: Yes), the voltage adjustment unit 11 repeats the operation from step S101. When there is no unselected amplification element AMP (step S110: No), since the gate bias voltage has been obtained for all the amplification elements AMP, the voltage adjustment unit 11 ends the voltage adjustment operation.

[0043] As described above, the transmission / reception device 1 according to Embodiment 1 has been explained. According to the transmission / reception device 1, based on the periodic rectangular wave signal SP, the timing of flowing the drain current through the amplification element AMP is controlled, so it is possible to prevent the drain current from flowing through the amplification element AMP continuously during voltage adjustment and the amplification element AMP from generating heat. Therefore, according to the transmission / reception device 1, the gate voltage can be adjusted while suppressing the heat generation of the amplification element AMP to obtain the gate bias voltage.

[0044] In addition, since the rectangular wave signal SP used for timing control is a rectangular wave signal used to switch between the transmission operation and the reception operation of the transmission / reception device 1, there is no need to newly add a circuit for generating a rectangular wave signal, and it does not cause a significant increase in the circuit.

[0045] (Modification example) In Embodiment 1, the gate voltage applied to the amplification element AMP changes in a rectangular wave shape as shown in FIG. 10(a). However, a waveform with a rapid voltage change like a rectangular wave has high-order frequency components, which can cause the generation of unnecessary spurs. When spurs occur, an excessive drain current is generated. As a result, not only can the above-described adjustment control of the gate bias voltage not be performed normally, but even if the timing of the drain current generation is restricted, the element may be damaged by overheating. To suppress spurs, it is known that it is effective to increase the rise time of the rectangular wave to make the waveform gentle. Generally, a dedicated analog circuit is often provided in the electric wire path between the control unit 10 and the amplification element AMP to address this issue. However, this method has problems, which will be described after explaining a modification example of Embodiment 1.

[0046] Hereinafter, the transmission and reception device 1C according to a modification example of Embodiment 1 will be described. In order to make the waveform gentle, as shown in FIG. 10(b), the transmission and reception device 1C changes the gate voltage applied to the amplification element AMP in steps over several steps. By controlling the output time t for each step and the voltage displacement V per step, the rise or fall time of the applied voltage can be increased to make it gentle, thereby suppressing spurs.

[0047] Hereinafter, as shown in FIG. 10(b), changing the gate voltage applied to the amplification element AMP in steps over several steps is referred to as "waveform shaping".

[0048] As shown in FIG. 12, the transmission and reception device 1C includes a voltage adjustment unit 11, and the voltage adjustment unit 11 includes a waveform shaping unit 111 that performs waveform shaping as shown in FIG. 10(b). The waveform shaping unit 111 is an example of the waveform shaping means according to the present disclosure.

[0049] With reference to FIG. 3, waveform shaping by the waveform shaping unit 111 will be described. When the timing control signal STC is off (step S104), the voltage adjustment unit 11 holds the gate voltage value to be applied to the amplification element AMP when it next receives the on state of the timing control signal STC (step S103: Yes). The waveform shaping unit 111 acquires the potential difference between the held gate voltage value and the pinch-off voltage during the period until it next receives the on state of the timing control signal STC. The waveform shaping unit 111 divides this potential difference into one or more voltage displacements V, and sets steps by setting the output time t for each voltage displacement V. When dividing the potential difference into one or more voltage displacements V, it may be divided according to the number of steps to be set, or it may be divided according to the voltage displacement V per step. Also, the output time t may be a constant value, or may vary for each step. When receiving the timing control signal STC, the voltage adjustment unit 11 applies the gate voltage to the amplification element AMP according to the steps set by the waveform shaping unit 111.

[0050] According to this modification, since the waveform shaping unit 111 provided in the voltage adjustment unit 11 can suppress a rapid voltage change during gate voltage application, generation of spurious can be suppressed and adjustment of the gate bias voltage can be achieved.

[0051] When not using this modification example, as described above, there are often analog circuits outside the control unit 10. Even when waveform shaping is performed using an analog circuit, in this modification example as well, as shown in FIG. 11, after receiving the timing signal STC, it takes a rise time tG until the voltage value of the gate voltage to be applied is applied. During gate bias voltage adjustment control, since the drain current must be detected after the gate voltage to be applied is applied, it is necessary to prepare a buffer time tbuf between receiving the timing signal STC and detecting the drain current value. When performing waveform shaping using an analog circuit, the control unit 10 cannot directly manage the rise time tG of the waveform shaped by the analog circuit, and it is necessary for the control unit 10 to hold a buffer time tbuf longer than that inferred from the design value of the analog circuit. On the other hand, in this modification example, since the sum of the output times t of the steps becomes the rise time tG of the shaped waveform, the buffer time tbuf can be set according to the actual rise time, so that the excess waiting time can be suppressed and the gate bias voltage adjustment can be performed efficiently.

[0052] Also, in this modification example, since a dedicated analog circuit is not required, an increase in circuit area can be avoided.

[0053] Note that, as shown in FIG. 13, this modification example may have a waveform shaping instruction unit 50 outside the control unit 10 that can instruct the characteristics of the waveform to be shaped by the waveform shaping unit 111 by the waveform shaping instruction signal SWF. The characteristics instructed by the waveform design instruction unit 50 are the number of steps, the voltage displacement V, and the output time t. When there is a problem with the waveform shaped by the waveform design instruction unit 50, in the case of using an analog circuit, labor such as element replacement occurs, while in the case of this modification example, the characteristics of the waveform to be shaped can be easily changed.

[0054] (Embodiment 2) While referring to FIG. 4, the differences between the transmission / reception device 1A according to Embodiment 2 and the transmission / reception device 1 according to Embodiment 1 will be described.

[0055] The transmission and reception device 1A according to Embodiment 2 is different from Embodiment 1 in that it includes a switch element SW and a pinch-off power supply VGP connected in series between the gate voltage output unit 12 and the high-frequency integrated circuit MMIC. Also, the timing control unit 15 is different from Embodiment 1 in that it outputs a determination timing signal SJ to the voltage adjustment unit 11 instead of the control timing signal STC. And the timing control unit 15 is different from Embodiment 1 in that it is connected to each switch element SW and outputs a switching timing signal STW to each switch element SW.

[0056] The switch element SW is a switch element that becomes on only when the switching timing signal STW output from the timing control unit 15 is on. The switch element is, for example, a switch element such as a bipolar transistor or a MOSFET.

[0057] The pinch-off power supply VGP is a power supply for pulling up the gate of the amplification element AMP and applying a gate pinch-off voltage when the switch element SW is in the off state. When the switch element SW is in the off state, the voltage output from the gate voltage output unit 12 is applied to the gate of the amplification element AMP.

[0058] The timing control unit 15 according to Embodiment 2 outputs a determination timing signal SJ to the voltage adjustment unit 11 instead of the control timing signal STC. Also, the timing control unit 15 outputs the switching timing signal STW to all the switch elements SW. The determination timing signal SJ and the switching timing signal STW are on when the rectangular wave signal SP is on and off when the rectangular wave signal SP is off, similar to the control timing signal STC. Therefore, the switch element SW constantly repeats being on and off.

[0059] Since the voltage adjustment unit 11 according to Embodiment 2 does not receive the control timing signal STC, the gate voltage signal SG is always output to the gate voltage output unit 12 for the selected amplification element AMP. However, since the switch element SW and the pinch-off power supply VGP exist between the gate voltage output unit 12 and the amplification element AMP, even when the voltage adjustment unit 11 outputs the gate voltage signal SG, when the switching timing signal STW is off, the gate pinch-off voltage is applied to the amplification element AMP and no drain current flows.

[0060] Therefore, only when the switching timing signal STW is on, the gate voltage for flowing the drain current can be applied to the selected amplification element AMP. Therefore, as in the case of Embodiment 1, according to the voltage adjustment unit 11, it is possible to prevent the drain current from flowing continuously through the amplification element AMP during voltage adjustment and the amplification element AMP from generating heat.

[0061] Further, the voltage adjustment unit 11 determines whether the current value of the drain current ID indicated by the detection current signal SD received from the current detection unit 20 is a desired current value when the determination timing signal SJ received from the timing control unit 15 is on. As described above, since the determination timing signal SJ and the switching timing signal STW are on when the rectangular wave signal SP is on, the determination timing signal SJ is also on when the switch element SW is on. Therefore, when the voltage output from the gate voltage output unit 12 is applied to the gate of the amplification element AMP, the determination timing signal SJ is on. Therefore, by determining the current value when the determination timing signal SJ is on, it is possible to determine the current value when the drain current ID is flowing through the amplification element AMP.

[0062] While referring to FIG. 5, a difference from the case of Embodiment 1 shown in FIG. 3 will be described in an example of the voltage adjustment operation by the transmission / reception device 1A according to Embodiment 2.

[0063] Compared with the case of Embodiment 1 shown in FIG. 3, the operations of steps S201-S202, S203, S205-S208 are generally the same as those of steps S101-S102, S106, S107-S110 shown in FIG. 3, respectively. There is no operation corresponding to steps S103-S104, and the difference from Embodiment 1 is that there is an operation of step S204. This is because in Embodiment 2, for the amplification element AMP selected as described above, the voltage adjustment unit 11 always outputs the gate voltage signal SG. Although there is no operation corresponding to steps S103-S104, as described above, since the switch element SW always repeats on and off, the selected amplification element AMP repeatedly transitions between a state where the drain current ID flows and a state where it does not flow.

[0064] As described above, the voltage adjustment unit 11 determines whether the current value of the drain current ID is a desired current value when the determination timing signal SJ is on. Therefore, when the determination timing signal SJ is off in step S204, the operations of steps S203-204 are repeated until the determination timing signal SJ becomes on.

[0065] In the operation of step S201, the operation of the voltage adjustment unit 11 is exactly the same as that of step S101. However, when the switch element SW is off, instead of the gate pinch-off voltage based on the pinch-off voltage signal SGP, the gate pinch-off voltage by the pinch-off power supply VGP is applied to the amplification element AMP. That is, when the switch element SW is off, even if the voltage adjustment unit 11 outputs the pinch-off voltage signal SGP for all the amplification elements AMP, the gate pinch-off voltage is not applied to the amplification element AMP. Therefore, although the point that the gate pinch-off voltage is applied to all the amplification elements AMP as a result and the point that the voltage adjustment unit 11 outputs the pinch-off voltage signal SGP for all the amplification elements AMP are the same as those in step S101, in FIG. 5, for step S201, it is expressed as "output the pinch-off voltage signal for all the amplification elements", which is different from step S101.

[0066] The transmission and reception device 1A according to Embodiment 2 has been described above. According to the transmission and reception device 1A, by controlling the switch element SW based on the periodic rectangular wave signal SP, the timing of flowing the drain current through the amplification element AMP is controlled. Therefore, similar to the case of Embodiment 1, it is possible to prevent the drain current from flowing continuously through the amplification element AMP during voltage adjustment and the amplification element AMP from generating heat.

[0067] (Embodiment 3) While referring to FIG. 6, differences between the transmission and reception device 1B according to Embodiment 3 and the transmission and reception device 1A according to Embodiment 2 will be described.

[0068] The voltage adjustment unit 11 according to Embodiment 3 is different from that of Embodiment 2 in that it does not output the pinch-off voltage signal SGP. Further, the voltage adjustment unit 11 according to Embodiment 3 is also different from that of Embodiment 2 in that it outputs the target designation signal SA indicating the amplification element AMP selected as the voltage adjustment target to the timing control unit 15.

[0069] The timing control unit 15 according to Embodiment 3 is different from that of Embodiment 2 in the following points. The timing control unit 15 switches the on / off of the switching timing signal STW according to the on / off of the rectangular wave signal SP only for the switch element SW corresponding to the amplification element AMP indicated by the target designation signal SA. The timing control unit 15 outputs a switching timing signal STW that is always off regardless of the on / off of the rectangular wave signal SP for the switch element SW corresponding to the amplification element AMP other than the amplification element AMP indicated by the target designation signal SA.

[0070] By the above-described signal control by the timing control unit 15, it is possible to appropriately control the timing of flowing current through the amplification element AMP to be selected without depending on the pinch-off voltage signal SGP. That is, in Embodiment 3, instead of the voltage adjustment unit 11 appropriately outputting the pinch-off voltage signal SGP to control the gate voltage, the timing control unit 15 can control the gate voltage by appropriately outputting the switching timing signal STW to the switch element SW based on the target designation signal SA.

[0071] Note that since the voltage adjustment unit 11 according to Embodiment 3 does not output a pinch-off voltage signal SGP, it is necessary to set the initial value of the gate voltage signal SG output by the voltage adjustment unit 11 as the gate pinch-off voltage.

[0072] Referring to FIG. 7, differences from the case of Embodiment 2 shown in FIG. 5 will be described in an example of the voltage adjustment operation by the transceiver 1B according to Embodiment 3.

[0073] Compared with the case of Embodiment 2 shown in FIG. 5, the operations in steps S301 - S302 and S304 - S309 are generally the same as steps S201 - S202 and S203 - S208 shown in FIG. 5, respectively, but the differences from Embodiment 2 are that step S303 exists and that, instead of returning from step S309 to step S301, it returns to step S302. Also, as described above, since the voltage adjustment unit 11 according to Embodiment 3 does not output a pinch-off voltage signal SGP and the initial value of the gate voltage signal SG output by the voltage adjustment unit 11 is set as the gate pinch-off voltage, in step S301, the gate voltage of all amplification elements AMP is set as the gate pinch-off voltage as an initial setting.

[0074] In step S303, the voltage adjustment unit 11 outputs a target designation signal SA indicating the amplification element AMP selected as the voltage adjustment target in step S302 to the timing control unit 15. Therefore, until another amplification element AMP is selected and the operation of step S303 is executed again, the timing control unit 15 switches the on / off of the switching timing signal STW only for the amplification element AMP that is the selection target, and keeps the switching timing signal STW off for other amplification elements AMP that are not the selection target. By this operation, the gate voltage can be appropriately adjusted only for the amplification element AMP that is the selection target.

[0075] The transmission / reception device 1B according to Embodiment 3 has been described above. According to the transmission / reception device 1B, since the voltage adjustment unit 11 outputs the target designation signal SA to the timing control unit 15 and the timing control unit 15 appropriately controls the switch element SW based on the target designation signal SA, even though the voltage adjustment unit 11 does not output the pinch-off voltage signal SGP, similar to the case of Embodiment 2, it is possible to prevent a drain current from flowing continuously through the amplification element AMP during voltage adjustment and the amplification element AMP from generating heat.

[0076] (Modification example) In Embodiments 1, 2, and 3, the timing control unit 15 is included in the control unit 10. However, the timing control unit 15 may be an external configuration of the control unit 10. For example, the timing control unit 15 and the control unit 10 may be different integrated circuits.

[0077] In Embodiments 1, 2, and 3, the current detection unit 20 includes an analog-to-digital converter and outputs a digital signal indicating the current value to the voltage adjustment unit 11 of the control unit 10. However, the control unit 10 may include an analog-to-digital converter, and the current detection unit 20 may not include an analog-to-digital converter and output an analog signal to the analog-to-digital converter of the control unit 10.

[0078] In Embodiments 1, 2, and 3, the amplification element AMP has been described as including a field effect transistor. On the other hand, the amplification element AMP may include a transistor that is not a field effect transistor, such as a bipolar transistor or an IGBT (Insulated Gate Bipolar Transistor). For example, when the amplification element AMP includes a bipolar transistor, the amplification element AMP includes a base, an emitter, and a collector. In this case, by adjusting the current flowing through the base of the amplification element AMP by the same control as the adjustment of the gate voltage in Embodiments 1, 2, and 3, the collector current flowing through the amplification element AMP can be set to a desired current. In this case, the base of the amplification element AMP is an example of the current control electrode according to the present disclosure, the current path formed between the emitter and the collector of the amplification element AMP is an example of the current path according to the present disclosure, and the base current flowing through the base of the amplification element AMP is an example of the current control signal according to the present disclosure.

[0079] In Embodiment 2, as shown in FIG. 8, the timing control unit 15 may output the determination timing signal SJ not to the voltage adjustment unit 11 but to the current detection unit 20, and the current detection unit 20 may output the detection current signal SD to the voltage adjustment unit 11 only when the determination timing signal SJ is on. In the voltage adjustment operation in this case, for example, as shown in FIG. 9, the operation of step S203 will be performed after the operation of step S204. Also, in Embodiment 3, the same form may be adopted.

Description of Reference Numerals

[0080] 1, 1A, 1B, 1C transmitting and receiving device, 10 control unit, 11 voltage adjustment unit, 12 gate voltage output unit, 15 timing control unit, 20 current detection unit, 30 rectangular wave signal generation unit, 40 power supply, 50 waveform shaping instruction unit, 111 waveform shaping unit, AMP1 - AMPn amplification elements, B bus, DAC1 - DACn digital - to - analog converters, HW1 processing circuit, HW2 memory, ID1 - IDn drain current, IDD current, MMIC1 - MMICn monolithic microwave integrated circuits, SA target designation signal, SD detection current signal, SG1 - SGn gate voltage signals, SGP1 - SGPn pinch - off voltage signals, SJ determination timing signal, SP rectangular wave signal, STC control timing signal, STW1 - STWn switching timing signals, SW1 - SWn switch elements, SWF waveform shaping instruction signal, VG1 - VGn gate voltages, VGP1 - VGPn pinch - off power supplies.

Claims

1. An amplification element including a current path and a current control electrode, signal output means for outputting a current control signal to the current control electrode, timing control means for controlling the timing of flowing a current through the current path based on a signal that periodically switches between on and off, current detection means for detecting the current flowing through the current path, adjustment means for adjusting a current control signal for flowing a current through the current path based on the detected current, comprising: The signal output means outputs a current control signal for flowing a current through the current path when it is the timing for flowing a current through the current path, and outputs a current control signal for not flowing a current through the current path when it is not the timing for flowing a current through the current path. Adjusting device.

2. A plurality of the amplification elements are provided, further comprising selection means for selecting one amplification element out of the plurality of amplification elements, The signal output means outputs a current control signal for flowing a current or for not flowing a current to the current control electrode of the selected amplification element in accordance with the control of the timing control means, and outputs a current control signal for not flowing a current to the current control electrode of the unselected amplification element, The current detection means detects the current flowing through the current path of the selected amplification element, The adjustment means adjusts a current control signal for flowing a current through the current path of each selected amplification element. The adjusting device according to claim 1.

3. The amplification element is an amplification element provided in a transceiver device capable of switching between a transmission operation and a reception operation, The timing control means controls the timing of flowing a current through the current path based on a periodic signal for switching between the transmission operation and the reception operation of the transceiver device. The adjusting device according to claim 1 or 2.

4. The amplification element includes a gate, a source, and a drain, The current path is a current path formed between the source and the drain, The current flowing through the current path is a drain current, The current control electrode is the gate, The current control signal is a gate voltage applied to the gate. The adjusting device according to any one of claims 1 to 3.

5. further comprising waveform shaping means for setting a voltage displacement and an output time for changing the gate voltage stepwise. When it is the timing to pass a current through the current path, the signal output means outputs the gate voltage based on the voltage displacement and the output time set by the waveform shaping means. The adjustment device according to claim 4.

6. An adjustment device outputs a current control signal to the current control electrode of an amplification element including a current path and a current control electrode, controls the timing of passing a current through the current path based on a signal that periodically switches between on and off, detects the current flowing through the current path, adjusts a current control signal for passing a current through the current path based on the detected current, when it is the timing to pass a current through the current path, outputs a current control signal for passing a current through the current path to the current control electrode, and when it is not the timing to pass a current through the current path, outputs a current control signal for not passing a current through the current path to the current control electrode. Adjustment method.

7. The amplification element includes a gate, a source, and a drain, the current path is a current path formed between the source and the drain, the current flowing through the current path is a drain current, the current control electrode is the gate, the current control signal is a gate voltage applied to the gate, in the adjustment method, a voltage displacement and an output time for gradually changing the gate voltage are further set, when it is the timing to pass a current through the current path, the gate voltage is output based on the set voltage displacement and the output time. The adjustment method according to claim 6.

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