Signal generating device and signal generating method

The signal generating device and method address the challenge of switching from EI patterns to USB4 data signals by using a selecting section that switches to data signals based on electrical idle time counters, ensuring compliance with the USB4 Gen4 standard.

JP7720371B2Active Publication Date: 2025-08-07ANRITSU CORP
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Patent Information

Application Number
JP2023173774
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2023-10-05
Publication Date
2025-08-07
Estimated Expiration
2043-10-05

AI Technical Summary

Technical Problem

Conventional signal generators face challenges in accurately switching from an Electrical Idle (EI) pattern to USB4 data signals due to the time constraints of the second EI pattern in the LFPS signal, making it difficult to comply with the USB4 Gen4 standard.

Method used

A signal generating device and method that includes an LFPS generating section, electrical idle generating section, data signal generating section, and a selecting section that switches to a data signal when an electrical idle time counter reaches a preset value, allowing precise timing transitions between LFPS and EI patterns.

Benefits of technology

Enables accurate switching between LFPS and EI patterns, ensuring compliance with the USB4 Gen4 standard by transitioning to data signals at the appropriate time, thereby enhancing signal generation accuracy.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

To provide a signal generation device and a signal generation method capable of appropriately switching a pattern of a LFPS signal.SOLUTION: A signal generation device 1 includes: a LFPS signal generation section 20 that outputs a LFPS signal, and generates a LFPS pattern, a first EI pattern, and a second EI pattern; a data signal generation section 30 for generating a data signal; a selector 40 for selecting and outputting any one of the LFPS pattern, first EI pattern, second EI pattern, and the data signal; and an EI time counter for counting a lapse time after the second EI pattern starts to be outputted by the selector 40. The selector 40 selects and outputs the data signal on a condition that the count value of the EI time counter reaches a preset value.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present invention relates to a signal generating device and a signal generating method for generating a Low Frequency Periodic Signaling (LFPS) signal defined by the Universal Serial Bus (USB (registered trademark)) standard. [Background technology]

[0002] In recent years, with the spread of IoT and cloud computing, communication systems have begun to handle huge amounts of data, and the interfaces of the various communication devices that make up the communication systems are becoming faster and more serial in transmission. For example, in standards for high-speed serial buses such as USB and PCIe (registered trademark) (Peripheral Component Interconnect Express), a state machine called the Link Training and Status State Machine (LTSSM) manages the initialization of communication between devices and the adjustment of link speeds.

[0003] Conventionally, for the USB 3.1 and 3.2 standards, a technique is known in which reception of an LFPS signal transmitted from a device under test (DUT) is used as a trigger to start transmission of an LFPS signal as a training pattern signal (see, for example, Patent Document 1).

[0004] The USB4 Gen4 standard requires the generation of an LFPS signal as shown in Figure 7 during the initialization phase of the transmission lane.

[0005] As shown in Figure 7, the LFPS signal consists of an LFPS pattern and Electrical Idle (EI) patterns placed before and after the LFPS pattern. The LFPS pattern is a signal pattern with an LFPS period (tPeriod) of 20 to 80 ns and an LFPS duty cycle of 45 to 55%. After the second EI pattern at time tPreData, USB4 data signals such as PRBS (Pseudo Random Binary Sequence) and PRTS (Pseudo Random Ternary Sequence) signals appear in succession. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Publication No. 2023-55034 Summary of the Invention [Problem to be solved by the invention]

[0007] However, since the time tPreData of the second EI pattern is 80 to 120 ns, there was a problem in that in conventional signal generators, it was impossible for the user to manually and accurately issue an instruction to switch from the EI pattern with time tPreData to the USB4 data signal.

[0008] The present invention has been made to solve the above-mentioned problems in the prior art, and an object of the present invention is to provide a signal generating device and a signal generating method that can appropriately switch the pattern of an LFPS signal. [Means for solving the problem]

[0009] In order to solve the above-mentioned problems, a signal generating device according to the present invention is a signal generating device (1) that outputs an LFPS signal consisting of an LFPS pattern, a first electrical idle pattern provided before the LFPS pattern, and a second electrical idle pattern provided after the LFPS pattern, and includes an LFPS generating section (22) that generates the LFPS pattern, an electrical idle generating section (21) that generates the first electrical idle pattern and the second electrical idle pattern, a data signal generating section (30) that generates a data signal, a selecting section (40) that selects and outputs any one of the LFPS pattern, the first electrical idle pattern, the second electrical idle pattern, or the data signal, and an electrical idle time counter (26) that counts the elapsed time since the selecting section started outputting the second electrical idle pattern, and the selecting section is configured to select and output the data signal on the condition that the count value of the electrical idle time counter has reached a preset value.

[0010] With this configuration, the signal generator according to the present invention outputs a data signal instead of the second electrical idle pattern when the count value of the electrical idle time counter reaches a preset value. This allows the signal generator according to the present invention to appropriately switch from the second electrical idle pattern in the LFPS signal to a data signal, thereby operating in accordance with the USB4 Gen4 standard.

[0011] Furthermore, the signal generating device according to the present invention may include an LFPS period counter (23) that counts the LFPS period of the LFPS pattern; and a latch unit (24) that latches a trigger signal for causing a transition between an LFPS state in which the LFPS pattern is selected by the selection unit and output, and an electrical idle state in which the first electrical idle pattern or the second electrical idle pattern is selected by the selection unit and output, until the LFPS period counter counts a value indicating the beginning of the LFPS period, and the selection unit causes a transition between the LFPS state and the electrical idle state at the timing when the trigger signal is latched by the latch unit and the count value of the LFPS period counter reaches a value indicating the beginning of the next LFPS period.

[0012] With this configuration, the signal generator according to the present invention transitions between the LFPS state and the electrical idle state at the timing when the latch receives the trigger signal and the count value of the LFPS cycle counter reaches the value indicating the start of the next LFPS cycle. This allows the signal generator 1 according to the present invention to appropriately switch between the LFPS pattern and the electrical idle pattern in the LFPS signal, and to operate in compliance with the USB4 Gen4 standard.

[0013] Furthermore, the signal generating device according to the present invention may further include an electrical idle time input unit (60) for inputting and setting a time period of the second electrical idle pattern, and the selection unit may be configured to select and output the data signal on condition that the count value of the electrical idle time counter has reached a value equivalent to the time period set by the electrical idle time input unit.

[0014] Furthermore, a signal generating method according to the present invention is a signal generating method for outputting an LFPS signal consisting of an LFPS pattern, a first electrical idle pattern provided before the LFPS pattern, and a second electrical idle pattern provided after the LFPS pattern, and includes the steps of: a step (S4) of selecting and outputting the first electrical idle pattern generated by an electrical idle generating unit (21) using a selecting unit (40); a step (S8) of selecting and outputting the LFPS pattern generated by an LFPS generating unit (22) using the selecting unit; a step (S12) of selecting and outputting the second electrical idle pattern generated by the electrical idle generating unit; a step (S13) of counting, by an electrical idle time counter (26), the time elapsed since the selecting unit started outputting the second electrical idle pattern; and a step (S14) of selecting and outputting a data signal generated by a data signal generating unit (30) using the selecting unit, on condition that the count value of the electrical idle time counter has reached a preset value.

[0015] Furthermore, the signal generating method according to the present invention may include the steps (S7, S11) of counting the LFPS period of the LFPS pattern by an LFPS period counter (23), and the steps (S6, S10) of latching by a latch unit (24) a trigger signal for causing a transition between an LFPS state in which the LFPS pattern is selected and output by the selection unit and an electrical idle state in which the first electrical idle pattern or the second electrical idle pattern is selected and output by the selection unit, until the LFPS period counter counts a value indicating the beginning of the LFPS period, and the selection unit may cause a transition between the LFPS state and the electrical idle state at the timing when the trigger signal is latched by the latch unit and the count value of the LFPS period counter reaches a value indicating the beginning of the next LFPS period. [Effects of the Invention]

[0016] The present invention provides a signal generating device and a signal generating method that can appropriately switch the pattern of an LFPS signal. [Brief explanation of the drawings]

[0017] [Figure 1] 1 is a block diagram showing a configuration of a signal generating device according to an embodiment of the present invention. [Figure 2] 2 is a block diagram showing the configuration of an LFPS signal generating unit included in the signal generating device of FIG. 1. FIG. [Figure 3] 2 is a timing chart of various signals generated in the signal generating device of FIG. [Figure 4] 10A is a table showing the number of symbols in one LFPS period of the LFPS pattern, and FIG. 10B is a diagram showing the waveform of the LFPS pattern when the LFPS period is 50 ns and the LFPS duty ratio is 55%. [Figure 5] 2 is a diagram showing an example of a setting screen displayed on a display unit provided in the signal generating device of FIG. 1. FIG. [Figure 6] 2 is a flowchart showing the process of a signal generation method using the signal generation device of FIG. 1. [Figure 7] FIG. 1 is a diagram showing the waveform of an LFPS signal defined in the USB4 Gen4 standard. DETAILED DESCRIPTION OF THE INVENTION

[0018] DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of a signal generating device and a signal generating method according to the present invention will be described with reference to the drawings.

[0019] 1, a signal generating device 1 according to an embodiment of the present invention outputs an LFPS signal and includes a switch 10, an LFPS signal generating section 20, a data signal generating section 30, a selector 40, a transceiver 42, an operation section 44, a display section 46, and a control section 48. The switch 10, the LFPS signal generating section 20, the data signal generating section 30, the selector 40, and the transceiver 42 are configured on, for example, an FPGA (Field Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit), but the following description will be given assuming that these are configured on an FPGA.

[0020] The switch 10 is configured to input any one of a first external trigger signal, a second external trigger signal, a first manual trigger signal, or a second manual trigger signal, which will be described later, to the LFPS signal generating unit 20. Note that hereinafter, the first manual trigger signal, the second manual trigger signal, the first external trigger signal, and the second external trigger signal will also be collectively referred to simply as "trigger signals." Also, hereinafter, the first manual trigger signal and the second manual trigger signal will also be collectively referred to simply as "manual trigger signals." Also, hereinafter, the first external trigger signal and the second external trigger signal will also be collectively referred to simply as "external trigger signals."

[0021] The LFPS signal generating unit 20 and the selector 40 are configured to output an LFPS signal (see FIG. 7) consisting of an LFPS pattern, a first electrical idle pattern (hereinafter simply referred to as the "first EI pattern") provided before the LFPS pattern, and a second electrical idle pattern (hereinafter simply referred to as the "second EI pattern") provided after the LFPS pattern. The LFPS signal is a ternary signal having a 0 level (low level), a 1 level (medium level), and a 2 level (high level). Note that hereinafter, the first EI pattern and the second EI pattern will be collectively referred to simply as the "EI pattern."

[0022] The first manual trigger signal and the first external trigger signal are trigger signals for causing a transition from the first EI state, which is an electrical idle state in which the first EI pattern is selected and output by the selector 40, to the LFPS state in which the LFPS pattern is selected and output by the selector 40. In other words, the first manual trigger signal and the first external trigger signal are trigger signals for causing the selector 40 to output the LFPS pattern instead of the first EI pattern.

[0023] The second manual trigger signal and the second external trigger signal are trigger signals for causing a transition from the LFPS state to the second EI state, which is an electrical idle state in which the second EI pattern is selected and output by the selector 40. In other words, the second manual trigger signal and the second external trigger signal are trigger signals for causing the selector 40 to output the second EI pattern instead of the LFPS pattern. Note that hereinafter, the first EI state and the second EI state will also be collectively referred to simply as the "EI state."

[0024] Fig. 2 is a block diagram showing the configuration of the LFPS signal generating section 20. Fig. 3 is a timing chart of various signals generated in the signal generating device 1 of this embodiment.

[0025] In the timing chart of Figure 3, the period of one clock of the FPGA operating clock for 256-bit bus operation is 10 ns, that is, the operating clock frequency is 100 MHz. Therefore, the baud rate of various signals at this time is 25.6 GBaud.

[0026] As shown in FIG. 2, the LFPS signal generating unit 20 includes an EI generating unit 21, an LFPS generating unit 22, an LFPS period counter 23, a latch unit 24, a transition request signal output unit 25, an EI time counter 26, and a data request signal output unit 27.

[0027] The EI generating unit 21 constitutes an electrical idle generating unit that generates a first EI pattern and a second EI pattern. Both the first EI pattern and the second EI pattern are constant voltage signals, and are normally 0V signals. Note that if the entire LFPS signal generated by the LFPS signal generating unit 20 is offset as needed, the voltages of the first EI pattern and the second EI pattern will be the offset voltage.

[0028] The LFPS generating unit 22 is configured to continuously generate LFPS patterns of the LFPS period tPeriod set by the LFPS period input section 58 on the setting screen 50 described later and the LFPS duty ratio Duty Cycle set by the LFPS duty ratio input section 59.

[0029] The LFPS period counter 23 counts the LFPS period tPeriod of the LFPS pattern generated by the LFPS generating unit 22 in increments of one clock of the FPGA's operating clock. The minimum value of the LFPS period count value of the LFPS period counter 23 is 0. The maximum value of the LFPS period count value of the LFPS period counter 23 is the value obtained by dividing the LFPS period tPeriod by the time of one clock of the operating clock, minus 1, and is a count value equivalent to the LFPS period tPeriod.

[0030] 3, the LFPS period tPeriod is 60 ns and the time of one clock is 10 ns, so the LFPS period counter 23 counts 0, 1, 2, 3, 4, and 5 during a period of 60 ns. The minimum LFPS period count value indicates the timing of the beginning of the LFPS period tPeriod, and the maximum LFPS period count value indicates the timing of the end of the LFPS period tPeriod.

[0031] The LFPS pattern is a signal that, when the LFPS duty cycle (Duty Cycle) is 50%, becomes level 2 when the LFPS period count value is half or less of the maximum value (0 to 2 in the example in Figure 3), and becomes level 0 when the LFPS period count value is half or more of the maximum value (3 to 5 in the example in Figure 3). For example, when half the maximum value of the LFPS period count value is an integer, such as when the LFPS period tPeriod is 30 ns, the LFPS pattern becomes level 2 for the first 128 symbols out of 256 symbols, and level 0 for the latter 128 symbols, at the clock exactly in the middle of the LFPS period tPeriod.

[0032] Fig. 4(a) is a table showing the number of symbols in one LFPS period tPeriod of an LFPS pattern according to the LFPS period tPeriod and the LFPS duty cycle. Fig. 4(b) shows, as an example, a schematic diagram of the waveform of an LFPS pattern when the LFPS period tPeriod is 50 ns and the LFPS duty cycle is 55%.

[0033] That is, when the LFPS period tPeriod is 50 ns and the LFPS duty cycle Duty Cycle is 55%, when the LFPS period count value is 0 or 1, the 2 level continues for 256 symbols. When the LFPS period count value is 2, the 2 level continues for 192 symbols and the 0 level continues for 64 symbols. When the LFPS period count value is 3 or 4, the 0 level continues for 256 symbols.

[0034] The latch unit 24 latches the trigger signal until the LFPS period counter 23 counts a value indicating the beginning of the LFPS period tPeriod, and outputs a trigger latch signal such as that shown in FIG.

[0035] The manual trigger signal is input from the control unit 48 to the latch unit 24 via the switch 10 by pressing a trigger signal button 54 on a setting screen 50, which will be described later. On the other hand, the external trigger signal is output from, for example, a DUT connected to a measurement system including the signal generating device 1 of this embodiment, and input to the latch unit 24 via the switch 10.

[0036] The transition request signal output unit 25 outputs a transition request signal requesting a transition between the LFPS state and the EI state to the selector 40 and the EI time counter 26 when the trigger signal is latched by the latch unit 24 and the LFPS period count value of the LFPS period counter 23 reaches the maximum value indicating the end of the LFPS period tPeriod.

[0037] That is, the transition request signal is a signal obtained by delaying the trigger signal input via the switch 10 according to the LFPS period tPeriod of the LFPS pattern generated by the LFPS generator 22. The selector 40 causes a transition between the LFPS state and the EI state one clock after receiving the transition request signal. This makes it possible to prevent a transition between the LFPS state and the EI state from occurring at the start of the LFPS period tPeriod, and from occurring in the middle of the LFPS period tPeriod.

[0038] The EI time counter 26 is a counter that is valid only in the second EI state, and constitutes an electrical idle time counter that counts the elapsed time from when the selector 40 starts outputting the second EI pattern in increments of one clock of the operating clock. Specifically, the EI time counter 26 starts counting one clock after receiving the transition request signal.

[0039] The minimum EI time count value of the EI time counter 26 is 0. The maximum EI time count value of the EI time counter 26 is the value obtained by dividing the time tPreData, which is set in advance in an electrical idle time input section 60 on a setting screen 50 (described later), by the time of one clock of the operating clock, and then subtracting 1 from the result, and is a count value corresponding to the time tPreData.

[0040] 3, since the time tPreData is 100 ns and the time of one clock is 10 ns, the EI time counter 26 counts 0, 1, 2, 3, 4, 5, 6, 7, 8, and 9. The minimum EI time count value indicates the timing of the start of the second EI pattern, and the maximum EI time count value indicates the timing of the end of the second EI pattern.

[0041] The data request signal output unit 27 outputs a data request signal to the selector 40 requesting a transition from the second EI state to a data transmission state when the EI time count value of the EI time counter 26 reaches a maximum value indicating the end of the second EI pattern. Here, the data transmission state is a state in which the data signal output from the data signal generating unit 30 is selected and output by the selector 40. The selector 40 transitions from the second EI state to the data transmission state one clock after receiving the data request signal. In other words, the selector 40 selects and outputs the data signal in place of the second EI pattern after the time tPreData has elapsed since the start of output of the second EI pattern.

[0042] The data signal generating unit 30 is capable of generating a USB4 Gen4 data signal, and includes PRBS generating circuits 31 and 32, a PRTS generating circuit 33, pattern storage units 34 and 35, selectors 36 and 37, and an encoding circuit 38.

[0043] The PRBS generating circuit 31 generates a first PAM2 signal consisting of a pseudo-random pattern of two binary PAM (Pulse Amplitude Modulation) symbols of 0 level (low level) and 2 level (high level) in accordance with a PRBS generating polynomial.

[0044] Furthermore, the PRBS generation circuit 32 generates a second PAM2 signal consisting of a pseudo-random pattern of binary PAM2 symbols with a level of 0 (low level) and a level of 1 (medium level) in accordance with a PRBS generation polynomial. Note that when the data signal generated by the data signal generation unit 30 is a USB4 Gen4 PAM3 signal or PAM2 signal, the PRBS generation circuit 32 is not used.

[0045] The PRTS generating circuit 33 generates a PAM3 signal consisting of a pseudo-random pattern of ternary PAM3 symbols of 0 level (low level), 1 level (medium level), and 2 level (high level) in accordance with a PRTS generating polynomial.

[0046] The pattern storage units 34 and 35 store, for example, pattern signals consisting of arbitrary patterns created by the user.

[0047] The selector 36 is configured to output either the first PAM2 signal generated by the PRBS generation circuit 31, the most significant bit (MSB) of the PAM3 signal generated by the PRTS generation circuit 33, or the pattern signal from the pattern storage unit 34, based on data selection information input from the control unit 48. The selector 36 outputs the MSB of the data signal generated by the data signal generation unit 30.

[0048] Based on data selection information input from the control unit 48, the selector 37 outputs either the second PAM2 signal generated by the PRBS generation circuit 32, the least significant bit (LSB) of the PAM3 signal generated by the PRTS generation circuit 33, or the pattern signal from the pattern storage unit 35. The selector 37 outputs the LSB of the data signal generated by the data signal generation unit 30.

[0049] Here, the data selection information is information indicating what output signal is to be selected from the PRBS generation circuits 31, 32, the PRTS generation circuit 33, and the pattern storage units 34, 35, and can be set by the user by inputting an operation into the "Test Pattern" pull-down menu 51 on the setting screen 50 described later.

[0050] The encoding circuit 38 performs coding such as gray coding or precoding on the signals output from the selectors 36 and 37 based on coding information input from the control unit 48. Here, the coding information is information indicating whether gray coding or precoding is to be performed, and can be set by a user operating the operation unit 44.

[0051] For example, if the gray coding process has been set to on in advance by a user's operation input to the operation unit 44, the encoding circuit 38 performs gray coding on the signals output from the selectors 36 and 37. On the other hand, if the gray coding process has been set to off in advance by a user's operation input to the operation unit 44, the encoding circuit 38 does not perform gray coding on the signals output from the selectors 36 and 37. Similarly, if the precoding process has been set to on in advance by a user's operation input to the operation unit 44, the encoding circuit 38 performs precoding on the signals output from the selectors 36 and 37. On the other hand, if the precoding process has been set to off in advance by a user's operation input to the operation unit 44, the encoding circuit 38 does not perform precoding on the signals output from the selectors 36 and 37.

[0052] The selector 40 can be in four states: a preset state, an LFPS state, a first EI state, a second EI state, and a data transmission state. That is, the selector 40 constitutes a selection unit that selects and outputs one of the LFPS pattern, the first EI pattern, the second EI pattern, or a data signal.

[0053] The selector 40 transitions to the preset state when triggered by receiving the LFPS transmission signal input from the control unit 48, and outputs a signal with a voltage equivalent to the 0 level of the LFPS signal. Here, the LFPS transmission signal is output from the control unit 48 when "USB4 Gen4 Power Management State Signal" is selected in a "Test Pattern" pull-down menu 51 on a setting screen 50, which will be described later.

[0054] In the preset state, the selector 40 transitions to the first EI state one clock after the transmit / stop button 53 on the setting screen 50 (described later) is pressed by the operation unit 44 and the LFPS transmit signal is turned on, and selects and outputs the first EI pattern of a voltage equivalent to level 1 of the LFPS signal.

[0055] In the first EI state, the selector 40 transitions to the LFPS state one clock after receiving the transition request signal, and selects and outputs the LFPS pattern of voltages corresponding to the 0 level and 2 level of the LFPS signal.

[0056] Furthermore, in the LFPS state, the selector 40 transitions to the second EI state one clock after receiving the transition request signal, and selects and outputs the second EI pattern of a voltage corresponding to level 1 of the LFPS signal.

[0057] Furthermore, in the second EI state, the selector 40 transitions to the data transmission state one clock after receiving the data request signal, and selects and outputs the data signal generated by the data signal generating section 30.

[0058] Furthermore, in the data transmission state, for example, one clock after the send / stop button 53 on the setting screen 50 is pressed by the operation unit 44 and the LFPS transmission signal is turned off, the selector 40 transitions again to the preset state and outputs a signal with a voltage equivalent to the 0 level of the LFPS signal.

[0059] It should be noted that a transition from each state to the preset state occurs not only in the data transmission state but also when the LFPS transmission signal is turned off and when the bit rates of the LFPS signal and data signal are changed. The bit rate can be changed, i.e., the operating clock of the FPGA can be changed, for example, by a user operating the operation unit 44.

[0060] The transceiver 42 constitutes an output section of the FPGA that outputs the signal output from the selector 40 to the outside of the FPGA.

[0061] The operation unit 44 is for accepting operation inputs by the user, and is composed of user interfaces such as operation knobs, various keys, switches, and buttons provided on the main body of the signal generating device 1 shown in Fig. 1, and soft keys on the display screen of the display unit 46. The operation unit 44 also sets various parameters on a setting screen 50 of the signal generating device 1, which will be described later.

[0062] 1, is configured with a display device such as an LCD (Liquid Crystal Display) or a CRT (Cathode Ray Tube), and displays various information such as a setting screen 50 and measurement results based on a display control signal from the control unit 48. The display unit 46 may also have the operation functions of the operation unit 44, such as soft keys on the display screen.

[0063] The control unit 48 comprehensively controls the switch 10, the LFPS signal generating unit 20, the data signal generating unit 30, the selector 40, the transceiver 42, the operation unit 44, and the display unit 46. The control unit 48 is also configured by a control device such as a computer including, for example, a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), an FPGA, a ROM (Read Only Memory), a RAM, and an HDD (Hard Disk Drive).

[0064] As shown in FIG. 5, the display unit 46 displays a setting screen 50 for inputting and setting various parameters that determine the waveform of the LFPS signal.

[0065] The setting screen 50 includes a "Test Pattern" pull-down menu 51, a "USB4 Data" pull-down menu 52, a send / stop button 53, a lamp 53a, a trigger signal button 54, a lamp 54a, a precoder button 55, a polarity inversion button 56, an LFPS differential amplitude input section 57, an LFPS period input section 58, an LFPS duty ratio input section 59, an electrical idle time input section 60, and a state table 61.

[0066] The "Test Pattern" pull-down menu 51 allows the operation unit 44 to select the type of signal to be generated by the signal generator 1. Figure 5 shows a state in which "USB4 Gen4 Power Management State Signal" has been selected to use the USB4 Gen4 LFPS signal.

[0067] The "USB4 Data" pull-down menu 52 allows the user to select a data signal from, for example, "PRBS7" to "PRBS31," "PRTS7," "PRTS19," "Data," or "TS2.clksw." "Data" is a pattern signal that is arbitrarily created in advance by the user and stored in the pattern storage units 34 and 35. "TS2.clksw" is a ternary pattern consisting of a repetitive sequence of 28 UI (Unit Interval).

[0068] The send / stop button 53 is configured as a button for switching on / off the LFPS transmission signal to start outputting the LFPS signal from the selector 40 and to instruct the selector 40 to stop outputting the LFPS signal or data signal.

[0069] The display of "Transmit" on the send / stop button 53 indicates that output of the LFPS signal from the selector 40 has not started. When the send / stop button 53 displaying "Transmit" is pressed by the operation unit 44, the LFPS transmission signal is turned on and output of the LFPS signal from the selector 40 starts. At this time, the display of "Transmit" on the send / stop button 53 changes to "Stop" and the lamp 53a lights up.

[0070] On the other hand, when the send / stop button 53 displaying "Stop" is pressed by the operation unit 44, the output of the LFPS signal or data signal from the selector 40 is stopped. At this time, as shown in Fig. 5, the display of "Stop" on the send / stop button 53 changes again to "Transmit," and the lamp 53a is turned off.

[0071] The trigger signal button 54 constitutes a trigger signal output instruction unit that instructs the control unit 48 to output a manual trigger signal. When the trigger signal button 54 is pressed by the operation unit 44 while the first EI pattern is being output from the selector 40, a first manual trigger signal for causing the selector 40 to output the LFPS pattern instead of the first EI pattern is input from the control unit 48 to the latch unit 24 of the LFPS signal generating unit 20 via the switch 10.

[0072] On the other hand, when the trigger signal button 54 is pressed by the operation unit 44 while the selector 40 is outputting an LFPS pattern, a second manual trigger signal for causing the selector 40 to output a second EI pattern instead of the LFPS pattern is input from the control unit 48 to the latch unit 24 of the LFPS signal generating unit 20 via the switch 10.

[0073] The lamp 54a lights up when the trigger signal button 54 is pressed while a manual trigger signal is selected in the state table 61 described later, and turns off when an external trigger signal is selected in the state table 61 described later.

[0074] The precoder button 55 is configured as a button for specifying whether or not to perform precoding in the encoding circuit 38. The display of "OFF" on the precoder button 55 indicates that the precoding process in the encoding circuit 38 is set to off. On the other hand, the display of "ON" on the precoder button 55 indicates that the precoding process in the encoding circuit 38 is set to on.

[0075] The polarity inversion button 56 is configured as a button for inverting the polarity of the entire waveform of the LFPS signal generated by the LFPS signal generating unit 20 and the polarity of the entire waveform of the data signal generated by the data signal generating unit 30. The display of "OFF" on the polarity inversion button 56 indicates that the waveforms of the LFPS signal and data signal are not inverted. On the other hand, the display of "ON" on the polarity inversion button 56 indicates that the waveforms of the LFPS signal and data signal are inverted. Inverting the waveforms of the LFPS signal and data signal with the polarity inversion button 56 is effective, for example, when an external inverting amplifier is attached to the signal output side of the signal generating device 1.

[0076] The LFPS differential amplitude input section 57 displays the differential amplitude of the LFPS pattern set on a setting screen (not shown) in a state where the value cannot be changed.

[0077] The LFPS period input section 58 is configured as a text box for inputting and setting the LFPS period tPeriod of the LFPS pattern. The LFPS period input section 58 allows the LFPS period tPeriod to be input via the operation section 44 within the range of 20 to 80 ns.

[0078] The LFPS duty cycle input section 59 is configured as a pull-down menu for inputting and setting the LFPS duty cycle of the LFPS pattern. The LFPS duty cycle input section 59 allows the user to select 45%, 50%, or 55% as the LFPS duty cycle using the operation section 44.

[0079] The electrical idle time input section 60 is configured as a text box for inputting and setting the time tPreData of the second EI pattern.

[0080] The state table 61 forms a state display area that displays, for each state, information indicating whether a manual trigger signal or an external trigger signal is input to the LFPS signal generating unit 20, and information indicating whether an LFPS pattern, an EI pattern, or a data signal is output from the selector 40.

[0081] The "Block No." column in the state table 61 indicates each state of the selector 40 by number. "#1" indicates the first EI state, "#2" the LFPS state, "#3" the second EI state, and "#4" the data transmission state.

[0082] Furthermore, the "Break" column in the state table 61 indicates whether a manual trigger signal or an external trigger signal is input to the LFPS signal generating unit 20. The setting of the "Break" column can be switched between "Manual" and "External" using the operation unit 44.

[0083] FIG. 5 shows an example in which "Manual" is set in the "Break" field. "Manual" indicates that a manual trigger signal is input to the LFPS signal generating unit 20. The lamp 54a lights up when the trigger signal button 54 is pressed by the operation unit 44. On the other hand, if "External" is set in the "Break" field, an external trigger signal is input to the LFPS signal generating unit 20. If "External" is set in the "Break" field of the state table 61, the trigger signal button 54 cannot be pressed, and the lamp 54a does not light up.

[0084] The "Pattern" column in the state table 61 displays the type of signal pattern used in each state. "Electrical Idle" indicates the EI pattern, "LFPS" indicates the LFPS pattern, and "USB4 Data" indicates a data signal.

[0085] An example of the process of a signal generating method using the signal generating device 1 of this embodiment will be described below with reference to the flowchart in Fig. 6. Note that descriptions that overlap with the description of the configuration of the signal generating device 1 described above will be omitted as appropriate.

[0086] First, the user selects "USB4 Gen4 Power Management State Signal" in the "Test Pattern" pull-down menu 51 on the setting screen 50 for configuring settings related to the LFPS signal via the operation unit 44. This turns on the LFPS transmission signal, and the state of the selector 40 becomes the preset state (step S1).

[0087] Next, the user inputs and sets the LFPS period tPeriod in the LFPS period input section 58 of the setting screen 50, the LFPS duty ratio Duty Cycle in the LFPS duty ratio input section 59 of the setting screen 50, and the time tPreData of the second EI pattern in the electrical idle time input section 60 of the setting screen 50 via the operation section 44 (step S2).

[0088] Next, when the user presses the transmit / stop button 53 via the operation unit 44 and the LFPS transmission signal is turned on (step S3: YES), the state of the selector 40 changes to the first EI state, and the selector 40 selects and outputs the first EI pattern generated by the EI generating unit 21 (step S4).

[0089] Next, when the user presses the trigger signal button 54 via the operation unit 44, a first manual trigger signal is input to the LFPS signal generating unit 20 via the switch 10, or when a first external trigger signal is input to the LFPS signal generating unit 20 via the switch 10 (step S5: YES), the latch unit 24 latches the trigger signal (step S6).

[0090] Next, when the LFPS period count value of LFPS period counter 23 reaches the maximum value indicating the end of the LFPS period tPeriod (step S7: YES), the state of selector 40 changes to the LFPS state at the timing when the LFPS period count value of LFPS period counter 23 reaches the value indicating the beginning of the next LFPS period tPeriod, and selector 40 selects and outputs the LFPS pattern (step S8).

[0091] Next, when the user presses the trigger signal button 54 via the operation unit 44, a second manual trigger signal is input to the LFPS signal generating unit 20 via the switch 10, or when a second external trigger signal is input to the LFPS signal generating unit 20 via the switch 10 (step S9: YES), the latch unit 24 latches the trigger signal (step S10).

[0092] Next, when the LFPS period count value of the LFPS period counter 23 reaches the maximum value indicating the end of the LFPS period tPeriod (step S11: YES), the state of the selector 40 changes to the second EI state at the timing when the LFPS period count value of the LFPS period counter 23 reaches the value indicating the beginning of the next LFPS period tPeriod, and the selector 40 selects and outputs the second EI pattern (step S12).

[0093] When the EI time count value of the EI time counter 26 reaches a value corresponding to the time tPreData and the counting of the time tPreData of the second EI pattern ends (step S13: YES), the state of the selector 40 changes to a data transmission state from the next clock, and the selector 40 selects and outputs a data signal (step S14).

[0094] When the bit rate of the LFPS signal and the data signal is changed, or when the user presses the transmit / stop button 53 via the operation unit 44 to turn off the LFPS transmission signal, or when the user presses the trigger signal button 54 via the operation unit 44 (step S15: YES), the state of the selector 40 returns to the preset state (step S1).

[0095] Regardless of the data transmission state, when the bit rates of the LFPS signal and data signal are changed or the LFPS transmission signal is turned off, a transition from the current state to the preset state occurs.

[0096] As described above, the signal generating device 1 according to this embodiment is configured to output a data signal instead of the second EI pattern on the condition that the EI time count value of the EI time counter 26 reaches a preset value. This allows the signal generating device 1 according to this embodiment to appropriately switch from the second EI pattern in the LFPS signal to a data signal, thereby enabling operation in compliance with the USB4 Gen4 standard.

[0097] Furthermore, the signal generating device 1 according to this embodiment transitions between the LFPS state and the EI state at the timing when the LFPS period count value of the LFPS period counter 23 reaches a value indicating the beginning of the next LFPS period tPeriod after the latch unit 24 receives the trigger signal. This allows the signal generating device 1 according to this embodiment to appropriately switch between the LFPS pattern and the EI pattern in the LFPS signal, and perform operations compliant with the USB4 Gen4 standard. [Explanation of symbols]

[0098] 1. Signal Generator 10 Switch 20 LFPS signal generator 21 EI generator (electrical idle generator) 22 LFPS generator 23 LFPS period counter 24 Latch section 26 EI Hour Counter (Electrical Idle Hour Counter) 30 Data signal generator 40 Selector (selection section) 44 Control section 46 Display section 48 Control Unit 50 Settings screen 51,52 Drop-down menu 53 Send / Stop button 54 Trigger signal button (trigger signal output instruction section) 58 LFPS period input section 59 LFPS duty ratio input section 60 Electrical idle time input section 61 State table (state display area)

Claims

1. A signal generating device (1) that outputs an LFPS signal consisting of an LFPS pattern, a first electrical idle pattern provided before the LFPS pattern, and a second electrical idle pattern provided after the LFPS pattern, an LFPS generator (22) that generates the LFPS pattern; an electrical idle generating unit (21) that generates the first electrical idle pattern and the second electrical idle pattern; a data signal generating unit (30) for generating a data signal; a selection unit (40) that selects and outputs any one of the LFPS pattern, the first electrical idle pattern, the second electrical idle pattern, or the data signal; an electrical idle time counter (26) that counts the elapsed time from when the selection unit starts outputting the second electrical idle pattern, a selection unit that selects and outputs the data signal when the count value of the electrical idle time counter reaches a preset value;

2. an LFPS period counter (23) for counting the LFPS period of the LFPS pattern; a latch unit (24) that latches a trigger signal for causing a transition between an LFPS state in which the LFPS pattern is selected and output by the selection unit and an electrical idle state in which the first electrical idle pattern or the second electrical idle pattern is selected and output by the selection unit until the LFPS period counter counts a value indicating the beginning of the LFPS period; 2. The signal generating device according to claim 1, wherein the selection unit causes a transition between the LFPS state and the electrical idle state when the trigger signal is latched by the latch unit and the count value of the LFPS period counter reaches a value indicating the beginning of the next LFPS period.

3. further comprising an electrical idle time input section (60) for inputting and setting the time of the second electrical idle pattern; 3. The signal generating device according to claim 1, wherein the selection unit selects and outputs the data signal on the condition that the count value of the electrical idle time counter reaches a value corresponding to the time set by the electrical idle time input unit.

4. 1. A signal generating method for outputting an LFPS signal including an LFPS pattern, a first electrical idle pattern provided before the LFPS pattern, and a second electrical idle pattern provided after the LFPS pattern, comprising: a step (S4) of selecting and outputting the first electric idle pattern generated by the electric idle generating unit (21) by a selecting unit (40); a step (S8) of selecting and outputting the LFPS pattern generated by the LFPS generating unit (22) by the selecting unit; a step of selecting and outputting the second electrical idle pattern generated by the electrical idle generating unit using the selecting unit (S12); a step (S13) of counting the elapsed time from when the selection unit starts outputting the second electrical idle pattern by an electrical idle time counter (26); and a step (S14) of selecting and outputting the data signal generated by the data signal generating unit (30) by the selecting unit on the condition that the count value of the electrical idle time counter has reached a preset value.

5. a step (S7, S11) of counting the LFPS period of the LFPS pattern by an LFPS period counter (23); and latching (S6, S10) a trigger signal for causing a transition between an LFPS state in which the LFPS pattern is selected and output by the selection unit and an electrical idle state in which the first electrical idle pattern or the second electrical idle pattern is selected and output by the selection unit, until the LFPS period counter counts a value indicating the beginning of the LFPS period, 5. The signal generating method according to claim 4, wherein the trigger signal is latched by the latch unit and the selection unit causes a transition between the LFPS state and the electrical idle state at the timing when the count value of the LFPS period counter reaches a value indicating the beginning of the next LFPS period.

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